JP2011085649A - Method of driving plasma display panel, and plasma display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce black luminance of a display image, thereby enhancing a contrast of the display image, at the same time, displaying the gradation of a dark area in the display image more minutely while preventing the occurrence of an unlit cell and, as the result, improving the image display quality. <P>SOLUTION: A predetermined cell initialization subfield having the initialization period during which a forced initialization waveform is applied to a prescribed discharge cell and a selective initialization waveform is applied to other discharge cells is disposed and, in a maintenance period of the subfield immediately preceding the predetermined cell initialization subfield, a maintenance pulse is not applied but one oblique voltage which rises from a base potential to a prescribed potential is applied to the discharge cell to which the forced initialization waveform is to be applied and the maintenance pulse is applied only one time to the discharge cell to which the selective initialization waveform is to be applied. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a driving method of a plasma display panel and a plasma display device used for a wall-mounted television or a large monitor.

  A typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a large number of discharge cells formed between a front plate and a back plate arranged to face each other. In the front plate, a plurality of pairs of display electrodes composed of a pair of scan electrodes and sustain electrodes are formed on the front glass substrate in parallel with each other. A dielectric layer and a protective layer are formed so as to cover the display electrode pairs.

  In the back plate, a plurality of parallel data electrodes are formed on a back glass substrate, a dielectric layer is formed so as to cover the data electrodes, and a plurality of barrier ribs are formed thereon in parallel with the data electrodes. . And the fluorescent substance layer is formed in the surface of a dielectric material layer, and the side surface of a partition.

  Then, the front plate and the back plate are arranged to face each other and sealed so that the display electrode pair and the data electrode are three-dimensionally crossed. In the sealed internal discharge space, for example, a discharge gas containing xenon at a partial pressure ratio of 5% is sealed, and a discharge cell is formed in a portion where the display electrode pair and the data electrode face each other. In the panel having such a configuration, ultraviolet rays are generated by gas discharge in each discharge cell, and phosphors of red (R), green (G) and blue (B) colors are excited and emitted by the ultraviolet rays. The image is displayed.

  A subfield method is generally used as a method for driving the panel. In the subfield method, one field is divided into a plurality of subfields, and light emission and non-light emission of each discharge cell are controlled in each subfield. Then, gradation display is performed by controlling the number of times of light emission generated in one field.

  Each subfield has an initialization period, an address period, and a sustain period. In the initialization period, an initialization waveform is applied to each scan electrode, and an initialization discharge is generated in each discharge cell. Thereby, in each discharge cell, wall charges necessary for the subsequent address operation are formed, and priming particles (excited particles for generating the address discharge) for generating the address discharge stably are generated.

  In the address period, a scan pulse is applied to the scan electrode, and an address pulse is selectively applied to the data electrode based on the image signal to be displayed. Thereby, in the discharge cell to emit light, an address discharge is generated between the scan electrode and the data electrode to form wall charges (hereinafter, this operation is also referred to as “address”).

  In the sustain period, sustain pulses of the number of times determined for each subfield are alternately applied to the display electrode pair including the scan electrode and the sustain electrode. As a result, a sustain discharge is generated in the discharge cell that has caused the address discharge, and the phosphor layer of the discharge cell emits light. As a result, each discharge cell emits light at a luminance corresponding to the luminance weight determined for each subfield. In this way, each discharge cell of the panel is caused to emit light with a luminance corresponding to the gradation value of the image signal, and an image is displayed in the image display area of the panel.

  One of the important factors for improving the quality of the image displayed on the panel is an improvement in contrast. As one of panel driving methods based on the subfield method, a driving method is disclosed in which light emission not related to gradation display is reduced as much as possible to improve contrast.

  In this driving method, an initialization operation is performed in which an initializing discharge is generated in all the discharge cells in an initializing period of one subfield among a plurality of subfields constituting one field. In the initializing period of the other subfield, an initializing operation is performed in which initializing discharge is selectively performed on the discharge cells in which the sustain discharge has been performed in the sustain period of the immediately preceding subfield.

  The luminance of the black display area where the sustain discharge does not occur (hereinafter abbreviated as “black luminance”) varies depending on the light emission regardless of the gradation value, for example, the light emission generated by the initialization discharge. However, in the driving method described above, light emission in the black display region is only weak light emission when the initialization operation is performed on all the discharge cells. Thereby, it is possible to reduce the black luminance and display an image with high contrast (for example, refer to Patent Document 1).

  In addition, an initializing waveform having a rising part having a gradually increasing slope part and a falling part having a gradually decreasing slope part is applied to the scan electrode, and the sustain period of the immediately preceding subfield is applied. An initializing period for causing an initializing discharge is provided in the discharge cell that has undergone the sustaining discharge, and a weak discharge is caused between the sustaining electrode and the scanning electrode for all the discharge cells immediately before an arbitrary initializing period in one field. A technique for reducing black luminance and improving black visibility by providing a period is disclosed (for example, see Patent Document 2).

  In addition, a technique is disclosed in which, after the sustain pulse is applied to the display electrode pair in the sustain period, a rising ramp voltage is applied to the sustain electrode to erase wall charges in the discharge cell (for example, Patent Documents). 3).

JP 2000-242224 A JP 2004-37883 A JP 2004-348140 A

  As described above, for example, in the technique described in Patent Document 1, the initializing operation for generating the initializing discharge in all the discharge cells is performed once in one field, so that all the discharge cells are in each subfield. Compared with the case where the initialization discharge is generated, the black luminance of the display image can be reduced and the contrast can be increased.

  However, in recent years, there has been a demand for further improvement in image display quality with the increase in the screen size and definition of the panel.

  The present invention has been made in view of such a demand, and while reducing the black luminance of the display image to increase the contrast and preventing the occurrence of unlit cells, the gradation of the dark region in the display image is made finer. It is an object of the present invention to provide a panel driving method and a plasma display device that can display and improve image display quality.

  According to the panel driving method of the present invention, a panel having a plurality of discharge cells each having a display electrode pair composed of a scan electrode and a sustain electrode is provided with a subfield having an initialization period, an address period, and a sustain period in one field. A method of driving a panel which provides a gray scale display by providing a plurality of voltages, applying a forced initializing waveform that generates initializing discharge to a predetermined discharge cell, and sustaining discharge to other discharge cells in the sustain period of the immediately preceding subfield A specific cell initializing subfield having an initializing period for applying a selective initializing waveform for generating an initializing discharge to a discharge cell that has generated a fault, and forcing in a sustain period of the subfield immediately before the specific cell initializing subfield A single ramp voltage that rises from the base potential to a predetermined potential is applied to the discharge cell to which the initialization waveform is applied without applying a sustain pulse, and a selective initialization waveform is applied And applying only once a sustain pulse to that discharge cell.

  Thereby, since the frequency of performing the forced initializing operation in each discharge cell can be set to once in a plurality of fields, than the configuration in which the initializing discharge is generated in each discharge cell at a rate of once per field, Black brightness can be lowered. In addition, since the subfield immediately before the specific cell initialization subfield can emit light at a lower luminance than the subfield in which the sustain pulse is applied to each of the display electrode pairs at least once to generate the sustain discharge. Therefore, the luminance of the gradation value next to the black luminance (for example, the luminance of the gradation value “0”) can be lowered. In addition, in the discharge cell to which the selective initialization waveform is applied in the specific cell initialization subfield, the sustain discharge by the sustain pulse, that is, sufficient wall charges and priming particles are sufficiently generated in the sustain period of the immediately preceding subfield. Since a strong discharge that can be generated is generated, it is possible to stably perform the address operation in the subsequent subfields. Therefore, the black luminance of the display image is reduced to increase the contrast, and the non-lighted cells are prevented from occurring, and the continuity of the displayed luminance is improved to display the gradation of the dark area in the display image more finely. The image display quality in the plasma display device can be improved.

  The plasma display device of the present invention includes a plurality of discharge cells each having a display electrode pair including a scan electrode and a sustain electrode, and a plurality of subfields having an initialization period, an address period, and a sustain period are provided in one field, A panel for providing gradation display by providing a field having a specific cell initialization subfield, a sustain electrode driving circuit for applying a sustain pulse to the sustain electrode in the sustain period, and a forced initialization waveform for generating an initializing discharge in the discharge cell, One of the selective initializing waveforms for generating the initializing discharge in the discharge cell in which the sustaining discharge has occurred in the sustaining period of the immediately preceding subfield is generated in the initializing period, and in the initializing period of the specific cell initializing subfield Applies a forced initialization waveform to a given discharge cell and applies a selective initialization waveform to other discharge cells. A scan electrode driving circuit for applying a sustain pulse to the scan electrode, and the discharge cell to which a forced initializing waveform is applied in the sustain period immediately before the specific cell initializing subfield includes a sustain electrode driving circuit and a scan The electrode drive circuit does not apply the sustain pulse to the display electrode pair, and the scan electrode drive circuit applies one ramp voltage that rises from the base potential to a predetermined potential to the scan electrode, and applies the selective initialization waveform to the discharge cell. The sustain electrode driving circuit does not apply the sustain pulse to the sustain electrodes, and the scan electrode drive circuit applies the sustain pulse to the scan electrodes only once.

  Thereby, since the frequency of performing the forced initializing operation in each discharge cell can be set to once in a plurality of fields, than the configuration in which the initializing discharge is generated in each discharge cell at a rate of once per field, Black brightness can be lowered. In addition, since the subfield immediately before the specific cell initialization subfield can emit light at a lower luminance than the subfield in which the sustain pulse is applied to each of the display electrode pairs at least once to generate the sustain discharge. Therefore, the luminance of the gradation value next to the black luminance (for example, the luminance of the gradation value “0”) can be lowered. In addition, in the discharge cell to which the selective initialization waveform is applied in the specific cell initialization subfield, the sustain discharge by the sustain pulse, that is, sufficient wall charges and priming particles are sufficiently generated in the sustain period of the immediately preceding subfield. Since a strong discharge that can be generated is generated, it is possible to stably perform the address operation in the subsequent subfields. Therefore, the black luminance of the display image is reduced to increase the contrast, and the non-lighted cells are prevented from occurring, and the continuity of the displayed luminance is improved to display the gradation of the dark area in the display image more finely. The image display quality in the plasma display device can be improved.

  Further, in this plasma display device, a switching element for connecting the scan electrode to the base potential may be provided on each of the scan electrodes. This makes it possible to selectively connect the scan electrode to the base potential.

  According to the present invention, the black luminance of the display image is reduced to increase the contrast, and the gradation of dark areas in the display image is displayed more finely while preventing the occurrence of non-lighted cells, thereby improving the image display quality. It is possible to provide a panel driving method and a plasma display device capable of achieving the above.

It is a disassembled perspective view which shows the structure of the panel in one embodiment of this invention. It is an electrode array figure of the panel. It is a wave form diagram which shows an example of the drive voltage waveform applied to each electrode of a panel in the 1st field in one embodiment of this invention. It is a wave form diagram which shows an example of the drive voltage waveform applied to each electrode of a panel in the 2nd field in one embodiment of this invention. It is a figure which shows an example of the generation pattern of the forced initialization waveform and selection initialization waveform in one embodiment of this invention. It is a circuit block diagram of the plasma display apparatus in one embodiment of the present invention. It is a circuit diagram which shows one structural example of the scanning electrode drive circuit in one embodiment of this invention. 6 is a timing chart for explaining an example of the operation of the scan electrode driving circuit in the initialization period of the specific cell initialization subfield according to the embodiment of the present invention. It is a wave form diagram which shows another example of the drive voltage waveform applied to each electrode of a panel in the 1st field in one embodiment of this invention. It is a wave form diagram which shows another example of the drive voltage waveform applied to each electrode of a panel in the 1st field in one embodiment of this invention.

  Hereinafter, a plasma display device according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is an exploded perspective view showing the structure of panel 10 according to an embodiment of the present invention. A plurality of display electrode pairs 24 each including a scanning electrode 22 and a sustain electrode 23 are formed on a glass front plate 21. A dielectric layer 25 is formed so as to cover the scan electrode 22 and the sustain electrode 23, and a protective layer 26 is formed on the dielectric layer 25. The protective layer 26 is formed of a material mainly composed of magnesium oxide (MgO) having a large secondary electron emission coefficient and excellent durability.

  A plurality of data electrodes 32 are formed on the back plate 31, a dielectric layer 33 is formed so as to cover the data electrodes 32, and a grid-like partition wall 34 is formed thereon. A phosphor layer 35 that emits light of each color of red (R), green (G), and blue (B) is provided on the side surface of the partition wall 34 and on the dielectric layer 33.

  The front plate 21 and the back plate 31 are arranged to face each other so that the display electrode pair 24 and the data electrode 32 intersect with each other with a minute discharge space interposed therebetween. And the outer peripheral part is sealed with sealing materials, such as glass frit. A mixed gas of neon and xenon is sealed as a discharge gas in the discharge space inside. In the present embodiment, a discharge gas having a xenon partial pressure of about 10% is used in order to improve luminous efficiency. The discharge space is partitioned into a plurality of sections by partition walls 34, and discharge cells are formed at the intersections between the display electrode pairs 24 and the data electrodes 32. These discharge cells discharge and emit light to display an image.

  Note that the structure of the panel 10 is not limited to the above-described structure, and for example, a structure having a stripe-shaped partition may be used. Further, the mixing ratio of the discharge gas is not limited to the above-described numerical values, and may be other mixing ratios.

  FIG. 2 is an electrode array diagram of panel 10 according to the embodiment of the present invention. The panel 10 includes n scan electrodes SC1 to SCn (scan electrodes 22 in FIG. 1) and n sustain electrodes SU1 to SUn (sustain electrodes 23 in FIG. 1) arranged in the row direction. Yes. Then, m data electrodes D1 to Dm (data electrodes 32 in FIG. 1) that are long in the column direction are arranged. A discharge cell is formed at a portion where a pair of scan electrode SCi (i = 1 to n) and sustain electrode SUi intersects with one data electrode Dk (k = 1 to m). Therefore, m × n discharge cells are formed in the discharge space. A region where m × n discharge cells are formed becomes a display region of the panel 10.

  Next, a driving voltage waveform for driving the panel 10 and an outline of the operation will be described. In the plasma display device in the present embodiment, panel 10 is driven by the subfield method. In this subfield method, one field is divided into a plurality of subfields on the time axis, and a luminance weight is set for each subfield. In the sustain period of each subfield, the number of sustain pulses obtained by multiplying the luminance weight of each subfield by a predetermined luminance magnification is applied to each display electrode pair 24. In the address period of each subfield, an address discharge is generated in the discharge cell to emit light, thereby controlling light emission / non-light emission of each discharge cell for each subfield. In this way, gradation display is performed by driving the panel 10.

  In this embodiment, one field is composed of nine subfields from the first subfield to the ninth subfield (hereinafter, the first subfield is referred to as “first SF”, and the second subfield is referred to as “second SF”). Respectively). Then, luminance weights (1, 2, 4, 8, 16, 32, 64, 128) are set in the second SF to the ninth SF subfields, respectively. It is assumed that a smaller luminance weight is set.

  In the present embodiment, a field having a specific cell initialization subfield (to be described later) and a plurality of selection initialization subfields (to be described later) (hereinafter referred to as “first field”), and a plurality of selection initializations to be described later. The panel 10 is driven by providing a field composed of only subfields (hereinafter referred to as “second field”). Then, a luminance weight “0.5” smaller than the luminance weight “1” is set in the first SF of the second field, and the luminance weight “0.5” is set in the first SF of the first field. Further, a smaller luminance weight “0.25” is set. However, the luminance weight “0.5” does not mean that the light emission luminance is ½ of the luminance weight “1”, and the luminance weight “0.25” is 4 of the luminance weight “1”. It does not mean that the light emission brightness is 1 / n. The luminance weight “0.5” merely indicates that the emission luminance is lower than the luminance weight “1”, and the luminance weight “0.25” has an emission luminance higher than the luminance weight “0.5”. It just represents a lower price. Details of the first field and the second field will be described later.

  In this embodiment, two different initialization operations are performed in the initialization period of the same subfield. The two different initializing operations are a “forced initializing operation” that generates an initializing discharge in a discharge cell regardless of the operation of the immediately preceding subfield, and a discharge that generates a sustaining discharge during the sustaining period of the immediately preceding subfield. This is a “selective initialization operation” for generating an initializing discharge in a cell. This is to reduce the light emission that causes the black luminance to increase as much as possible to reduce the black luminance and improve the contrast.

  Since the black luminance changes due to light emission that occurs regardless of the magnitude of the gradation value, the black luminance can be reduced by reducing such light emission. The main light emission that occurs regardless of the magnitude of the gradation value is light emission due to initialization discharge. However, the selective initialization operation described above does not substantially affect the brightness of the black luminance because no discharge occurs in the discharge cells that did not generate the sustain discharge in the immediately preceding subfield. On the other hand, the above-described forced initialization operation affects the brightness of black luminance because an initialization discharge is generated in the discharge cell regardless of the operation of the immediately preceding subfield.

  That is, the black luminance changes according to the frequency of the forced initialization operation. Therefore, if the frequency of performing the forced initialization operation in each discharge cell is reduced, the black luminance of the display image can be reduced and the contrast can be improved.

  Therefore, in the present embodiment, forcible initialization operation and selective initialization operation are selectively performed for each discharge cell in the initialization period of one subfield among a plurality of subfields constituting one field. In the initializing period of the other subfield, the selective initializing operation is performed in all discharge cells (hereinafter, there is an initializing period in which the specific cell initializing operation is performed). The subfield is called “specific cell initialization subfield”, and the subfield having the initialization period in which the selective initialization operation is performed in all the discharge cells is called “selective initialization subfield”.

  Therefore, in the present embodiment, in the initializing period of each subfield, a forced initializing waveform that generates initializing discharge in the discharge cell and an initial setting in the discharge cell that generates sustaining discharge in the sustaining period of the immediately preceding subfield. Any one of the selective initialization waveforms that generate the igniting discharge is applied to the scan electrode 22.

  In the initializing period of the specific cell initializing subfield, a forced initializing waveform is applied to a predetermined scanning electrode 22 among the scanning electrodes 22 on the panel 10, and a selective initializing waveform is applied to the other scanning electrodes 22. Shall be applied. That is, a forced initializing waveform is applied to a predetermined discharge cell, and a selective initializing waveform is applied to other discharge cells to generate an initializing discharge in a specific discharge cell. In the initializing period of the selective initializing subfield, a selective initializing waveform is applied to all the scan electrodes 22 to generate initializing discharges in the discharge cells that have generated sustain discharge in the sustaining period of the immediately preceding subfield. Shall be allowed to.

  In the present embodiment, the first field has a configuration including a specific cell initialization subfield and a plurality of selection initialization subfields, and the second field has a configuration of a plurality of selection initialization subfields. . For example, in the first field, the second SF is a specific cell initialization subfield, and the other subfields are the first SF and the third SF to the ninth SF are selective initialization subfields.

  In the second field, all subfields (first SF to ninth SF) are selected and initialized subfields.

  Then, the first field and the second field are set so that the frequency of the forced initializing operation in each discharge cell is once in a plurality of fields (in this embodiment, for example, once in 6 fields). Are switched periodically, and in the first field, an image is displayed while changing the discharge cell in which the forced initialization operation is performed in each field.

  Therefore, compared with a configuration in which an initializing discharge is generated in each discharge cell at a rate of once per field, light emission that increases the black luminance is reduced to reduce the black luminance in the display image, and the contrast. Can be improved.

  Next, the first field and the second field will be described. As described above, in the present embodiment, the first field and the second field are each composed of nine subfields from the first SF to the ninth SF, and in the first field, the first SF to the second SF. A luminance weight of (0.25, 1, 2, 4, 8, 16, 32, 64, 128) is set in each 9SF subfield, and each of the first SF to 9SF subfields is set in the second field. It is assumed that luminance weights (0.5, 1, 2, 4, 8, 16, 32, 64, 128) are set in the fields, respectively.

  Since the first SF of the first field and the first SF of the second field have different luminance weights, the first SF of the first field is hereinafter referred to as “0.25 subfield” in order to distinguish them from each other. The first SF of the second field is also referred to as “0.5 subfield”.

  However, in the present embodiment, the number of subfields and the luminance weight of each subfield are not limited to the above values, and the subfield configuration may be switched based on an image signal or the like.

  FIG. 3 is a waveform diagram showing an example of a drive voltage waveform applied to each electrode of panel 10 in the first field according to the embodiment of the present invention. FIG. 3 shows scan electrode SC1 that performs the address operation first in the address period, scan electrode SC2 that performs the address operation second in the address period, and scan electrode SCn that performs the address operation last in the address period (for example, scan electrode SC1080). ), Drive voltage waveforms of sustain electrode SU1 to sustain electrode SUn, and data electrode D1 to data electrode Dm.

  FIG. 3 shows driving voltage waveforms in three subfields of the first field, that is, the second SF that is a specific cell initialization subfield and the first SF and the third SF that are selective initialization subfields. Show. Although not shown after the fourth SF, in each subfield after the fourth SF, the same drive voltage waveform as that of the third SF is applied to each electrode except for the number of sustain pulses generated during the sustain period.

  In addition, scan electrode SCi, sustain electrode SUi, and data electrode Dk in the following represent electrodes selected from each electrode based on subfield data (data indicating light emission / non-light emission for each subfield).

  First, the second SF, which is a specific cell initialization subfield, will be described.

  In FIG. 3, the (1 + 3 × N) th (N is an integer) scan electrode SC (1 + 3 × N) from the top in terms of arrangement is initialized to a discharge cell regardless of the operation of the immediately preceding subfield. A configuration is shown in which a forced initializing waveform for generating discharge is applied and a selective initializing waveform is applied to the other scan electrodes 22.

  In the first half of the initialization period of the second SF, 0 (V) is applied to sustain electrode SU1 through sustain electrode SUn and data electrode D1 through data electrode Dm. Then, a voltage Vi1 is applied to the scan electrode SC (1 + 3 × N), and a ramp voltage (hereinafter referred to as “a slope of about 0.5 V / μsec) gradually increases from the voltage Vi1 to the voltage Vi2. L1) (referred to as “up-ramp voltage”). At this time, voltage Vi1 is set to a voltage lower than the discharge start voltage with respect to sustain electrode SU (1 + 3 × N), and voltage Vi2 is set to a voltage higher than the discharge start voltage with respect to sustain electrode SU (1 + 3 × N).

  While the rising ramp voltage L1 rises, between scan electrode SC (1 + 3 × N) and sustain electrode SU (1 + 3 × N), scan electrode SC (1 + 3 × N), data electrode D1 to data electrode Dm, In each period, a weak initializing discharge occurs continuously. Then, a negative wall voltage is accumulated on scan electrode SC (1 + 3 × N), and data electrode D1 to data electrode Dm and intersecting sustain electrode SU (1 + 3 × N) intersect with scan electrode SC (1 + 3 × N). A positive wall voltage is accumulated in the upper part. The wall voltage above the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.

  In the latter half of the initialization period, the voltage applied to scan electrode SC (1 + 3 × N) is lowered from voltage Vi2 to voltage Vi3 that is lower than voltage Vi2. Positive voltage Ve is applied to sustain electrode SU1 through sustain electrode SUn, and 0 (V) is applied to data electrode D1 through data electrode Dm. Then, a ramp voltage (hereinafter referred to as “down-ramp voltage”) that gradually decreases (for example, with a gradient of about −0.5 V / μsec) from the voltage Vi3 to the negative voltage Vi4 is applied to the scan electrode SC (1 + 3 × N). L2) is applied. At this time, voltage Vi3 is set to a voltage lower than the discharge start voltage with respect to sustain electrode SU (1 + 3 × N), and voltage Vi4 is set to a voltage higher than the discharge start voltage with respect to sustain electrode SU (1 + 3 × N).

  During this time, weak initialization is performed between scan electrode SC (1 + 3 × N) and sustain electrode SU (1 + 3 × N), and between scan electrode SC (1 + 3 × N) and data electrode D1 to data electrode Dm. Discharge occurs. Then, the negative wall voltage above scan electrode SC (1 + 3 × N) and the positive wall voltage above sustain electrode SU (1 + 3 × N) are weakened, and data electrodes D1 to D1 intersecting scan electrode SC (1 + 3 × N). The positive wall voltage on the data electrode Dm is adjusted to a value suitable for the write operation.

  The above waveform is a forced initializing waveform that generates an initializing discharge in the discharge cell regardless of the operation of the immediately preceding subfield. The above-described operation performed by applying the forced initialization waveform to the scan electrode 22 is the forced initialization operation.

  On the other hand, the voltage Vi1 is not applied to the scan electrodes 22 other than the scan electrode SC (1 + 3 × N) in the first half of the initialization period of the second SF, and gradually increases from 0 (V) toward the voltage Vi2 ′. An up-ramp voltage L1 ′ is applied. This up-ramp voltage L1 'has the same slope as the up-ramp voltage L1, and continues to rise for the same time as the up-ramp voltage L1. Therefore, the voltage Vi2 'is equal to a voltage obtained by subtracting the voltage Vi1 from the voltage Vi2. At this time, each voltage and the up-ramp voltage L <b> 1 ′ are set so that the voltage Vi <b> 2 ′ is less than the discharge start voltage with respect to the sustain electrode 23. Thereby, substantially no discharge is generated in the discharge cell to which the up-ramp voltage L1 'is applied.

  In the latter half of the initialization period, the down-ramp voltage L2 is applied to the scan electrodes 22 other than the scan electrode SC (1 + 3 × N) as well as the scan electrode SC (1 + 3 × N).

  The above waveform is the selective initialization waveform in the second SF of the first field. The second half of the initialization period in the second SF of the first field has the same function as a selective initialization waveform described later.

  As described above, the initializing operation in the initializing period of the specific cell initializing subfield, that is, forcibly initializing a predetermined scanning electrode 22 (for example, scanning electrode SC (1 + 3 × N)) among scanning electrodes 22 on panel 10. A specific cell initialization operation is performed in which a selective initialization waveform is applied to another scan electrode 22, a forced initialization operation is performed in a specific discharge cell, and a selective initialization operation is performed in another discharge cell. finish.

  In the subsequent address period of the second SF, scan pulse voltage Va is sequentially applied to scan electrode SC1 to scan electrode SCn, which are all scan electrodes 22 on panel 10, and to data electrode D1 to data electrode Dm. A positive address pulse voltage Vd is applied to the data electrode Dk (k = 1 to m) corresponding to the discharge cell to emit light, and an address discharge is selectively generated in each discharge cell.

  Specifically, voltage Ve is first applied to sustain electrode SU1 through sustain electrode SUn, and voltage Vcc is applied to scan electrode SC1 through scan electrode SCn.

  Then, a negative scan pulse voltage Va is applied to the first (first row) scan electrode SC1 from the top of the panel 10 in terms of arrangement, and light is emitted to the first row of the data electrodes D1 to Dm. A positive address pulse voltage Vd is applied to the data electrode Dk (k = 1 to m) of the power discharge cell. At this time, the voltage difference at the intersection between the data electrode Dk and the scan electrode SC1 is the difference between the externally applied voltage (voltage Vd−voltage Va) between the wall voltage on the data electrode Dk and the wall voltage on the scan electrode SC1. The difference is added and exceeds the discharge start voltage. As a result, a discharge is generated between data electrode Dk and scan electrode SC1. Further, since voltage Ve is applied to sustain electrode SU1 through sustain electrode SUn, the voltage difference between sustain electrode SU1 and scan electrode SC1 is maintained at the difference between the externally applied voltages (voltage Ve−voltage Va). The difference between the wall voltage on the electrode SU1 and the wall voltage on the scan electrode SC1 is added. At this time, by setting the voltage Ve to a voltage value that is slightly lower than the discharge start voltage, the sustain electrode SU1 and the scan electrode SC1 are not easily discharged but are likely to be discharged. Can do. Thereby, the discharge generated between data electrode Dk and scan electrode SC1 can be triggered to generate a discharge between sustain electrode SU1 and scan electrode SC1 in the region intersecting with data electrode Dk. Thus, an address discharge occurs in the discharge cell to emit light, a positive wall voltage is accumulated on scan electrode SC1, a negative wall voltage is accumulated on sustain electrode SU1, and a negative wall voltage is also accumulated on data electrode Dk. Accumulated.

  In this manner, an address operation is performed in which an address discharge is caused in the discharge cell to emit light in the first row on the panel 10 and wall voltage is accumulated on each electrode. On the other hand, the voltage at the intersection of data electrode D1 to data electrode Dm to which scan pulse SC1 is not applied with address pulse voltage Vd does not exceed the discharge start voltage, so that address discharge does not occur. The above address operation is sequentially performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period of the second SF, sustain pulses of the number obtained by multiplying the brightness weight of the second SF by a predetermined brightness magnification are alternately applied to the display electrode pair 24 to generate a sustain discharge in the discharge cells that have generated the address discharge. To emit light.

  Specifically, positive sustain pulse voltage Vs is applied to scan electrode SC1 through scan electrode SCn, and a ground potential that is a base potential, that is, 0 (V) is applied to sustain electrode SU1 through sustain electrode SUn. Then, in the discharge cell in which the address discharge has occurred, the voltage difference between scan electrode SCi and sustain electrode SUi is the sum of the difference between the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi to sustain pulse voltage Vs. The discharge start voltage is exceeded.

  Then, a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and phosphor layer 35 emits light by the ultraviolet rays generated at this time. Then, a negative wall voltage is accumulated on scan electrode SCi, and a positive wall voltage is accumulated on sustain electrode SUi. Further, a positive wall voltage is accumulated on the data electrode Dk. Note that no sustain discharge occurs in the discharge cells in which no address discharge has occurred during the address period.

  Subsequently, 0 (V) as the base potential is applied to scan electrode SC1 through scan electrode SCn, and sustain pulse voltage Vs is applied to sustain electrode SU1 through sustain electrode SUn. Then, in the discharge cell in which the sustain discharge has occurred, the voltage difference between sustain electrode SUi and scan electrode SCi exceeds the discharge start voltage, so that a sustain discharge occurs again between sustain electrode SUi and scan electrode SCi, and the sustain cell is maintained. Negative wall voltage is accumulated on electrode SUi, and positive wall voltage is accumulated on scan electrode SCi. Thereafter, similarly, sustain pulses of the number obtained by multiplying the luminance weight by the luminance magnification are alternately applied to scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn, and a potential difference is generated between the electrodes of display electrode pair 24. give. As a result, the sustain discharge is continuously generated in the discharge cells that have caused the address discharge in the address period.

  Then, after the sustain pulse is generated in the sustain period, 0 (V) is applied to sustain electrode SU1 through sustain electrode SUn and data electrode D1 through data electrode Dm, and scan electrode SC1 through scan electrode SCn are supplied with the base potential. A ramp voltage (hereinafter referred to as “erase ramp voltage”) L3 that gently rises from a certain 0 (V) to a voltage Vers that is a predetermined potential (for example, with a gradient of about 10 V / μsec) is applied. Note that the voltage Vers which is a predetermined potential is set to a voltage exceeding the discharge start voltage. Thereby, a weak discharge is continuously generated between the sustain electrode SUi and the scan electrode SCi of the discharge cell in which the sustain discharge has occurred. The charged particles generated by the weak discharge are accumulated as wall charges on the sustain electrode SUi and the scan electrode SCi so as to reduce the voltage difference between the sustain electrode SUi and the scan electrode SCi. Go. As a result, while the positive wall voltage on the data electrode Dk remains, the wall voltage on the scan electrode SCi and the wall voltage on the sustain electrode SUi are the difference between the voltage applied to the scan electrode SCi and the discharge start voltage, for example ( The voltage Vers minus the discharge start voltage).

  Thereafter, the voltage applied to scan electrode SC1 through scan electrode SCn is returned to 0 (V), and the sustain operation in the sustain period ends.

  Next, the operation of the selective initialization subfield will be described by taking the third SF of the first field as an example.

  In the initialization period of the third SF, the selective initialization waveform is applied to all the scan electrodes 22 on the panel 10. This selective initialization waveform is a drive voltage waveform in which the first half of the forced initialization waveform is omitted. Specifically, voltage Ve is applied to sustain electrode SU1 through sustain electrode SUn, and 0 (V) is applied to data electrode D1 through data electrode Dm. Scan electrode SC1 to scan electrode SCn receive down-ramp voltage L4 that decreases from the voltage (for example, 0 (V)) lower than the discharge start voltage toward negative voltage Vi4 at the same gradient as down-ramp voltage L2. Apply.

  As a result, a weak initializing discharge is generated in the discharge cell that has caused the sustain discharge in the sustain period of the immediately preceding subfield (second SF in FIG. 3), and the wall voltage on the scan electrode SCi and the sustain electrode SUi is weakened. The wall voltage above the data electrode Dk (k = 1 to m) is also adjusted to a value suitable for the write operation.

  The waveform described above is a selective initialization waveform in which an initializing discharge is generated only in a discharge cell that has generated a sustaining discharge in the sustaining period of the immediately preceding subfield. The above-described operation performed by applying the selective initialization waveform to all the scan electrodes 22 is the selective initialization operation.

  This completes the selective initialization operation in the initialization period of the selective initialization subfield.

  The selective initialization waveform generated in the initialization period of the second SF, which is the specific cell initialization subfield, and the selective initialization waveform generated in the initialization period of the third SF, which is the selective initialization subfield, have waveform shapes. Different from each other. However, the selective initialization waveform generated in the initialization period of the second SF does not generate discharge in the first half of the initialization period, and the second half of the initialization period is substantially the same as the selective initialization operation in the initialization period of the third SF. Has the same function. Therefore, in the present embodiment, the initialization waveform having the up-ramp voltage L1 'and the down-ramp voltage L2 that occurs during the initialization period of the second SF is set as the selective initialization waveform.

  The selective initialization waveform in the present invention is not limited to the waveform described above. The selective initialization waveform may be any waveform as long as it generates a reset discharge only in a discharge cell that has generated a sustain discharge in the sustain period of the immediately preceding subfield. For example, in the present embodiment, the configuration in which the down-ramp voltage L4 is generated with the same gradient has been described. However, the down-ramp voltage L4 is divided into a plurality of periods, and the gradient is changed in each period to generate the down-ramp voltage L4. It is good also as a structure.

  In the third SF address period, the same drive voltage waveform as that in the second SF address period is applied to each electrode. In the sustain period of the third SF, the same drive voltage waveform as that in the sustain period of the second SF is applied to each electrode except for the number of sustain pulses.

  In the subfields after the fourth SF, the same drive voltage waveform as that of the third SF is applied to each electrode except for the number of sustain pulses generated in the sustain period.

  Next, the first SF (0.25 subfield) having the luminance weight “0.25” constituting the first field will be described. In the present embodiment, the 0.25 subfield (first SF) is a selective initialization subfield. Therefore, in the initialization period of 0.25 subfield (first SF), the same drive voltage waveform as that in the initialization period of the third SF is applied to each electrode. In the address period of 0.25 subfield (first SF), the same drive voltage waveform as that in the address periods of the second SF and third SF is applied to each electrode.

  In the sustain period of the 0.25 subfield (first SF), the sustain pulse is not applied to the discharge cell to which the forced initialization waveform is applied in the specific cell initialization subfield of the second SF, and a predetermined potential is applied from the base potential. It is assumed that only one ramp voltage that rises to the potential is applied and only a weak discharge due to this ramp voltage is generated. In the present embodiment, this ramp voltage is generated in the same waveform as the erase ramp voltage L3. Therefore, this ramp voltage is also referred to as erase ramp voltage L3 hereinafter.

  Specifically, the scan electrode 22 (in the example shown in FIG. 3, scan electrode SC (1 + 3 × N)) belonging to the discharge cell to which the forced initialization waveform is applied in the specific cell initialization subfield has 0.25 sub In the sustain period of the field (first SF), the erasing ramp voltage L3 that gently rises from the base potential 0 (V) to the predetermined voltage Vers (for example, at a gradient of about 10 V / μsec) is applied.

  Then, in the discharge cell in which the address discharge is caused in the address period, the voltage difference between scan electrode SCi and sustain electrode SUi is changed to the difference between the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi. The voltage L3 is added. As a result, the voltage difference between scan electrode SCi and sustain electrode SUi exceeds the discharge start voltage while erasing ramp voltage L3 is rising, and a weak discharge occurs between scan electrode SCi and sustain electrode SUi. When the increasing voltage reaches voltage Vers, the voltage applied to scan electrode SC1 through scan electrode SCn is decreased to 0 (V).

  On the other hand, in the discharge cell to which the selective initialization waveform is applied in the specific cell initialization subfield (second SF), the sustain discharge by the sustain pulse is generated only once in the sustain period of 0.25 subfield (first SF). Shall. The number of sustain pulses generated is 1 regardless of the luminance magnification.

  Specifically, the scan electrodes 22 except the scan electrode SC (1 + 3 × N in the example shown in FIG. 3) belonging to the discharge cell to which the selective initialization waveform is applied in the specific cell initialization subfield (second SF). 22), the sustain pulse is applied only once in the sustain period of 0.25 subfield (first SF). As a result, a sustain discharge is generated in the discharge cells that have caused the address discharge in the address period.

  Data electrode D1 to data electrode Dm and sustain electrode SU1 to sustain electrode SUn are maintained at 0 (V) during the sustain period of 0.25 subfield (first SF).

  Thus, the first SF maintenance period ends.

  In the present embodiment, in this way, weak light emission with reduced emission luminance is generated in the sustain period of 0.25 subfield (first SF), and the first SF of the first field is determined by luminance weight “1”. Also, the luminance weight “0.25” is low. However, as described above, the luminance weight “0.25” does not mean that the luminance luminance is ¼ of the luminance weight “1”, but the luminance luminance is simply higher than the luminance weight “1”. It just represents low.

  The above is the outline of the drive voltage waveform applied to each electrode of panel 10 in the first field in the present embodiment.

  FIG. 4 is a waveform diagram showing an example of a drive voltage waveform applied to each electrode of panel 10 in the second field according to the embodiment of the present invention. In FIG. 4, similarly to FIG. 3, the scan electrode SC1 that performs the address operation first in the address period, the scan electrode SC2 that performs the address operation second in the address period, and the scan electrode SCn that performs the address operation last in the address period. (For example, scan electrode SC1080), drive electrode waveforms of sustain electrode SU1 through sustain electrode SUn, and data electrode D1 through data electrode Dm are shown.

  FIG. 4 shows driving voltage waveforms in three subfields, that is, driving voltage waveforms in the first to third SF subfields.

  First, the first SF (0.5 subfield) having a luminance weight of “0.5” will be described. In the initialization period and address period of 0.5 subfield, the same drive voltage waveform as that in the initialization period and address period of 0.25 subfield, which is the first SF of the first field, is applied to each electrode.

  In the sustain period of 0.5 subfield (first SF of the second field), sustain pulse is applied only once to scan electrode SC1 through scan electrode SCn.

  Specifically, 0 (V) is applied to sustain electrode SU1 through sustain electrode SUn, and positive sustain pulse voltage Vs is applied to scan electrode SC1 through scan electrode SCn. As a result, a sustain discharge occurs in the discharge cell in which the address discharge has occurred, and the phosphor layer 35 emits light. Thus, the 0.5 subfield sustain period ends.

  In the present embodiment, the sustain pulse is applied to each of the display electrode pairs 24 at least once in the sustain period of the subfield having the luminance weight “1”. In each sustain period from the second SF to the ninth SF, the number of sustain pulses is generated by multiplying each brightness weight by a predetermined brightness magnification. However, in the sustain period of 0.5 subfield in the present embodiment, the number of sustain pulses generated is 1 regardless of the luminance magnification.

  In the present embodiment, in this way, the 0.5 subfield (first SF) is set to the luminance weight “0.5” whose emission luminance is lower than the luminance weight “1”. However, as described above, the luminance weight “0.5” does not mean that the luminance weight is half of the luminance weight “1”, but the luminance luminance is simply higher than the luminance weight “1”. It just represents low.

  Note that the light emission generated in the sustain period of the 0.25 subfield (first SF) of the first field includes that due to the erasing ramp voltage L3, so that 0.5 subfield (first SF of the second field) is included. The light emission luminance is lower than the light emission caused by the sustain pulse in the sustain period. Therefore, in the present embodiment, the luminance weight of the 0.25 subfield (first SF of the first field) is expressed as “0.25”. However, the luminance weight “0.25” does not mean that the light emission luminance is a half of the luminance weight “0.5”, but is simply lower than the luminance weight “0.5”. It just represents that.

  Next, the second SF that is the selective initialization subfield of the second field will be described. In the initialization period of the second SF, the drive voltage waveforms similar to those in the initialization period of the second SF shown in FIG. 3 are applied to the sustain electrodes SU1 to SUn and the data electrodes D1 to Dm, respectively. Further, scan electrode SC1 to scan electrode SCn have a selection initialization waveform similar to the selection initialization waveform of the second SF in the first field shown in FIG. 3, that is, up-ramp voltage L1 ′ and down-ramp voltage L2. Apply an initialization waveform having Thereby, in the first half of the initializing period of the second SF, the initializing discharge is not substantially generated in all the discharge cells.

  Since the second half of the initialization period of the second SF has the same function as the selection initialization waveform of the third SF as described above, a scan cell that has generated a sustain discharge in the sustain period of 0.5 subfield is scanned. Negative wall voltage accumulates on electrode SCi, and positive wall voltage accumulates on sustain electrode SUi and data electrode Dk. Therefore, similarly to the selective initializing operation in the third SF, a weak initializing discharge occurs, the wall voltage on scan electrode SCi and sustain electrode SUi is weakened, and the wall voltage on data electrode Dk is also suitable for the write operation. Adjusted to the desired value. On the other hand, since the initializing discharge does not occur in the discharge cells that did not generate the sustain discharge in the sustain period of 0.5 subfield, the brightness of the black luminance is not substantially affected. The same applies to the discharge cells that perform the selective initialization operation in the specific cell initialization subfield of the first field.

  Thus, the selective initialization operation in the initialization period of the second SF of the second field is completed.

  After the second SF address period, a drive voltage waveform similar to the drive voltage waveform after the second SF address period shown in FIG. 3 is applied to each electrode.

  The above is the outline of the drive voltage waveform applied to each electrode of panel 10 in the second field in the present embodiment.

  In the discharge cell to which the forced initializing waveform is applied in the specific cell initializing subfield (second SF) of the first field, regardless of the operation in the immediately preceding subfield, that is, the 0.25 subfield (first SF). Initialization discharge due to forced initialization operation occurs. Therefore, in the discharge cell, even if a weak discharge due to the erase ramp voltage L3 occurs only in the sustain period of the 0.25 subfield (first SF), the forced initializing is performed in the initializing period of the specific cell initializing subfield. Since the inside of the discharge cell is sufficiently initialized by the reset operation, the subsequent address operation can be performed relatively stably.

  On the other hand, in the discharge cell in which the selective initialization operation is performed in the specific cell initialization subfield (second SF) of the first field, the operation is performed in the sustain period of the immediately preceding subfield, that is, the 0.25 subfield (first SF). A corresponding initialization operation is performed. Therefore, in this discharge cell, similarly to the discharge cell that performs the forced initializing operation in the specific cell initializing subfield (second SF), the discharge lamp voltage L3 is weak during the sustain period of 0.25 subfield (first SF). If only discharge occurs, the initialization operation in the initialization period of the specific cell initialization subfield becomes unstable, and the wall charges and priming particles are insufficient during the address operation in the subsequent address period after the second SF. The address operation becomes unstable, and there is a possibility that a discharge cell (hereinafter referred to as “non-lighted cell”) in which a sustain discharge does not occur regardless of the presence or absence of the address operation may occur. The same applies to the relationship between the 0.5 subfield (first SF) in the second field and the subsequent selective initialization subfield (second SF).

  However, in the present embodiment, in the discharge cell that performs the selective initialization operation in the specific cell initialization subfield (second SF) of the first field, in the sustain period of the 0.25 subfield (first SF) immediately before The sustain pulse is generated instead of the erase lamp voltage L3 to generate a discharge stronger than the discharge by the erase lamp voltage L3. Similarly, in the sustain period of the 0.5 subfield (first SF) of the second field, a strong discharge is generated by the sustain pulse instead of the erase ramp voltage L3. Accordingly, in the discharge cell that performs the selective initialization operation in the specific cell initialization subfield (second SF) of the first field, at the end of the sustain period of 0.25 subfield (first SF), in the second field, At the end of the sustain period of 0.5 subfield (first SF), wall charges and priming particles can be sufficiently generated, so that the subsequent write operation after the second SF is stabilized and generation of unlit cells is prevented. be able to.

  FIG. 5 is a diagram showing an example of the generation pattern of the forced initialization waveform and the selective initialization waveform in the embodiment of the present invention. FIG. 5 shows an example of generation patterns of the forced initialization waveform and the selective initialization waveform when the frequency of performing the forced initialization operation in each discharge cell is once in 6 fields. In FIG. 5, the horizontal axis represents the field, and the vertical axis represents the scanning electrode 22. In the example shown in FIG. 5, in the first field, the second SF is a specific cell initialization subfield, and the other subfields are selective initialization subfields. In the second field, all subfields (first SF to ninth SF) are selected and initialized subfields.

  Further, “◯” shown in FIG. 5 indicates that the forced initialization operation is performed in the initialization period of the specific cell initialization subfield (second SF), that is, the forced initialization waveform shown in FIG. “×” indicates that the selective initialization operation is performed in the initialization period of the specific cell initialization subfield (second SF), that is, the selective initialization waveform shown in FIG. It represents applying.

  Hereinafter, scan electrode SCi to scan electrode SCi + 2 and j field to j + 5 field will be described as examples.

  First, in the second SF of the j field, a forced initialization waveform is applied to scan electrode SCi, and a selective initialization waveform is applied to scan electrode SCi + 1 and scan electrode SCi + 2.

  In the subsequent second SF of the j + 1 field, the selective initialization waveform is applied to all the scan electrodes 22.

  In the subsequent second SF of the j + 2 field, a forced initialization waveform is applied to scan electrode SCi + 1, and a selective initialization waveform is applied to scan electrode SCi and scan electrode SCi + 2.

  In the subsequent second SF of j + 3 field, the selective initialization waveform is applied to all the scan electrodes 22.

  In the subsequent second SF of j + 4 field, a forced initialization waveform is applied to scan electrode SCi + 2, and a selective initialization waveform is applied to scan electrode SCi and scan electrode SCi + 1.

  In the subsequent second SF of j + 5 field, the selective initialization waveform is applied to all the scan electrodes 22.

  Thus, one of the repeated operations in scan electrode SCi to scan electrode SCi + 2 is completed. The same operation as described above is performed for the other scan electrodes 22, and thereafter, the same operation as described above is repeated in each field. In the configuration shown in FIG. 5, j field, j + 2 field, j + 4 field,... Are the first field, and j + 1 field, j + 3 field, j + 5 field,. .

  In the example shown in FIG. 5, the forced initializing waveform and the selective initializing waveform are selectively generated and applied to the panel 10 so that the number of times that the forced initializing operation is performed in each discharge cell is once in six fields. ing. This reduces the frequency of performing the forced initialization operation in each discharge cell as compared to the configuration in which the forced initialization operation is performed in all the discharge cells for each field (in the example illustrated in FIG. 5, the frequency is reduced to 1/6). And the black luminance of the display image can be reduced.

  As described above, in the present embodiment, the first field and the second field are periodically switched, and in the first field, the discharge cell for performing the forced initialization operation is changed according to the field. The reduction of black brightness is realized.

  As described above, when the black luminance that does not emit light in all subfields decreases, the luminance difference between the black luminance (for example, gradation value “0”) and the next larger gradation value tends to increase, and the display image In some cases, the continuity of luminance in a dark area is impaired.

  However, in the present embodiment, the subfield of the luminance weight “0.5” whose emission luminance is lower than the luminance weight “1” in the second field, and further than the luminance weight “0.5” in the first field. Each of the subfields having a luminance weight “0.25” having a low emission luminance can be used for image display.

  Therefore, in the present embodiment, the black luminance (for example, the luminance of the gradation value “0”) is reduced, and the luminance of the next largest gradation value is emitted only in the subfield having the luminance weight “1”. It can be made lower than the luminance at the time.

  Furthermore, in the first field, the first SF is a subfield having a luminance weight “0.25”, so that the first SF is a subfield having a luminance weight “0.5” in all fields. Black luminance can be reduced.

  As a result, the black luminance of the display image is reduced to increase the contrast, and the continuity of the luminance is improved so that the gradation of the dark region in the display image can be displayed more finely. The display quality can be further improved.

  Next, the configuration of the plasma display device in the present embodiment will be described. FIG. 6 is a circuit block diagram of plasma display device 1 in accordance with the exemplary embodiment of the present invention. The plasma display apparatus 1 includes a panel 10, an image signal processing circuit 41, a data electrode driving circuit 42, a scanning electrode driving circuit 43, a sustain electrode driving circuit 44, a timing generation circuit 45, and a power source that supplies power necessary for each circuit block. A circuit (not shown) is provided.

  The image signal processing circuit 41 converts the input image signal sig into subfield data indicating light emission / non-light emission for each subfield according to the number of pixels of the panel 10.

  The timing generation circuit 45 generates various timing signals for controlling the operation of each circuit block based on the horizontal synchronization signal H and the vertical synchronization signal V, and each circuit block (image signal processing circuit 41, data electrode driving circuit 42). To the scan electrode drive circuit 43 and the sustain electrode drive circuit 44).

  The data electrode driving circuit 42 converts the subfield data for each subfield into signals corresponding to the data electrodes D1 to Dm, and the data electrodes D1 to data based on the timing signal supplied from the timing generation circuit 45. The electrode Dm is driven.

  Scan electrode driving circuit 43 generates an initialization waveform generating circuit for generating an initialization waveform to be applied to scan electrode SC1 to scan electrode SCn in the initialization period, and generates a sustain pulse to be applied to scan electrode SC1 to scan electrode SCn in the sustain period. And a scan pulse generating circuit that includes a plurality of scan electrode driving ICs (hereinafter abbreviated as “scan ICs”) and generates scan pulses to be applied to scan electrode SC1 through scan electrode SCn in the address period. Then, each scan electrode SC1 to scan electrode SCn is driven based on the timing signal supplied from the timing generation circuit 45.

  Sustain electrode drive circuit 44 includes a sustain pulse generation circuit and a circuit for generating voltage Ve, and drives sustain electrode SU1 through sustain electrode SUn based on a timing signal supplied from timing generation circuit 45.

  Next, details and operation of the scan electrode drive circuit 43 will be described.

  FIG. 7 is a circuit diagram showing one configuration example of scan electrode driving circuit 43 in one embodiment of the present invention. Scan electrode driving circuit 43 includes a sustain pulse generating circuit 50 for generating a sustain pulse, an initialization waveform generating circuit 51 for generating an initialization waveform, and a scan pulse generating circuit 52 for generating a scan pulse. Each output terminal of the circuit 52 is connected to each of scan electrode SC1 to scan electrode SCn of panel 10.

  In the present embodiment, the voltage input to scan pulse generating circuit 52 is referred to as “reference potential A”. In the following description, the operation for turning on the switching element is expressed as “on”, the operation for cutting off the switching element is expressed as “off”, the signal for turning on the switching element is expressed as “Hi”, and the signal for turning off is expressed as “Lo”. In FIG. 7, details of the signal path of the control signal (timing signal supplied from the timing generation circuit 45) input to each circuit are omitted.

  In FIG. 7, when a circuit using the negative voltage Va (for example, the Miller integrating circuit 54) is operated, the circuit, the sustain pulse generating circuit 50, and a circuit using the voltage Vr (for example, A separation circuit using a switching element Q7 for electrically separating the Miller integration circuit 53) and a circuit using the voltage Vers (for example, the Miller integration circuit 55) is shown. Further, when a circuit using the voltage Vr (for example, the Miller integrating circuit 53) is operated, the circuit and a circuit using the voltage Vers having a voltage lower than the voltage Vr (for example, the Miller integrating circuit 55) 2 shows a separation circuit using a switching element Q6 for electrically separating the two.

  Sustain pulse generation circuit 50 includes a power recovery circuit 56 and a clamp circuit 57. The power recovery circuit 56 includes a power recovery capacitor C11, a switching element Q11, a switching element Q12, a backflow prevention diode Di1, a diode Di2, and a resonance inductor L11. The power recovery capacitor C11 has a sufficiently large capacity compared to the interelectrode capacity Cp, and is charged to about Vs / 2, which is half of the voltage value Vs so as to serve as a power source for the power recovery circuit 56. Clamp circuit 57 includes switching element Q13 for clamping scan electrode SC1 to scan electrode SCn to voltage Vs, and switching element Q14 for clamping scan electrode SC1 to scan electrode SCn to 0 (V). Then, based on the timing signal output from the timing generation circuit 45, each switching element is switched to generate a sustain pulse.

  For example, when the sustain pulse is raised, the switching element Q11 is turned on to cause the interelectrode capacitance Cp and the inductor L11 to resonate, and the power stored in the power recovery capacitor C11 is supplied to the switching element Q11, the diode Di1, Supplyed to scan electrode SC1 through scan electrode SCn via inductor L11. Then, when the voltage of scan electrode SC1 through scan electrode SCn approaches voltage Vs, switching element Q13 is turned on to clamp scan electrode SC1 through scan electrode SCn at voltage Vs.

  Conversely, when the sustain pulse is lowered, the switching element Q12 is turned on to cause the interelectrode capacitance Cp and the inductor L11 to resonate, and the power of the interelectrode capacitance Cp is supplied through the inductor L11, the diode Di2, and the switching element Q12. It collect | recovers to the capacitor | condenser C11 for collection | recovery. Then, when the voltage of scan electrode SC1 through scan electrode SCn approaches 0 (V), switching element Q14 is turned on to clamp scan electrode SC1 through scan electrode SCn at 0 (V).

  Initialization waveform generation circuit 51 includes Miller integration circuit 53, Miller integration circuit 54, and Miller integration circuit 55. In FIG. 7, the input terminal of Miller integrating circuit 53 is shown as input terminal IN1, the input terminal of Miller integrating circuit 54 is shown as input terminal IN2, and the input terminal of Miller integrating circuit 55 is shown as input terminal IN3. Miller integrating circuit 53 and Miller integrating circuit 55 generate a rising ramp voltage, and Miller integrating circuit 54 generates a falling ramp voltage.

  Miller integrating circuit 53 has switching element Q1, capacitor C1, and resistor R1, and during initialization operation, reference potential A of scan electrode driving circuit 43 is gradually ramped up to voltage Vi2 ′ (for example, 0.5 V). To increase the ramp voltage L1 ′.

  Miller integrating circuit 55 includes switching element Q3, capacitor C3, and resistor R3. At the end of the sustain period, reference potential A is applied with voltage Vers having a steeper slope (eg, 10 V / μsec) than up-ramp voltage L1 ′. The erase ramp voltage L3 is generated.

  Miller integrating circuit 54 has switching element Q2, capacitor C2, and resistor R2, and during initializing operation, reference potential A is gradually ramped up to voltage Vi4 (for example, with a gradient of −0.5 V / μsec). The ramp-down voltage L2 is lowered to generate the ramp-down voltage L2 and the ramp-down voltage L4.

  Scan pulse generating circuit 52 includes switching element QH1 to switching element QHn, switching element QL1 to switching element QLn, and switching element QM1 to switching element for applying a scan pulse to each of n scan electrodes SC1 to SCn. QMn is provided.

  One terminal of the switching element QHj (j = 1 to n) and one terminal of the switching element QLj are connected to each other, and the connecting portion serves as an output terminal of the scan pulse generating circuit 52, and is connected to the scan electrode SCj. It is connected. The other terminal of the switching element QHj is an input terminal INb, and the other terminal of the switching element QLj is an input terminal INa.

  One terminal of the switching element QMj is connected to the output terminal of the scan pulse generating circuit 52, the other terminal of the switching element QMj is connected to the ground potential, and the switching element QMj sets the scan electrode SCj to 0 (V). Can be clamped to. Thus, in the present embodiment, switching element QM1 to switching element QMn for connecting scan electrode 22 to 0 (V) that is the base potential are provided in each of scan electrode SC1 to scan electrode SCn. Therefore, 0 (V) can be selectively applied to any one of the scan electrodes SC1 to SCn.

  Switching element QH1 to switching element QHn, switching element QL1 to switching element QLn, and switching element QM1 to switching element QMn are integrated into a plurality of outputs and integrated into an IC. This IC is a scanning IC.

  The scan pulse generation circuit 52 includes a switching element Q5 for connecting the reference potential A to the negative voltage Va in the address period, a power supply VSC that generates the voltage Vsc and superimposes the voltage Vsc on the reference potential A, and the reference potential A diode Di31 and a capacitor C31 for applying a voltage Vc generated by superimposing the voltage Vsc on A to the input terminal INb are provided. The voltage Vc is input to the input terminals INb of the switching elements QH1 to QHn, and the reference potential A is input to the input terminals INa of the switching elements QL1 to QLn.

  In the scan pulse generation circuit 52 configured as described above, in the address period, the switching element Q5 is turned on to make the reference potential A equal to the negative voltage Va, and the negative voltage Va is applied to the input terminal INa. A voltage Vc (voltage Vcc shown in FIG. 3) which is equal to voltage Va + voltage Vsc is applied to INb. Then, based on the subfield data, for the scan electrode SCi to which the scan pulse is applied, the switching element QHi is turned off and the switching element QLi is turned on, so that the negative polarity is applied to the scan electrode SCi via the switching element QLi. For the scan electrode SCh to which the scan pulse voltage Va is applied and no scan pulse is applied (h is 1 to n excluding i), the switching element QLh is turned off and the switching element QHh is turned on. Thus, the voltage Va + voltage Vsc (voltage Vcc shown in FIG. 3) is applied to the scan electrode SCh via the switching element QHh.

  Next, the operation for generating the forced initialization waveform and the selective initialization waveform in the initialization period of the specific cell initialization subfield and the operation in the immediately preceding sustain period will be described with reference to FIG.

  FIG. 8 is a timing chart for explaining an example of the operation of scan electrode driving circuit 43 in the initialization period of the specific cell initialization subfield in one embodiment of the present invention. In this drawing, the scan electrode 22 to which the forced initialization waveform is applied is represented as “scan electrode SCx”, and the scan electrode 22 to which the selective initialization waveform is applied is represented as “scan electrode SCy”.

  Although the description of the operation of the scan electrode driving circuit 43 when generating the selective initialization waveform in the selective initialization subfield excluding the specific cell initialization subfield (second SF) is omitted, it is the selective initialization waveform. The operation for generating the down-ramp voltage L4 is the same as the operation for generating the down-ramp voltage L2 shown in FIG. FIG. 8 also shows the operation for generating the sustain pulse and the erase ramp voltage L3.

  FIG. 8 shows a timing chart in the sustain period of the 0.25 subfield (first SF) and the initialization period of the specific cell initialization subfield (second SF) immediately thereafter. In FIG. 8, the initializing period of the specific cell initializing subfield (second SF) (the initializing period of the second SF of the first field) is four periods indicated by a period T1, a period T2, a period T3, and a period T4. The period for generating the sustain pulse in the sustain period of the 0.25 subfield (first SF) is divided into three periods indicated by a period T21, a period T22, and a period T23 to generate the erase ramp voltage L3. The period is divided into two periods indicated by a period T11 and a period T12, and each period will be described. Hereinafter, it is assumed that the voltage Vi1 is equal to the voltage Vsc, the voltage Vi2 is equal to the voltage Vsc + the voltage Vr, the voltage Vi2 ′ is equal to the voltage Vr, and the voltage Vi3 is the voltage Vs used when generating the sustain pulse. In the following description, it is assumed that the voltage Vi4 is equal to the negative voltage Va. In the drawing, a signal for turning on the switching element is represented as “Hi” and a signal for turning off the switching element is represented as “Lo”.

  FIG. 8 shows an example in which the voltage Vs is set to a voltage value higher than the voltage Vsc, but the voltage Vs and the voltage Vsc may be equal to each other, or the voltage Vs The voltage value may be lower than the voltage Vsc.

  First, before entering the period T1, the switching element Q13 of the clamp circuit 57 of the sustain pulse generating circuit 50 is turned off, the switching element Q14 is turned on and the reference potential A is set to 0 (V), and the switching elements QH1 to QHn. Further, switching element QM1 to switching element QMn are turned off, switching element QL1 to switching element QLn are turned on, and reference potential A, that is, 0 (V) is applied to scan electrode SC1 to scan electrode SCn. Further, the switching element Q6 is turned off (not shown), and the Miller integrating circuit 55 is electrically separated from the reference potential A. Although not shown, the switching element Q7 is turned on and the Miller integrating circuit 53 is connected to the reference potential A.

(Period T1)
In the period T1, the switching element QHx connected to the scan electrode SCx is turned on and the switching element QLx is turned off. Thus, the voltage Vc (that is, voltage Vc = voltage Vsc) obtained by superimposing the voltage Vsc on the reference potential A (0 (V) at this time) is applied to the scan electrode SCx to which the forced initialization waveform is applied.

  On the other hand, switching element QHy connected to scan electrode SCy remains off, and switching element QLy remains on. Thereby, the reference potential A, that is, 0 (V) is applied to the scan electrode SCy to which the selective initialization waveform is applied.

(Period T2)
In the period T2, the switching elements QH1 to QHn and the switching elements QL1 to QLn maintain the same state as the period T1. That is, switching element QHx connected to scan electrode SCx is kept on, switching element QLx is kept off, switching element QHy connected to scan electrode SCy is kept off, and switching element QLy is kept on.

  Next, the input terminal IN1 of the Miller integrating circuit 53 that generates the up-ramp voltage L1 'is set to "Hi". Specifically, a predetermined constant current is input to the input terminal IN1. As a result, a constant current flows toward the capacitor C1, the source voltage of the switching element Q1 rises in a ramp shape, and the reference potential A starts to rise in a ramp shape from 0 (V). This voltage increase can be continued while the input terminal IN1 is set to “Hi” or until the reference potential A reaches the voltage Vr.

  At this time, a constant current input to the input terminal IN1 is generated so that the gradient of the ramp voltage becomes a desired value (for example, 0.5 V / μsec). In this way, the up-ramp voltage L1 'rising from 0 (V) toward the voltage Vi2' (equal to the voltage Vr in the present embodiment) is generated.

  Since the switching element QHy is off and the switching element QLy is on, the up-ramp voltage L1 'is applied to the scan electrode SCy as it is.

  On the other hand, since switching element QHx is on and switching element QLx is off, scan electrode SCx has a voltage Vsc superimposed on this up-ramp voltage L1 ′, that is, voltage Vi1 (in this embodiment, equal to voltage Vsc). ) To the voltage Vi2 (in this embodiment, equal to the voltage Vsc + the voltage Vr), the rising ramp voltage L1 is applied.

(Period T3)
In the period T3, the input terminal IN1 of the Miller integrating circuit 53 is set to “Lo”. Specifically, the constant current input to the input terminal IN1 is stopped. Thus, the operation of Miller integrating circuit 53 is stopped. Further, switching element QH1 to switching element QHn are turned off, switching element QL1 to switching element QLn are turned on, and reference potential A is applied to scan electrode SC1 to scan electrode SCn. At the same time, the switching element Q13 of the clamp circuit 57 of the sustain pulse generating circuit 50 is turned on and the switching element Q14 is turned off to connect the reference potential A to the voltage Vs. Thereby, the voltage of scan electrode SC1 through scan electrode SCn is reduced to voltage Vi3 (equal to voltage Vs in the present embodiment).

(Period T4)
In the period T4, the switching elements QH1 to QHn and the switching elements QL1 to QLn maintain the same state as the period T3. Although not shown, switching element Q7 is turned off to electrically isolate Miller integrating circuit 53 and sustain pulse generating circuit 50 from reference potential A.

  Next, the input terminal IN2 of the Miller integrating circuit 54 that generates the down-ramp voltage L2 is set to “Hi”. Specifically, a predetermined constant current is input to the input terminal IN2. As a result, a constant current flows toward the capacitor C2, the drain voltage of the switching element Q2 starts to decrease in a ramp shape, and the output voltage of the scan electrode driving circuit 43 also decreases in a ramp shape toward the negative voltage Vi4. start. This voltage drop can be continued while the input terminal IN2 is set to “Hi” or until the reference potential A reaches the voltage Va.

  At this time, a constant current input to the input terminal IN2 is generated so that the gradient of the ramp voltage becomes a desired value (for example, −0.5 V / μsec).

  When the output voltage of the scan electrode driving circuit 43 reaches the negative voltage Vi4 (equal to the voltage Va in this embodiment), the input terminal IN2 is set to “Lo”. Specifically, the constant current input to the input terminal IN2 is stopped. Thus, the operation of Miller integrating circuit 54 is stopped.

  Thus, the ramp-down voltage L2 that decreases from the voltage Vi3 (equal to the voltage Vs in the present embodiment) toward the negative voltage Vi4 is generated and applied to the scan electrodes SC1 to SCn.

  When the operation of Miller integrating circuit 54 is stopped by setting input terminal IN2 to “Lo”, switching element Q5 is turned on (not shown), and reference potential A is set to voltage Va. At the same time, switching elements QH1 to QHn are turned on, and switching elements QL1 to QLn are turned off. Thus, the voltage Vc obtained by superimposing the voltage Vsc on the reference potential A, that is, the voltage Vcc (in this embodiment, equal to the voltage Va + the voltage Vsc) is applied to the scan electrodes SC1 to SCn to prepare for the subsequent address period.

  Thus, scan electrode drive circuit 43 in the present embodiment generates a forced initialization waveform and a selective initialization waveform during the initialization period of the specific cell initialization subfield. Then, the forced initialization waveform and the selective initialization waveform are selectively applied to the scan electrode 22 by controlling the switching elements QH1 to QHn and the switching elements QL1 to QLn. That is, a forced initializing waveform is applied to scan electrode SCx, and a selective initializing waveform is applied to scan electrode SCy.

  The down-ramp voltage L2 and the down-ramp voltage L4 may be configured to decrease to the voltage Va as shown in FIG. 8, but for example, the decreasing voltage is a voltage obtained by superimposing the positive voltage Vset2 on the voltage Va. It is good also as a structure which stops a descent | fall when it reaches | attains (not shown). Further, the down-ramp voltage L2 and the down-ramp voltage L4 may be configured to increase immediately after reaching a preset voltage. For example, when the decreasing voltage reaches a preset voltage, Thereafter, the voltage may be maintained for a certain period.

  Next, an operation of generating a sustain pulse and applying it to scan electrode SCy will be described.

  First, before entering the period T21, the switching element Q6 is turned off (not shown) to electrically isolate the Miller integrating circuit 55 from the reference potential A, and the switching element Q7 is turned on (not shown). The generation circuit 50 is connected to the reference potential A. Further, switching element Q11, switching element Q12, and switching element Q13 of clamp circuit 57 of sustain pulse generating circuit 50 are turned off, switching element Q14 is turned on and reference potential A is set to 0 (V). Then, switching element QH1 to switching element QHn and switching element QM1 to switching element QMn are turned off, switching element QL1 to switching element QLn are turned on, and reference potential A, that is, 0 (V) is applied to scan electrode SC1 to scan electrode SCn. Apply.

(Period T21)
In the period T21, first, both the switching element QHx and the switching element QLx are turned off, the switching element QMx is turned on, and 0 (V) is applied to the scan electrode SCx. Further, the switching element QHy and the switching element QMy are turned off, the switching element QLy is turned on, and the reference potential A is connected to the scan electrode SCy. This state is maintained until the sustain pulse is completely applied to scan electrode SCy.

  Then, the switching element Q11 is turned on and the switching element Q14 is turned off. Since the inductor L11 and the interelectrode capacitance Cp form a resonance circuit, when the switching element Q11 is turned on, electric charge is transferred from the power recovery capacitor C11 to the scanning electrode SCy through the switching element Q11, the diode Di1, and the inductor L11. The movement starts and the voltage of the scan electrode SCy begins to rise.

(Period T22)
After the voltage of scan electrode SCy rises to a voltage near voltage Vs, switching element Q13 is turned on and switching element Q11 is turned off. As a result, scan electrode SCy is clamped at voltage Vs, and in the discharge cell that has caused the address discharge, the voltage difference between scan electrode SCi and sustain electrode SUi exceeds the discharge start voltage, and a sustain discharge occurs. During this time, 0 (V) is applied to the scan electrode SCx.

(Period T23)
After the sustain discharge occurs, switching element Q12 is turned on and switching element Q13 is turned off. Then, charge starts to move from scan electrode SCy to capacitor C11 through inductor L11, diode Di2, and switching element Q12, and the voltage of scan electrode 22 begins to drop. During this time, 0 (V) is applied to the scan electrode SCx.

(Period T24)
After the voltage of scan electrode SCy drops to near the base potential of 0 (V), switching element Q14 is turned on and switching element Q12 is turned off. Thereby, scan electrode SCy is grounded via switching element Q14, and scan electrode SCy is clamped to 0 (V). During this time, 0 (V) is applied to the scan electrode SCx.

  Next, the operation of generating the erase ramp voltage L3 and applying it to the scan electrode SCx will be described.

(Period T11)
In the period T11, first, both the switching element QHy and the switching element QLy are turned off, the switching element QMy is turned on, and 0 (V) is applied to the scan electrode SCy. Further, the switching element QHx and the switching element QMx are turned off, the switching element QLx is turned on, and the reference potential A is connected to the scan electrode SCx. This state is maintained until the erase lamp voltage L3 is completely applied to the scan electrode SCx.

  Further, the switching element Q6 is turned on (not shown), and the Miller integrating circuit 55 that generates the erasing ramp voltage L3 is connected to the reference potential A.

  Next, the input terminal IN3 of the Miller integrating circuit 55 is set to “Hi”. Specifically, a predetermined constant current is input to the input terminal IN3. Thus, a constant current flows toward the capacitor C3, the source voltage of the switching element Q3 increases in a ramp shape, and the reference potential A starts to increase in a ramp shape from 0 (V). This voltage increase can be continued while the input terminal IN3 is set to “Hi” or until the reference potential A reaches the voltage Vers.

  At this time, a constant current input to the input terminal IN3 is generated so that the gradient of the ramp voltage becomes a desired value (for example, 10 V / μsec). Thus, the erase ramp voltage L3 rising from 0 (V) toward the voltage Vers is generated and applied to the scan electrode SCx. The voltage Vers may be a voltage equal to or higher than the voltage Vs, or may be a voltage equal to or lower than the voltage Vs.

(Period T12)
After the erasing ramp voltage L3 reaches the voltage Vers, the input terminal IN3 is set to “Lo”. Specifically, the constant current input to the input terminal IN3 is stopped. Thus, the operation of Miller integrating circuit 55 is stopped. At the same time, the switching element Q6 is turned off (not shown) to electrically isolate the Miller integrating circuit 55 from the reference potential A. Although not shown, the switching element Q13 of the clamp circuit 57 of the sustain pulse generating circuit 50 is turned off and the switching element Q14 is turned on to connect the reference potential A to 0 (V). As a result, the voltage of scan electrode SCx drops to 0 (V), which is the base potential.

  In the present embodiment, scan electrode drive circuit 43 has a configuration in which switching element QM1 to switching element QMn for connecting scan electrode 22 to 0 (V) are provided in each of scan electrode SC1 to scan electrode SCn. . Therefore, in the present embodiment, as described above, 0 (V) can be applied to scan electrode SCx during the sustain period of 0.25 SF while sustain pulse is applied to scan electrode SCy. Further, 0 (V) can be applied to the scan electrode SCy while the erase ramp voltage L3 is applied to the scan electrode SCx.

  The operation in the sustain period of 0.5 subfield and the initializing period of the subfield (selective initializing subfield) immediately after that is performed by using scan electrode SCy used in the description of FIG. 8 as scan electrode SC1 to scan electrode SCn. Switching element QHy is replaced with switching element QH1 to switching element QHn, switching element QMy is replaced with switching element QM1 to switching element QMn, and switching element QLy is replaced with switching element QL1 to switching element QLn. The description is omitted.

  As described above, the scan electrode drive circuit 43 applies the up ramp voltage L1, the down ramp voltage L2 (down ramp voltage L4), and the erase ramp voltage L3 to the scan electrode SCx, and the up ramp voltage L1 ′ and the down ramp voltage. L2 (down-ramp voltage L4) and a sustain pulse are applied to scan electrode SCy.

  As described above, in the present embodiment, a specific cell initialization subfield having an initialization period in which a forced initialization waveform is applied to a predetermined scan electrode 22 and a selective initialization waveform is applied to another scan electrode 22. And a selective initialization subfield having an initialization period in which a selective initialization waveform is applied to all scan electrodes 22, and a first cell having a specific cell initialization subfield and a plurality of selective initialization subfields. A field and a second field including a plurality of selective initialization subfields are provided. In the first field, the discharge cell to which the forced initializing waveform is applied in the specific cell initialization subfield has a sustain period in the subfield immediately before the specific cell initialization subfield (0.25 subfield). Discharge that applies one ramp voltage (erase ramp voltage L3) that rises from the base potential to a predetermined potential without generating a sustain pulse, and applies a selective initialization waveform in a specific cell initialization subfield. A sustain pulse is applied to the cell only once during the sustain period of 0.25 subfield (first SF). In the second field, in the subfield (0.5 subfield) immediately before any selective initialization subfield (for example, the second SF), all the sustain pulses are generated once in the sustain period. It shall be applied to the discharge cell.

  As a result, the frequency of performing the forced initializing operation in each discharge cell can be set to once in a plurality of fields (for example, once in 6 fields), so that each discharge cell is forcibly assigned once in one field. The black luminance (for example, the luminance of the gradation value “0”) can be lowered as compared with the configuration in which the initialization operation is performed. In the first field, the subfield immediately before the specific cell initialization subfield (for example, the second SF) is set to the 0.25 subfield (first SF), and any selected initialization subfield is set in the second field. A subfield immediately before a field (for example, second SF) is set to 0.5 subfield (first SF), and each is applied with a sustain pulse at least once on each of the display electrode pairs to generate a sustain discharge. Since the light can be emitted at a lower luminance than (for example, the subfield having the luminance weight “1”), only the subfield having the luminance weight “1” is emitted with the luminance having the next smaller gradation value after the black luminance. It can be made lower than the luminance at the time. Further, in the discharge cell to which the selective initializing waveform is applied during the initializing period of the second SF, the sustaining discharge by the sustaining pulse capable of sufficiently generating wall charges and priming particles is performed in the sustaining period of the subfield immediately before. As a result, the write operation in the subsequent subfields can be performed stably. Therefore, according to the present embodiment, the darkness of the display image is improved by reducing the black luminance of the display image and increasing the contrast, while preventing the occurrence of unlit cells and improving the continuity of the displayed luminance. It is possible to display the gray scale of the image more finely and improve the image display quality in the plasma display device.

  The light emission luminance of each subfield is actually “light emission luminance due to address discharge + light emission luminance during the sustain period”. In a subfield having a large luminance weight, the light emission luminance in the sustain period is high, so that the proportion of the light emission luminance due to the address discharge in the light emission luminance of the subfield is substantially negligible. However, in a subfield with a small luminance weight, the emission luminance in the sustain period is low, so the proportion of the emission luminance due to address discharge in the emission luminance of that subfield is relatively high. Therefore, in actuality, the emission luminance of the 0.25 subfield having the luminance weight “0.25” is “emission luminance due to weak discharge of erasing lamp voltage L3” and “emission luminance due to sustain discharge of one sustain pulse”. Is the brightness obtained by adding “emission luminance due to address discharge”, and the emission luminance of 0.5 subfield with luminance weight “0.5” is equal to “emission luminance due to sustain discharge of one sustain pulse”. The brightness is obtained by adding “emission luminance by”.

  Note that the waveform shape of the drive voltage applied to the scan electrode 22 in the sustain period of 0.25 subfield shown in the present embodiment is not limited to the waveform shape shown in FIG. FIG. 9 is a waveform diagram showing another example of a drive voltage waveform applied to each electrode of panel 10 in the first field according to the embodiment of the present invention. For example, as shown in FIG. 9, in the sustain period of 0.25 subfield, the erase ramp voltage L3 and the sustain pulse are generated so as to overlap each other in time and applied to the scan electrode 22. Good. In this configuration, in addition to the same effect as described above, it is possible to obtain an effect of shortening the sustain period in the 0.25 subfield. FIG. 10 is a waveform diagram showing still another example of the drive voltage waveform applied to each electrode of panel 10 in the first field in the embodiment of the present invention. Alternatively, as shown in FIG. 10, in the sustain period of the 0.25 subfield (first SF), the sustain pulse and erase are applied to the discharge cell to which the selective initialization waveform is applied in the specific cell initialization subfield (second SF). The lamp voltage L3 may be applied once each. In this configuration, since the erase ramp voltage L3 is applied to all the scan electrodes 22 during the sustain period of 0.25 subfield (first SF), in addition to the same effect as described above, the control of the scan electrode drive circuit can be simplified. The effect that can be obtained.

  The forced initialization waveform in the present invention is not limited to the waveform shown in this embodiment. The forced initializing waveform may be any waveform as long as the initializing discharge is generated in the discharge cell regardless of the operation of the immediately preceding subfield. The selective initialization waveform generated during the specific cell initialization operation and the selective initialization waveform generated in the initialization period of the subfield immediately after the 0.5 subfield are the waveforms shown in this embodiment. It is not limited to. The above-described selective initialization waveform shown in the present embodiment is merely an example of a waveform in which the initialization discharge does not occur in the discharge cell in the first half of the initialization period. For example, the first half of the initialization period is set to 0 ( The waveform may be maintained at V). Alternatively, the same waveform shape as the selective initialization waveform shown in the initialization period of the third SF may be used.

  In the present embodiment, the ramp voltage generated during the sustain period of the 0.25 subfield (first SF) is applied to the erase ramp voltage L3 generated at the end of the sustain period of the other subfields (second SF to ninth SF). Although the structure which generate | occur | produces with the same waveform shape was demonstrated, this invention is not limited to this structure at all. The ramp voltage generated in the sustain period of 0.25 subfield (first SF) is generated with a gradient different from the erase ramp voltage L3 generated in the sustain period of other subfields (second SF to ninth SF) or a different maximum voltage. It does not matter as a configuration to do.

  In the present embodiment, the configuration in which the sustain pulse generated in the sustain period of 0.5 subfield is generated in the same waveform shape as the sustain pulse generated in the sustain period of other subfields has been described. Is not limited to this configuration. The sustain pulse generated in the sustain period of 0.5 subfield may be generated with a voltage or a pulse width different from that of the sustain pulse of the other subfield. Alternatively, the sustain pulse voltage generated in the sustain period of 0.5 subfield may be changed according to the accumulated value of the operation time of the plasma display device.

  In the present invention, the subfields constituting the field are not limited to the two types of subfields, the specific cell initialization subfield and the selective initialization subfield described above. For example, an all-cell initializing subfield for performing a forced initializing operation on all discharge cells is further provided, and a new field (for example, first field, for example) is added in addition to the above-described two types of fields (first field and second field). A configuration may be adopted in which a third field (2SF is used as an all-cell initializing subfield and the other subfield is a selective initializing subfield) is provided.

  In the embodiment of the present invention, an example in which the first field and the second field are generated alternately has been shown. However, this is merely an example, and the present invention is not limited to this. It is not limited to this configuration. For example, the number of occurrences of the first field may be greater than the number of occurrences of the second field, or the number of occurrences of the second field may be greater than the number of occurrences of the first field. Good.

  Note that the generation pattern of the forced initialization waveform and the selective initialization waveform in the specific cell initialization subfield shown in FIG. 5 in the embodiment of the present invention is merely an example, and the present invention The configuration is not limited to this. The generation pattern of the forced initialization waveform and the selective initialization waveform may be a pattern other than that shown in FIG.

  The timing charts shown in FIGS. 8 and 9 are merely examples in the embodiment of the present invention, and the present invention is not limited to these timing charts.

  In the embodiment of the present invention, scan electrode SC1 to scan electrode SCn are divided into a first scan electrode group and a second scan electrode group, and an address period is a scan electrode belonging to the first scan electrode group. Of the panel by so-called two-phase driving, which includes a first address period in which a scan pulse is applied to each of the first and second address periods in which a scan pulse is applied to each of the scan electrodes belonging to the second scan electrode group. The present invention can also be applied to a driving method.

  In the embodiment of the present invention, the scan electrode and the scan electrode are adjacent to each other, and the sustain electrode and the sustain electrode are adjacent to each other, that is, the arrangement of the electrodes provided on the front plate is “... , Scan electrode, sustain electrode, sustain electrode, scan electrode, scan electrode,...

  Note that the specific numerical values shown in the present embodiment, for example, the gradient of each ramp voltage of the up-ramp voltage L1, the down-ramp voltage L2, the erase ramp voltage L3, and the down-ramp voltage L4 are 50 of the display electrode pair 1080. It is set based on the characteristics of the inch panel and is merely an example of the embodiment. The present invention is not limited to these numerical values, and is desirably set optimally according to the characteristics of the panel, the specifications of the plasma display device, and the like. Each of these numerical values is allowed to vary within a range where the above-described effect can be obtained.

  The present invention can improve the image display quality by reducing the black luminance of the display image to increase the contrast and preventing the occurrence of non-lighted cells and displaying the gradation of the dark area in the display image more finely. Therefore, it is useful as a panel driving method and a plasma display device.

DESCRIPTION OF SYMBOLS 1 Plasma display apparatus 10 Panel 21 Front plate (made of glass) 22 Scan electrode 23 Sustain electrode 24 Display electrode pair 25, 33 Dielectric layer 26 Protection layer 31 Back plate 32 Data electrode 34 Partition 35 Phosphor layer 41 Image signal processing circuit 42 data electrode drive circuit 43 scan electrode drive circuit 44 sustain electrode drive circuit 45 timing generation circuit 50 sustain pulse generation circuit 51 initialization waveform generation circuit 52 scan pulse generation circuit 53, 54, 55 Miller integration circuit 56 power recovery circuit 57 clamp circuit Q1, Q2, Q3, Q5, Q6, Q7, Q11, Q12, Q13, Q14, QH1 to QHn, QL1 to QLn, QM1 to QMn Switching element C1, C2, C3, C11, C31 Capacitor Di1, Di2, Di31 Diode R1 , R2, R3 Resistance L 1 inductor L1, L1 'up-ramp voltage L2, L4 down-ramp voltage L3 erasing ramp voltage

Claims (3)

A plasma display panel having a plurality of discharge cells each having a display electrode pair consisting of a scan electrode and a sustain electrode is provided with a plurality of subfields having an initialization period, an address period, and a sustain period in one field for gradation display. A method of driving a plasma display panel,
Selective initialization that applies a forced initializing waveform that generates an initializing discharge to a predetermined discharge cell and generates an initializing discharge in another discharge cell that has generated a sustain discharge in the sustain period of the immediately preceding subfield. Providing a specific cell initialization subfield having an initialization period for applying a waveform;
In the sustain period of the subfield immediately before the specific cell initialization subfield, one ramp voltage rising from the base potential to a predetermined potential is applied to the discharge cell to which the forced initialization waveform is applied without applying a sustain pulse. And a sustain pulse is applied only once to the discharge cells to which the selective initialization waveform is applied. A plurality of discharge cells having a display electrode pair composed of a scan electrode and a sustain electrode are provided, a plurality of subfields having an initialization period, an address period, and a sustain period are provided in one field, and a specific cell initialization subfield is provided. A plasma display panel for providing gradation by providing a field;
A sustain electrode driving circuit for applying a sustain pulse to the sustain electrode in the sustain period;
Either the forced initializing waveform for generating the initializing discharge in the discharge cell or the selective initializing waveform for generating the initializing discharge in the discharge cell that has generated the sustain discharge in the sustain period of the immediately preceding subfield In the initial period of the specific cell initialization subfield, the forced initializing waveform is applied to a predetermined discharge cell and the selective initializing waveform is applied to another discharge cell. Comprises a scan electrode drive circuit for applying a sustain pulse to the scan electrodes,
In the maintenance period of the subfield immediately before the specific cell initialization subfield,
In the discharge cell to which the forced initializing waveform is applied, the sustain electrode drive circuit and the scan electrode drive circuit do not apply the sustain pulse to the display electrode pair, and the scan electrode drive circuit has a predetermined potential from a base potential. Applying one ramp voltage to the scan electrode,
In the discharge cell to which the selective initialization waveform is applied, the sustain electrode drive circuit does not apply the sustain pulse to the sustain electrode, and the scan electrode drive circuit applies the sustain pulse to the scan electrode only once. A plasma display device. The plasma display device according to claim 2, wherein a switching element for connecting the scan electrode to a base potential is provided in each of the scan electrodes.

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