JP2011082409A - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a compound produced in reaction with a component contained in a photosensitive resin, from being formed on a surface of wiring. <P>SOLUTION: A semiconductor substrate 11 is prepared which has a connection pad 11 on an upper surface. Then an insulator 41 is formed on first wiring 33 electrically connected to the connection pad 3 and the photosensitive resin 45 is formed. When an opening 45a is formed in the photosensitive resin 45, the first wiring 33 is covered with the insulator 41. Therefore, even if the photosensitive resin 45 is cured in this state, a compound produced in reaction with a component contained in the photosensitive resin 45 is not formed on the surface of the first wiring 33. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

  An external connection electrode and a sealing material filled between the external connection electrodes are formed on the semiconductor wafer on which the semiconductor integrated circuit is formed, and dicing is performed to reduce the outer size of the semiconductor chip during dicing. A method of obtaining a semiconductor device having a size is known. Since the semiconductor device formed by this method has the same size as the semiconductor chip, it is called a CSP (Chip Size Package). Or it is also called WLP (Wafer Level Package) because it is packaged in a semiconductor wafer state.

The external connection electrode in the CSP has a columnar shape with a height of about 100 μm, a solder ball is mounted on the upper surface thereof, and is joined to a connection terminal of a circuit board by a flip chip bonding (also called face down) method. .
The external connection electrode is connected to a connection pad of an integrated circuit formed on the main surface of the semiconductor substrate by wiring. The wiring may be not only a single layer but also a multilayer. In addition, a CSP including a circuit element such as an inductor as well as wiring is also known (see, for example, Patent Document 1).

JP 2002-231817 A

In the CSP as described above, recently, consideration has been given to using a photosensitive resin as an interlayer insulating film in consideration of resolution and environment. When a photosensitive resin is used, it is not necessary to form a photoresist film, there is no process for dissolving the photoresist film with a solvent or volatilizing the solvent, the working environment is improved, and pollution is reduced. Also, the resolution is improved.
Therefore, when the upper wiring connected to the exposed portion of the wiring is formed by covering the lower wiring with the photosensitive resin so that a part of the wiring is exposed, the photosensitive material is applied to the surface of the exposed portion. A compound with the contained components is formed.

For example, when covering a wiring made of copper using a positive type resin to which a photosensitive diazonaphthoquinone compound is bonded so that a part of the wiring is exposed, the photosensitive resin is thermally decomposed at the time of curing, Copper sulfide (CuS) is formed on the surface of the exposed portion of the wiring. The electrical resistivity of the copper sulfide is larger than that of copper (1.69 μΩ · cm), and the electrical characteristics are impaired. Therefore, the copper sulfide needs to be removed.
However, since copper sulfide is difficult to remove by dry etching, it is removed by wet etching. At this time, the insulating film absorbs moisture. The absorbed moisture lowers the degree of vacuum in the vacuum apparatus, and thus adversely affects subsequent film formation.

The invention according to claim 1 is a semiconductor substrate having a connection pad, a first wiring having a pad portion and electrically connected to the connection pad, and a pad of the first wiring An insulating material having an opening that exposes a portion; a photosensitive resin that is formed on the insulating material and has an opening that exposes the first wiring through the opening of the insulating material; and the photosensitive resin And a second wiring connected to the pad portion of the first wiring.
According to a second aspect of the present invention, there is provided the semiconductor device according to the first aspect, wherein the first wiring has a metal layer containing copper at least on a surface thereof.
According to a third aspect of the present invention, there is provided the semiconductor device according to the first or second aspect, wherein the first wiring is formed on a base metal layer and the base metal layer. And an upper metal layer made of copper-based metal.
The semiconductor device according to a fourth aspect of the present invention is the semiconductor device according to any one of the first to third aspects, wherein the photosensitive resin is an alkali-soluble polyimide resin, PBO resin, or novolac resin. One of the resins is included.
The semiconductor device according to a fifth aspect of the present invention is the semiconductor device according to any one of the first to fourth aspects, wherein the photosensitive resin contains a diazonaphthoquinone compound.
According to a sixth aspect of the present invention, there is provided the semiconductor device according to any one of the first to fourth aspects, wherein the photosensitive resin film contains a photopolymerizable compound.
The semiconductor device according to a seventh aspect is the semiconductor device according to any one of the first to sixth aspects, wherein the second wiring has a metal layer containing copper at least on the surface. Features.
The semiconductor device according to an eighth aspect of the present invention is the semiconductor device according to the seventh aspect, wherein the second wiring is an upper portion made of a base metal layer and a copper-based metal formed on the base metal layer. It has a metal layer.
According to a ninth aspect of the present invention, in the semiconductor device according to any one of the first to eighth aspects, the second wiring includes an inductor.
The semiconductor device according to a tenth aspect of the present invention is the semiconductor device according to any one of the first to ninth aspects, wherein the peripheral side surface of the opening in the photosensitive resin is inclined with respect to the pad portion. The peripheral side surface of the opening in the insulating material is a vertical surface substantially perpendicular to the pad portion.
The semiconductor device according to claim 11 is the semiconductor device according to any one of claims 1 to 10, wherein a peripheral side surface of the insulating material is recessed from a side surface of the semiconductor substrate. To do.
A semiconductor device according to a twelfth aspect is the semiconductor device according to any one of the first to tenth aspects, wherein a peripheral side surface of the insulating material is flush with a side surface of the semiconductor substrate. And
A semiconductor device according to a thirteenth aspect is the semiconductor device according to any one of the first to twelfth aspects, wherein a peripheral side surface of the photosensitive resin is recessed from a side surface of the semiconductor substrate. And
The invention according to claim 14 is the semiconductor device according to any one of claims 1 to 12, wherein a peripheral side surface of the photosensitive resin is flush with a side surface of the semiconductor substrate. Features.
The semiconductor device according to claim 15 is the semiconductor device according to any one of claims 1 to 14, wherein a columnar external connection electrode is formed on the second wiring. Features.
The invention according to a sixteenth aspect is the semiconductor device according to the fifteenth aspect, wherein a sealing material is formed around the external connection electrode on the photosensitive resin. .
The invention according to claim 17 is the semiconductor device according to any one of claims 1 to 16, wherein a peripheral side surface of the sealing material is flush with a side surface of the semiconductor substrate. Features.

According to another aspect of the invention, there is provided a semiconductor device manufacturing method comprising: a step of preparing a semiconductor substrate having a connection pad on an upper surface; a first portion having a pad portion and electrically connected to the connection pad. A step corresponding to the pad portion of the first wiring of the photosensitive resin, a step of covering the first wiring with an insulating material, a step of covering the insulating material with a photosensitive resin, Forming an opening by wet etching, and forming an opening exposing the pad portion of the first wiring by dry etching in the insulating material through the opening of the photosensitive resin,
Forming a second wiring connected to the pad portion of the first wiring on the photosensitive resin.
The semiconductor device manufacturing method according to claim 19 is the semiconductor device manufacturing method according to claim 18, wherein the first wiring is formed by forming a metal layer containing copper at least on the surface. Including the step of:
The semiconductor device manufacturing method according to claim 20 is the semiconductor device manufacturing method according to any one of claims 18 and 19, wherein the step of forming the first wiring includes a base metal layer. And a step of forming an upper metal layer made of a copper-based metal formed on the base metal layer.
The semiconductor device manufacturing method according to claim 21 is the semiconductor device manufacturing method according to any one of claims 18 to 20, wherein the photosensitive resin is an alkali-soluble polyimide resin, It contains either PBO resin or novolac resin.
The invention related to a method for manufacturing a semiconductor device according to claim 22 is the method for manufacturing a semiconductor device according to any one of claims 18 to 21, wherein the step of covering the insulating material with a photosensitive resin is a diazonaphthoquinone compound. A step of covering the insulating material with a photosensitive resin containing
The invention related to a method for manufacturing a semiconductor device according to claim 23 is the method for manufacturing a semiconductor device according to any one of claims 18 to 21, wherein the step of covering the insulating material with a photosensitive resin comprises photopolymerization. A step of covering the insulating material with a photosensitive resin containing a functional compound.
The invention related to a method for manufacturing a semiconductor device according to claim 24 is the method for manufacturing a semiconductor device according to any one of claims 18 to 23, wherein the step of covering the first wiring with an insulating material comprises the steps of: Including the step of curing the insulating material, the step of covering the insulating material with a photosensitive resin is performed after the step of curing the insulating material.
The semiconductor device manufacturing method according to claim 25 is the semiconductor device manufacturing method according to any one of claims 18 to 24, wherein the pad portion of the first wiring is formed on the photosensitive resin. Forming a second wiring connected to the substrate includes a step of forming a base metal layer on the photosensitive resin and a step of forming an upper metal layer on the base metal layer by electrolytic plating. It is characterized by.
The semiconductor device manufacturing method according to a twenty-sixth aspect is the semiconductor device manufacturing method according to any one of the eighteenth to twenty-fifth aspects, wherein the pad portion of the first wiring is formed on the photosensitive resin. The step of forming the second wiring to be connected includes a step of forming an inductor.
The invention related to a method for manufacturing a semiconductor device according to claim 27 is the method for manufacturing a semiconductor device according to any one of claims 18 to 26, wherein the step of covering the first wiring with an insulating material comprises the steps of: The method includes a step of forming the peripheral side surface of the insulating material so as to be recessed from the side surface of the semiconductor substrate.
The invention related to a method for manufacturing a semiconductor device according to claim 28 is the method for manufacturing a semiconductor device according to any one of claims 18 to 26, wherein the step of covering the first wiring with an insulating material comprises the steps of: The method includes a step of forming the peripheral side surface of the insulating material so as to be flush with the side surface of the semiconductor substrate.
An invention according to a method for manufacturing a semiconductor device according to claim 29 is the method for manufacturing a semiconductor device according to any one of claims 18 to 28, wherein the step of covering the insulating material with a photosensitive resin comprises the step of And a step of forming the peripheral side surface of the conductive resin so as to retract from the side surface of the semiconductor substrate.
The method for manufacturing a semiconductor device according to claim 30 is the method for manufacturing a semiconductor device according to any one of claims 18 to 28, wherein the step of covering the insulating material with a photosensitive resin comprises the steps of: The method includes a step of forming the peripheral side surface of the photosensitive resin so as to be flush with the side surface of the semiconductor substrate.
A semiconductor device manufacturing method according to a thirty-first aspect is the semiconductor device manufacturing method according to any one of the thirteenth to thirty-first embodiments, further comprising a columnar external connection on the second wiring. It is characterized by including an electrode.
A semiconductor device manufacturing method according to a thirty-second aspect is the semiconductor device manufacturing method according to the thirty-third aspect, wherein a sealing material is further formed around the external connection electrode on the photosensitive resin. Including the step of:
The semiconductor device manufacturing method according to a thirty-third aspect is the semiconductor device manufacturing method according to the thirty-second aspect, wherein the step of forming the sealing material is such that a peripheral side surface of the sealing material is the semiconductor substrate Including a step of forming the same surface as the side surface.

  According to this invention, since the photosensitive resin is cured in a state where an insulating material is interposed between the wiring and the photosensitive resin, a compound with a component contained in the photosensitive resin is formed on the surface of the wiring. Can be prevented.

FIG. 4 is an enlarged cross-sectional view taken along the line II of FIG. The top view of the semiconductor wafer before obtaining the semiconductor device of FIG. FIG. 3 is an enlarged plan view of a semiconductor device formation region A in FIG. 2. 1 is an enlarged cross-sectional view for explaining the first step in the manufacturing method of the semiconductor device. FIG. 5 is an enlarged cross-sectional view for explaining a process following FIG. 4. FIG. 6 is an enlarged cross-sectional view for explaining a process following FIG. 5. FIG. 7 is an enlarged cross-sectional view for explaining a process following FIG. 6. FIG. 8 is an enlarged cross-sectional view for explaining a process following FIG. 7. FIG. 9 is an enlarged cross-sectional view for explaining a process following FIG. 8. FIG. 10 is an enlarged cross-sectional view for explaining a process following FIG. 9. FIG. 11 is an enlarged cross-sectional view for explaining a process following FIG. 10. FIG. 12 is an enlarged cross-sectional view for explaining a process following FIG. 11. FIG. 13 is an enlarged cross-sectional view for explaining a process following FIG. 12. FIG. 14 is an enlarged cross-sectional view for explaining a process following FIG. 13. FIG. 15 is an enlarged cross-sectional view for explaining a process following FIG. 14. FIG. 16 is an enlarged cross-sectional view for explaining a process following FIG. 15. FIG. 17 is an enlarged cross-sectional view for explaining a process following FIG. 16. FIG. 18 is an enlarged cross-sectional view for explaining a process following FIG. 17. FIG. 19 is an enlarged cross-sectional view for explaining a process following FIG. 18. FIG. 20 is an enlarged cross-sectional view for explaining a step following FIG. 19. FIG. 21 is an enlarged cross-sectional view for explaining a process following FIG. 20. FIG. 22 is an enlarged cross-sectional view for explaining a process following FIG. 21. FIG. 23 is an enlarged sectional view for explaining a step following FIG. 22; The expanded sectional view which shows the modification 1 of the semiconductor device of this invention. The expanded sectional view which shows the modification 2 of the semiconductor device of this invention.

(Embodiment 1)
The semiconductor device of the present invention will be described below.
FIG. 1 is an enlarged cross-sectional view according to an embodiment of a semiconductor device 10 of the present invention. FIG. 2 is a plan view of the semiconductor wafer 1 before the semiconductor device 10 is obtained by dicing. The semiconductor devices 10 are formed on the semiconductor wafer 1 and arranged in a matrix in the row direction and the column direction. A large number of semiconductor devices 10 can be obtained at the same time by cutting the semiconductor wafer 1 along the dicing line 2 after forming a solder ball after the final process described later.

FIG. 3 is an enlarged plan view of the semiconductor device formation region A illustrated by a two-dot chain line in FIG. 2, that is, a region surrounded by a pair of row direction dicing lines 2 and a pair of column direction dicing lines 2. Show.
In the semiconductor device formation region A, connection pads 3 are arranged along each of the four sides, and a large number of external connection electrodes 20 are arranged inside the region where the connection pads 3 are arranged. Yes. The external connection electrodes 20 are usually arranged in an annular shape from the peripheral side of the semiconductor device formation region A toward the center, but may be arranged differently.

  Each external connection electrode 20 and the connection pad 3 are connected by a wiring 15. Although not shown in the figure, a pad portion having a size substantially the same as or slightly larger than the diameter of the external connection electrode 20 is formed in a portion corresponding to the external connection electrode 20 of each wiring 15. The electrode 20 is formed on the pad portion of the wiring 15.

In the semiconductor device formation region A, one thin film inductor element (inductor) 30 is formed. The thin film inductor element 30 includes a first wiring 33 for connection that is linearly routed, and a second wiring 37 that is formed in a spiral shape. Each of the second wirings 37 has a rectangular inner pad portion 31 and an outer pad portion 32 in a plan view. One end of the first wiring 33 is connected to the connection pad 3, passes through the lower layer of the second wiring 37, extends to the center of the spiral second wiring 37, and is connected to the inner pad of the second wiring 37. Connected to the unit 31. An external connection electrode 20 is formed on the outer pad portion 32 of the second wiring 37.
Hereinafter, the semiconductor device 10 will be described in detail with reference to FIG. 1 which is an enlarged sectional view taken along the line II of FIG.

  The semiconductor device 10 includes a semiconductor substrate 11 such as a silicon substrate, for example. Although not shown, an integrated circuit is formed on the main surface (upper surface) side of the semiconductor substrate 11. A plurality of connection pads 3 connected to the integrated circuit are formed on the main surface of the semiconductor substrate 11. The connection pad 3 is made of, for example, an aluminum-based metal. A first insulating film 4 having an opening 4 a that exposes the central portion of the connection pad 3 is formed on the main surface of the semiconductor substrate 11. The first insulating film 4 is formed of an inorganic material such as silicon oxide or silicon nitride, and the peripheral side surface thereof is located slightly recessed from the side surface of the semiconductor substrate 11.

  A second insulating film 12 is formed on the first insulating film 4. The second insulating film 12 is made of an organic resin material such as polyimide resin or PBO (Poly-p-Phenylene-Benzobisoxazole) resin. Alternatively, an organic resin material such as polyimide resin, PBO (Poly-p-Phenylene-Benzobisoxazole) resin, or novolak resin is used as a base member. For example, a positive diazonaphthoquine compound is converted to N-methyl. A resin formed by dissolving in a solvent such as pyrrolidone or γ-butyllactone and bound with a photosensitive material may be used. The second insulating film 12 is also formed with an opening 12 a that exposes the central portion of the connection pad 3. Since the opening film 4a of the first insulating film 4 and the opening 12a of the second insulating film are formed by wet etching with an etching solution, each of the openings 4a and 12a has an inclined surface inclined with respect to the connection pad 3. It has become. The peripheral side surface of the second insulating film 12 is flush with the peripheral side surface of the first insulating film 4, and is formed at a position slightly retracted from the side surface of the semiconductor substrate 11 together with the peripheral side surface of the first insulating film 4. Yes.

On the second insulating film 12, a first wiring 33 having one end connected to the connection pad 3 through the opening 12a of the second insulating film 12 is formed. The first wiring 33 has a two-layer structure of a base metal layer 34 and an upper metal layer 35 formed on the base metal layer 34.
The base metal layer 34 and the upper metal layer 35 can be formed of a copper-based metal. The first wiring 33 is not limited to a two-layer structure, and may have a three-layer or more stacked structure. In that case, for example, one or more metal layers made of titanium (Ti), tungsten (W), an alloy of titanium and tungsten, or the like are interposed.

A third insulating film (insulating material) 41 is formed on the upper metal layer 35 and on the second insulating film 12 around the upper metal layer 35. The third insulating film 41 is made of silicon oxide, silicon nitride, or the like. Alternatively, an organic resin material such as polyimide resin, PBO (Poly-p-Phenylene-Benzobisoxazole) resin, or novolak resin is used as a base member. A resin formed by dissolving in a solvent such as pyrrolidone or γ-butyllactone and bound with a photosensitive material may be used.
The third insulating film 41 is formed with an opening 41 a that exposes an end portion (pad portion) of the upper metal layer 35. The opening 41a of the third insulating film 41 is formed by dry etching such as plasma etching, as will be described later. Therefore, the peripheral side surface of the opening 41 a in the third insulating film 41 is a vertical surface that is substantially perpendicular to the pad portion of the upper metal layer 35.

A photosensitive resin 45 is formed on the third insulating film 41. The photosensitive resin 45 has an opening 45 a that exposes the pad portion of the upper metal layer 35 through the opening 41 a of the third insulating film 41. The opening 45a of the photosensitive resin 45 is formed by wet etching using an etching solution, as will be described later. Therefore, the opening 45 a of the photosensitive resin 45 is an inclined surface that is inclined with respect to the pad portion of the upper metal layer 35.
The peripheral side surfaces of the third insulating film 41 and the photosensitive resin 45 are flush with the peripheral side surfaces of the first insulating film 4 and the second insulating film 12, and are in a position retracted from the side surface of the semiconductor substrate 11. Is formed.

A spiral second wiring 37 is formed on the upper surface of the photosensitive resin 45.
The second wiring 37 has a two-layer structure of a base metal layer 38 and an upper metal layer 39 formed on the base metal layer 38.
The base metal layer 38 and the upper metal layer 39 can be formed of a copper-based metal. The second wiring 37 is not limited to a two-layer structure, and may be a stacked structure of three or more layers. In that case, for example, one or more metal layers made of titanium (Ti), tungsten (W), an alloy of titanium and tungsten, or the like are interposed.

  The second wiring 37 is connected to the first wiring 33 through the opening 41a of the third insulating film 41 and the opening 45a of the photosensitive resin 45, and this portion is connected to the inner pad portion 31 (see FIG. 3). It has become. As shown in FIG. 3, the second wiring 37 is formed in a spiral shape in a plan view. In FIG. 1, the left portion of the inner pad portion 31 is in the upper layer of the first wiring 33. The third wiring 33 is routed in a crossing manner. An outer pad portion 32 is formed on the right end side of the second wiring 37.

An external connection electrode 20 is formed on the outer pad portion 32 of the second wiring 37. The external connection electrode 20 has a flat upper surface 20a, and has, for example, a cylindrical shape with a diameter of 40 to 100 μm and a height of 40 to 80 μm, and is formed of a copper-based metal or the like.
A sealing material 16 made of polyimide resin or epoxy resin is formed around the external connection electrode 20 on the photosensitive resin 45. The peripheral side surface of the sealing material 16 is flush with the side surface of the semiconductor substrate 11 of the external connection electrode 20. The sealing material 16 is also formed on the semiconductor substrate 11 around the first insulating film 4, the second insulating film 12, the third insulating film 41, and the photosensitive resin 45. The peripheral side surfaces of the second insulating film 12, the third insulating film 41, and the photosensitive resin 45 are covered.

The upper surface 16 a of the sealing material 16 is formed to be substantially the same as the upper surface 20 a of the external connection electrode 20 or slightly higher than the upper surface 20 a of the external connection electrode 20.
A solder ball 25 is joined to the central portion of the upper surface 20a of the external connection electrode 20. The solder ball 25 has an outer shape (diameter) larger than the outer shape (diameter) of the external connection electrode 20.

Next, an example of a method for manufacturing the semiconductor device 10 according to the embodiment of the present invention illustrated in FIG. 1 will be described with reference to FIGS.
First, as shown in FIG. 4, a semiconductor wafer 1 on which an integrated circuit having connection pads 3 is formed in a semiconductor device formation region A is prepared. A first insulating film 4 is formed on the entire surface of the semiconductor wafer 1 including the connection pads 3. The connection pad 3 is made of, for example, an aluminum metal. The first insulating film 4 is made of, for example, an inorganic material such as silicon oxide or silicon nitride, and is formed by a plasma CVD (Chemical Vapor Deposition) method.

  Then, using the photolithography technique, an opening 51a is formed in a portion corresponding to the connection pad 3, and a photoresist film 51 shown in FIG. 4 is formed in which the peripheral side surface is formed at a position retracted from the dicing line 2. To do. More specifically, a photoresist film 51 is applied on the entire surface of the first insulating film 4 by a spin coating method or a screen printing method. Then, exposure is performed using an exposure mask having an exposure pattern having a shape corresponding to the connection pad 3. The photoresist film 51 may be a positive type or a negative type. In the case where the positive photoresist 51 is used, the exposure pattern is a light-transmitting pattern. Further, the exposure mask has an external pattern such that the peripheral side surface of the photoresist film 51 is formed at a position where it is recessed from the dicing line 2. After exposure using an exposure mask, development is performed, and the state illustrated in FIG. 4 is obtained.

  Next, the first insulating film exposed from the photoresist film 51 is removed using an etching solution. As a result, an opening 4 a that exposes the central portion of the connection pad 3 is formed in the first insulating film 4. Since it is wet etching, the opening 4 a becomes an inclined surface inclined with respect to the surface of the connection pad 3. At the same time, the exposed portion of the peripheral region of the first insulating film 4 from the photoresist film 51 is removed, and the peripheral side surface of the first insulating film 4 is formed at a position retracted from the dicing line 2. Then, the photoresist film 51 is peeled off. This state is shown in FIG.

  Next, as shown in FIG. 6, over the entire surface, that is, on the first insulating film 4, on the connection pad 3 exposed from the opening 4 a of the first insulating film 4, and on the first insulating film 4. A second insulating film 12 is applied on the surrounding semiconductor wafer 1. As the second insulating film 12, an organic resin such as a polyimide resin or a PBO resin can be used. Alternatively, a polyimide resin, a PBO resin, or a novolac resin that is soluble in alkali and bonded with a photosensitive material is used. Examples of the photosensitive material include, but are not limited to, positive type diazonaphthoquin compounds. As a coating method, an appropriate method such as a spin coating method, a screen printing method, or a scan coating method can be used.

  Then, a photoresist film 52 is applied on the entire surface of the second insulating film 12, and is patterned using a photolithography technique. For patterning the photoresist film 52, an exposure mask having an exposure pattern having a shape corresponding to the opening 4a of the first insulating film 4 is used. Also in this case, the photoresist film 52 may be a positive type or a negative type. When the positive photoresist film 52 is used, the exposure pattern corresponding to the opening 4a is a translucent pattern. Further, the exposure mask has an external pattern such that the peripheral side surface of the photoresist film 52 is formed at the same position as the peripheral side surface of the first insulating film 4. After the exposure using the exposure mask, development is performed to form an opening 52a corresponding to the opening 4a of the first insulating film 4 as shown in FIG. A photoresist film 52 formed at the same position as the peripheral side surface of the insulating film 4 is formed.

  Next, using the photoresist film 52 as a mask, the portion of the second insulating film 12 exposed from the photoresist film 52 is removed with an etching solution. When the photoresist film 52 is peeled off, the state shown in FIG. 7 is obtained. In this state, an opening 12 a corresponding to the opening 4 a of the first insulating film 4 is formed in the second insulating film 12. The peripheral side surface of the second insulating film 12 is flush with the peripheral side surface of the first insulating film 4.

  Next, as shown in FIG. 8, the semiconductor wafer on the entire surface, that is, on the second insulating film 12, on the connection pads 3 exposed from the second insulating film 12, and around the second insulating film 12. A first metal film 34 </ b> A is formed on 1. The first metal film 34A serves as a base metal layer 34 described later. The first metal film 34A is made of, for example, a copper-based metal and is formed by a sputtering method or an electroless plating method.

  Next, a photoresist film 53 is applied over the entire surface of the first metal film 34A. Then, the photoresist film 53 is exposed and developed using an exposure mask having an exposure pattern corresponding to the shape of the upper metal layer 35 of the first wiring 33. Also in this case, the photoresist film 53 may be a positive type or a negative type. As shown in FIG. 9, an opening 53 a corresponding to the shape of the upper metal layer 35 is formed in the photoresist film 53.

  Next, electrolytic plating is performed using the first metal film 34 </ b> A as a current path, and the upper metal layer 35 is formed on the first metal film 34 </ b> A exposed from the opening 53 a of the photoresist film 53. This state is shown in FIG.

  Next, when the photoresist film 53 is peeled off, the portion of the first metal film 34A that has been under the photoresist film 53 is exposed. Using the upper metal layer 35 as a mask, a portion of the first metal film 34A exposed from the upper metal film 35 is etched. As a result, the base metal layer 34 is formed, and the first wiring 33 in which the upper metal layer 35 is formed on the base metal layer 34 is formed. This state is illustrated in FIG.

  Next, the third insulating film 41 is formed on the entire surface, that is, on the upper metal layer 35, on the second insulating film 12 around the upper metal layer 35, and on the semiconductor wafer 1 around the upper metal layer 35. . This state is shown in FIG. For the third insulating film 41, silicon oxide, silicon nitride, or the like is used. Alternatively, an organic resin material such as polyimide resin, PBO resin, epoxy resin, or novolak resin is used as a base member, and for example, a positive type diazonaphthoquin compound is dissolved in a solvent such as N-methylpyrrolidone or γ-butyllactone. A resin to which a photosensitive material is bonded is used. It is formed by a spin coating method, a screen printing method, or the like. For example, when an imide is used, it is liquid because it is not a imide bond and remains a precursor when applied. Therefore, pre-baking is performed at 110 to 120 ° C. to evaporate the solvent. Then, the applied third insulating film 41 is heated to 350 ° C. and post-baked.

Next, a photosensitive resin 45 is applied to the entire surface of the third insulating film 41. As the photosensitive resin 45, an organic resin material such as polyimide resin, PBO resin, epoxy resin, or novolac resin is used as a base member. A resin to which a photosensitive material is bonded, which is formed by dissolving in a solvent, is used. The photosensitive resin 45 is formed by a spin coating method or a screen printing method.
For example, when an imide is used, it is liquid because it is not a imide bond and remains a precursor when applied. Therefore, pre-baking is performed at 110 to 120 ° C. to evaporate the solvent. This state is shown in FIG.

  Next, the photosensitive resin 45 has an exposure pattern corresponding to the shape of the inner pad portion 31 (see FIG. 3), and an exposure mask having a peripheral pattern corresponding to the peripheral side surface of the second insulating film 12. To expose. When the photosensitive resin 45 is an organic material containing a diazonaphthoquin compound, the exposure mask is a positive pattern, a portion corresponding to the inner pad portion 31 (see FIG. 3), and the peripheral side surface of the second insulating film 12 The outer side of the area | region corresponding to this has an exposure pattern which has translucency. When developed with TMAH (tetramethylammonium hydroxide), the state shown in FIG. 14 is obtained.

Next, in the state of FIG. 14, it heat-hardens by performing 350 degreeC and post-baking.
The applied third insulating film 41 was thermally cured by setting the third insulating film 41 to 350 ° C. and post-baking, but it was not performed immediately after the application of the third insulating film 41, and a photosensitive resin 45 was applied, exposed, After the development, the third insulating film 41 and the photosensitive resin 45 may be simultaneously post-baked and thermally cured. In the state illustrated in FIG. 14, the first wiring 33 is covered with the third insulating film 41, and the photosensitive resin 45 does not contact the surface of the first wiring 33. For this reason, a compound with a component contained in the photosensitive resin 45 is not formed on the surface of the first wiring 33. For example, when the upper metal layer 35 of the first wiring 33 is formed of a copper-based metal and the photosensitive resin 45 is an organic material containing a diazonaphthoquin compound, the upper metal layer is accompanied with the curing treatment of the photosensitive resin 45. Copper sulfide (CuS) which affects the conductivity is formed on the exposed surface of 35. However, in the present invention, it is possible to prevent copper sulfide from being generated on the surface of the upper metal layer 35 of the first wiring 33. Further, even when an organic material containing a diazonaphthoquin compound is used as the third insulating film 41, after the third insulating film 41 is formed, a photosensitive resin 45 is formed and thermally etched to dry etching. Since the opening 45a is provided in the thick photosensitive resin 45, it is thermally cured. Next, the thin second photosensitive resin 41 is dry-etched to form the opening 41a. Since the photosensitive resin 41 is dry-etched after thermosetting, sulfur is not released, and therefore it does not react with the copper of the first wiring 33 to form a copper sulfide layer.

  Next, using the photosensitive resin 45 as a mask, the portion of the third insulating film 41 exposed from the opening 45a of the photosensitive resin 45 is removed by dry etching such as oxygen plasma treatment to form the opening 45a. The surface of the upper metal layer 35 of one wiring 33 is exposed. This state is illustrated in FIG. Since the formation of the opening 45 a of the photosensitive resin 45 is dry etching, the peripheral side surface of the opening 45 a becomes a vertical surface substantially perpendicular to the pad portion of the first wiring 33. Here, when the third insulating film 41 is removed by wet etching, the photosensitive resin 45 absorbs moisture and is released into the vacuum apparatus in the subsequent processes, lowering the degree of vacuum in the vacuum apparatus and changing the film formation conditions. This is not preferable. In the embodiment of the present invention, since the third insulating film 41 is removed by dry etching, such a problem can be prevented.

  Next, the second metal film 38 </ b> A is formed on the entire surface, that is, on the photosensitive resin 45, on the upper metal layer 35 exposed from the photosensitive resin 45, and on the semiconductor wafer 1 around the photosensitive resin 45. The second metal film 38A becomes a base metal layer 38 of the second wiring 37 described later. The second metal film 38A is made of, for example, a copper-based metal and is formed by a sputtering method or an electroless plating method.

  Next, a photoresist film 54 is applied over the entire surface of the second metal film 38A. Then, the photoresist film 54 is exposed and developed using an exposure mask having an exposure pattern corresponding to the shape of the upper metal layer 39 of the second wiring 37. Also in this case, the photoresist film 54 may be a positive type or a negative type. As shown in FIG. 17, a plurality of openings 54 a corresponding to the shape of the upper metal layer 39 are formed in the photoresist film 54. In the photoresist film 54, an opening 54b is formed at a portion where the inner pad portion 31 is formed. Further, an opening 54c is formed in the photoresist film 54 at a portion where the outer pad portion 32 is formed.

  Next, electrolytic plating is performed using the second metal film 38A as a current path, and the upper metal layer 39 is formed on the second metal film 38A exposed from the openings 54a, 54b, 54c of the photoresist film 54. This state is shown in FIG. In this state, the inner pad portion 31 is formed in the opening portion 54b of the photoresist film 54, and the outer pad portion 32 is formed in the opening portion 54c. Further, the second wiring 37 connecting the inner pad portion 31 and the outer pad portion 32 is formed in a spiral shape as shown in FIG.

  Next, the photoresist film 54 is peeled off, and a negative photoresist film 55 is newly formed on the entire surface of the second metal film 38A. In this case, since the photoresist film 55 is thick, a photoresist film formed in a sheet shape is deposited. The photoresist film 55 is exposed using an exposure mask having a light-shielding pattern corresponding to the shape of the external connection electrode 20 to form an opening 55a. This state is illustrated in FIG.

  Next, electrolytic plating is performed using the second metal film 38A as a current path, and an external connection electrode is formed on the upper metal film 39 exposed from the opening 55a of the photoresist film 55, in other words, on the outer pad portion 32. 20 is formed. This state is shown in FIG.

  Next, when the photoresist film 55 is removed, the upper wiring layer 39 of the second wiring 37 and the second metal film 38A around the upper wiring layer 39 are exposed as shown in FIG.

  Next, the second metal film 38A is etched using the upper wiring layer 39 as a mask. As a result, a base metal layer 38 having the same pattern as the upper wiring layer 39 is formed. That is, the second wiring 37 in which the upper wiring layer 39 is laminated on the base metal layer 38 is formed. This state is shown in FIG.

  Next, the sealing material 16 is formed. The sealing material 16 is once formed thick on the photosensitive resin 45 and the semiconductor wafer 1 therearound so as to cover the upper surface 20a of the external connection electrode 20. Then, the upper portion of the sealing material 16 is ground until the upper surface 20a of the external connection electrode 20 is exposed.

  Since the external connection electrodes 20 are formed by electrolytic plating, the heights of the external connection electrodes 20 are different from one another, and a considerably large unevenness is formed on the upper surface 20a of each external connection electrode 20. Yes. Therefore, in the step of exposing the external connection electrode 20, the upper side of the external connection electrode 20 is ground together with the sealing material 16. Since the external connection electrode 20 is formed of a soft metal such as a copper-based metal, sagging may occur in the upper surface 20a of the external connection electrode 20 in the step of grinding the upper surface 20a of the external connection electrode 20. . When a solder ball is mounted on the upper surface 20a of the external connection electrode 20 having the sagging and the reflow process is performed, the solder ball becomes deformed, and sufficient soldering strength cannot be obtained when soldered to an external terminal.

  For this reason, when sagging occurs on the upper surface 20a of the external connection electrode 20, it is necessary to wet-etch the upper surface 20a of the external connecting electrode 20 and remove the upper side of the external connecting electrode 20 together with sagging. By this step, the upper surface 20a of the external connection electrode 20 becomes lower than the upper surface 16a of the sealing material 16, and a step portion of about several μm is formed at the boundary between the sealing material 16 and the external connection electrode 20. However, it is not a requirement to have a step of grinding the upper surface of the external connection electrode 20 or removing sagging.

  Next, a flux layer is formed on the upper surface 20a of the external connection electrode 20 by an appropriate method such as a printing method, a potting method, or an ink jet method (not shown). Then, the solder balls 25 are mounted on the flux layer and accommodated in a reflow furnace to perform a reflow process. By this reflow process, the solder ball 25 is joined to the upper surface 20a of the external connection electrode 20. Instead of forming the flux layer in the above, a surface treatment for forming a metal layer showing wettability to solder such as gold or nickel may be performed.

  Thereafter, the sealing material 16 and the semiconductor wafer 1 are cut along the dicing line 2 indicated by a two-dot chain line in FIG. Can be obtained.

  According to such a semiconductor device 10, since the photosensitive resin 45 is used, it is not necessary to form a photoresist film, and there is no process for dissolving the photoresist film with a solvent or volatilizing the solvent. And pollution will be reduced. In this case, since the photosensitive resin 45 is cured with the third insulating film (insulating material) 41 interposed between the second wiring 37 and the photosensitive resin 45, the surface of the first wiring 33 In addition, it is possible to prevent the formation of a compound with the component contained in the photosensitive resin 45.

(Modification 1)
FIG. 24 shows a first modification of the semiconductor device 10 of the present invention. The modification differs from the semiconductor device shown in FIG. 1 in that the photosensitive resin 45 has a peripheral side surface that is the same as the side surface of the semiconductor substrate 11. That is, the semiconductor substrate 11, the photosensitive resin 45, and the sealing material 16 that are stacked in order from the lower layer side have the same plane on each peripheral side surface and form the same plane. In order to form the semiconductor device shown in this modification, the photosensitive resin 45 shown in FIG. 13 is formed, and then the opening 45a is formed when the photosensitive resin 45 is patterned by applying the photolithographic technique. For example, exposure may be performed using an exposure mask that has only an exposure pattern for the purpose and does not have an external pattern corresponding to the peripheral side surface. If exposure is performed using such an exposure mask, the peripheral surface is not formed in the photosensitive resin 45 in the step corresponding to FIG. 14, and thus the semiconductor device shown in FIG. 24 is obtained.
Others are the same as those of the semiconductor device 10 shown in FIG. 1, and the same members are denoted by the same reference numerals and description thereof is omitted.

(Modification 2)
FIG. 25 shows a second modification of the semiconductor device 10 of the present invention. The second modification is different from the semiconductor device shown in FIG. 1 in that the photosensitive resin 45 and the third insulating film 41 have the peripheral side surface flush with the side surface of the semiconductor substrate 11. is there. That is, the peripheral side surfaces of the semiconductor substrate 11, the third insulating film 41, the photosensitive resin 45, and the sealing material 16 stacked in order from the lower layer side are at the same position and form the same plane. In order to form the semiconductor device shown in this modification, the third insulating film 41 is formed after the third insulating film 41 shown in FIG. 12 is formed and before the photosensitive resin 45 shown in FIG. 13 is formed. Patterning is performed so that the peripheral side surface of 41 is flush with the peripheral side surfaces of the first insulating film 4 and the second insulating film 12. In this way, in the process corresponding to FIG. 13, the peripheral edge of the photosensitive resin 45 is formed directly on the semiconductor substrate 11.

Then, in the step of patterning the photosensitive resin 45 corresponding to FIG. 14, only the opening 45 a is formed as in the first modification, and the peripheral side surface of the photosensitive resin 45 is flush with the side surface of the semiconductor substrate 11. What is necessary is just to form.
Others are the same as those of the semiconductor device 10 shown in FIG. 1, and the same members are denoted by the same reference numerals and description thereof is omitted.

  In the above-described embodiment, the first wiring 33 and the second wiring 37 are constituent members of the thin film inductor element 30. However, the first wiring 33 and the second wiring 37 may be simple wirings for connecting circuit elements. In addition, a capacitor can be formed using an insulating film between the first wiring 33 and the second wiring 37. In addition, the wiring itself can be a resistance element, and a plurality of types of circuit elements can be formed.

  In the above embodiment, a two-layer laminated wiring is taken as an example. Further, only the insulating film formed on the lower layer wiring is an example of a photosensitive resin. However, the laminated wiring may have three or more layers, and the insulating film between the wirings may be a photosensitive resin, in other words, the photosensitive resin may be a multilayer.

  In addition, the semiconductor device of the present invention can be variously modified and configured within the scope of the invention. In short, the semiconductor device includes a semiconductor substrate having a connection pad and a pad portion. The first wiring electrically connected, the insulating material having an opening exposing the pad portion of the first wiring, and the first wiring formed on the insulating material through the opening of the insulating material What is necessary is just to comprise the photosensitive resin which has the exposed opening part, and the 2nd wiring formed on the photosensitive resin and connected to the pad part of the 1st wiring.

  The method for manufacturing a semiconductor device of the present invention includes a step of preparing a semiconductor substrate having a connection pad on the upper surface, and a step of forming a first wiring having a pad portion and electrically connected to the connection pad. A step of covering the first wiring with an insulating material, a step of covering the insulating material with a photosensitive resin, and a step of forming an opening by wet etching in a portion corresponding to the pad portion of the first wiring of the photosensitive resin And forming an opening exposing the pad portion of the first wiring by dry etching in the insulating material through the opening of the photosensitive resin, and connecting to the pad portion of the first wiring on the photosensitive resin And the step of forming the second wiring to be performed.

A Semiconductor device formation region 1 Semiconductor wafer (semiconductor substrate)
2 Dicing Line 3 Connection Pad 4 First Insulating Film 10 Semiconductor Device 11 Semiconductor Substrate 12 Second Insulating Film 16 Sealing Material 20 External Connection Electrode 25 Solder Ball 30 Thin Film Inductor Element 31 Inner Pad Part 32 Outer Pad Part 33 First 1 wiring 34, 38 Underlying metal layer 34A 1st metal film 38A 2nd metal film 35, 39 Upper metal layer 38 2nd wiring 41 3rd insulating film 45 Photosensitive resin 51-55 Photoresist film

Claims (31)

A semiconductor substrate having connection pads;
A first wiring having a pad portion and electrically connected to the connection pad;
An insulating material having an opening exposing the pad portion of the first wiring;
A photosensitive resin having an opening formed on the insulating material and exposing the first wiring through the opening of the insulating material;
A second wiring formed on the photosensitive resin and connected to the pad portion of the first wiring;
A semiconductor device comprising:   2. The semiconductor device according to claim 1, wherein the first wiring has a metal layer containing copper at least on a surface thereof.   3. The semiconductor device according to claim 1, wherein the first wiring has a base metal layer and an upper metal layer made of a copper-based metal formed on the base metal layer. A featured semiconductor device.   4. The semiconductor device according to claim 1, wherein the photosensitive resin includes any one of an alkali-soluble polyimide resin, a PBO resin, and a novolac resin. 5. apparatus.   5. The semiconductor device according to claim 1, wherein the photosensitive resin contains a diazonaphthoquinone compound. 6.   6. The semiconductor device according to claim 1, wherein the second wiring has a metal layer containing copper on at least a surface thereof.   7. The semiconductor device according to claim 6, wherein the second wiring includes a base metal layer and an upper metal layer made of a copper-based metal formed on the base metal layer.   8. The semiconductor device according to claim 1, wherein the second wiring includes an inductor.   9. The semiconductor device according to claim 1, wherein a peripheral side surface of the opening in the photosensitive resin is an inclined surface inclined with respect to the pad portion, and a peripheral side surface of the opening in the insulating material is A semiconductor device having a vertical plane substantially perpendicular to the pad portion.   10. The semiconductor device according to claim 1, wherein a peripheral side surface of the insulating material is recessed from a side surface of the semiconductor substrate.   10. The semiconductor device according to claim 1, wherein a peripheral side surface of the insulating material is the same surface as a side surface of the semiconductor substrate.   12. The semiconductor device according to claim 1, wherein a peripheral side surface of the photosensitive resin is recessed from a side surface of the semiconductor substrate.   12. The semiconductor device according to claim 1, wherein a peripheral side surface of the photosensitive resin is flush with a side surface of the semiconductor substrate.   14. The semiconductor device according to claim 1, wherein a columnar external connection electrode is formed on the second wiring. 15.   15. The semiconductor device according to claim 14, wherein a sealing material is formed around the external connection electrode on the photosensitive resin.   16. The semiconductor device according to claim 1, wherein a peripheral side surface of the sealing film is flush with a side surface of the semiconductor substrate. Preparing a semiconductor substrate having connection pads on the upper surface;
Forming a first wiring having a pad portion and electrically connected to the connection pad;
Covering the first wiring with an insulating material;
Covering the insulating material with an uncured photosensitive resin;
Forming an opening by exposing and developing a portion corresponding to the pad portion of the first wiring of the uncured photosensitive resin; and
Forming an opening exposing the pad portion of the first wiring by dry etching in the insulating material through the opening of the photosensitive resin;
Forming a second wiring connected to the pad portion of the first wiring on the photosensitive resin;
A method for manufacturing a semiconductor device, comprising:   18. The method of manufacturing a semiconductor device according to claim 17, wherein forming the first wiring includes forming a metal layer containing copper on at least a surface.   19. The method of manufacturing a semiconductor device according to claim 17, wherein the step of forming the first wiring includes a base metal layer and a copper-based metal formed on the base metal layer. A method of manufacturing a semiconductor device comprising a step of forming an upper metal layer.   20. The method of manufacturing a semiconductor device according to claim 17, wherein the photosensitive resin includes any one of an alkali-soluble polyimide resin, a PBO resin, and a novolac resin. A method for manufacturing a semiconductor device.   21. The method of manufacturing a semiconductor device according to claim 17, wherein the step of covering the insulating material with the photosensitive resin covers the insulating material with the photosensitive resin containing a diazonaphthoquinone compound. A method for manufacturing a semiconductor device, comprising:   22. The method of manufacturing a semiconductor device according to claim 17, wherein the step of covering the first wiring with the insulating material includes a step of curing the insulating material, and the insulating material is exposed to the photosensitive material. The step of covering with an insulating resin is performed after the step of curing the insulating material.   23. The method of manufacturing a semiconductor device according to claim 17, wherein the step of forming a second wiring connected to the pad portion of the first wiring on the photosensitive resin is the photosensitive device. A method for manufacturing a semiconductor device, comprising: forming a base metal layer on a conductive resin; and forming an upper metal layer on the base metal layer by electrolytic plating.   24. The method of manufacturing a semiconductor device according to claim 17, wherein the step of forming the second wiring connected to the pad portion of the first wiring on the photosensitive resin includes an inductor. The manufacturing method of the semiconductor device characterized by including the process to form.   25. The method of manufacturing a semiconductor device according to claim 17, wherein the step of covering the first wiring with an insulating material is formed such that a peripheral side surface of the insulating material is retracted from a side surface of the semiconductor substrate. The manufacturing method of the semiconductor device characterized by including the process to do.   25. The method of manufacturing a semiconductor device according to claim 17, wherein in the step of covering the first wiring with an insulating material, a peripheral side surface of the insulating material is flush with a side surface of the semiconductor substrate. The manufacturing method of the semiconductor device characterized by including the process formed like this.   27. The method of manufacturing a semiconductor device according to claim 17, wherein in the step of covering the insulating material with the photosensitive resin, a peripheral side surface of the photosensitive resin is retracted from a side surface of the semiconductor substrate. The manufacturing method of the semiconductor device characterized by including the process to form.   27. The method of manufacturing a semiconductor device according to any one of claims 17 to 26, wherein the step of covering the insulation with the photosensitive resin is such that a peripheral side surface of the photosensitive resin is flush with a side surface of the semiconductor substrate. A method for manufacturing a semiconductor device comprising a step of forming the semiconductor device.   29. The method of manufacturing a semiconductor device according to claim 17, further comprising a columnar external connection electrode on the second wiring.   29. The method of manufacturing a semiconductor device according to claim 28, further comprising a step of forming a sealing material around the external connection electrode on the photosensitive resin.   31. The method of manufacturing a semiconductor device according to claim 30, wherein the step of forming the sealing material includes a step of forming a peripheral side surface of the sealing film so as to be flush with a side surface of the semiconductor substrate. A method for manufacturing a semiconductor device.

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