JP2011069743A - Analog output device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an analog output device capable of detecting connection of a load different from an output specification. <P>SOLUTION: The analog output device having a constant current circuit and outputting a current to each of a plurality of external loads with a predetermined impedance specification includes: a means for measuring an impedance of each load; and an abnormality detection means for determining whether or not a load corresponding to the predetermined impedance specification is connected by comparing the measured impedance value with a predetermined allowable value, and when it is determined that the load corresponding to the predetermined impedance specification is not connected, generating an error output. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an analog output device having a function of automatically measuring a load impedance when outputting an analog signal to the outside and determining whether or not a correct load is connected.

  FIG. 8 is a block diagram showing an example of a conventional analog output device. In this figure, a conventional analog output device 100 is composed of a CPU module 2 and one or more analog output modules 99. The CPU module 2 and the analog output module 99 are connected by a bus 3 composed of a plurality of signal lines. In some cases, each module is connected by a network instead of the bus 3. The analog output device 100 may be mounted with a module having another function such as a communication function.

  The analog output module 99 includes a bus interface circuit (hereinafter referred to as BUSI / F) 15 that exchanges data with the CPU module 2 via the bus 3, a CPU circuit 11 that executes arithmetic processing and the like related to analog output, and a CPU circuit Is selected by a D / A converter (hereinafter referred to as DAC) 12 that converts a digital signal isolated by a photocoupler 17 or the like into an analog signal, a multiplexer circuit (hereinafter referred to as MPX) 14 that selects one of a plurality of channels, and MPX14. A sample hold circuit (SH) 19 for holding the analog signal output from the DAC 12 for a predetermined time, and a plurality of output circuits 98 for amplifying the analog signal output from the SH 19 and outputting current to the external load 91. Yes. The output circuit 98 is electrically insulated from the CPU circuit 11 and the like and operates with the DC / DC converter 18.

  In this configuration, when the CPU circuit 11 receives the output data for each load sent from the CPU module 2 via the BUSI / F 15, that is, the user value output from the application program of the CPU module 2, the CPU circuit 11 issues a command to the MPX 14. Output, select the channel for the specified load, and output the user value. This user value is converted into an analog value by the DAC 14, amplified by the channel-selected output circuit 98, and output to the load 91.

  Conventionally, when outputting a current to an external load (analog input device) connected to an analog output device, an analog output that can determine whether or not the wiring is normally performed by grasping the current flowing through the external load A device has been proposed.

  For example, in Patent Document 1, a return current flowing through an external load is detected, and when the return current is outside a predetermined allowable range with respect to an output current, it is determined as abnormal, and wiring abnormality and hardware abnormality are detected. An analog output device that distinguishes and detects is described.

JP 2008-107224 A

  However, the analog output device of Patent Document 1 inputs (readback) the current that flows through the external load, converts the current into a voltage via a resistor (readback resistor), and this is within an allowable range. Therefore, it is possible to detect an abnormality of the external wiring, but it is not possible to determine whether or not the impedance of the load itself is correct.

  In particular, an analog input device connected as a load of an analog output device includes a plurality of types of devices having different input impedances. For this reason, even if there is no incorrect wiring with the external load, if a load with a specification different from the output specification is connected, the system may malfunction.

  The present invention has been made in view of the above-described circumstances, and an object thereof is to provide an analog output device that can detect that a load having an impedance different from a preset specification is connected. .

  In order to achieve the above object, an analog output device according to the present invention is an analog output device that has a constant current circuit and outputs current with a predetermined impedance specification to each of a plurality of external loads, A means for measuring the impedance of the load for each time, and comparing the value of the impedance with a preset allowable value to determine whether a load corresponding to a predetermined impedance specification is connected; An abnormality detecting means for outputting an error when it is determined that a load corresponding to the impedance specification is not connected is provided.

  In the present invention, the load impedance is automatically measured, compared with the load impedance parameterized by the user, and when the difference exceeds the threshold, it is determined that the wiring is normal. In the case where the analog input device having the original load impedance is not connected, it can be detected as an abnormality. Thereby, it is possible to automatically diagnose whether or not the original analog input device (external load) is connected, and the reliability of the system can be improved.

In particular, the means for measuring impedance includes a first switching means for opening / closing to permit or prohibit current output from the constant current circuit to the load, and a constant current circuit provided between the current from the constant current circuit and the ground resistance. Second switching means for permitting or prohibiting current supply to the ground resistance, means for measuring the load voltage, means for measuring the voltage of the ground resistance, and means for measuring the output current to the load In the self-diagnosis, the abnormality detection means opens the first opening / closing means to prohibit the current output to the load and closes the second opening / closing means to permit the current supply to the grounding resistor, While measuring the voltage of the grounding resistance and comparing the voltage of the grounding resistance with an allowable value, an abnormality is detected. On the other hand, during operation, the first switching means is closed to allow current output to the load. At the same time, the second opening / closing means is opened. Te prohibits the current supply to ground resistance, the load voltage is measured, it may be to detect the abnormality by comparing the said load voltage and tolerance.
Thereby, it is possible to accurately discriminate between the abnormality of the own apparatus and the abnormality such as the difference in the specification of the load.

  Further, the analog output device according to the present invention includes a connection destination input specification table for storing the impedance specification for each output circuit, and the abnormality detection means has an impedance value measured by the means for measuring impedance during operation, When the allowable accuracy exceeds the impedance specification value in the connection destination input specification table, it is determined whether the impedance value is within a predetermined fixed value range of other AI specification values, If it is within the range of a certain value, an error message indicating that it may be connected to a load with a different AI specification value is output as the cause of the abnormality. An error message indicating that there is a possibility of wiring connection error or signal mixture is output.

  In the present invention, when the measured load impedance value is different from the impedance specification of the output circuit in the connection destination input specification table, it is determined whether or not the other AI specification values match, and the other is determined according to the determination result. A detailed error message such as whether it is connected to an analog input device of the AI specification or whether the wiring connection is abnormal is output, so that inspection and maintenance can be performed efficiently from those having a high possibility of the cause of abnormality.

  According to the present invention, it is possible to automatically measure the impedance of the load connected to the analog output device and detect that the analog input device having the original load impedance is not connected even if the wiring is normal. And the reliability of the system can be improved. In addition, since it is easy to identify an abnormal location, it is possible to shorten the recovery time of the abnormality.

1 is a block diagram of an analog output device 1 according to a first embodiment of the present invention. 4 is a flowchart illustrating a procedure of analog output processing of the analog output device 1. 3 is an example of setting parameter data stored in the CPU circuit 11 of the analog output device 1. 3A shows switch settings, FIG. 3B shows determination conditions during self-diagnosis, and FIG. 3C shows determination conditions during operation. It is an example of data of AI classification table 51 by the 2nd Embodiment of this invention. It is a data example of the connection destination input specification table 52 by the 2nd Embodiment of this invention. It is a flowchart which shows the procedure of AI type determination processing by the 2nd Embodiment of this invention. It is a flowchart which shows the procedure of the error processing by the 2nd Embodiment of this invention. It is a block diagram which shows the example of the conventional analog output device.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of an analog output device 1 according to the first embodiment.

  In this figure, an analog output module 10 of the analog output device 1 includes a BUSI / F 15, a CPU circuit 11, a DAC 12, an A / D converter (hereinafter referred to as ADC) 13, MPX 14, SH 19, and n (which outputs an analog current). n ≧ 1) output circuits 20 are formed. The output terminal 16 of the output circuit 20 and the external load 91 of the analog input device 9 are connected by the cable 8, and the current output from the output circuit 20 is supplied to the external load 91. The feedback current from the external load 91 returns to the ground side (reference potential of the power supply Vcc) side of the analog output device 1.

  In the output circuit 20, a current is supplied from the power supply voltage (Vcc) to the constant current circuit 21 through the resistor 25. The constant current circuit 21 includes an amplifier circuit 22 and a transistor 23, and outputs a current amplified based on a value (current command value) output from the MPX 14. The output of the constant current circuit 21 is connected to the output terminal 16 via SW41.

  Further, as shown in FIG. 1, the output of the constant current circuit 21 is connected to one end of the resistor 26 via the SW 42, and the other end of the resistor 26 is grounded. The voltage at one end of the resistor 26 is input to the MPX 24 via the amplifier circuit 32.

  The voltage across the power supply voltage resistor 25 is input to the MPX 24 via the amplifier circuit 31.

Further, the voltage at the output terminal 16 is input to the amplifier circuit 33, and the voltage amplified by the circuit 33 is input to the MPX 24. That is, the voltage across the resistor 25, the voltage of the resistor 26, and the voltage of the load 91 are input to the MPX 24, respectively.
The voltage analog value selected by the MPX 24 is converted into a digital value by the ADC 13 and can be read from the CPU 11. If necessary, a DC / DC converter 16 may be provided as shown in FIG. 8 to insulate the CPU circuit 11 from the output circuit 20.

  The ADC 13 is connected to each MPX 24 of the n output circuits 20, but only one MPX 24 selected by the CPU circuit 11 outputs data and is input to the ADC 13. ing.

  When the CPU circuit 11 receives the output command value (user value) from the CPU module 2 passed through the BUSI / F 15, the CPU circuit 11 outputs it to the designated load 91 while executing the diagnostic function described below. The current corresponding to the command value is output.

Next, the operation of the analog output device 1 having the above configuration will be described with reference to FIG.
When the CPU circuit 11 starts operating by turning on the power, first, SW41 is turned off (opened) and SW42 is turned on (closed) in order to execute the self-diagnosis mode (S01). This switch setting is stored in advance in the memory of the CPU circuit 11 as a switching pattern, and the CPU circuit 11 turns the SWs 41 and 42 on and off based on this switching pattern. As shown in FIG. 3A, the switching pattern differs depending on the operation mode of the CPU circuit 11.

  Then, output data for self-diagnosis is sent from the CPU circuit 11 to the DAC 12 (S02). This output data is D / A converted by the DAC 12. The CPU circuit 11 also selects a self-diagnosis target channel (output circuit) by the MPX 14 (S03). As a result, output data for self-diagnosis is passed to the output circuit 20 to be diagnosed.

  After step S03, the CPU circuit 11 selects the value of the amplifier circuit 32 of the output circuit 20 to be self-diagnosed by the MPX 24, and is a value A / D converted by the ADC 13 after a predetermined time (A / D converted value (2)). ) Is read (S04).

  Subsequently, the CPU circuit 11 selects the value of the amplifier circuit 31 of the output circuit 20 to be self-diagnosed by the MPX 24, and a value A / D converted by the ADC 13 after a predetermined time (A / D converted value (1)). Read (S05).

  Next, the CPU circuit 11 determines whether or not the read A / D conversion value (2) and the A / D conversion value (1) exceed the permissible accuracy (S06). This allowable accuracy is determined by, for example, determining whether or not the A / D conversion value is within a range of allowable values set in advance in the memory of the CPU circuit 11, and if not within the allowable range, the allowable accuracy is exceeded. Is determined.

  If any of the A / D conversion value (2) and the A / D conversion value (1) exceeds the allowable value as a result of this determination processing, an error mode number assigned in advance is recorded and an error described later is recorded. Processing is executed (S16).

  If none of the values exceeds the allowable value as a result of the determination in step S06, the user value is written from the CPU circuit 11 to the DAC 12 (S07). This user value is a value passed from the application program of the CPU module 2.

  Next, in order to execute the operation mode, SW41 is turned on and SW42 is turned off (S08). Then, the CPU circuit 11 selects the amplifier circuit 31 with the MPX 24 and reads a value (A / D converted value (1)) A / D converted by the ADC 13 after a predetermined time (S09). The CPU circuit 11 compares the A / D conversion value (1) with the value originally input from the user value, and determines whether or not the allowable value is exceeded (S10). As a result of this determination processing, if the A / D conversion value (1) exceeds the allowable value, error processing is executed (S16).

  The CPU circuit 11 also selects the amplifier circuit 33 with the MPX 24 and reads a value (A / D converted value (3)) A / D converted by the ADC 13 after a predetermined time (S11). Then, the A / D conversion value (1) read in step S09 is divided by the value of the resistor 25 to calculate a current value, and then the A / D conversion value (3) value (voltage value) is calculated as the current. Dividing by the value, the load impedance is calculated (S12).

  The CPU circuit 11 determines whether or not the value of the load impedance exceeds the allowable accuracy with respect to the output value (S13), and executes error processing when the allowable accuracy is exceeded (S16). If the allowable accuracy has not been exceeded (“NO” in S13), if the user value has been changed (“Yes” in S14), the user value is written from the CPU circuit 11 to the DAC 12 (S15), step The process proceeds to S09. The above processing is executed for each output circuit.

Next, the processing procedure of error processing (S16) will be described.
In the error processing in step S16, referring to the recorded error mode, when the error mode is “1”, that is, when the operation mode of the CPU circuit 11 when the error is detected is the self-diagnosis mode. (“YES” in S06), the abnormality is determined according to the determination condition shown in FIG. Specifically, when both the A / D conversion value (1) and the A / D conversion value (2) are normal, it is determined that the output circuit 20 is normal, and the A / D conversion value (1) or A / D When at least one of the D conversion values (2) is abnormal, it is determined that the output circuit 20 is abnormal.

  When the error mode is “2” or “3”, that is, for the operation mode error (“YES” in S10 and S13), the abnormality is determined according to the determination condition shown in FIG. Specifically, if the A / D conversion value (1) is normal and the load impedance is abnormal, it is an error in the wiring or load, and there is a possibility that the load of the original impedance specification may not be connected. do. For the operation mode error, if the amplifier circuit 31 is abnormal, the self-diagnosis mode is executed again. If the self-diagnosis is normal, an error is output as a disconnection. If the self-diagnosis is abnormal, an internal abnormality is detected. An error is output.

  As described above, according to the present embodiment, the load impedance is measured for each analog output, so that a case where an analog input device having a wrong specification is connected or a cable is disconnected is detected. Error output. In addition, since it is confirmed beforehand that there is no abnormality on the analog output device side by self-diagnosis before operation, analog output is performed, and abnormality is determined based on the value of the load impedance, thereby enabling accurate diagnosis.

Next, a second embodiment of the present invention will be described.
The present embodiment stores an impedance specification for each output circuit shown in FIG. 5 and an AI type table 51 in which the load impedance shown in FIG. 4 and the identification information of the impedance specification are associated with the first embodiment. The connection destination input specification table 52 to be added is added.

  Here, the AI type table 51 is initially set in the analog output device 1. The connection destination input specification table 52 is set in advance in the CPU module 2 by the user, and is stored in the memory of the CPU circuit 11 of each analog output module 10 from the CPU module 2.

  Hereinafter, the AI type determination process according to the present embodiment will be described with reference to FIG. When the AI type determination process is started in conjunction with the execution of the process in step S12 of the diagnosis in the operation mode described in the first embodiment, the AI type determination process is accessed to access the type of the corresponding load impedance. Is extracted (S102). If none of the types exists within the calculated allowable accuracy range of the load impedance (“NO” in S103), the abnormality flag of the connection destination input specification table 52 is set and an error is notified to the outside (S107). . Thereby, the user can investigate that the possibility of miswiring is high.

  If the corresponding impedance exists in the AI type table 51 (“YES” in S103), the CPU circuit 11 next accesses the type of the corresponding output circuit in the connection destination input specification table 52 and extracts the extracted type. (S105). As a result, if they do not match, the abnormality flag of the connection destination input specification table 52 is set as an abnormality, and an error is notified to the outside (S107). At this time, the extracted type may be notified together with the error notification. Thereby, the user can investigate that it is highly possible that a load having a specification different from the original specification is connected. On the other hand, if the corresponding output circuit type in the connection destination input specification table 52 matches the type extracted in step S102 in step S105, the normal flag in the connection destination input specification table 52 is set (S106).

Next, error processing according to the present embodiment will be described with reference to FIG.
The error processing according to the present embodiment makes it possible to determine the cause of the abnormality with higher accuracy than the error processing of step S16 of the first embodiment using the above-described AI type table 51 and connection destination input specification table 52. Is.

  When the error processing routine (abnormality detection means) is activated, it branches depending on the error mode (S201). This error mode is detected and stored by the analog output processing of FIG. If the error mode is “1”, the fact that the possibility of “internal abnormality” is high is output (S202). If the error mode is “2”, self-diagnosis is executed (S203). Then, it is determined whether the A / D conversion value (2) or the A / D conversion value (1) exceeds the allowable accuracy (S204), and if it exceeds (“Yes” in S204), The fact that there is a high possibility that the cause is “internal abnormality” is output (S205). On the other hand, if “No” in step S204, it is output that the cause is highly likely “disconnected” (S206).

  If the error mode is “3”, self-diagnosis is executed (S207). Then, it is determined whether the A / D conversion value (2) or the A / D conversion value (1) exceeds the allowable accuracy (S208), and if it exceeds (“Yes” in S208), The fact that there is a high possibility that the cause is “internal abnormality” is output (S209). On the other hand, if “No” in step S208, based on the AI type table 51, it is determined whether or not the measured value is within the allowable range of other specification values (S210). An output indicating that there is a high possibility of being connected to an analog input device of the AI specification value. In the case of “No” in step S210, an output indicating that there is a high possibility of wiring connection error or signal mixture (S212).

  As described above, according to the present embodiment, the impedance specification of the connection destination is managed for each output circuit, and the load impedance is always calculated to detect the abnormality, so that it is possible to accurately detect miswiring or specification mistakes. Enables efficient maintenance of users.

  The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention.

DESCRIPTION OF SYMBOLS 1 Analog output device 2 CPU module 3 Bus 8 Cable 9 Analog input device 10 Analog output module 11 CPU circuit 12 DAC (D / A converter)
13 ADC (A / D converter)
14,24 MPX (Multiplexer)
15 BUS I / F
16 Output terminal 17 Photocoupler 18 DC / DC converter 19 Sample hold circuit (SH)
DESCRIPTION OF SYMBOLS 20 Output circuit 21 Constant current circuit 22,31-33 Amplifier circuit 23 Transistor 25,26 Resistance 41,42 Switch 51 AI classification table 52 Connection destination input specification table 91 External load 98 Conventional output circuit 99 Conventional analog output module 100 Conventional Analog output device

Claims (3)

An analog output device having a constant current circuit and outputting a current with a predetermined impedance specification to each of a plurality of external loads,
Means for measuring the impedance of the load for each load;
It is determined whether or not a load corresponding to the predetermined impedance specification is connected by determining whether or not the impedance value is within a preset allowable value range, and the predetermined impedance specification is determined. If it is determined that the load corresponding to is not connected, an error detection means for outputting an error,
An analog output device comprising: The means for measuring the impedance is provided between a first opening / closing means for opening / closing to permit or prohibit current output from the constant current circuit to a load, and between the current from the constant current circuit and a ground resistance. Second switching means for permitting or prohibiting current supply from the current circuit to the ground resistance, means for measuring the load voltage, means for measuring the voltage of the ground resistance, and measuring an output current to the load Means, and
During the self-diagnosis, the abnormality detecting means opens the first opening / closing means to inhibit current output to the load, and closes the second opening / closing means to supply current to the grounding resistor. Permitting, measuring the voltage of the grounding resistance, and detecting the abnormality by comparing the voltage of the grounding resistance with an allowable value, while in operation, the first switching means is closed to load While permitting current output, the second switching means is opened to prohibit the supply of current to the ground resistance, the load voltage is measured, and the abnormality is detected by comparing the load voltage with an allowable value. The analog output device according to claim 1. The analog output device according to claim 2,
A connection destination input specification table that stores impedance specifications for each output circuit
The anomaly detection means, during operation, when the impedance value measured by the impedance measurement means exceeds the allowable accuracy with respect to the impedance specification value of the connection destination input specification table, the impedance It is determined whether or not the value is within a predetermined fixed value range of other AI specification values. If it is within the fixed value range, it may be connected to a load having a different AI specification value as the cause of the abnormality. Output an error message to the effect that there is a possibility of wiring connection error or signal interference as the cause of abnormality when the error message is out of a certain range. Analog output device.

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