JP2011027519A - Contactor, test method and tester of semiconductor integrated circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a contactor for eliminating a cleaning process implemented each time a final test is repeated several times, and improving the productivity of the semiconductor integrated circuit, and a test method and a tester of the semiconductor integrated circuit. <P>SOLUTION: A polishing sheet 31 is disposed between an IC mount section 20 in which the semiconductor integrated circuit 11 is placed and a base member 23 in which a contact pin 26 is perpendicularly provide. A slit is provided in the polishing sheet 31 so as to cause the contact pin 26 to penetrate it. When the semiconductor integrated circuit 11 is lowered, a tip of the contact pin 26 is abraded and polished by the polishing sheet 31, and a foreign substance attached to the tip of the contact pin 26 is removed. After the semiconductor integrated circuit 11 is additionally lowered, the contact pin 26 contacts a connection terminal of the semiconductor integrated circuit 11. The semiconductor integrated circuit 11 is driven in the state and determines the quality by an output signal. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a contactor used for testing a semiconductor integrated circuit (IC), a test method for a semiconductor integrated circuit, and a test apparatus.

  In recent years, portable electronic devices such as mobile communication terminals, mobile phones, and digital cameras have become widespread, and further reduction in size, performance, and weight of these electronic devices are desired. In addition, semiconductor integrated circuits used in these electronic devices are also required to be reduced in size, performance and weight, and the number of connection terminals of the semiconductor integrated circuit increases and the arrangement pitch of the connection terminals becomes narrower. Tend.

  Semiconductor integrated circuit packages used in portable electronic devices include BGA (Ball Grid Array), FBGA (Fine-pitch Ball Grid Array), LGA (Land Grid Array), and FLGA (Fine-pitch Land Grid Array). Etc. In BGA and FBGA, ball-shaped electrodes formed by solder are arranged in a grid pattern on the bottom of the package as connection terminals, and are soldered onto a wiring board by a reflow furnace. LGA and FLGA are arranged in a grid pattern on the bottom surface of the package using planar electrode pads as connection terminals instead of solder balls, and are mounted on a wiring board via soldering or IC sockets.

  By the way, a final test is performed in the final process when manufacturing the semiconductor integrated circuit. In this final test, the pass / fail is determined by measuring the electrical characteristics of the semiconductor integrated circuit using an IC tester. The electrical connection between the IC tester main body and the semiconductor integrated circuit is made, for example, via a contactor (a jig for making an electrical connection) having a large number of contact pins.

JP-A-2005-44825 Japanese Patent Laid-Open No. 11-233220 JP 2004-219144 A

  The final test is often performed in a state where the semiconductor integrated circuit is operated at high speed, and the required electrical characteristics are also severe. In addition, the contact resistance between the contact pin and the connection terminal of the semiconductor integrated circuit has a great influence on the measurement result of the electrical characteristics, and management of the contact resistance is strictly required. However, the conventional test apparatus simply contacts the contact pins with the connection terminals (such as solder balls or flat electrodes) of the semiconductor integrated circuit. Therefore, when the final test is repeated, foreign matter (for example, a plating film peeled off from the plated product) adheres to the tip of the contact pin, the contact resistance increases, and the electrical characteristics may not be measured accurately.

  In order to avoid such a problem, conventionally, for example, after a final test is repeated a predetermined number of times, a cleaning process is performed in which the tip of the contact pin is polished or chemically cleaned. However, if the cleaning process is frequently performed, the time required for manufacturing the semiconductor integrated circuit (including the final test process) becomes long, and there is a problem that productivity is lowered.

  Accordingly, it is an object of the present invention to provide a contactor, a semiconductor integrated circuit test method, and a test apparatus that can improve the productivity of a semiconductor integrated circuit without the need for a cleaning process that is performed every time the final test is repeated a predetermined number of times.

  According to one aspect, an IC mounting portion on which a semiconductor integrated circuit is placed, a base member, a plurality of contact pins erected on the base member, and at least one of the IC mounting portion and the base member are moved. A contact means for bringing a tip of the contact pin into contact with a connection terminal of the semiconductor integrated circuit, and the semiconductor integrated circuit placed on the IC mounting portion and the base member. There is provided a contactor for a semiconductor integrated circuit having a semiconductor integrated circuit or a polishing sheet for rubbing the tip of the contact pin when the contact pin is moved.

  According to the one aspect, the polishing sheet is disposed between the semiconductor integrated circuit placed on the IC mounting portion and the base member. The polishing sheet is provided with, for example, a slit or a hole through which the contact pin passes, and rubs the tip of the contact pin when the semiconductor integrated circuit or the contact pin is moved by the contact means. For this reason, even if a foreign material adheres to the tip of the contact pin, the foreign material is removed by the polishing sheet. Thereby, the contact state between the contact pin and the connection terminal of the semiconductor integrated circuit can be always improved. According to the above aspect, since the tip of the contact pin is cleaned every time a test is performed, a process of polishing or cleaning the contact pin separately from the test process is unnecessary, and productivity is improved.

FIG. 1 is a schematic diagram showing a test apparatus according to the first embodiment. FIG. 2 is a cross-sectional view of the contactor. FIG. 3 is a schematic view showing a contact pin. FIG. 4 is a plan view showing the IC mounting portion and the cover member as viewed from above. FIG. 5 is an enlarged view of a part (corner portion) of FIG. 6A to 6C are diagrams illustrating an example of a method for attaching the polishing sheet. FIG. 7 is a cross-sectional view showing the test method for the semiconductor integrated circuit according to the first embodiment. FIG. 8 is a schematic view showing a test method for the semiconductor integrated circuit according to the first embodiment. 9A to 9D are diagrams showing examples of slits in the polishing sheet. 10A and 10B are cross-sectional views showing a contactor of a test apparatus according to the second embodiment and a test method using the test apparatus. FIGS. 11A to 11C are schematic views showing the movement of the tip of the contact pin during the final test. FIGS. 12A and 12B are cross-sectional views showing a contactor of a test apparatus according to the third embodiment and a test method using the test apparatus. FIG. 13 is a plan view showing four polishing sheets. FIG. 14 is a schematic diagram showing a state in which the contact pins pass through the polishing sheet and are connected to the connection terminals of the semiconductor integrated circuit. FIG. 15 is a cross-sectional view showing a contactor of a test apparatus according to the fourth embodiment and a test method using the test apparatus. 16A and 16B are cross-sectional views showing a contactor of a test apparatus according to the fifth embodiment and a test method using the test apparatus. FIGS. 17A to 17C are schematic diagrams showing the movement of the tip of the contact pin during the final test. 18A and 18B are cross-sectional views showing a contactor of a test apparatus according to the sixth embodiment and a test method using the test apparatus. FIGS. 19A to 19C are schematic diagrams showing the movement of the tip of the contact pin during the final test. FIG. 20 is a diagram showing an outline of a semiconductor integrated circuit test system that automatically performs a final test on a semiconductor integrated circuit. FIGS. 21A and 21B are views showing a third transfer device and a contactor arranged on the test stage.

  Hereinafter, embodiments will be described with reference to the accompanying drawings.

(First embodiment)
FIG. 1 is a schematic diagram showing a test apparatus (IC tester) according to the first embodiment. The test apparatus according to the present embodiment includes a tester head 20 on which a semiconductor integrated circuit as a device under test is mounted, and a test apparatus main body that generates a test signal according to a preset program and measures the electrical characteristics of the semiconductor integrated circuit. 10. The test apparatus main body 10 and the tester head 20 are electrically connected by a cable 15.

  The tester head 20 includes a test circuit board 21 and a contactor 22 mounted on the test circuit board 21. Electrodes and wirings are formed on the test circuit board 21 in a predetermined pattern. Although FIG. 1 shows an example in which two contactors 22 are mounted on the test circuit board 21, the number of contactors 22 mounted on the test circuit board 21 may be one, or three or more.

  A lid 30 is attached to the contactor 22 via a hinge. The lid portion 30 is provided with a pressing portion 30 a that presses the semiconductor integrated circuit mounted on the contactor 22.

  FIG. 2 is a cross-sectional view of the contactor 22. As shown in FIG. 2, the contactor 22 includes base members 23 and 24, a cover member 25, a large number of contact pins 26, guide pins 27, a coil spring 28, and an IC mounting portion 29. Yes. The IC mounting portion 29 is provided with a recess having a size matching the semiconductor integrated circuit 11 that is a device under test, and the semiconductor integrated circuit 11 is placed in the recess.

  FIG. 3 is a schematic view showing the contact pin 26. The contact pin 26 is made of a metal having a small electric resistance, and is movable and supported by a cylindrical fixed portion 26a, a coil spring 26b disposed in the fixed portion 26a, and a coil spring 26b so as to be movable in the vertical direction. Part 26c. A contact portion 26b that contacts the connection terminal of the semiconductor integrated circuit 11 is provided at the tip (upper end) of the movable portion 26c. In addition, the lower end of the fixing portion 26 a is electrically connected to an electrode provided on the test circuit board 21.

  As shown in FIG. 2, the base member 23 is disposed on the test circuit board 21. Although the base member 24 is also disposed on the test circuit board 21, a space for containing the base member 23 is provided below the base member 24. These base members 23 and 24 are made of an insulating material, and are provided with a number of holes (contact pin standing holes) for standing the contact pins 26. The arrangement pitch of these holes is set to be the same as the arrangement pitch of the connection terminals of the semiconductor integrated circuit 11.

  A plurality (two in this example) of guide pins 27 are erected outside the region of the base members 23 and 24 where the contact pin erection holes are provided. The upper portions of these guide pins 27 are inserted into guide holes provided in the IC mounting portion 29. A coil spring 28 is wound around the guide pin 27. The IC mounting portion 29 is held on the contact pin 26 by the guide pin 27 and the coil spring 28. As will be described later, when the semiconductor integrated circuit 11 is placed on the IC mounting portion 29 and the semiconductor integrated circuit 11 is pushed down by the lid portion 30 (pressing portion 30a), the IC mounting portion 29 is lowered along the guide pins 27. Then, the connection terminal of the semiconductor integrated circuit 11 and the contact portion 26d of the contact pin 26 come into contact with each other.

  A cover member 25 is disposed on the base member 24. As shown in FIG. 2, the cover member 25 is provided with an opening having a size corresponding to the IC mounting portion 29. In the initial state (the state before pressing by the lid portion 30), the lower side of the edge portion on the opening side of the cover member 25 abuts on the edge portion of the IC mounting portion 29 pushed up by the coil spring 28, and the position of the IC mounting portion 29 is reached. Is determined.

  4 is a plan view showing the IC mounting portion 29 and the cover member 25 as viewed from above, and FIG. 5 is an enlarged view showing a part (corner portion) of FIG. As described above, the IC mounting portion 29 is provided with a recess having a size matching the semiconductor integrated circuit 11. A polishing sheet 31 is attached to the bottom of the recess, and the polishing sheet 31 is provided with a number of cross-shaped slits 31a as shown in FIGS. The arrangement pitch of the slits 31 a is set to be the same as the arrangement pitch of the connection terminals of the semiconductor integrated circuit 11.

  The polishing sheet 31 is made of a flexible thin plate with an abrasive attached to the surface, for example. As will be described later, the polishing sheet 31 rubs the tip of the contact pin 26 during a final test (high-speed operation test) to remove foreign matter. Moreover, it is preferable that the IC mounting portion 29 has a structure in which the polishing sheet 31 can be easily replaced.

  FIG. 6 is a diagram illustrating an example of a method for attaching the polishing sheet 31. 6A is a cross-sectional view of the IC mounting portion 29, and FIGS. 6B and 6C are partial enlarged views of the IC mounting portion 29.

  The IC mounting portion 29 shown in FIG. 6A includes an IC mounting portion main body 41 and a polishing sheet holder 42 disposed below the IC mounting portion main body 41 with the polishing sheet 31 interposed therebetween. A plurality of guide holes 41a are provided on the lower surface side of the IC mounting portion main body 41, and the polishing sheet holder 42 is provided with a convex positioning post 42a to be inserted into the guide hole 41a. The polishing sheet 31 is provided with positioning holes 40a at positions corresponding to the positioning posts 42a.

  As shown in FIG. 6 (a), the positioning post 42a has a surface on the center side (center side of the polishing sheet holder 42) that is substantially perpendicular to the horizontal plane, and the outer surface is slanted, and the top width is polished. The width of the bottom portion is smaller than the width of the positioning hole 40 a of the sheet 31, and is set to be substantially the same as the width of the guide hole 41 a of the IC mounting portion main body 41.

  When the polishing sheet 31 is installed in the IC mounting portion 29, the positioning hole 40a of the polishing sheet 31 is fitted into the positioning post 42a of the polishing sheet holder 42 as shown in FIG. Thereafter, as shown in FIG. 6C, the positioning post 42 a is fitted into the guide hole 41 a of the IC mounting portion main body 41. At this time, the polishing sheet 31 is pulled outward along the outer inclined surface of the positioning post 42 a, and tension is generated in the entire polishing sheet 31. As a result, the polishing sheet 31 can be attached to the IC mounting portion 29 in a flat state. Further, when the polishing sheet 31 is worn, the polishing sheet 31 can be easily replaced.

  Hereinafter, a method for testing a semiconductor integrated circuit according to the present embodiment will be described with reference to FIGS. 7A and 7B are cross-sectional views showing the movement of the contactor 22 during the final test (final test), and FIGS. 8A to 8C are the tips of the contact pins 26 during the final test. It is a schematic diagram which shows the motion of a part. Further, in FIGS. 7A and 7B, reference numeral 30 indicates a lid portion attached to the contactor 22, and reference numeral 30a indicates a pressing portion provided on the lid portion 30 (see FIG. 1).

  First, as shown in FIG. 7A, the semiconductor integrated circuit 11 is placed in the concave portion of the IC mounting portion 29. In this state, the IC mounting portion 29 is held above the contact pin 26 by the coil spring 28, and as shown in FIG. 8A, the connection terminal (solder ball) 11 a of the semiconductor integrated circuit 11 and the contact pin 26. There is no contact.

  Next, the lid 30 is closed and the semiconductor integrated circuit 11 is pressed by the pressing portion 30a. Then, the semiconductor integrated circuit 11 descends along with the IC mounting portion 29 along the guide pin 27, and the contact portion 26d at the tip of the contact pin 26 passes through the slit 31a of the polishing sheet 31 as shown in FIG. At this time, the contact portion 26d of the contact pin 26 is rubbed and polished (wiped) by the polishing sheet 31. Thereby, even if the foreign substance has adhered to the contact part 26d, a foreign substance is removed from the contact part 26d.

  Thereafter, when the semiconductor integrated circuit 11 and the IC mounting portion 29 are further pressed and lowered by the pressing portion 30a, as shown in FIGS. 7 (b) and 8 (c), the tip end portion (connecting portion 26d) of the contact pin 26 is obtained. ) Is in contact with the connection terminal 11 a of the semiconductor integrated circuit 11.

  After the contact pin 26 and the connection terminal 11a of the semiconductor integrated circuit 11 are brought into contact in this way, a test signal is output from the test apparatus body 10 (see FIG. 1) to operate the semiconductor integrated circuit 11, and the semiconductor integrated circuit 11 electrical characteristics are measured. Then, the quality of the semiconductor integrated circuit 11 is determined based on the measurement result.

  In the present embodiment, when the semiconductor integrated circuit 11 is pressed by the lid portion 30 (pressing portion 30 a) and the IC mounting portion 29 is moved downward, the tip (connecting portion 26 d) of the contact pin 26 is rubbed by the polishing sheet 31. Polishing (wiping). For this reason, even if foreign matter is attached to the tip of the contact pin 26, the foreign matter is removed before the contact pin 26 contacts the connection terminal 11 a of the semiconductor integrated circuit 11. As a result, the electrical characteristics of the semiconductor integrated circuit 11 can always be measured with good accuracy in the final test, and the reliability of the final test is improved. Further, since a cleaning process for polishing or cleaning the contact pins 26 is not required separately from the final test, the time required for manufacturing the semiconductor integrated circuit (including the final test process) is reduced. As a result, the productivity of the semiconductor integrated circuit is improved. Further, in the conventional method, the contact pin 26 may be excessively polished or the electrical characteristics of the contact pin 26 may be deteriorated by a chemical solution. However, in this embodiment, there is no such risk, and the advantage that the life of the contact pin 26 is extended. There is also.

  9A to 9D are diagrams illustrating examples of slits in the polishing sheet 31. FIG. FIG. 9A shows a slit having a cross shape as described in the above embodiment. FIGS. 9B and 9C show the contact portion 26d at a position corresponding to the contact portion 26d of the contact pin 26. FIG. A circular hole having a smaller diameter is provided, and linear slits are arranged radially from the circular hole. Further, FIG. 9D shows an example in which holes and slits are provided in accordance with the shape of the contact portion 26 d of the contact pin 26. As shown in FIGS. 9A to 9D, the shape of the hole or slit of the polishing sheet 31 may be set as appropriate.

(Second Embodiment)
10A and 10B are cross-sectional views showing a contactor of a test apparatus according to the second embodiment and a test method using the test apparatus. FIGS. 11A to 11C are schematic diagrams showing the movement of the tip of the contact pin 26 during the final test. 10A and 10B, the same components as those in FIGS. 7A and 7B are denoted by the same reference numerals, and detailed description thereof is omitted.

  Although the basic structure of the test apparatus of this embodiment is the same as that of the first embodiment, as shown in FIGS. 10A and 10B, in this embodiment, two IC mounting portions 29 are provided in the IC mounting portion 29. The polishing sheets 32a and 32b are arranged apart from each other in the vertical direction. These polishing sheets 32a and 32b are provided with a large number of cross-shaped slits, similarly to the polishing sheet 31 of the first embodiment. The arrangement pitch of these slits is set to be the same as the arrangement pitch of the connection terminals of the semiconductor integrated circuit 11 which is the device under test.

  In the state before the test, as shown in FIGS. 10A and 11A, the contact portion 26d of the contact pin 26 is located below the first polishing sheet 32a. When the semiconductor integrated circuit 11 is pushed downward by the pressing portion 30a provided on the lid portion 30 (see FIGS. 1 and 7), the contact portion 26d of the contact pin 26 is in contact with the first portion as shown in FIG. It passes through the slit of the polishing sheet 32a. When the semiconductor integrated circuit 11 is further pushed down, the contact portion 26d of the contact pin 26 also passes through the slit of the second polishing sheet 32b as shown in FIGS. It contacts the connection terminal 11a of the circuit 11.

  In the present embodiment, the contact portion 26d of the contact pin 26 is polished (wiped) a total of two times by the first and second polishing sheets 32a and 32b by one movement (lowering) of the IC mounting portion 29. For this reason, in this embodiment, there exists an advantage that the foreign material adhering to the contact part 26d can be removed more reliably compared with 1st Embodiment.

  In this embodiment, the case where the two polishing sheets 32a and 32b are arranged on the IC mounting portion 29 has been described. However, three or more polishing sheets may be arranged apart from each other in the vertical direction.

(Third embodiment)
FIGS. 12A and 12B are cross-sectional views showing a contactor of a test apparatus according to the third embodiment and a test method using the test apparatus. In FIGS. 12A and 12B, the same components as those in FIGS. 7A and 7B are denoted by the same reference numerals, and detailed description thereof is omitted.

  The basic structure of the test apparatus of this embodiment is the same as that of the first embodiment. However, as shown in FIGS. 12A and 12B, in this embodiment, four IC mounting portions 29 are provided on the IC mounting portion 29. The polishing sheets 33a to 33d are arranged apart from each other in the vertical direction.

  FIG. 13 is a plan view showing each of the polishing sheets 33a to 33d. As shown in FIG. 13, each of the polishing sheets 33a to 33d is provided with a slit 34a and a through hole 34b. The arrangement pitch of the slits 34 a and the through holes 34 b is set to be the same as the arrangement pitch of the connection terminals of the semiconductor integrated circuit 11.

  The slit 34a is formed in a cross shape as in the first embodiment, and rubs the tip (contact portion) of the contact pin 26 when the contact pin 26 passes through. Further, the through hole 34b is formed to be slightly larger than the diameter of the tip of the contact pin 26 so that the contact pin 26 does not come into contact with the polishing sheet.

  FIG. 14 is a schematic view showing a state in which the contact pin 26 passes through the polishing sheets 32 a to 33 d and is connected to the connection terminal 11 a of the semiconductor integrated circuit 11. As shown in FIG. 14 and FIG. 13 described above, the positions of the slits 34 a formed in the respective polishing sheets 32 a to 32 are shifted, and each contact pin 26 is moved by one movement (downward movement) of the IC mounting portion 29. Each pass through the slit 34a only once.

  In the first embodiment, since the tips of all the contact pins 26 are polished (wiped) with one polishing sheet 31, a large load is applied to the polishing sheet 31 when the number of contact pins 26 is large. It may be damaged. On the other hand, in the present embodiment, only one contact pin 26 as many as the number of slits 34a comes into contact with one polishing sheet. That is, in the present embodiment, the number of contact pins 26 that apply a load to the polishing sheets 33a to 33d can be limited, respectively, and damage to the polishing sheets 33a to 33d can be reliably avoided.

  The number of polishing sheets, the number of slits 34a and through-holes 34b formed in the polishing sheet, and the layout of the slits 34a and through-holes 34b take into account the number of connection terminals of the semiconductor integrated circuit 11 and the durability of the polishing sheet. What is necessary is just to set suitably.

  In the above-described embodiment, it is assumed that all the contact pins 26 pass through the slit 34a only once by the movement (lowering) of the IC mounting portion 29 once. However, when there is a contact pin 26 that contacts an NC (Non-Connection) terminal of the semiconductor integrated circuit 11, a slit 34a is not provided in a portion corresponding to the contact pin 26 of each polishing sheet, and only the through hole 34b is provided. Good. Thereby, the load concerning polishing sheet 33a-33d can be reduced further.

  Also, when there is a contact pin 26 connected to a connection terminal that does not require strict electrical characteristics, similarly, a portion corresponding to the contact pin 26 of each polishing sheet is not provided with a slit 34a, and only a through hole 34b may be provided. Good.

  Further, when using dummy contact pins in the final test, the slits 34a are not provided in the portions corresponding to the dummy contact pins of each polishing sheet, and only the through holes 34b may be provided.

(Fourth embodiment)
FIG. 15 is a cross-sectional view showing a contactor of a test apparatus according to the fourth embodiment and a test method using the test apparatus. In FIG. 15, the same components as those in FIG. 2 are denoted by the same reference numerals, and detailed description thereof is omitted.

  The basic structure of the test apparatus of the present embodiment is the same as that of the first embodiment, but as shown in FIG. 15, in this embodiment, two types of polishing sheets 35a and 35b are vertically mounted on the IC mounting portion 29. They are spaced apart from each other in the direction.

  The polishing sheet 35a arranged on the lower side contains an abrasive having a coarse particle size, and the polishing sheet 35b arranged on the upper side contains an abrasive having a fine particle size. Similar to the polishing sheet 31 of the first embodiment, cross-shaped slits are arranged in these polishing sheets 35a and 35b. The arrangement pitch of these slits is set to be the same as the arrangement pitch of the connection terminals of the semiconductor integrated circuit 11 which is the device under test.

  When the semiconductor integrated circuit 11 is placed on the IC mounting portion 29 and the semiconductor integrated circuit 11 is pressed by the lid portion (pressurizing portion), the semiconductor integrated circuit 11 is lowered along the guide pins 27 together with the IC mounting portion 29. And the front-end | tip (contact part) of the contact pin 26 permeate | transmits the slit of the polishing sheet 35a. At this time, the tip of the contact pin 26 is rubbed by the polishing sheet 35a and rough polished.

  When the IC mounting portion 29 is further lowered, the tip of the contact pin 26 passes through the slit of the polishing sheet 35b. At this time, the tips of the contact pins 26 are rubbed by the polishing sheet 35b and finish-polished.

  In the present embodiment, the tip of the contact pin 26 is polished by two types of polishing sheets 35a and 35b having different levels of polishing when the IC mounting portion 29 is moved (lowered) once. For this reason, the grinding | polishing state of the contact pin 26 can be set arbitrarily.

  In addition, when using a some polishing sheet like this embodiment, you may enable it to change the space | interval of those polishing sheets. For example, when two polishing sheets 35a and 35b are used as shown in FIG. 15, when the tip of the contact pin 26 comes into contact with the first polishing sheet 35a, the contact pin 26 is contracted by the spring 26b (see FIG. 3). When passing through the polishing sheet 35a, the load is removed, and the polishing sheet 35a extends at a stretch. The contact pressure between the second polishing sheet 35b and the contact pin 26 varies depending on whether the second polishing sheet 35b is disposed near or away from the first polishing sheet 35a. That is, the polishing state can be adjusted by changing the interval between the polishing sheets 35a and 35b.

(Fifth embodiment)
16A and 16B are cross-sectional views showing a contactor of a test apparatus according to the fifth embodiment and a test method using the test apparatus. FIGS. 17A to 17C are schematic diagrams showing the movement of the tip of the contact pin during the final test. In FIGS. 16A and 16B, the same components as those in FIGS. 6A and 6B are denoted by the same reference numerals, and detailed description thereof is omitted.

  Although the basic structure of this embodiment is the same as that of the first embodiment, as shown in FIGS. 16 and 17, in this embodiment, two polishing sheets 36 are attached to the IC mounting portion 29. It has a structure in which a sphere 36b formed by containing an abrasive in an elastic body such as rubber is sandwiched between the films 36a. The film 36a is provided with holes through which the contact pins 26 are inserted at the same pitch as the arrangement pitch of the connection terminals of the semiconductor integrated circuit 11 which is the device under test.

  In the state before the final test, as shown in FIGS. 16A and 17A, the connection portion 26 a of the contact pin 26 is located below the polishing sheet 36. When the semiconductor integrated circuit 11 is pushed downward by the lid (see FIG. 1), the tip (contact portion 26d) of the contact pin 26 enters the polishing sheet 36 as shown in FIG. At this time, the tip of the contact pin 26 is rubbed and polished by the ball 36b.

  When the semiconductor integrated circuit 11 is further pushed down, the tips of the contact pins 26 pass through the polishing sheet 36 and come into contact with the connection terminals 11a of the semiconductor integrated circuit 11 as shown in FIGS. To do. Also in this embodiment, the same effect as that of the first embodiment can be obtained.

(Sixth embodiment)
18A and 18B are cross-sectional views showing a contactor of a test apparatus according to the sixth embodiment and a test method using the test apparatus. FIGS. 19A to 19C are schematic views showing the movement of the tip of the contact pin during the final test. 18A and 18B, the same components as those in FIGS. 6A and 6B are denoted by the same reference numerals, and detailed description thereof is omitted.

  Although the basic structure of this embodiment is the same as that of the first embodiment, as shown in FIGS. 18 and 19, in this embodiment, the polishing sheet 37 attached to the IC mounting portion 29 is made of rubber or the like. The elastic body is made of a material containing an abrasive. The polishing sheet 37 is provided with holes 37a at the same pitch as the arrangement pitch of the connection terminals of the semiconductor integrated circuit 11 which is a device under test. The diameter of the hole 37a is set slightly smaller than the diameter of the tip of the contact pin 26 (connecting portion 26d).

  In the state before polishing, the connecting portion 26a of the contact pin 26 is located below the polishing sheet 37, as shown in FIGS. 18 (a) and 19 (a). When the semiconductor integrated circuit 11 is pushed downward by the lid (see FIG. 1), the tip of the contact pin 26 (contact portion 26d) enters the hole 37a of the polishing sheet 37 as shown in FIG. At this time, the tip of the contact pin 26 is rubbed and polished by the polishing sheet 37 (wall surface of the hole 37a).

  When the semiconductor integrated circuit 11 is further pushed down, the tips of the contact pins 26 pass through the polishing sheet 37 and come into contact with the connection terminals 11a of the semiconductor integrated circuit 11 as shown in FIGS. 18B and 19C. To do. Also in this embodiment, the same effect as that of the first embodiment can be obtained.

(Seventh embodiment)
FIG. 20 is a diagram showing an outline of a semiconductor integrated circuit test system that automatically performs a final test (final test) on a semiconductor integrated circuit.

  A semiconductor integrated circuit to be tested is stored in a tray and placed in an untested product tray storage unit 51. The first transport device 52 sucks the untested semiconductor integrated circuit from the untested product tray storage unit 51 and transports it to the preheating unit 53. In the preheating unit 53, the semiconductor integrated circuit is heated to a predetermined temperature as necessary. When the final test (final test) is performed at room temperature, the preheating unit 53 may not be provided.

  The second transport device 54 transports the semiconductor integrated circuit placed on the preheating unit 53 to the alignment unit 55. The alignment unit 55 adjusts the position and orientation of the semiconductor integrated circuit. The third transport device 57 sucks the semiconductor integrated circuit placed on the alignment unit 55 and transports it to the test stage 56 on which the contactor is arranged.

  FIGS. 21A and 21B are views showing the third transfer device 57 and the contactor arranged on the test stage 56. FIG. Since the contactor used in the present embodiment has basically the same structure as the contactor described in the first embodiment except that the contactor does not have a cover, FIGS. In FIG. 2, the same components as those in FIG. In the following description, FIGS. 1 and 8 are also referred to as needed.

  As shown in FIG. 21A, the third transport device 57 includes a head unit 73, a chuck 74 that is disposed below the head unit 73 and sucks the semiconductor integrated circuit 11, and the head unit 73 in the vertical direction ( A vertical movement unit that moves in the vertical direction) and a horizontal movement unit that moves the head unit 73 in the horizontal direction. The vertical moving part is constituted by a motor (not shown), a lead screw 72 and the like, and the horizontal moving part is constituted by a motor (not shown) and a guide rail 71 and the like.

  When the third transport device 57 transports the semiconductor integrated circuit 11 to above the contactor 22 as shown in FIG. 21A, the head unit 73 is lowered to move the semiconductor integrated circuit 11 to the IC mounting portion 29 of the contactor 22. Place on top.

  Next, the third transport device 57 further lowers the head unit 73 and presses the IC mounting unit 29 via the semiconductor integrated circuit 11. As a result, the IC mounting portion 29 is lowered along the guide pins 27, and the contact pins 26 and the connection terminals 11 a of the semiconductor integrated circuit 11 come into contact with each other. At this time, as shown in FIGS. 8A to 8C, the tip of the contact pin 26 (connection portion 26 d) is rubbed and cleaned by the polishing sheet 31.

  Next, a test signal is supplied from the test apparatus body 10 (see FIG. 1) to the semiconductor integrated circuit 11 via the contactor 22, and a signal corresponding to the test signal is output from the semiconductor integrated circuit 11. The test apparatus body 10 examines a signal input to the semiconductor integrated circuit 11 and a signal output from the semiconductor integrated circuit 11 to determine whether the semiconductor integrated circuit 11 is good or bad.

  After the final test is completed in this way, the third transport device 57 raises the head unit 73 while adsorbing the semiconductor integrated circuit 11 and transports the semiconductor integrated circuit 11 to the temporary storage place 58. The fourth transport device 59 sucks the semiconductor integrated circuit 11 placed in the temporary storage place 58 and transports the semiconductor integrated circuit 11 to the good product storage tray 60 or the defective product storage tray 61 according to the result of the final test.

  In the present embodiment, the final test can be automatically and continuously performed on a large number of semiconductor integrated circuits. In this case, every time the final test is performed, the tip of the contact pin 26 is cleaned by being rubbed against the polishing sheet 31, so that the connection state between the contact pin 26 and the connection terminal 11a of the semiconductor integrated circuit 11 is always stable. Thus, the reliability of the final test is improved.

  In the first to seventh embodiments described above, the case where the package of the semiconductor integrated circuit 11 is a BGA has been described. However, the technology disclosed above is a CSP (Chip Size Package) type such as FBGA, LGA, and FLGA. The present invention can also be applied to semiconductor integrated circuits of the above type, and lead type semiconductor integrated circuits such as QFP (Quad Flat Package) and SOP (Small Outline Package).

  Hereinafter, various aspects of the present invention will be collectively described as supplementary notes.

(Appendix 1) an IC mounting portion on which a semiconductor integrated circuit is mounted;
A base member;
A plurality of contact pins erected on the base member;
Contact means for moving at least one of the IC mounting portion and the base member to bring the tip of the contact pin into contact with the connection terminal of the semiconductor integrated circuit;
A polishing sheet disposed between the semiconductor integrated circuit placed on the IC mounting portion and the base member and rubbing the tip of the contact pin when the semiconductor integrated circuit or the contact pin is moved by the contact means; A contactor for a semiconductor integrated circuit, comprising:

  (Supplementary note 2) The contactor for a semiconductor integrated circuit according to supplementary note 1, wherein the polishing sheet contains an abrasive.

  (Appendix 3) The contactor for a semiconductor integrated circuit according to appendix 1 or 2, wherein the polishing sheet is detachably attached to the IC mounting portion.

  (Supplementary note 4) The contactor for a semiconductor integrated circuit according to supplementary note 3, wherein the IC mounting portion is provided with a tension applying mechanism that applies tension to the polishing sheet when the polishing sheet is attached. .

  (Supplementary Note 5) Any one of Supplementary Notes 1 to 3, wherein the number of the polishing sheets disposed between the semiconductor integrated circuit placed on the IC mounting portion and the base member is plural. A contactor for a semiconductor integrated circuit according to the item.

  (Supplementary Note 6) The semiconductor integrated circuit according to Supplementary Note 5, wherein the plurality of polishing sheets are selectively provided with slits that contact the contact pins and through holes that do not contact the contact pins. Circuit contactor.

(Appendix 7) A step of disposing an abrasive sheet between the semiconductor integrated circuit and a plurality of contact pins electrically connected to the test apparatus body;
Rubbing the tip of the contact pin with the polishing sheet by moving at least one of the contact pin and the polishing sheet;
A step of moving at least one of the contact pin and the semiconductor integrated circuit to bring the tip of the contact pin into contact with the connection terminal of the semiconductor integrated circuit;
And a step of supplying a test signal from the test apparatus main body to the semiconductor integrated circuit to measure electrical characteristics of the semiconductor integrated circuit.

(Additional remark 8) It has a test device main body which generates a test signal, and a contactor on which a semiconductor integrated circuit is mounted and which transmits a test signal output from the test device main body to the semiconductor integrated circuit,
The contactor is
A base member;
A plurality of contact pins erected on the base member;
An IC mounting portion that is disposed apart from the base member and on which the semiconductor integrated circuit is mounted;
Contact means for moving at least one of the IC mounting portion and the base member to bring the tip of the contact pin into contact with the connection terminal of the semiconductor integrated circuit;
A polishing sheet disposed between the semiconductor integrated circuit placed on the IC mounting portion and the base member and rubbing the tip of the contact pin when the semiconductor integrated circuit or the contact pin is moved by the contact means; A test apparatus for a semiconductor integrated circuit, comprising:

(Supplementary note 9) A test apparatus main body for generating a test signal, a contactor for mounting a semiconductor integrated circuit and transmitting a test signal output from the test apparatus main body to the semiconductor integrated circuit, and the semiconductor integrated circuit before the test. A transport device for transporting the contactor to the contactor and transporting the semiconductor integrated circuit after completion of the test from the contactor;
The contactor is
A base member;
A plurality of contact pins erected on the base member;
An IC mounting portion that is disposed apart from the base member and on which the semiconductor integrated circuit is mounted;
Contact means for moving at least one of the IC mounting portion and the base member to bring the tip of the contact pin into contact with the connection terminal of the semiconductor integrated circuit;
A polishing sheet disposed between the semiconductor integrated circuit placed on the IC mounting portion and the base member and rubbing the tip of the contact pin when the semiconductor integrated circuit or the contact pin is moved by the contact means; A test system for a semiconductor integrated circuit, comprising:

  (Supplementary note 10) The semiconductor integrated circuit test system according to supplementary note 9, wherein the transfer device continues to hold the semiconductor integrated circuit during the test.

  DESCRIPTION OF SYMBOLS 10 ... Test apparatus main body, 11 ... Semiconductor integrated circuit, 11a ... Connection terminal, 15 ... Cable, 20 ... Tester head, 21 ... Test circuit board, 22 ... Contactor, 23, 24 ... Base member, 25 ... Cover part, 26 ... Contact pin, 27 ... guide pin, 28 ... coil spring, 29 ... IC mounting portion, 30 ... lid portion, 30a ... pressing portion, 31, 32a, 32b, 33a to 33d, 35a, 35b, 36, 37 ... polishing sheet, 31a, 34a ... slit, 34b ... through hole, 40 ... positioning hole, 41 ... IC mounting portion main body, 41a ... guide hole, 42 ... polishing sheet holder, 42a ... positioning post, 51 ... untested tray storage portion, 52 ... 1st conveying apparatus, 53 ... Preheating part, 54 ... 2nd conveying apparatus, 55 ... Alignment part, 56 ... Test stage, 57 ... 3rd conveying apparatus, 58 Temporary storage, 59 ... fourth transport device 60 ... good storage tray, 61 ... defective storage tray, 71 ... guide rail, 72 ... lead screw, 73 ... head section, 74 ... chuck.

Claims (5)

An IC mounting portion on which a semiconductor integrated circuit is mounted;
A base member;
A plurality of contact pins erected on the base member;
Contact means for moving at least one of the IC mounting portion and the base member to bring the tip of the contact pin into contact with the connection terminal of the semiconductor integrated circuit;
A polishing sheet disposed between the semiconductor integrated circuit placed on the IC mounting portion and the base member and rubbing the tip of the contact pin when the semiconductor integrated circuit or the contact pin is moved by the contact means; A contactor for a semiconductor integrated circuit, comprising:   2. The contactor for a semiconductor integrated circuit according to claim 1, wherein the number of the polishing sheets disposed between the semiconductor integrated circuit placed on the IC mounting portion and the base member is plural.   The contactor for a semiconductor integrated circuit according to claim 2, wherein the plurality of polishing sheets are selectively provided with slits that contact the contact pins and through holes that do not contact the contact pins. . Arranging a polishing sheet between the semiconductor integrated circuit and a plurality of contact pins electrically connected to the inspection apparatus body;
Rubbing the tip of the contact pin with the polishing sheet by moving at least one of the contact pin and the polishing sheet;
A step of moving at least one of the contact pin and the semiconductor integrated circuit to bring a tip of the contact pin into contact with a connection terminal of the semiconductor integrated circuit;
And a step of supplying a test signal from the inspection apparatus main body to the semiconductor integrated circuit to measure electrical characteristics of the semiconductor integrated circuit. A test apparatus body for generating a test signal; and a contactor for mounting a semiconductor integrated circuit and transmitting a test signal output from the test apparatus body to the semiconductor integrated circuit,
The contactor is
A base member;
A plurality of contact pins erected on the base member;
An IC mounting portion that is disposed apart from the base member and on which the semiconductor integrated circuit is mounted;
Contact means for moving at least one of the IC mounting portion and the base member to bring the tip of the contact pin into contact with the connection terminal of the semiconductor integrated circuit;
A polishing sheet disposed between the semiconductor integrated circuit placed on the IC mounting portion and the base member and rubbing the tip of the contact pin when the semiconductor integrated circuit or the contact pin is moved by the contact means; A test apparatus for a semiconductor integrated circuit, comprising:

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