JP2011023750A - Apparatus for driving light emitting element, and light emitting device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce power loss and heat generation in a light emitting element current driving circuit. <P>SOLUTION: A light emitting element driving apparatus drives N (where N is any integer of 1 or more) light emitting element groups and contains a driving power generation circuit with a least voltage detection circuit as a feedback path, N current driving circuits, and N or less voltage regulation circuits. Each of the N light emitting element groups contain one or more light emitting elements. The driving power generation circuit supplies a predetermined power supply voltage to the N light emitting element groups. The N current driving circuits drives current from the N light emitting element groups via the voltage regulation circuits. Among the N current driving circuits connected to the minimum voltage detection circuit, one which has the lowest voltage between both ends acts as a return path in the driving voltage generation circuit. Even if a voltage between both ends has a difference between the light emitting element groups, the voltage between both ends of the current driving circuit is reduced to the minimum voltage required to operate the current driving circuit or more by the voltage regulation circuits. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a driving device for driving a light emitting element, and more particularly, a light emitting element driving device for driving a light emitting element such as an LED (Light Emitting Diode) using a DC / DC converter as a power supply voltage supply source and light emission. Relates to the device.

  As a conventional light emitting element driving device, a configuration shown in FIG. 10 has been proposed in order to reduce power loss of a current driving unit configured on the same semiconductor substrate and reduce chip heat generation (for example, Patent Document 1). reference).

  In FIG. 10, current drive circuits 111A, 111B, and 111C drive the light emitting element groups 110A, 110B, and 110C, respectively. Each of the light emitting element groups 110A, 110B, and 110C includes a plurality of LEDs, and the plurality of LEDs are connected in series so that a drive current flows in the forward direction from the anode to the cathode. In addition, voltage drop detection circuits 112A, 112B, and 112C are connected to three connection points of the light emitting element groups 110A, 110B, and 110C and the current driving circuits 111A, 111B, and 111C, respectively. The voltage drop detection circuits 112 </ b> A, 112 </ b> B, and 112 </ b> C detect the voltages at the three connection points, respectively, and send detection signals to the control signal generation unit 116. The control signal generator 116 identifies the light emitting element group that is driven with the largest voltage drop, that is, the largest current among the light emitting element groups 110A, 110B, and 110C. The control signal generation unit 116 controls the power conversion unit 117 so that the voltage across the current driving circuit driving the identified light emitting element group becomes the minimum necessary voltage that can normally drive the light emitting element group. Control.

  That is, the control signal generation unit 116 uses the feedback loop that passes through the power conversion unit 117, the light emitting element groups 110A, 110B, and 110C, and the voltage drop detection circuits 112A, 112B, and 112C to optimize the voltages at the three connection points. Turn into. As a result, the voltage across the current drive circuits 111A, 111B, and 111C is equal to or higher than the necessary minimum voltage, so that the light emission failure due to the power shortage of the current drive circuit can be eliminated. Furthermore, since the voltage across the current drive circuits 111A, 111B, and 111C is small, wasteful power and heat generated by the current drive circuit can be reduced, and efficient LED driving can be achieved.

  As described above, the light emitting element driving device of the conventional example has the largest current value flowing through the current driving circuit among the plurality of current driving circuits configured in parallel, and the voltage at the connection point between the light emitting element group and the current driving circuit is The lowest current drive circuit is specified. As a result, the light emitting element driving device of the conventional example has a configuration in which the voltage across the specified current driving circuit is set to the minimum necessary voltage.

JP 2007-242477 A

  However, the conventional light emitting device driving apparatus has the following problems. For example, the light emitting element groups 110A, 110B, and 110C are configured by the same type of LEDs, and each light emitting element group is configured by connecting the same number of LEDs in series, and the current drive circuits 111A, 111B, and 111C have a drive current value. Assume that they are set to be the same. Even in this case, the total forward voltage in each light emitting element group 110A, 110B, 110C (hereinafter referred to as the total forward voltage) varies due to the variation in forward voltage between LEDs. For this reason, the voltages at both ends of the current drive circuits 111A, 111B, and 111C are different from each other. As described above, since the minimum voltage among the voltages at both ends of the current driving circuits 111A, 111B, and 111C is the minimum necessary voltage that can drive the light emitting element group in current, the other voltages exceeding the minimum voltage are more than necessary. Voltage. Therefore, when the variation in forward voltage between LEDs increases, the power loss in the current drive circuits 111A, 111B, and 111C increases.

For example, the number of LEDs connected in series in each of the light emitting element groups 110A, 110B, and 110C is four, and the forward voltage of each LED varies in the range of 3.1V ± 0.3V. Further, it is assumed that each drive current value of the current drive circuits 111A, 111B, and 111C is 100 mA, and the smallest voltage among both end voltages of the current drive circuits 111A, 111B, and 111C is 0.5 V of the current drive circuit 111A. In this case, the variation in the voltages at both ends is maximized because the forward voltages of the four LEDs constituting the light emitting element group 110A are 3.1V + 0.3V, and the eight LEDs constituting the light emitting element groups 110B and 110C. The forward voltage is 3.1V-0.3V. Therefore, the voltages at both ends of the current drive circuits 111B and 111C are expressed by Equation 1.
0.5V + {(3.1V + 0.3V)-(3.1V-0.3V)} × 4 = 2.9V
... (1)

As a result, the power consumption in the current drive circuits 111A, 111B, and 111C is expressed by Equation 2, which is much larger than the power consumption of Equation 3 when the forward voltages of the LEDs are all the same. The power 480 mW of the difference between Equation 2 and Equation 3 represents the power loss in the current drive circuit.
0.5 V × 100 mA + 2.9 V × 100 mA × 2 = 630 mW (2)
0.5V × 100mA × 3 = 150mW (3)

  Furthermore, as the number of light emitting element groups increases and the number of current drive circuits increases accordingly, the ratio of the number of current drive circuits that are affected by variations in forward voltage increases, as can be understood from Equation 2. As a result, the ratio of power loss to the total power consumption of the current drive circuit increases.

  For this reason, in many cases, the power loss is often reduced by selecting the variation width of the forward voltage per LED into a rank of 0.2 V, for example. However, the LED procurement cost increases due to LED rank selection. In addition, there is a limit to narrowing the forward voltage variation width in rank selection, and a large power loss occurs compared to the ideal power consumption as shown in Equation 3.

  Further, when the drive current values of the current drive circuits 111A, 111B, and 111C are different, or when the types of LEDs and the number of LEDs in the light emitting element groups 110A, 110B, and 110C are different, all forward directions between the light emitting element groups The voltage difference is further increased. As a result, the power loss is further increased.

  In view of the above-described problems of the conventional example, the light-emitting element driving device and the light-emitting device of the present invention aim to reduce the power loss of the current driving circuit, which increases due to variations in the forward voltage of the light-emitting elements. To do.

  In order to achieve the above-described object, a light emitting element driving device of the present invention includes N light emitting element groups each including one or more light emitting elements (N is an integer of 2 or more), and N light emitting element groups. A drive voltage generation circuit for supplying a drive voltage to the power source, N current drive circuits for driving the N light emitting element groups respectively, and a path between the output of the drive voltage generation circuit and the N current drive circuits. And N or less voltage adjusting circuits that are connected in series with the N light emitting element groups and adjust the voltage across the current driving circuit.

  In addition, the light emitting element driving device of the present invention has a minimum voltage detection circuit that detects the minimum voltage among the voltages across the N current drive circuits, and the signal path of the minimum voltage detected by the minimum voltage detection circuit A feedback path for the drive voltage generation circuit may be used.

  Further, according to the light emitting element driving device of the present invention, the N or less voltage adjusting circuits each include at least an operational amplifier and a transistor, and the transistor is between the output of the driving voltage generating circuit and the N current driving circuits. Is connected in series with N light emitting element groups, and a first predetermined voltage whose setting voltage can be changed for each operational amplifier is input to one input of the operational amplifier, and the other input of the operational amplifier is N light emitting element groups. And N current driving circuits may be connected to each other, and a feedback path (feedback loop) may be configured by controlling a transistor by an output of an operational amplifier.

  In the light emitting element driving device according to the present invention, the driving voltage generating circuit has an error amplifier in which the second predetermined voltage is input to one input and the output signal of the minimum voltage detecting circuit is input to the other input. The first predetermined voltage is set to be higher than the third predetermined voltage, which is the minimum voltage among the voltages across the N current driving circuits determined by the minimum voltage detection circuit based on the second predetermined voltage as the voltage generation circuit. Or you may set the same.

  Further, according to the light emitting element driving device of the present invention, each of the N or less voltage adjustment circuits includes at least a comparator, a transistor, and a resistance component (or diode), and the transistor and the resistance component (or diode) are In parallel connection, N light emitting element groups are connected in series on a path between the driving voltage generation circuit and the N current driving circuits, and the path between the N light emitting element groups and the N current driving circuits is connected to one of the paths. The transistor may be controlled by the output of the comparator having the other input as the fourth predetermined voltage.

  According to the light emitting element driving device of the present invention, each of the N or less voltage adjustment circuits includes at least a first transistor and a second transistor having different on-resistances from the comparator. And the second transistor are connected in parallel and connected in series with N light emitting element groups in a path between the drive voltage generation circuit and the N current drive circuits, and the N light emitting element groups and the N current drive circuits are connected in series. The first transistor and the second transistor or one of the first transistor and the second transistor can be controlled by the output of the comparator with the path between them as one input and the other input as the fourth predetermined voltage. Good.

  In the light emitting element driving device of the present invention, the driving voltage generation circuit has an error amplifier in which a signal from the minimum voltage detection circuit is input to one input and a second predetermined voltage to the other input. As a voltage generation circuit, the fourth predetermined voltage is set higher than the third predetermined voltage, which is the minimum voltage among the voltages across the N current drive circuits determined by the minimum voltage detection circuit based on the second predetermined voltage. It may be set.

  Furthermore, the light emitting device of the present invention includes N (N is an integer of 2 or more) light emitting element groups each including one or more light emitting elements, and the light emitting element driving device.

  According to the light-emitting element driving device and the light-emitting device of the present invention, the voltage adjustment circuit absorbs the difference in the total forward voltage of N light-emitting element groups that are greatly different from each other due to variations in the forward voltage of the light-emitting elements. can do. As a result, the voltage adjusting circuit can set all the voltages across the N current driving circuits to a minimum necessary amount for obtaining a desired light emission amount from the light emitting element group. Thereby, since a voltage more than necessary is not applied to both ends of the current drive circuit, the power loss of the current drive circuit can be extremely reduced, and the power consumption of the current drive circuit can be minimized.

  When N current driving circuits are formed on one semiconductor substrate, the heat generation of the semiconductor chip can be reduced, the quality of the semiconductor chip is improved, and more current is supplied on the same semiconductor substrate. A component including a drive circuit can be formed. Further, since it is not necessary to sort out the light emitting elements, it is possible to reduce the man-hours for sorting and the cost of the light emitting element group, and thus it is possible to reduce the cost of the light emitting device including the light emitting element driving device.

  In addition to the variation in forward voltage among the light emitting elements constituting the light emitting element group, there are the following cases that cause the total forward voltages of the N light emitting element groups to be different from each other. The first is a case where N system drive currents are different from each other. The second is a case where the number of light emitting elements in series differs for each of the N light emitting element groups. The third case is a case where different types of light emitting elements having different forward voltages are used for each of the N light emitting element groups. The fourth case is when there is a difference in ambient temperature for each of the N light emitting element groups. Even in such a case, N total forward voltages are different from each other as a result, and the above-described effect can be obtained by the operation of the voltage adjustment circuit.

  Furthermore, the drive current generated by one current drive circuit tends to change depending on the voltage between both ends thereof. For example, the drive current tends to increase as the voltage across the terminal increases. However, since the voltage adjustment circuit connected to the current drive circuit can suppress fluctuations in the voltage across the two terminals, the relative accuracy of the drive current in one current drive circuit can be improved. In addition, since the minimum voltage across both ends of the current drive circuit in the on state is detected among the N current drive circuits, the drive current depends on the specific characteristics of the current drive circuit that is in the on state. Tend to change. However, even if any of the N current drive circuits is turned on, the voltage adjustment circuit connected to the current drive circuit in the on state can suppress the fluctuation of the voltage across the both ends. For this reason, the absolute accuracy of the driving current in the N current driving circuits can be improved.

1 is a circuit diagram showing a configuration of a light emitting element driving apparatus according to a first embodiment of the present invention. The circuit diagram which shows the structure of the light emitting element drive device of the modification 1 which concerns on the 1st Embodiment of this invention. The circuit diagram which shows the structure of the light emitting element drive device of the modification 2 which concerns on the 1st Embodiment of this invention. The circuit diagram which shows the structure of the light emitting element drive device of the modification 3 which concerns on the 1st Embodiment of this invention. The circuit diagram which shows the structure of the light emitting element drive device of the modification 4 which concerns on the 1st Embodiment of this invention. The circuit diagram which shows the structure of the light emitting element drive device which concerns on the 2nd Embodiment of this invention. The circuit diagram which shows the structure of the light emitting element drive device of the modification 1 which concerns on the 2nd Embodiment of this invention. The circuit diagram which shows the structure of the light emitting element drive device of the modification 2 which concerns on the 2nd Embodiment of this invention. The circuit diagram which shows the structure of the light emitting element drive device which concerns on the 3rd Embodiment of this invention. The circuit diagram which shows the structure of the light emitting element drive device of a prior art example

  Hereinafter, some examples relating to embodiments for carrying out the present invention will be described with reference to the drawings. In the drawings, elements that represent substantially the same configuration, operation, and effect are denoted by the same reference numerals. The symbols in the drawings are also used as values of variables indicated by the symbols in the equations.

(First embodiment)
FIG. 1 is a circuit diagram showing a configuration of the light emitting element driving device 200. The light emitting element driving apparatus 200 includes a driving voltage generation circuit 210, voltage adjustment circuits 40, 41, and 42, a current driving circuit group 39, cathode paths P36C, P37C, and P38C, detection paths P26, P27, and P28, and a voltage source. The path P2 is included. The light emitting element driving device 200 drives the light emitting element groups 36, 37, and 38 to emit light. Current drive circuit group 39 includes current drive circuits 26, 27, and 28. Drive voltage generation circuit 210 includes a converter control circuit 220, a DC / DC converter 230, and a control path P35.

  The light emitting element group 36 includes light emitting elements 14, 15, 16, and 17. The light emitting element group 37 includes light emitting elements 18, 19, 20, and 21. The light emitting element group 38 includes light emitting elements 22, 23, 24, and 25. Each light emitting element is comprised by LED (Light Emitting Diode: Light emitting diode), for example. The anode ends of the light emitting element groups 36 to 38 are connected to the output path PC2 of the DC / DC converter 230. The cathode ends of the light emitting element groups 36 to 38 are connected to cathode paths P36C to P38C, respectively. The light emitting elements 14 to 17 are connected in series so that the forward direction from the anode to the cathode is the direction from the output path Pout to the cathode path P36C. The light emitting elements in each of the light emitting element groups 37 to 38 are connected in the same manner as in the case of the light emitting element group 36.

  The voltage adjustment circuit 40 includes an N-channel MOS (Negative channel Metal Oxide Semiconductor) transistor 11 and an operational amplifier (operational amplifier) 29. Voltage adjustment circuit 41 includes an N channel MOS transistor 12 and an operational amplifier 30. Voltage adjustment circuit 42 includes an N-channel MOS transistor 13 and an operational amplifier 31. In the voltage adjustment circuit 40, the drain of the N-channel MOS transistor 11 is connected to the cathode path P36C, and the source is connected to the detection path P26 and to the inverting input terminal of the operational amplifier 29. The non-inverting input terminal of the operational amplifier 29 is connected to the voltage source path P <b> 2, and the output terminal is connected to the gate of the N-channel MOS transistor 11. The N channel MOS transistors and the operational amplifiers in the voltage adjustment circuits 41 to 42 are also connected in the same manner as in the voltage adjustment circuit 40.

  One ends of the current drive circuits 26 to 28 are connected to the detection paths P26 to P28, respectively, and the other ends are grounded. As described above, between the output path PC2 and the ground, the light emitting element group 36, the cathode path P36C, the voltage adjustment circuit 40 (specifically, the N-channel MOS transistor 11 included in the voltage adjustment circuit 40), the detection path P26, and The current drive circuits 26 are connected in series with each other. Similarly, the light emitting element group 37, the cathode path P37C, the voltage adjustment circuit 41 (specifically, the N-channel MOS transistor 12 included in the voltage adjustment circuit 41), the detection path P27, and the current drive circuit 27 are connected in series with each other. . Similarly, the light emitting element group 38, the cathode path P38C, the voltage adjustment circuit 42 (specifically, the N-channel MOS transistor 13 included in the voltage adjustment circuit 42), the detection path P28, and the current drive circuit 28 are connected in series to each other. .

  The drive voltage generation circuit 210 generates the drive voltage VC2 and supplies it to the light emitting element groups 36 to 38 via the output path PC2. The sum of the forward voltages of the four light emitting elements in the light emitting element group 36 is referred to as a total forward voltage V36. Similarly, the sum of forward voltages in the light emitting element groups 37 to 38 is referred to as all forward voltages V37 and V38, respectively. The voltages between the cathode paths P36C to P38C and the ground are referred to as cathode voltages V36C, V37C, and V38C, respectively. The light emitting element group 36 divides the drive voltage VC2 into an all forward voltage V36 and a cathode voltage V36C. Similarly, the light emitting element group 37 divides the drive voltage VC2 into an all forward voltage V37 and a cathode voltage V37C. Similarly, the light emitting element group 38 divides the drive voltage VC2 into an all forward voltage V38 and a cathode voltage V38C.

  The voltages between the detection paths P26 to P28 and the ground (that is, the voltages across the current drive circuits 27 to 28, respectively) are referred to as the voltages V26, V27, and V28, respectively. A voltage drop in the voltage adjustment circuit 40, that is, a voltage obtained by subtracting the both-end voltage V26 from the cathode voltage V36C is referred to as an adjustment voltage V40. Similarly, a voltage drop in the voltage adjustment circuit 41, that is, a voltage obtained by subtracting the both-end voltage V27 from the cathode voltage V37C is called an adjustment voltage V41. Similarly, a voltage drop in the voltage adjustment circuit 42, that is, a voltage obtained by subtracting the both-end voltage V28 from the cathode voltage V38C is referred to as an adjustment voltage V42. The voltage adjustment circuit 40 divides the cathode voltage V36C into the adjustment voltage V40 and the both-end voltage V26. Similarly, the voltage adjustment circuit 41 divides the cathode voltage V37C into the adjustment voltage V41 and the both-end voltage V27. Similarly, the voltage adjustment circuit 42 divides the cathode voltage V38C into the adjustment voltage V42 and the both-end voltage V28.

  Current drive circuits 26 to 28 generate drive currents J26, J27, and J28, respectively. The current drive circuit 26 supplies the drive current J26 to the light emitting element group 36 via the detection path P26, the voltage adjustment circuit 40, and the cathode path P36C. Similarly, the current drive circuits 27 to 28 supply the drive currents J27 to J28 to the light emitting element groups 37 to 38 via the detection paths P27 to P28, the voltage adjustment circuits 41 to 42, and the cathode paths P37C to P38C, respectively. To do.

  The current drive circuits 26 to 28 may set the drive currents J26 to J28 to predetermined sizes, respectively. Further, the current drive circuits 26 to 28 may be turned on / off so that the drive currents J26 to J28 are pulse width modulated currents each having a predetermined pulse height. In this case, the both-end voltages V26 to V28 in the off state are larger than any of the both-end voltages V26 to V28 in the on state. The current drive circuit group 39 including the current drive circuits 26 to 28 is formed on one semiconductor substrate using a circuit configuration such as a current mirror circuit. Each component which comprises the light emitting element drive device 200 may be formed on this semiconductor substrate.

  The voltage source 3 is connected between the voltage source path P3 and the ground, generates a predetermined voltage V3, and outputs it to the voltage source path P3. The voltage source 2 is connected between the voltage source path P2 and the voltage source 3, and generates a predetermined voltage to generate a predetermined voltage V2 representing a sum voltage of the predetermined voltage V3 and the predetermined voltage of the voltage source 2. Output to path P2. The voltage source 2 may be connected between the voltage source path P2 and the ground separately from the voltage source 3 to generate the predetermined voltage V2.

  In the voltage adjusting circuit 40, the operational amplifier 29 receives the voltage V26 at both ends at the inverting input terminal, receives the predetermined voltage V2 from the voltage source path P2 at the non-inverting input terminal, and subtracts the voltage V26 from the predetermined voltage V2. By amplifying, the gate control signal V29 is generated. When operating in the active region, N-channel MOS transistor 11 receives gate control signal V29 at the gate and adjusts the drain-source voltage. Since the gate control signal V29 increases as the both-end voltage V26 becomes smaller than the predetermined voltage V2, the N-channel MOS transistor 11 decreases the drain-source voltage and, as a result, attempts to increase the both-end voltage V26. On the contrary, since the gate control signal V29 decreases as the voltage V26 at both ends becomes larger than the predetermined voltage V2, the N-channel MOS transistor 11 increases the drain-source voltage, and as a result, attempts to decrease the voltage V26 at both ends. To do. Here, the drain-source voltages of the N-channel MOS transistors 11 to 13 are equal to the adjustment voltages V40 to V42, respectively. Thus, the voltage adjustment circuit 40 makes the both-ends voltage V26 substantially equal to the predetermined voltage V2.

  The voltage adjustment circuits 41 to 42 operate in the same manner as the voltage adjustment circuit 40. That is, the operational amplifiers 30 and 31 generate the gate control signals V30 and V31, respectively. N-channel MOS transistors 12-13 receive gate control signals V30-V31 at their gates, respectively, and adjust the drain-source voltage. Thus, the voltage adjustment circuits 41 to 42 make the both-end voltages V27 to V28 substantially equal to the predetermined voltage V2, respectively.

  The converter control circuit 220 includes a minimum voltage detection circuit 32, an error amplifier (error amplifier) 33, a voltage source path P3, a resistor 7, a capacitor 6, and a PWM (Pulse Width Modulation) control circuit 221.

  The minimum voltage detection circuit 32 generates a minimum end-to-end voltage Vd representing the minimum voltage among the end-to-end voltages V26 to V28 and outputs it to the error amplifier 33. The minimum voltage detection circuit 32 may include a level shift circuit, and may generate the minimum terminal voltage Vd by level-shifting the minimum voltage among the terminal voltages V26 to V28. The error amplifier 33 receives the minimum voltage Vd at the inverting input terminal, receives the predetermined voltage V3 from the voltage source path P3 at the non-inverting input terminal, and amplifies the voltage obtained by subtracting the minimum voltage Vd from the predetermined voltage V3. Thus, the error signal Ve is generated. The resistor 7 and the capacitor 6 constitute a phase compensation filter and compensate the phase of the error signal Ve.

  The PWM control circuit 221 includes a triangular wave generator 34 and a comparator 35. The triangular wave generator 34 generates a triangular wave signal Vc. The comparator 35 receives the error signal Ve at the non-inverting input terminal, receives the triangular wave signal Vc at the inverting input terminal, generates a PWM control signal V35 that represents the comparison result between the error signal Ve and the triangular wave signal Vc, and controls the control path. Output to P35. The PWM control circuit 221 generates the PWM control signal V35 by performing pulse width modulation on the pulse signal that repeats at the period of the triangular wave signal Vc so that the high level period becomes longer as the error signal Ve increases.

  Thus, converter control circuit 220 generates PWM control signal V35 based on both-end voltages V26 to V28, and outputs it to control path P35. As the minimum both-ends voltage Vd becomes smaller than the predetermined voltage V3, the period of the high level of the PWM control signal V35 becomes longer. As the minimum both-ends voltage Vd becomes larger than the predetermined voltage V3, the period of the high level of the PWM control signal V35. Becomes shorter.

  DC / DC converter 230 includes voltage source path PC1, capacitor 4, inductor 8, N-channel MOS transistor 10, Schottky diode 9, smoothing capacitor 5, and output path PC2. The voltage source 1 is connected between the voltage source path PC1 and the ground, and the capacitor 4 is connected to the voltage source 1 in parallel. One end of the inductor 8 is connected to the voltage source path PC1, and the other end is connected to the drain of the N-channel MOS transistor 10 and the anode of the Schottky diode 9. The source of N channel MOS transistor 10 is grounded, and the gate thereof is connected to control path P35. The cathode of the Schottky diode 9 is connected to one end of the smoothing capacitor 5 and the output path PC2, and the other end of the smoothing capacitor 5 is grounded.

  The voltage source 1 generates a predetermined voltage VC1 and outputs it to the voltage source path PC1. Capacitor 4 suppresses fluctuation of predetermined voltage VC1 in voltage source path PC1. N-channel MOS transistor 10 receives PWM control signal V35 from control path P35 at its gate, and is turned on / off by PWM control signal V35. Inductor 8 charges and discharges the electric power from voltage source 1 by the ON operation and OFF operation of N channel MOS transistor 10, respectively. The Schottky diode 9 prevents a reverse flow from the output path PC2 during charging, and allows the electric power discharged during discharging to pass in the forward direction. The smoothing capacitor 5 charges the passed power and generates a drive voltage VC2 that is smoothed in the output path PC2.

  As described above, the DC / DC converter 230 converts the predetermined voltage VC1 into the drive voltage VC2, supplies it to the light emitting element groups 36 to 38 via the output path PC2, and receives the PWM control signal V35 via the control path P35. Based on the above, the drive voltage VC2 is adjusted. The DC / DC converter 230 is a step-up converter that generates a drive voltage VC2 larger than the predetermined voltage VC1.

  As the high-level period of the PWM control signal V35 becomes longer, the ON period of the N-channel MOS transistor 10 becomes longer, so the charging period of the inductor 8 becomes longer, and as a result, the drive voltage VC2 increases. When the drive voltage VC2 increases, the both-end voltages V26 to V28 also increase. On the contrary, as the high level period of the PWM control signal V35 becomes shorter, the ON period of the N-channel MOS transistor 10 becomes shorter, so that the charging period of the inductor 8 becomes shorter, and as a result, the drive voltage VC2 becomes smaller. When the drive voltage VC2 is decreased, the both-end voltages V26 to V28 are also decreased.

  Considering the operation of the converter control circuit 220 described above, the drive voltage VC2 increases as the minimum terminal voltage Vd becomes smaller than the predetermined voltage V3. Therefore, the terminal voltages V26 to V28 also increase, and the minimum terminal voltage Vd becomes the predetermined voltage. It is suppressed that it becomes smaller than V3. On the contrary, as the minimum both-end voltage Vd becomes larger than the predetermined voltage V3, the drive voltage VC2 becomes smaller. Therefore, both-end voltages V26 to V28 also become smaller, and the minimum both-end voltage Vd is prevented from becoming larger than the predetermined voltage V3. The

  As described above, the drive voltage generation circuit 210 adjusts the drive voltage VC2 so that the minimum voltage Vd among the voltages V26 to V28 is approximately equal to the predetermined voltage V3.

  In the following, it is assumed that all of the current drive circuits 26 to 28 are in the on state. The power loss of the current drive circuit in the off state is substantially zero, and the adjustment operation by the drive voltage generation circuit 210 or the voltage adjustment circuits 40 to 42 is not performed. Of the three paths from the output path PC2 to the light emitting element groups 36 to 38, the cathode paths P36C to P38C, the voltage adjustment circuits 40 to 42, and the detection paths P26 to P28, the path corresponding to the minimum voltage Vd is: Called the minimum voltage path. Paths other than the minimum voltage path are called non-minimum voltage paths. The number of systems of the minimum voltage path and the non-minimum voltage path is 1 or more, and is 3 in total. The light emitting element driving apparatus 200 converges the minimum both-ends voltage Vd to the predetermined voltage V3 by the control operation through the closed loop path via the converter control circuit 220, the control path P35, the DC / DC converter 230, and the minimum voltage path. .

  The minimum voltage required for the current driving circuits 26 to 28 to normally generate a desired driving current is called the minimum operable voltage. If the predetermined voltage V3 is set to the minimum operable voltage, the voltage across the current drive circuit that supplies the drive current to the minimum voltage path becomes the minimum operable voltage. Further, the voltage adjustment circuit in the minimum voltage path does not need to adjust the voltage across the terminals, and it is sufficient to pass the drive current without consuming as much power as possible. For this reason, by setting the predetermined voltage V2 slightly higher than the predetermined voltage V3, the operational amplifier in the minimum voltage path drives the N-channel MOS transistor in a full-on state (drives in a saturation region), and sets the N-channel MOS transistor in a full-on state ( Saturated). At this time, the adjustment voltage of the minimum voltage path is the ON voltage of the N-channel MOS transistor. The drive voltage generation circuit 210 is driven such that the drive voltage VC2 is equal to the voltage obtained by adding the minimum operable voltage, the adjustment voltage in the full-on state, and the total forward voltage of the light emitting element group in the minimum voltage path. The voltage VC2 is adjusted.

  The reason why the voltage across the minimum voltage path is minimum among the voltages V26 to V28 is that the total forward voltage of the light emitting element group in the minimum voltage path is the highest among the total forward voltages V36 to V38. is doing. That is, in the non-minimum voltage path, the total forward voltage of the light emitting element group is smaller than that in the minimum voltage path. On the other hand, as described above, the voltage adjustment circuits 40 to 42 try to make the both-end voltages V26 to V28 approximately equal to the predetermined voltage V2, so that the adjustment voltage of the voltage adjustment circuit in the non-minimum voltage path is the case of the minimum voltage path. Bigger than. In this way, in the non-minimum voltage path, the voltage adjustment circuit operates the N-channel MOS transistor in the active region, thereby absorbing a smaller step in the total forward voltage than in the minimum voltage path and minimizing the voltage at both ends. Try to match the voltage across the voltage path.

  As described above, by setting the predetermined voltage V2 to be slightly larger than the predetermined voltage V3, the light emitting element driving device 200 is optimally adjusted in the closed loop path including the minimum voltage path. As a result, the light emitting element driving device 200 can match the voltage across the current driving circuit that supplies the driving current to the minimum voltage path with the minimum operable voltage across the current driving circuit. At the same time, the voltage adjustment circuits 40 to 42 can adjust the voltage across the current drive circuit that supplies the drive current to the non-minimum voltage path to the vicinity of the minimum operable voltage.

  Next, an actual operation example of the light emitting element driving apparatus 200 will be described. The predetermined voltage V3 is 0.5V, the predetermined voltage V2 is 0.51V (that is, the voltage generated by the voltage source 2 is 0.01V), the drive currents J26 to J28 are 100 mA, and the ON resistances of the N-channel MOS transistors 11 to 13 Is 50 m ohms. The same kind of LEDs are used for the light emitting elements 14 to 25. The variation width of the forward voltage is 2.9 V ± 0.1 V (at a driving current of 100 mA), the forward voltage of the LEDs of the light emitting element group 36 is 3 V, and the forward voltage of the LEDs of the light emitting element groups 37 to 38 is all. Are both 2.8V. Further, the above-described minimum operable both-end voltage is 0.5V.

  When set in this way, the total forward voltage V36 is 3V × 4 = 12V, and the total forward voltages V37 and V38 are 2.8V × 4 = 11.2V. Therefore, the route passing through the light emitting element group 36, the cathode route P36C, the voltage adjusting circuit 40, and the detection route P26 is the minimum voltage route, and the two routes passing through the other light emitting element groups 37 and 38 are non-minimum voltages. It becomes a route. The both-ends voltage V26 in the minimum voltage path is equal to the predetermined voltage V3 = 0.5V. Since the operational amplifier 29 receives the predetermined voltage V2 = 0.51V at the non-inverting input terminal and the both-ends voltage V26 = 0.5V at the inverting input terminal, the gate control signal V29 becomes maximum. At this time, the N-channel MOS transistor 11 is in a full-on state (saturated state) having an on-resistance of 50 mΩ, and the drain-source voltage (adjusted voltage V40) is 50 mΩ × 100 mA = 5 mV. Therefore, the cathode voltage V36C is 0.5V + 5 mV = 0.505V, and the drive voltage VC2 is 0.505V + 12V = 12.505V. On the other hand, both-end voltages V27 to V28 in the non-minimum voltage path are equal to the predetermined voltage V2 by the adjustment function of the voltage adjustment circuits 41 to 42 operating in the active region, and become 0.51V.

As a result, the power consumption in the current driving circuits 26 to 28 is as shown in Equation 4, and a result close to the ideal state (Equation 5) in which all the voltages across the current driving circuits 26 to 28 are 0.5 V is obtained. Will be. The difference power between Equation 4 and Equation 5, that is, the power loss in Equation 4, is about 2 mW and does not reach 2 percent of the total power consumption.
0.5V × 100mA + 0.51V × 100mA × 2 = 152mW (4)
0.5V × 100mA × 3 = 150mW (5)

Further, when the voltage adjustment circuits 40 to 42 are not provided, the both-end voltage V26 is 0.5 V, and the both-end voltages V27 to V28 are 1.3 V. Therefore, the power consumption in the current drive circuits 26 to 28 is expressed by Equation 6. become. The power loss in Equation 6 is about 160 mW, exceeding 100 percent of the total power consumption. Comparing Equation 4 with Equation 6, it can be seen that the power loss is greatly reduced by the voltage adjustment circuits 40-42.
0.5V × 100mA + 1.3V × 100mA × 2 = 310mW (6)

  As described above, according to the light emitting element driving apparatus 200, the voltage adjustment circuits 40 to 42 are different in the total forward voltages V36 to V38 of the light emitting element groups that are greatly different from each other due to the variation in the forward voltage of the light emitting elements. Can be absorbed. As a result, the voltage adjustment circuits 40 to 42 can make all the voltages V26 to V28 in the current driving circuit have a minimum necessary size for obtaining a desired light emission amount from the light emitting element groups 36 to 38. Thereby, since a voltage more than necessary is not applied to both ends of the current drive circuit, the power loss of the current drive circuit can be extremely reduced, and the power consumption of the current drive circuit can be minimized.

  When the current drive circuits 26 to 28 are formed on one semiconductor substrate, the heat generation of the semiconductor chip can be reduced, the quality of the semiconductor chip is improved, and more current is supplied on the same semiconductor substrate. A component including a drive circuit can be formed. Furthermore, since it is not necessary to sort out the light emitting elements, it is possible to reduce the number of man-hours for sorting and the cost of the light emitting element group, and thus the cost of the light emitting device including the light emitting element driving device 200 can be reduced.

  In addition to the variation in forward voltage in the light emitting elements constituting the light emitting element group, there are the following cases that cause all the forward voltages V36 to V38 of the light emitting element group to be different from each other. The first is a case where the drive currents J26 to J28 are different from each other. The second is a case where the number of LEDs in series differs for each light emitting element group 36-38. The third is a case where different types of LEDs having different forward voltages are used for each of the light emitting element groups 36 to 38. The fourth is a case where there is a difference in ambient temperature for each of the light emitting element groups 36 to 38. Even in such a case, all the forward voltages V36 to V38 are different from each other as a result, and the above-described effects can be obtained by the operation of the voltage adjustment circuits 40 to 42.

  Furthermore, the drive current generated by one current drive circuit tends to change depending on the voltage between both ends thereof. For example, the drive current tends to increase as the voltage across the terminal increases. However, since the voltage adjustment circuit connected to the current drive circuit can suppress fluctuations in the voltage across the two terminals, the relative accuracy of the drive current in one current drive circuit can be improved. In addition, since the minimum end-to-end voltage Vd is detected from the end-to-end voltages of the current drive circuit in the on state among the three current drive circuits 26 to 28, the drive current is specific to the current drive circuit in the on state. It tends to change depending on the characteristics of However, even if any of the three current drive circuits 26 to 28 is turned on, the voltage adjustment circuit connected to the current drive circuit in the on state suppresses the fluctuation of the voltage across the both ends. Can do. For this reason, the absolute accuracy of the drive current in the three current drive circuits 26 to 28 can be improved.

  When the minimum operating voltage across the current drive circuits 26 to 28 is different due to different drive current values in the current drive circuits 26 to 28, the operational amplifiers 29 to 31 are different from each other at the optimum predetermined values. The power consumption in the current drive circuits 26 to 28 may be optimized by receiving the voltage.

  In FIG. 1, the voltage adjustment circuits 40 to 42 are provided for each of the light emitting element groups 36 to 38. However, the voltage adjusting circuits 40 to 42 are not necessarily provided for all the light emitting element groups. A voltage adjustment circuit may be provided. For example, when the type of LED (and hence the forward voltage) is different for each of the light emitting element groups 36 to 38 or the series number of LEDs is different, it is effective to provide a voltage adjustment circuit in advance. Thus, a voltage adjustment circuit may be provided only for the light emitting element group. In addition, since the number of light emitting element groups is large, there is a case where it is not always necessary to provide a voltage adjustment circuit for every light emitting element group from the viewpoint of cost.

(Modification 1 of the first embodiment)
FIG. 2 is a circuit diagram showing a configuration of the light emitting element driving device 200A. The light emitting element driving device 200A is changed from the light emitting element driving device 200 of FIG. 1 in that the light emitting element driving device 200A further includes anode paths P36A, P37A, and P38A, and the voltage adjusting circuits 40A, 41A, and 42A are respectively voltage adjusting circuits 40 to 40. 42 is changed. Voltage adjustment circuit 40A includes an N-channel MOS transistor 11A and an operational amplifier 29A. Voltage adjustment circuit 41A includes an N-channel MOS transistor 12A and an operational amplifier 30A. Voltage adjustment circuit 42A includes an N-channel MOS transistor 13A and an operational amplifier 31A.

  The anode paths P36A to P38A are connected to the anode ends of the light emitting element groups 36 to 38, respectively. In the voltage adjustment circuit 40A, the drain of the N-channel MOS transistor 11A is connected to the output path PC2, and the source is connected to the anode path P36A. The inverting input terminal of the operational amplifier 29A is connected to the cathode path P36C and the detection path P26, the non-inverting input terminal is connected to the voltage source path P2, and the output terminal is connected to the gate of the N-channel MOS transistor 11A. . The N channel MOS transistors and operational amplifiers in each of the voltage adjustment circuits 41A to 42A are also connected in the same manner as in the voltage adjustment circuit 40A.

  The operational amplifiers 29A to 31A generate gate control signals V29A, V30A, and V31A, respectively. The gate control signals V29A to V31A are on average higher voltages than the gate control signals V29 to V31 of FIG. Thus, the light emitting element driving device 200A can obtain the same effect by the same operation as the light emitting element driving device 200 described above.

  N channel MOS transistors 11A to 13A may be connected between LEDs in light emitting element groups 36 to 38, respectively.

(Modification 2 of the first embodiment)
FIG. 3 is a circuit diagram showing a configuration of the light emitting element driving apparatus 200B. The light emitting element driving device 200A is changed from the light emitting element driving device 200 of FIG. 1 in that the voltage adjustment circuits 40B, 41B, and 42B are changed from the voltage adjustment circuits 40 to 42, respectively. Voltage adjustment circuit 40B includes a P-channel MOS (Positive channel Metal Oxide Semiconductor) transistor 51 and an operational amplifier 54. Voltage adjustment circuit 41B includes a P-channel MOS transistor 52 and an operational amplifier 55. Voltage adjustment circuit 42B includes a P-channel MOS transistor 53 and an operational amplifier 56.

  In the voltage adjustment circuit 40B, the source of the P-channel MOS transistor 51 is connected to the cathode path P36C, and the drain is connected to the detection path P26 and to the non-inverting input terminal of the operational amplifier 54. The inverting input terminal of the operational amplifier 54 is connected to the voltage source path P 2, and the output terminal is connected to the gate of the P-channel MOS transistor 51. The P-channel MOS transistors and the operational amplifiers in the voltage adjustment circuits 41B to 42B are also connected in the same manner as in the voltage adjustment circuit 40B.

  The operational amplifiers 54 to 56 generate gate control signals V54, V55, and V56, respectively. The gate control signals V54 to V56 are signals obtained by inverting the gate control signals V29 to V31 of FIG. Thus, the light emitting element driving device 200B can obtain the same effect by the same operation as the light emitting element driving device 200 described above.

(Modification 3 of the first embodiment)
FIG. 4 is a circuit diagram showing a configuration of the light emitting element driving apparatus 200C. The point that the light emitting element driving device 200C is changed from the light emitting element driving device 200B of FIG. 3 is that the voltage adjustment circuits 40C, 41C, and 42C are changed from the voltage adjustment circuits 40B to 42B, respectively. Voltage adjustment circuit 40C includes a P-channel MOS transistor 51C and an operational amplifier 54C. Voltage adjustment circuit 41C includes a P-channel MOS transistor 52C and an operational amplifier 55C. Voltage adjustment circuit 42C includes a P-channel MOS transistor 53C and an operational amplifier 56C. P-channel MOS transistors 51C-53C are connected between output path PC2 and anode paths P36A, P37A, P38A, respectively. The operational amplifiers 54C to 56C are connected instead of the operational amplifiers 54 to 56 of FIG.

  The operational amplifiers 54C to 56C generate gate control signals V54C, V55C, and V56C, respectively. The gate control signals V54C to V56C are on average higher voltages than the gate control signals V54 to V56 of FIG. Thus, the light emitting element driving device 200C can obtain the same effect by the same operation as the light emitting element driving device 200B described above.

  P channel MOS transistors 51C to 53C may be connected between LEDs in light emitting element groups 36 to 38, respectively.

(Modification 4 of the first embodiment)
FIG. 5 is a circuit diagram showing a configuration of the light emitting element driving apparatus 200D. The light emitting element driving device 200D is changed from the light emitting element driving device 200 in FIG. 1 in that the driving voltage generation circuit 210D is changed from the driving voltage generation circuit 210. The drive voltage generation circuit 210D controls the converter control circuit 220D in place of the converter control circuit 220 in FIG. 1, the DC / DC converter 230D in place of the DC / DC converter 230 in FIG. 1, and the control path P35 in FIG. A path P35D is included. Converter control circuit 220D includes a PWM control circuit 221D instead of PWM control circuit 221 in FIG. The PWM control circuit 221D includes a comparator 35D instead of the comparator 35 of FIG. DC / DC converter 230D includes a P-channel MOS transistor 64, a Schottky diode 66, and an inductor 65 instead of inductor 8, N-channel MOS transistor 10 and Schottky diode 9 in FIG.

  The source of P channel MOS transistor 64 is connected to voltage source path PC1, the gate is connected to control path P35D, and the drain is connected to the anode of Schottky diode 66 and one end of inductor 65. The cathode of the Schottky diode 66 is grounded, and the other end of the inductor 65 is connected to the output path PC2.

  The comparator 35D receives the error signal Ve at the inverting input terminal, receives the triangular wave signal Vc at the non-inverting input terminal, generates a PWM control signal V35D representing the comparison result between the error signal Ve and the triangular wave signal Vc, and controls the control path. Output to P35D. The PWM control circuit 221D generates a PWM control signal V35D by performing pulse width modulation on the pulse signal that repeats at the period of the triangular wave signal Vc so that the high level period becomes shorter as the error signal Ve increases. As the minimum terminal voltage Vd becomes smaller than the predetermined voltage V3, the high level period of the PWM control signal V35 becomes shorter, and as the minimum terminal voltage Vd becomes larger than the predetermined voltage V3, the period of the high level of the PWM control signal V35. Becomes longer.

  P-channel MOS transistor 64 receives PWM control signal V35D from control path P35D at its gate, and is turned on / off by PWM control signal V35D. Inductor 65 charges and discharges the electric power from voltage source 1 by the ON operation and OFF operation of P channel MOS transistor 64, respectively. The Schottky diode 9 cuts off the inductor 65 from the ground potential during charging, and allows the electric power discharged during discharging to pass forward through the ground.

  As described above, the DC / DC converter 230D converts the predetermined voltage VC1 into the drive voltage VC2, supplies it to the light emitting element groups 36 to 38 via the output path PC2, and receives the PWM control signal V35D via the control path P35D. Based on the above, the drive voltage VC2 is adjusted. The DC / DC converter 230D is a step-down converter that generates a drive voltage VC2 smaller than the predetermined voltage VC1.

  As the high-level period of the PWM control signal V35D becomes shorter, the ON period of the P-channel MOS transistor 64 becomes longer, so the charging period of the inductor 65 becomes longer, and as a result, the drive voltage VC2 becomes higher. On the other hand, as the high level period of the PWM control signal V35 becomes longer, the ON period of the P-channel MOS transistor 64 becomes shorter, so the charging period of the inductor 8 becomes shorter, and as a result, the driving voltage VC2 becomes smaller.

  As described above, the light emitting element driving device 200D can make the relationship between the error signal Ve and the driving voltage VC2 the same as that of the above-described light emitting element driving device 200, and thus can obtain the same effect. it can.

  The drive voltage generation circuit 210D may be replaced with the drive voltage generation circuit 210 in FIGS. 2 to 4 and FIGS. 6 to 9 described later.

(Second Embodiment)
FIG. 6 is a circuit diagram showing a configuration of the light emitting element driving apparatus 200E. The light emitting element driving device 200E is changed from the light emitting element driving device 200 of FIG. 1 in that the voltage adjustment circuits 40E, 41E, and 42E are changed from the voltage adjustment circuits 40 to 42, respectively, and the voltage source path P71 is the voltage source path. This is a change from P2. In addition, the voltage source 71 of FIG. 6 is changed from the voltage source 2 of FIG. Other configurations, operations, and effects in the second embodiment are the same as those in the first embodiment, and thus description thereof is omitted.

  Voltage adjustment circuit 40E includes an N-channel MOS transistor 75, a resistor 78, and a comparator 72. Voltage adjustment circuit 41E includes an N-channel MOS transistor 76, a resistor 79, and a comparator 73. Voltage adjustment circuit 42E includes an N-channel MOS transistor 77, a resistor 80, and a comparator 74. In the voltage adjustment circuit 40E, the drain of the N-channel MOS transistor 75 is connected to the inverting input terminal of the comparator 72, one end of the resistor 78, and the cathode path P36C, and the source is connected to the other end of the resistor 78 and the detection path P26. Connected. The non-inverting input terminal of the comparator 72 is connected to the voltage source path P 71, and the output terminal is connected to the gate of the N-channel MOS transistor 75. The N channel MOS transistors and the comparators in the voltage adjustment circuits 41E to 42E are also connected in the same manner as in the voltage adjustment circuit 40E.

  The voltage source 71 is connected between the voltage source path P71 and the voltage source 3, and generates a predetermined voltage to generate a predetermined voltage V71 representing a sum voltage of the predetermined voltage V3 and the predetermined voltage of the voltage source 71. Output to the route P71. The voltage source 71 may be connected between the voltage source path P71 and the ground separately from the voltage source 3 to generate the predetermined voltage V71.

  In the voltage adjustment circuit 40E, the comparator 72 receives the cathode voltage V36C at the inverting input terminal and also receives the predetermined voltage V71 from the voltage source path P71 at the non-inverting input terminal, and compares the cathode voltage V36C with the predetermined voltage V71. A gate control signal V72 representing is generated. N channel MOS transistor 75 receives gate control signal V72 at its gate and is turned on / off. When the cathode voltage V36C is higher than the predetermined voltage V71, the gate control signal V72 is at a low level, so that the N-channel MOS transistor 75 is turned off. As a result, the voltage adjustment circuit 40E sets the adjustment voltage V40E to a multiplication value of the drive current J26 and the resistor 78. When the cathode voltage V36C is lower than the predetermined voltage V71, the gate control signal V72 is at a high level, so that the N-channel MOS transistor 75 is turned on. As a result, voltage adjustment circuit 40E sets adjustment voltage V40E to a multiplication value of drive current J26 and the ON resistance of N channel MOS transistor 75 (that is, the ON voltage of N channel MOS transistor 75). Each of the voltage adjustment circuits 41E to 42E operates in the same manner as the voltage adjustment circuit 40E. That is, the comparators 73 to 74 generate gate control signals V73 to V74, respectively. N channel MOS transistors 76-77 receive gate control signals V73-V74 at their gates, respectively, and are turned on / off.

  The N channel MOS transistor is turned on in the minimum voltage path and turned off in the non-minimum voltage path. As a result, as in the case described above with reference to FIGS. 1 to 5 (first embodiment), the adjustment voltage is the ON voltage of the MOS transistor in the minimum voltage path. The drive voltage generation circuit 210 adjusts the voltage across the minimum voltage path to the minimum operable voltage across the voltage path. At the same time, the drive voltage generation circuit 210 sets the drive voltage VC2 so that the drive voltage VC2 is equal to the voltage obtained by adding the operable minimum both-end voltage, the adjustment voltage in the ON state, and the total forward voltage of the minimum voltage path. Adjust.

  The resistance value of the resistors 78 to 80 is the remaining voltage obtained by subtracting the operable minimum terminal voltage and the total forward voltage of the non-minimum voltage path from the adjusted drive voltage VC2 obtained by multiplying the resistance value by the drive current. It is set to be smaller than that. Further, the resistance values of resistors 78-80 are set to be larger than the ON voltage of the N-channel MOS transistor. The predetermined voltage V71 is set larger than the cathode voltage in the minimum voltage path and smaller than the cathode voltage in the non-minimum voltage path. By setting in this way, the N-channel MOS transistor is turned on in the minimum voltage path and turned off in the non-minimum voltage path. Further, in the non-minimum voltage path, the voltage adjustment circuit decreases the voltage across the terminal in the direction of the minimum operable voltage across the terminal. Note that the N-channel MOS transistor in the non-minimum voltage path may be turned on due to variations in the forward voltage of the light emitting element group in the non-minimum voltage path.

Next, an actual operation example of the light emitting element driving device 200E will be described. The predetermined voltage V3 is 0.5V, the predetermined voltage V71 is 0.9V (that is, the voltage generated by the voltage source 71 is 0.4V), the drive currents J26 to J28 are 100 mA, and the ON resistances of the N-channel MOS transistors 75 to 77 Is 50 m ohms. The same kind of LEDs are used for the light emitting elements 14 to 25. The variation width of the forward voltage is 2.9 V ± 0.1 V (at a driving current of 100 mA), the forward voltage of the LEDs of the light emitting element group 36 is 3 V, and the forward voltage of the LEDs of the light emitting element groups 37 to 38 is all. Are both 2.8V. Further, the above-described minimum operable voltage is 0.5 V, and the resistance values of the resistors 78 to 80 are 4 ohms.
Become.

  When set in this way, the total forward voltage V36 is 3V × 4 = 12V, and the total forward voltages V37 and V38 are 2.8V × 4 = 11.2V. Therefore, the path through the light emitting element group 36, the cathode path P36C, the voltage adjustment circuit 40E, and the detection path P26 becomes the minimum voltage path, and the two paths passing through the other light emitting element groups 37 and 38 are non-minimum voltage paths. It becomes. The both-ends voltage V26 in the minimum voltage path is equal to the predetermined voltage V3 = 0.5V. The N-channel MOS transistor 75 is turned on (saturated) having an on-resistance of 50 mΩ, and the drain-source voltage (adjusted voltage V40E) is 50 mΩ × 100 mA = 5 mV. Since the resistor 78 is sufficiently larger than the on-resistance, the influence on the adjustment voltage V40E is omitted. Therefore, the cathode voltage V36C is 0.5V + 5 mV = 0.505V, and the drive voltage VC2 is 0.505V + 12V = 12.505V. On the other hand, the cathode voltages V37C to V38C in the non-minimum voltage path are 12.505V-11.2V = 1.305V. Since the comparators 73 to 74 receive the predetermined voltage V71 = 0.9V at the non-inverting input terminal and the cathode voltages V37C to V38C = 1.305V at the inverting input terminals, respectively, the gate control signal V72 is at the low level. Therefore, N-channel MOS transistors 76 to 77 are turned off, and both-end voltages V27 to V28 are 1.305 V-4 ohms × 100 mA = 0.905 V.

As a result, the power consumption in the current drive circuits 26 to 28 is as shown in Equation 7, and although the degree of reduction in power loss is small compared to Equation 4 described in the first embodiment, the voltage adjustment circuits 81 to 83 The power loss is reduced compared to Equation 6 in the case where it is not provided.
0.5V × 100mA + 0.905V × 100mA × 2 = 231mW (7)

  The set value such as 0.4 V of the voltage source 71 and 4 ohms of the resistors 78 to 80 has a variation width of 0.8 V between the values 12 V to 11.2 V of the total forward voltages V36 to V38 and the voltage V26 to V28 at both ends. This is the set value when absorbing to about 0.4V and half. When the cathode voltages V36C to V38C are larger than the minimum operable both-end voltage 0.5V by about 0.4V or more, the voltage adjustment circuits 41E to 42E lower the both-end voltages V27 to V28 by 0.4V due to a voltage drop due to a resistance of 4 ohms. I am letting. These set values can be changed according to desired conditions.

  As described above, according to the light emitting element driving device 200E, the voltage adjustment circuits 40E to 42E configured by comparators that are cheaper than the operational amplifier reduce the voltages V26 to V28 across the current driving circuits 26 to 28, thereby reducing the current. The power consumption of the drive circuit can be reduced.

  When the minimum operating voltage across the current drive circuits 26 to 28 is different due to different drive current values in the current drive circuits 26 to 28, the comparators 72 to 74 are different from each other for the non-inverting input terminals. The power consumption in the current drive circuits 26 to 28 may be optimized by receiving a predetermined voltage.

  The connection destinations of the non-inverting input terminals of the comparators 72 to 74 may be replaced with the connection destinations of the inverting input terminals, and the N channel MOS transistors 75 to 77 may be replaced with P channel MOS transistors.

  The resistors 78 to 80 may be replaced with a MOS transistor having an equivalent on-resistance or a diode that generates an equivalent voltage drop.

(Modification 1 of 2nd Embodiment)
FIG. 7 is a circuit diagram showing a configuration of the light emitting element driving apparatus 200F. The light emitting element driving device 200F is changed from the light emitting element driving device 200E of FIG. 6 in that the voltage adjustment circuits 40F, 41F, and 42F are changed from the voltage adjustment circuits 40E to 42E, respectively. Voltage adjustment circuit 40F includes an N channel MOS transistor 75, an N channel MOS transistor 84, a NOT circuit 87, and a comparator 72. Voltage adjustment circuit 41F includes an N channel MOS transistor 76, an N channel MOS transistor 85, a NOT circuit 88, and a comparator 73. Voltage adjustment circuit 42F includes an N channel MOS transistor 77, an N channel MOS transistor 86, a NOT circuit 89, and a comparator 74.

  In voltage adjustment circuit 40F, the drains of N channel MOS transistor 75 and N channel MOS transistor 84 are connected to the inverting input terminal of comparator 72 and cathode path P36C. The sources of N channel MOS transistor 75 and N channel MOS transistor 84 are connected to detection path P26. The non-inverting input terminal of the comparator 72 is connected to the voltage source path P71, and the output terminal is connected to the gate of the N-channel MOS transistor 75 and the input terminal of the NOT circuit 87. The output terminal of NOT circuit 87 is connected to the gate of N channel MOS transistor 84. N channel MOS transistors and comparators in each of the voltage adjustment circuits 41F to 42F are also connected in the same manner as in the voltage adjustment circuit 40F.

  The NOT circuit 87 inverts the gate control signal V72 and generates an inverted gate control signal V87. The NOT circuit 88 inverts the gate control signal V73 to generate an inverted gate control signal V88. The NOT circuit 89 inverts the gate control signal V74 to generate an inverted gate control signal V89. N channel MOS transistors 84-86 receive inverted gate control signals V87-V89 at their gates, respectively, and are turned on / off. The on / off operations of N channel MOS transistors 84-86 are in opposite phases to the on / off operations of N channel MOS transistors 75-77, respectively.

  The on resistances of N channel MOS transistors 84 to 86 are set larger than the on resistances of N channel MOS transistors 75 to 77, respectively. For example, if the ON resistances of N channel MOS transistors 84 to 86 are made equal to the resistance values (for example, 4 ohms) of resistors 78 to 80 in FIG. 6, light emitting element driving device 200F is similar to light emitting element driving device 200E described above. The same effect can be obtained by simple operation.

(Modification 2 of the second embodiment)
FIG. 8 is a circuit diagram showing a configuration of the light emitting element driving apparatus 200G. The light emitting element driving device 200G is changed from the light emitting element driving device 200E of FIG. 6 in that the voltage adjustment circuits 40G, 41G, and 42G are changed from the voltage adjustment circuits 40E to 42E, respectively, and the voltage source path P105 is added. It is a point. In addition, the voltage source 105 of FIG. 8 is added. Voltage adjustment circuit 40G further includes an N-channel MOS transistor 99, a resistor 93, and a comparator 96 in addition to the components of voltage adjustment circuit 40E. Voltage adjustment circuit 41G further includes an N-channel MOS transistor 100, a resistor 94, and a comparator 97 in addition to the components of voltage adjustment circuit 41E. Voltage adjustment circuit 42G further includes an N-channel MOS transistor 101, a resistor 95, and a comparator 98 in addition to the components of voltage adjustment circuit 42E.

  In the voltage adjustment circuit 40G, the source of the N-channel MOS transistor 99 is connected to one end of the resistor 93 and the detection path P26, and the drain is the other end of the resistor 93, one end of the resistor 78, and the source of the N-channel MOS transistor 75. Connected to. The drain of N channel MOS transistor 75 is connected to the other end of resistor 78, the inverting input terminal of comparator 72, the inverting input terminal of comparator 96, and cathode path P36C. The non-inverting input terminal of the comparator 72 is connected to the voltage source path P71, and the non-inverting input terminal of the comparator 96 is connected to the voltage source path P105. The output terminal of comparator 72 is connected to the gate of N channel MOS transistor 75, and the output terminal of comparator 96 is connected to the gate of N channel MOS transistor 99. The two N-channel MOS transistors and the two comparators in each of the voltage adjustment circuits 41G to 42G are also connected in the same manner as in the voltage adjustment circuit 40G.

  The voltage source 105 is connected between the voltage source path P105 and the voltage source path P71, and generates a predetermined voltage, thereby generating a predetermined voltage V105 representing a sum voltage of the predetermined voltage V71 and the predetermined voltage of the voltage source 105. Output to the source path P105.

  The operations of comparator 96 and N channel MOS transistor 99 are the same as those of comparator 72 and N channel MOS transistor 75. That is, the comparator 96 receives the cathode voltage V36C at the inverting input terminal, receives the predetermined voltage V105 from the voltage source path P105 at the non-inverting input terminal, and performs gate control representing the comparison result between the cathode voltage V36C and the predetermined voltage V105. A signal V96 is generated. N channel MOS transistor 99 receives gate control signal V96 at its gate and is turned on / off. Similarly, the comparator 97 generates a gate control signal V97, and the N-channel MOS transistor 100 is turned on / off by the gate control signal V97. Similarly, the comparator 98 generates a gate control signal V98, and the N-channel MOS transistor 101 is turned on / off by the gate control signal V98.

  In voltage adjustment circuit 40G, N-channel MOS transistors 99 and 75 are turned on when cathode voltage V36C is lower than predetermined voltages V105 and V71. In this case, adjustment voltage V40G is a product of the sum of the on resistances of both N-channel MOS transistors 99 and 75 and drive current J26. When cathode voltage V36C is smaller than predetermined voltage V105 and larger than predetermined voltage V71, N channel MOS transistor 99 is turned on and N channel MOS transistor 75 is turned off. In this case, the adjustment voltage V40G is a multiplication value of the sum of the ON resistance of the N-channel MOS transistor 99 and the resistance 78 and the drive current J26. When cathode voltage V36C is higher than predetermined voltages V105 and V71, N-channel MOS transistors 99 and 75 are turned off. In this case, the adjustment voltage V40G is a product of the sum of the resistance values of the resistors 93 and 78 and the drive current J26. Each of the voltage adjustment circuits 41G to 42G operates in the same manner as the voltage adjustment circuit 40G.

  As described above, the light emitting element driving device 200G further increases the difference in the total forward voltages V36 to V38 by increasing the number of steps that can be adjusted by each of the adjustment voltages V40G, V41G, and V42G as compared with the light emitting element driving device 200E. Absorb. Thereby, the light emitting element driving device 200G can further reduce the both-end voltages V26 to V28.

(Third embodiment)
FIG. 9 is a circuit diagram showing a configuration of the light emitting element driving apparatus 200H. The light emitting element driving device 200H is changed from the light emitting element driving device 200 in FIG. 1. First, the driving voltage generating circuit 210H is changed from the driving voltage generating circuit 210. The second point is that the path from the output path PC2 to the drive voltage generation circuit 210H is changed from the path from the detection paths P26 to P28 to the drive voltage generation circuit 210. The third point is that the voltage source path P106 is changed from the voltage source path P2. In addition, the voltage source 106 of FIG. 9 is changed from the voltage source 2 of FIG. Other configurations, operations, and effects in the third embodiment are the same as those in the first embodiment, and thus description thereof is omitted.

  The voltage source 106 is connected between the voltage source path P106 and the ground, generates a predetermined voltage V106, and outputs it to the voltage source path P106. The non-inverting input terminals of the operational amplifiers 29 to 31 are connected to the voltage source path P106. The operational amplifier 29 receives the predetermined voltage V106 from the voltage source path P106 at the non-inverting input terminal, and amplifies the voltage obtained by subtracting the both-end voltage V26 from the predetermined voltage V106, thereby generating the gate control signal V29. Each of the operational amplifiers 29 to 31 operates in the same manner as the operational amplifier 29.

  Drive voltage generation circuit 210H includes converter control circuit 220H instead of converter control circuit 220 in FIG. Converter control circuit 220 </ b> H includes a feedback circuit 222 instead of minimum voltage detection circuit 32. Feedback circuit 222 includes resistors 107 and 108. One end of the resistor 107 is connected to the output path PC2, and the other end is connected to one end of the resistor 108 and the inverting input terminal of the error amplifier 33. The other end of the resistor 108 is grounded. The feedback circuit 222 divides the drive voltage VC2 at a predetermined ratio to generate a divided voltage Vd1. The error amplifier 33 receives the divided voltage Vd1 at the inverting input terminal, receives the predetermined voltage V3 from the voltage source path P3 at the non-inverting input terminal, and amplifies the voltage obtained by subtracting the divided voltage Vd1 from the predetermined voltage V3. An error signal Ve is generated.

Here, it is assumed that a path (corresponding to the minimum voltage path in the first embodiment) in which the total forward voltage is the maximum among all the forward voltages V36 to V38 is a path that passes through the light emitting element group 36. The resistance values of the resistors 107 and 108 are R107 and R108, the minimum operable voltage is VMIN, and the ON resistance of the N-channel MOS transistor 11 is RON. In this case, if the predetermined voltage V106 is set as shown in Expression 8, the both-end voltages V26 to V28 are equal to or higher than the operable minimum both-end voltage VMIN and close to the operable minimum both-end voltage VMIN. Furthermore, if the drive voltage generation circuit 210H adjusts the drive voltage VC2 as shown in Equation 9, the light emitting element groups 36 to 38 obtain a desired light emission amount and reduce the power loss of the current drive circuits 26 to 28. Can do. That is, if each of the resistance values R107 and R108 and the predetermined voltage V3 are set so that Expression 10 is satisfied, the drive voltage VC2 can be expressed as Expression 9 by feedback control in the drive voltage generation circuit 210H.
V106 ≧ VMIN (8)
VC2 ≧ V36 + RON × J26 + VMIN (9)
VC2 = V3 × (R107 + R108) / R108 (10)

  9 is an example in which the configuration of FIG. 1 is changed. However, similar effects can be obtained even if the configuration of FIGS. 2 to 8 is changed.

(Summary of embodiment)
As described above, according to the light emitting element driving apparatus and the light emitting apparatus, the voltage adjustment circuit causes the difference in the total forward voltage of the N light emitting element groups that are greatly different from each other due to variations in the forward voltage of the light emitting elements. Can be absorbed. As a result, the voltage adjustment circuit can set all the voltages across the N current drive circuits to the minimum necessary level for obtaining a desired light emission amount from the light emitting element group. Thereby, since a voltage more than necessary is not applied to both ends of the current drive circuit, the power loss of the current drive circuit can be made extremely small and the power consumption of the current drive circuit can be minimized.

  When N current driving circuits are formed on one semiconductor substrate, the heat generation of the semiconductor chip can be reduced, the quality of the semiconductor chip is improved, and more current is supplied on the same semiconductor substrate. A component including a drive circuit can be formed. Further, since it is not necessary to sort out the light emitting elements, it is possible to reduce the man-hours for sorting and the cost of the light emitting element group, and thus it is possible to reduce the cost of the light emitting device including the light emitting element driving device.

  In addition to the variation in forward voltage among the light emitting elements constituting the light emitting element group, there are the following cases that cause the total forward voltages of the N light emitting element groups to be different from each other. The first is a case where N system drive currents are different from each other. The second is a case where the number of light emitting elements in series differs for each of the N light emitting element groups. The third case is a case where different types of light emitting elements having different forward voltages are used for each of the N light emitting element groups. The fourth case is when there is a difference in ambient temperature for each of the N light emitting element groups. Even in such a case, N total forward voltages are different from each other as a result, and the above-described effect can be obtained by the operation of the voltage adjustment circuit.

  Furthermore, the drive current generated by one current drive circuit tends to change depending on the voltage between both ends thereof. For example, the drive current tends to increase as the voltage across the terminal increases. However, since the voltage adjustment circuit connected to the current drive circuit can suppress fluctuations in the voltage across the two terminals, the relative accuracy of the drive current in one current drive circuit can be improved. In addition, since the minimum voltage across both ends of the current drive circuit in the on state is detected among the N current drive circuits, the drive current depends on the specific characteristics of the current drive circuit that is in the on state. Tend to change. However, even if any of the N current drive circuits is turned on, the voltage adjustment circuit connected to the current drive circuit in the on state can suppress the fluctuation of the voltage across the both ends. For this reason, the absolute accuracy of the driving current in the N current driving circuits can be improved.

  The light-emitting device including the light-emitting element driving device according to the present invention includes, for example, a backlight for liquid crystal display devices such as a liquid crystal television and a notebook computer, and further, an indoor lighting device and various in-vehicle lighting devices including a headlight. There is a lighting device. The light emitting element driving device according to the present invention is useful as an LED driver IC for driving such a light emitting device.

  In the above, the described numbers are exemplified for specifically explaining the present invention, and the present invention is not limited to the illustrated numbers. Further, the logic level represented by the high level / low level is exemplified for specifically explaining the present invention, and if the configuration of the logic circuit is changed, the logic level different from the exemplified logic level is shown. Equivalent results can be obtained by combining the above. Moreover, the component comprised by hardware can also be comprised by software, and the component comprised by software can also be comprised by hardware. Furthermore, by reconfiguring some of all the constituent elements in the above-described embodiment in a combination different from that in the above-described embodiment, it is possible to achieve effects of different combinations.

  The above description of the embodiments is merely an example embodying the present invention. The present invention is not limited to these examples, and can be easily configured by those skilled in the art using the technology of the present invention. It can be expanded to various examples.

  The present invention can be used for a light emitting element driving device and a light emitting device.

1, 2, 3, 71, 105-106 Voltage source 4-6 Capacitor 7, 78-80, 93-95, 107-108 Resistor 8, 65 Inductor 9, 66 Schottky diode 10-13, 10A-13A, 75 -77, 84-86, 99-101 N-channel MOS transistor 14-25 LED (light emitting element)
26-28 Current drive circuit 29-31, 29A-31A, 54-56, 54C-56C Operational amplifier 32 Minimum voltage detection circuit 33 Error amplifier 34 Triangular wave generator 35, 35D, 63, 72-74, 96-98 Comparator 36 -38 Light emitting element group 39 Current drive circuit group 40-42, 40A-42A, 40B-42B, 40C-42C, 40E-42E, 40F-42F, 40G-42G Voltage adjustment circuit 51-53, 51C-53C, 64P Channel MOS transistors 87 to 89 NOT circuit 200, 200A, 200B, 200C, 200D, 200E, 200F, 200G, 200H Light emitting element driving device 210, 210D, 210H Drive voltage generation circuit 220, 220D Converter control circuit 221, 221D PWM control circuit 230, 230D DC / DC converter

Claims (6)

A first current drive circuit for current-driving the first light emitting element group;
A second current drive circuit for current-driving the second light emitting element group;
A drive voltage generating circuit for supplying a drive voltage to the first light emitting element group and the second light emitting element group;
A first voltage adjusting circuit that adjusts a voltage across the first current driving circuit by inputting a voltage between the first light emitting element group and the first current driving circuit and a first reference voltage; ,
A second voltage adjusting circuit for adjusting a voltage across the second current driving circuit by inputting a voltage between the second light emitting element group and the second current driving circuit and a second reference voltage; ,
The light emitting element drive device which has. The first voltage adjustment circuit includes:
A transistor interposed in a path between the drive voltage generation circuit and the first current drive circuit;
An operational amplifier that controls the transistor with the voltage between the first light emitting element group and the first current driving circuit as one input and the first reference voltage as another input;
The light-emitting element driving device according to claim 1, comprising: The first voltage adjustment circuit includes:
A resistance component (or diode) interposed in a path between the drive voltage generation circuit and the first current drive circuit;
A transistor connected in parallel with the resistance component (or diode);
A comparator that controls the transistor using the voltage between the first light emitting element group and the first current driving circuit as one input and the first reference voltage as another input;
The light-emitting element driving device according to claim 1, comprising: The first voltage adjustment circuit includes:
A first transistor interposed in a path between the drive voltage generation circuit and the first current drive circuit;
A second transistor connected in parallel with the first transistor and having a different on-resistance from the first transistor;
A comparator that controls the first transistor and the second transistor with the voltage between the first light emitting element group and the first current driving circuit as one input and the first reference voltage as another input;
The light-emitting element driving device according to claim 1, comprising:
A minimum voltage detection circuit for detecting a minimum voltage from among the voltages across the plurality of current drive circuits including the current drive circuit;
The drive voltage generation circuit supplies the drive voltage to the first light emitting element group and the second light emitting element group so that the minimum voltage becomes a first predetermined voltage. Light emitting element driving device. The drive voltage generation circuit includes:
An error amplifier having an output of the minimum voltage detection circuit as one input and a second predetermined potential as a reference of the first predetermined voltage as another input;
A PWM generation circuit that generates a pulse width modulated PWM signal based on the output of the error amplifier;
A DCDC converter that generates a voltage based on the PWM signal;
The light-emitting element driving device according to claim 5, comprising:

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