JP2010278698A - Radio wave receiver - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a radio wave receiver which achieves shortening of time required for antenna adjustment processing without deteriorating the accuracy of the antenna adjustment processing. <P>SOLUTION: The radio wave receiver includes a tuning means that changes the frequency characteristic of an antenna and an oscillating means that oscillates the antenna and a circuit part of the tuning means, the radio wave receiver further includes: a first scan control means for obtaining an adjustment point of the tuning means at which a reception processing means extracts an oscillation signal by switching setting of the tuning means at a first switching cycle over a first adjustment range; and a second scan control means for obtaining an adjustment point of the tuning means at which the reception processing means extracts more oscillation signals by switching the setting of the tuning means at a second switching cycle longer than the first switching cycle over a second adjustment range set narrower than the first adjustment range. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a radio wave receiving apparatus including an antenna and tuning means.

  There have been proposed communication apparatuses that change the frequency characteristics of a tuning circuit connected to an antenna and tune the resonance frequency of the antenna to the frequency of a desired wave (for example, Patent Documents 1 and 2).

JP 11-31958 A Japanese Patent Laid-Open No. 2000-231609

  The present inventors generate an oscillation signal having a frequency substantially equal to the resonance frequency of the antenna by applying positive feedback to the antenna and the tuning circuit, and use this oscillation signal to adjust the antenna. A receiving apparatus is being developed (Japanese Patent Application No. 2009-105435).

  According to the antenna adjustment processing of this method, when the resonance frequency of the antenna becomes substantially equal to the frequency of the desired wave by adjusting the tuning circuit, that is, when the frequency of the oscillation signal becomes equal to the frequency of the desired wave. The oscillation signal passes through the narrow band filter of the reception circuit and is detected as an increase in the level of the reception signal. Therefore, by switching the tuning circuit setting while monitoring the reception signal level and searching for a setting state in which the reception signal level increases, it is possible to obtain the tuning circuit setting that matches the frequency of the desired wave. . With this method, antenna adjustment processing can be performed without supplying a signal having the same frequency as the desired wave from the outside.

  In the method of adjusting the antenna by using the oscillation signal generated in the antenna and the tuning circuit, if the resonance frequency of the antenna is separated from the frequency of the desired wave by a relatively small amount, the oscillation signal is Since it is greatly attenuated by the narrow band filter, it is difficult to detect as an increase in the level of the received signal.

  Therefore, in the above system, it is necessary to increase the number of tuning capacitors that can be connected / disconnected by the tuning circuit and to reduce the capacitance adjustment interval in the tuning circuit.

  However, if the number of tuning capacitors is increased and the capacitance adjustment interval is reduced, the number of tuning capacitors can be repeated in order to repeatedly detect the level of the received signal while sequentially switching the tuning capacitor connection pattern over the entire adjustment range of the tuning circuit. There is a problem that the processing time is greatly increased as much as the number of times is increased.

  On the other hand, after switching the tuning capacitor connection pattern, the frequency of the oscillation signal changes, and this oscillation signal passes through the reception circuit or is attenuated by the reception circuit, and is reflected stably in the level of the reception signal. A certain amount of time interval is required until the time is reached due to the delay of the narrow band filter or the like. Therefore, simply increasing the switching speed of the capacitor to reduce the antenna adjustment processing time causes a problem that the adjustment accuracy of the tuning circuit is lowered.

  An object of the present invention is to reduce the processing time without degrading the accuracy of antenna adjustment processing in a method of performing antenna adjustment processing using oscillation signals generated in the antenna and tuning circuit portions. is there.

In order to achieve the above object, the invention according to claim 1
An antenna for receiving radio waves,
Tuning means capable of changing the frequency characteristics of the antenna;
Oscillating means capable of oscillating circuit portions of the antenna and the tuning means;
A reception processing means for performing signal processing by extracting a signal of a desired wave from the reception signals received from the antenna;
A control means for generating an oscillation signal in the circuit part by the oscillation means and switching the setting of the tuning means to search for a setting state of the tuning means in which the oscillation signal is extracted by the reception processing means;
With
The control means includes
A first scan control means for obtaining an adjustment point of the tuning means for extracting the oscillation signal by the reception processing means by switching the setting of the tuning means over a first adjustment range at a first switching period; ,
The tuning point includes the adjustment point obtained by the first scan control means, and spans a second adjustment range that is set narrower than the first adjustment range, with a second switching period that is longer than the first switching period. A second scan control means for obtaining an adjustment point of the tuning means for extracting more of the oscillation signal by the reception processing means by switching the setting of the means;
It is characterized by having.

The invention described in claim 2 is the radio wave receiver according to claim 1,
The tuning means includes
A plurality of tuning capacitors made connectable to the signal line of the antenna;
A plurality of switches for switching connection states of the plurality of tuning capacitors;
With
The resonance frequency of the antenna can be changed stepwise by switching the plurality of switches.

The invention described in claim 3 is the radio wave receiving apparatus according to claim 1,
In the second adjustment range, the resonance frequency of the antenna is sequentially changed before and after the adjustment point of the tuning unit in which the extraction amount of the oscillation signal in the reception processing unit is determined to be maximum by the first scan control unit. A predetermined amount of adjustment range is added and set.

The invention according to claim 4 is the radio wave receiving apparatus according to claim 1,
The reception processing means includes a band filter for extracting a desired wave signal,
The first switching period is set to a time shorter than the delay time of the bandpass filter.

The invention described in claim 5 is the radio wave receiver according to claim 1,
The reception processing means is configured to be capable of signal processing for each of a plurality of reception channels,
The tuning means has an adjustment range in which the frequency characteristics of the antenna can be tuned in all frequency bands of the plurality of reception channels.

  According to the present invention, the antenna adjustment process can be performed using the oscillation signal generated in the antenna and the tuning circuit, and the time required for the adjustment process can be shortened without reducing the accuracy of the adjustment process. .

1 is a block diagram showing an entire radio wave receiving apparatus according to an embodiment of the present invention. The operation content of the antenna adjustment process is shown, (a) is an explanatory diagram showing the operation content of the first scan, and (b) is an explanatory diagram showing the operation content of the second scan. It is a flowchart which shows the process sequence of an antenna adjustment process. It is the chart which compared the time concerning the antenna adjustment process of the high-speed system of embodiment of this invention, and the antenna adjustment process of a normal system.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram showing the entire radio wave receiving apparatus according to an embodiment of the present invention.

  The radio wave receiver of this embodiment is built in, for example, a wristwatch, a table clock, a wall clock, etc., and is a standard of a plurality of frequencies (for example, 40 kHz, 60 kHz, 68.5 kHz, 75 kHz, 77.5 kHz) in Japan and overseas. Radio wave reception and time code signal demodulation processing are performed.

  As shown in FIG. 1, this radio wave receiving apparatus has a loop oscillation in an antenna 1 that receives radio waves, a tuning circuit (tuning means) A that adjusts the frequency characteristics of the antenna 1, and circuit portions of the antenna 1 and the tuning circuit A. Feedback circuit B as an oscillating means capable of performing the operation, RF amplifier (high frequency amplifier) 2 for amplifying the received signal, mixer 3 for frequency converting the received signal, and local frequency for frequency conversion in the mixer 3 OSC (oscillator) 4 for supplying the oscillation signal, BPF (band filter) 5 for extracting a signal of a predetermined intermediate frequency from the output of the mixer 3, and IF for amplifying the signal of the intermediate frequency extracted by the BPF 5 An amplifier (intermediate frequency amplifier) 6, a detector 7 that detects an output signal of the IF amplifier 6 and outputs an information signal, and performs gain control of the RF amplifier 2 and the IF amplifier 6. A GC (automatic gain control) circuit 8, a CPU (central processing unit) 11 as a control means for executing adjustment processing of the antenna 1, and a ROM (a control program for the adjustment processing of the antenna 1 and various control data) A Read Only Memory (RAM) 12 and a RAM (Random Access Memory) 13 that provides a working memory space to the CPU 11 are provided. Of the above configuration, the mixer 3, OSC 4, BPF 5, IF amplifier 6, and detector 7 constitute reception processing means.

  The antenna 1 is, for example, a bar antenna configured by providing a winding around a ferrite core. The antenna 1 has a frequency characteristic in which the reception sensitivity reaches a peak at the resonance frequency of the resonance circuit coupled to the tuning circuit A, and the reception sensitivity decreases as the frequency deviates from the resonance frequency. The frequency band of signals that can be received by the antenna 1 is wider than the transmission frequency band of the BPF 5. The transmission frequency band of the BPF 5 is configured to be sufficiently narrow, for example, 10 Hz.

  The tuning circuit A can adjust the frequency characteristics of the antenna 1 by switching the magnitude of the tuning capacitance coupled to the antenna 1. The tuning circuit A includes a plurality of (for example, ten) capacitors Cc, C1 to C9 and switches S1 to S9 connected in series to the capacitors C1 to C9, respectively, and is provided between the antenna 1 and the RF amplifier 2. ing. A plurality of capacitors Cc, C1 to C9 are provided in parallel, and the CPU 11 switches on and off of the switches S1 to S9 independently to switch the combination of the connections of the capacitors C1 to C9 to be coupled to the antenna 1. The total tuning capacity changes.

  The capacitors C1 to C9 are designed, for example, so that the capacitance value increases approximately twice each in ascending order of capacitance. The CPU 11 is provided with a binary number counter having a bit length equal to the number of capacitors C1 to C9, and an on / off control signal corresponding to each bit value of the binary number counter is output to each of the switches S1 to S9. Thus, switching control of each of the switches S1 to S9 is performed. For example, an ON signal is output when the bit value is “1”, and an OFF signal is output when the bit value is “0”. In the binary counter, from the higher bit to the lower bit, each of the capacitors C1 to C9 is associated with each of the capacitors C1 to C9 having a larger capacity and a smaller one, and is connected to the corresponding capacitors C1 to C9. An ON / OFF control signal corresponding to each bit value is output to the switches S1 to S9. With this configuration, the total tuning capacity of the tuning circuit A can be switched with a value that is substantially proportional to the value of the binary counter (referred to as the bin value).

  The feedback circuit B allows a loop oscillation to be performed in the circuit portion of the antenna 1 and the tuning circuit A by forming a feedback loop. For example, the non-inverting amplifier 9, the switch 10, and the coupling capacitor And Cf. When the switch 10 is turned on, power is supplied to the non-inverting amplifier 9, and the output signal from the RF amplifier 2 is amplified by the non-inverting amplifier 9 and fed back to the tuning circuit A. The feedback circuit B is connected to the signal line via a coupling capacitor Cf having a size that does not affect the frequency characteristics of the antenna 1 and the tuning circuit A. The oscillation frequency of the feedback loop is the resonance frequency of the antenna 1 (the antenna 1 and the resonance frequency of the resonance circuit in which the tuning circuit A is coupled). On the other hand, when the switch 10 is turned off, the non-inverting amplifier 9 is disconnected from the RF amplifier 2 and the tuning circuit A. The capacitance of the coupling capacitor Cf is very small compared to the capacitors Cc and C1 to C9, and the input terminal of the non-inverting amplifier 9 is kept in a high impedance state. Therefore, while the switch 10 is turned off, the feedback circuit B Has no effect on other circuit parts.

  The configuration of the feedback circuit B can be variously changed. For example, the feedback destination of the signal via the feedback circuit B may be configured such that the signal is fed back to the signal line wound around the antenna 1 in addition to the signal line of the tuning circuit A, for example. Alternatively, the output of the RF amplifier 2 may be converted into a differential signal and fed back to the pair of signal lines of the antenna 1 and the tuning circuit A, respectively. Further, an auxiliary winding electromagnetically coupled to the coil of the antenna 1 is provided so that a signal is fed back to the auxiliary winding, or a radiation antenna is provided to feed back a signal to the antenna 1 as a radio wave signal. Also good.

  In addition, although the configuration including the non-inverting amplifier 9 and the coupling capacitor Cf is shown as feedback means, the output terminal of the RF amplifier 2 and the signal line of the tuning circuit A are connected without providing the non-inverting amplifier 9 and the coupling capacitor Cf. You may make it comprise the wiring connected directly and the switch which interrupts this wiring on the way.

  The AGC circuit 8 automatically inputs the output signal of the detector 7 and automatically adjusts the amplification factors of the RF amplifier 2 and the IF amplifier 6 in order to stably obtain an appropriate signal output intensity from the detector 7. The AGC circuit 8 can also stop the automatic gain control by an AGC stop signal from the CPU 11 during the adjustment process of the antenna 1.

  The CPU 11 can input the signal detected by the detector 7 through, for example, an analog / digital converter (ADC) and detect the level of the detection output by converting it to a digital value. Further, the CPU 11 updates the bin value of the binary counter described above, so that a capacitor switching control signal corresponding to this bin value is output to the switches S1 to S9 of the tuning circuit A, and the tuning circuit A sets the connection state. The combination of capacitors C1 to C9 is switched. Further, during the antenna adjustment process, the CPU 11 outputs an ON switching signal to the feedback circuit B to activate the feedback circuit B, or outputs an AGC stop signal to the AGC circuit 8, thereby automatically gaining the AGC circuit 8. Control is stopped.

  Next, antenna adjustment processing executed by the radio wave receiving apparatus having the above configuration will be described. First, the principle of antenna adjustment processing using the tuning circuit A and the feedback circuit B will be described.

  The CPU 11 operates the feedback circuit B during the antenna adjustment process. Then, an oscillation loop is formed by the signal path of the RF amplifier 2, the non-inverting amplifier 9, and the tuning circuit A, and an oscillation signal is generated in this portion. In this oscillation loop, the circuit constants that are dominant in determining the oscillation frequency are the inductance of the antenna 1 and the capacitance component of the tuning circuit A. Therefore, the frequency of this oscillation signal is substantially the same as the resonance frequency of the coupling circuit of the antenna 1 and the tuning circuit A. In this state, the CPU 11 sequentially operates the switches S1 to S9 of the tuning circuit A to switch the connection pattern of the capacitors C1 to C9 of the tuning circuit A. At this time, the CPU 11 converts the output level of the detector 7 into a digital numerical value and monitors it, and temporarily stores it in the RAM 13 as necessary. The operation of switching the connection pattern of the tuning circuit A while monitoring the detection output level is called scanning.

  If the frequency of the oscillation signal overlaps with the frequency of the desired wave during the above scan, the signal that passes through the BPF 5 most increases and the output level of the detector 7 also becomes maximum. Therefore, when the CPU 11 detects the level rise of the detection output or detects the level peak of the detection output, the resonance frequency of the antenna 1 (resonance frequency of the coupling circuit of the antenna 1 and the tuning circuit A) becomes the desired wave. It is possible to determine that the frequency has been approached.

  In order to determine whether or not the resonance frequency of the antenna 1 has approached the frequency of the desired wave, the signal monitored by the CPU 11 is not limited to the output signal of the detector 7 described above, but the level of the signal that has passed through the BPF 5. Any signal may be used as long as it can be detected. Further, by operating the AGC circuit 8 during the antenna adjustment process and monitoring the control voltage of the AGC circuit 8, an increase in the level of the signal that has passed through the BPF 5 can be detected.

  During the above scan, after switching the connection pattern of the tuning circuit A by one step, the frequency of the oscillation signal is changed, and this oscillation signal is processed by the BPF 5 and the detector 7 until it is stably reflected in the detection output level. Requires a predetermined time interval. In particular, since the delay time of the BPF 5 becomes longer as the passband width becomes narrower, even when the frequency of the oscillation signal is substantially equal to the frequency of the desired wave and the level of the detection output rises, the detection output becomes stable. Takes a long time (for example, about 100 ms).

  However, even after the connection pattern of the tuning circuit A is switched and before the delay time of the BPF 5 elapses, if the oscillation signal is in a frequency band that passes through the BPF 5, a part of this signal passes through the BPF 5. The output level of the detector 7 is slightly increased. Therefore, by detecting this level rise of the detection output, it is possible to roughly determine the adjustment range of the tuning circuit A in which the frequency of the oscillation signal approaches the frequency of the desired wave.

  Therefore, in the antenna adjustment processing of this embodiment, first, the first scan is performed at high speed in the entire adjustment range of the tuning circuit A, and the adjustment range of the tuning circuit A in which the frequency of the oscillation signal approaches the frequency of the desired wave is roughly determined. To do. Next, a second scan of the normal speed is performed only within the roughly determined adjustment range, and a setting state of the tuning circuit A that tunes the resonance frequency of the antenna 1 to the frequency of the desired wave is obtained from these results. Is adopted.

  FIG. 2 shows a time chart for explaining the operation of the antenna adjustment processing according to the embodiment of the present invention.

  FIG. 2A is a time chart showing the operation content of the high-speed first scan, and shows the switching control signal of the capacitor C1 output from the CPU 11 and the signal level of the detection output in time series. It is. The capacitor C1 has the smallest capacitance value among the capacitors C1 to C9 of the tuning circuit A, and the switching control signal of the capacitor C1 corresponds to the least significant bit of the binary counter described above. That is, the switching control signal of the capacitor C1 represents an operation in which the binary number counter is sequentially switched from “511” to “0” as a decimal value.

  In the antenna tuning process of this embodiment, the high-speed first scan is performed as follows. That is, the CPU 11 updates the counter value (bin value) of the binary counter indicated by the 9-bit length, for example, by “1”, and switches the connection state of the capacitors C1 to C9. As a result, over the entire adjustment range of the tuning circuit A, switching is performed so that the total capacitance value in the connected state gradually decreases from the larger one. Further, in this first scan, the scan step width (time width) Δt of each switching is set to a short time (for example, 50 ms) compared to the time required for stabilizing the output of the BPF 5 (for example, about 100 ms). This scan step width Δt is shorter than the delay time of BPF5. The entire adjustment range is an example of a first adjustment range, and the scan step width Δt is an example of a first switching period.

  During the first scan, when the resonance frequency of the antenna 1 switched by the tuning circuit A is different from the frequency of the desired wave, the frequency of the signal output from the mixer 3 deviates from the transmission frequency band of the BPF 5. Therefore, the output from the detector 7 becomes small without passing through the BPF 5. On the other hand, when the resonance frequency of the antenna 1 switched by the tuning circuit A matches the frequency of the desired wave, the frequency of the signal output from the mixer 3 overlaps the transmission frequency band of the BPF 5 and the signal passing through the BPF 5 increases. Therefore, the output level of the detector 7 increases.

  In the first scan, since scanning is performed with a scan step width Δt shorter than the delay time of BPF 5, BPF 5 cannot react at each scan step, and the peak value of the detection output level is a value detected after BPF 5 is stabilized. Lower than In addition, the change pattern of the detection output level over a plurality of steps may become unstable.

  Thereafter, when the tuning capacity of the tuning circuit A is further switched and the resonance frequency of the antenna 1 deviates from the frequency of the desired wave, the signal level of the detection output decreases again. The CPU 11 stores the bin value “1st_Max” of the step determined to be the maximum detection output level in the first scan.

  In this high-speed first scan, since all 512 steps are switched with a scan step width Δt = 50 ms, the total scan time is 25.6 seconds. Each scan step width Δt needs to be sufficiently longer than the response times of the switches S1 to S9 and the period of the oscillation signal, but the frequency of the oscillation signal approaches the frequency of the desired wave by switching the tuning circuit A. In this case, if it is a time in which even a slight change can be detected in the detection output, it can be made shorter, for example, 10 ms.

  FIG. 2B is a time chart showing the operation content of the second scan performed at the normal speed, and shows the switching control signal of the capacitor C1 output from the CPU 11 and the signal level of the detection output in time series. It is a thing.

  After executing the first scan, the CPU 11 executes the next second scan. In the second scan, since the adjustment position of the tuning circuit A where the peak of the detection output level is obtained by the first scan is almost known, the bin value “1st_Max” obtained in the first scan is used as the center. And switching the setting of the tuning circuit A within an adjustment range (a range surrounded by a broken line frame in FIG. 2A) with a predetermined number of steps added (for example, ± 10 steps, total 21 steps). Do. Further, the scan step width Δt is set to a value (for example, 100 ms) larger than the period corresponding to the response speed of the BPF 5. The adjustment range is an example of a second adjustment range, and the scan step width Δt is an example of a second switching period.

  In the second scan, the CPU 11 obtains a bin value “2nd_Max” when the maximum detection output level is detected. Normally, the bin value “1st_Max” obtained in the first scan and this bin value “2nd_Max” are the same value, but the tuning circuit A is switched in the first scan without waiting for a stable detection output. In some cases, the value may be different.

  In this second scan, the tuning circuit A is switched within the adjustment range of 21 steps with a scan step width Δt = 100 ms, so that the total scan time requires 2.1 seconds.

  Based on the results of the first scan and the second scan, the CPU 11 sets the tuning circuit A in which the resonance frequency of the antenna 10 (the resonance frequency of the coupling circuit of the antenna 10 and the tuning circuit A) is closest to the frequency of the desired wave. Can be requested.

  FIG. 4 is a chart comparing the time required for the high-speed antenna adjustment processing and the normal-type antenna adjustment processing in which scanning is performed twice in the above embodiment.

  As described above, in the antenna adjustment process of the present embodiment, the first scan takes 25.6 seconds, the second scan takes 2.1 seconds, and the total scan time of the first scan and the second scan is 27. .7 seconds. On the other hand, in the case of the normal method in which the entire adjustment range of the tuning circuit A is scanned with the scan step width Δt = 100 ms, the required time is 51.2 seconds, and the method of this embodiment is significantly shortened. Yes.

  Note that the smaller the scan step width Δt in the first scan, the smaller the peak value of the detection output level, and the bin value “1st_Max” determined to be a peak also fluctuates. Therefore, when the scan step width Δt in the first scan is made smaller than the delay time of the BPF 5, the second scan is performed to compensate for the fluctuation of the bin value “1st_Max”. The number of steps may be increased, for example, a total of 41 steps of bin value “1st_Max” ± 20 steps. In addition, the moving average of the detection output level is calculated in the first scan instead of setting the vicinity of the bin value where the detection output level is detected to be the peak in the first scan as the scan range in the second scan, and this movement The vicinity of the bin value showing a high average value may be used as the scan range of the second scan.

  FIG. 3 is a flowchart showing a processing procedure of antenna adjustment processing executed by the CPU 11.

  This antenna adjustment process is started based on an external control command in a setting adjustment process before factory shipment. When the antenna adjustment process is started, the CPU 11 turns on the switch 10 to operate the feedback circuit B in step J1 to oscillate the circuit portions of the antenna 1 and the tuning circuit A. Further, in order to compare the detection output level under a constant condition, an AGC stop signal is output to fix the control voltage of the AGC circuit 8, and the amplification factors of the RF amplifier 2 and the IF amplifier 6 are kept constant. Furthermore, the CPU 11 sets the bin value of the binary counter that determines the combination of the connection patterns of the capacitors C1 to C9 of the tuning circuit A as an initial value to “511”, that is, “111111111” in a 9-bit binary number. . Thereby, all the switches S1 to S9 corresponding to the capacitors C1 to C9 are turned on.

  Next, the CPU 11 proceeds to step J2 and sets a reception channel. In this embodiment, the frequency band is first set to the 40 kHz band, and is switched to the 60 kHz band, the 68.5 kHz band, the 75 kHz band, and the 77.5 kHz band in turn each time the process proceeds to step J2. When setting in the 40 kHz band, the CPU 11 sends a switching signal to the OSC 4 to change the oscillation frequency to a local frequency for 40 kHz, and causes the OSC 4 to output a signal having a predetermined local frequency for 40 kHz.

  Next, the CPU 11 proceeds to step J3 and sets the scan step width Δt of the first scan. The step width Δt is a value shorter than the delay time of the BPF 5, and is set to 50 ms here, for example.

  Subsequently, the CPU 11 starts the first scan. First, in step J4, after waiting for the time of the scan step width Δt, the detection output level at the current bin value (initial value is “511”) is AD-converted, and the converted value (hereinafter referred to as AD value). ) Is stored in the RAM 13. Subsequently, in step J5, the bin value is subtracted, and in step J6, a condition comparison is performed to determine whether the bin value has made a round turn of “511 → 510 →... → 1 → 0 → 511”. If the bin value does not return to “511” once, the process returns to step J4 and the processes of steps J4 to J6 are repeated.

  If step J4 to step J6 are repeated 512 times, the bin value returns to “511” again, so the comparison result in step J6 is YES, and the process proceeds to step J7.

  When the process proceeds to step J7, the CPU 11 obtains the maximum one of 512 AD values stored in the RAM 13 by the first scan (repetition process of steps J4 to J6). Then, the bin value “1st_Max” corresponding to the maximum AD value is stored in the RAM 13. The first scan control means is configured by the processes in steps J4 to J7.

  In the first scan, it has been described that all the AD values of the detection output level corresponding to each bin value are stored in the RAM 13. However, only the maximum AD value and the corresponding bin value are overwritten and stored in the RAM 13. Anyway.

  Subsequently, the CPU 11 performs a second scan setting process. First, in step J8, since the second scan is performed in the scan range in which a predetermined step (for example, 10 steps) is added before and after the bin value “1st_Max” obtained in the first scan, the bin value in the second scan Is set to “1st_Max + 10”. If “1st_Max + 10” is larger than “511”, the initial value is set to “511”.

  Next, the CPU 11 proceeds to step J9 and sets the scan step width Δt of the second scan. Unlike the first scan, the scan step width Δt is set to a time (for example, 100 ms) during which the response of the BPF 5 is stabilized in order to reliably obtain the detection output level of each step.

  After the setting process for the second scan is completed, the CPU 11 starts the second scan. First, in step J10, after waiting for the time of the scan step width Δt, the detection output level is AD-converted, and the converted AD value is stored in the RAM 13. Subsequently, in step J11, the bin value is subtracted, and in step J12, it is confirmed whether or not the bin value is less than “1st_Max-10”. As a result, if not lower, the process returns to step J10 and the processes of steps J10 to J12 are repeated. By repeating the steps J10 to J12, the scan is performed in the bin value range of “1st_Max + 10” to “1st_Max-10”.

  In step J12, when “1st_Max-10” becomes 0 or less, the comparison condition is corrected so that the final point of the scan range is the point of the bin value “0”.

  If the loop from step J10 to step J12 is repeated 21 times or less, the bin value becomes “1st_Max−10” or less, so the determination result of step J12 is YES, and the process proceeds to step J13.

  In step J13, the CPU 11 obtains the maximum AD value stored in the RAM 13 in the second scan, and stores the bin value “2nd_Max” corresponding to the maximum AD value in the RAM 13. The second scan control means is configured by the processes in steps J10 to J13. Even in the second scan, not all the AD values of the detection output level corresponding to each bin value are stored in the RAM 13 but only the maximum AD value and the corresponding bin value are overwritten and stored in the RAM 13. Anyway.

  Next, in step J14, the CPU 11 compares the AD value corresponding to the bin value “1st_Max” obtained in step J7 with the AD value corresponding to the bin value “2nd_Max” obtained in step J13. The bin value corresponding to the AD value is determined as the set value “Final_Max” of the tuning circuit A for tuning the resonance frequency of the antenna 1 to the frequency of the desired wave, and stored in the RAM 13.

  Normally, since the AD value in the first scan is lower than the AD value in the second scan, the processing of step J14 is omitted, and the bin value “2nd_Max” obtained in the second scan is used as it is in the tuning circuit A. The optimum set value “Final_Max” may be stored in the RAM 13.

  After scanning of one reception channel and storing of the optimum setting value “Final_Max” of the tuning circuit A in the above steps J3 to J14, it is next determined in step J15 whether or not all the reception channels have been processed. To do. If processing for all reception channels is not completed, the process returns to step J2, the reception channel is switched, and the operations of steps J3 to J14 are repeated again. On the other hand, if the processing for all the reception channels has been completed, the process proceeds to YES in step J15. When the process proceeds to step J15, the CPU 11 turns off the switch 10 to make the feedback circuit B inactive, and ends the antenna adjustment process.

  After the antenna adjustment process is completed, at the stage of actually receiving the radio wave, the CPU 11 obtains the reception channel through which the standard radio wave is transmitted based on the control information of the other system, and switches the setting corresponding to this reception channel. To perform reception processing. That is, the setting value “Final_Max” corresponding to the current reception channel is read out from the setting value “Final_Max” of the tuning circuit A corresponding to each reception channel stored in the RAM 13 by the antenna adjustment process. Set the value to this value. As a result, the connection pattern of the capacitors C1 to C9 of the tuning circuit A is switched, and the resonance frequency of the antenna 1 is tuned to the frequency of the current reception channel. Further, a channel switching signal is output to the OSC 4 to supply a signal having a local frequency corresponding to the current reception channel. As a result, the standard radio wave of the current reception channel is received with high sensitivity and subjected to detection processing.

  As described above, according to the radio wave receiving apparatus of the present embodiment, the configuration in which the scan is performed twice using different scan step widths Δt in different scan ranges is used, so that the accuracy of the antenna adjustment process is lowered. Therefore, the processing time can be shortened. That is, in the first scan, the resonance frequency of the antenna 1 is set to the frequency of the desired wave by detecting an increase in the signal output level while switching the setting of the tuning circuit A over a wide range with a scan step width Δt shorter than usual. The adjustment point of the tuning circuit A that approaches is roughly determined in a short time. In the subsequent second scan, only the narrow scan range determined on the basis of the adjustment point of the tuning circuit A obtained in the first scan is output more accurately with the normal scan step width Δt longer than the first scan. It is possible to detect and set the tuning circuit A that matches the frequency of the desired wave. Therefore, by combining the two scan results, the processing time can be shortened without reducing accuracy. In addition, by shortening the processing time, it is possible to reduce power consumption for the antenna adjustment processing.

  In addition, since the scan range of the second scan is determined by adding a predetermined width to the bin value of the adjustment point of the tuning circuit A obtained in the first scan, the scan range of the second scan is determined. Simplification of the process of determining the value.

  In the first scan, scanning is performed using a scan step width Δt that is shorter than the response delay time of the BPF 5, so that compared with a case where a normal speed scan that performs stable signal detection in each scan step is performed. Therefore, the processing time is surely shortened.

  If the desired wave has a plurality of reception channels, the tuning range of the tuning circuit A becomes wide if the antenna 1 can be tuned over all the frequencies of the desired wave. However, it takes a long time to scan at normal speed. Accordingly, in such a configuration, by applying the configuration in which the first scan and the second scan are used in combination, a greater time reduction effect can be obtained.

  Further, since the CPU 11 stops the control of the AGC circuit 8 and fixes the amplification factors of the RF amplifier 2 and the IF amplifier 6 during the first scan and the second scan, the output level of the detector 7 is It is not changed by the influence of level adjustment by AGC8. Therefore, the detection output level of each scan step can be accurately compared during the first scan and the second scan, thereby further improving the accuracy of the antenna adjustment process.

  The present invention is not limited to the above-described embodiment, and various modifications can be made. For example, in the above-described embodiment, the antenna adjustment process is described as being performed in the setting adjustment process before factory shipment. However, the antenna adjustment process may be performed based on a user instruction operation after factory shipment, or during the radio wave reception process. May be executed when a good reception level cannot be obtained. In this case, the process for all reception channels may be performed only for the currently set reception channel instead of the antenna adjustment process.

  In the above-described embodiment, the example in which the entire adjustment range of the tuning circuit A is set as the scan range in the first scan is shown. However, when an unnecessary adjustment range is known in advance, the scan range of the first scan is used. An unnecessary adjustment range may be excluded. It is also possible to set a separate unnecessary adjustment range for each reception channel.

  Moreover, in the said embodiment, although switching control of switch S1-S9 of the tuning circuit A is performed using a binary number counter, the structure which switches switch S1-S9 can be variously changed. Further, the value of each scan step width Δt of the first scan and the second scan can be appropriately changed according to the characteristics of the BPF 5 and the like. In the first scan and the second scan, the tuning circuit A may be switched so that the oscillation signal is switched from the high frequency side (small bit value) to the low frequency side (high bit value). .

  In the above embodiment, an example in which a superheterodyne reception circuit is applied has been described. However, the present invention can also be applied to a straight reception circuit and a direct conversion reception circuit. In addition, the details shown in the embodiments can be appropriately changed without departing from the spirit of the invention.

1 Antenna 4 Oscillator 5 BPF
7 detector 8 AGC circuit 9 non-inverting amplifier 10 feedback circuit switch 11 CPU
12 ROM
13 RAM
Cc, Cf, C1 to C9 Capacitor S1 to S9 Switch A Tuning circuit B Feedback circuit Δt Scan step width

Claims (5)

An antenna for receiving radio waves,
Tuning means capable of changing the frequency characteristics of the antenna;
Oscillating means capable of oscillating circuit portions of the antenna and the tuning means;
A reception processing means for performing signal processing by extracting a signal of a desired wave from the reception signals received from the antenna;
A control means for generating an oscillation signal in the circuit part by the oscillation means and switching the setting of the tuning means to search for a setting state of the tuning means in which the oscillation signal is extracted by the reception processing means;
With
The control means includes
A first scan control means for obtaining an adjustment point of the tuning means for extracting the oscillation signal by the reception processing means by switching the setting of the tuning means over a first adjustment range at a first switching period; ,
The tuning point includes the adjustment point obtained by the first scan control means, and spans a second adjustment range that is set narrower than the first adjustment range, with a second switching period that is longer than the first switching period. A second scan control means for obtaining an adjustment point of the tuning means for extracting more of the oscillation signal by the reception processing means by switching the setting of the means;
A radio wave receiver characterized by comprising: The tuning means includes
A plurality of tuning capacitors made connectable to the signal line of the antenna;
A plurality of switches for switching connection states of the plurality of tuning capacitors;
With
The radio wave receiver according to claim 1, wherein the resonance frequency of the antenna can be changed stepwise by switching the plurality of switches.   In the second adjustment range, the resonance frequency of the antenna is sequentially changed before and after the adjustment point of the tuning unit in which the extraction amount of the oscillation signal in the reception processing unit is determined to be maximum by the first scan control unit. 2. The radio wave receiving apparatus according to claim 1, wherein the radio wave receiving apparatus is set by adding a predetermined amount of adjustment range. The reception processing means includes a band filter for extracting a desired wave signal,
The radio wave receiving apparatus according to claim 1, wherein the first switching period is set to a time shorter than a delay time of the band filter. The reception processing means is configured to be capable of signal processing for each of a plurality of reception channels,
2. The radio wave receiving apparatus according to claim 1, wherein the tuning means has an adjustment range in which the frequency characteristics of the antenna can be tuned in all frequency bands of the plurality of reception channels.

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