JP2010278272A - Solid-state imaging element and method of manufacturing solid-state imaging element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a CMOS type solid-state imaging element that includes fine pixels and has high sensitivity and low color mixing. <P>SOLUTION: In the back irradiation type solid-state imaging element, the sensitivity is enhanced by making large an opening for introducing light by a back irradiation type by providing a light guide region on a back surface of a photodiode 8 of the back irradiation type solid-state imaging element, and the color mixing is reduced by adopting a light guide region structure. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device that photoelectrically converts incident light to image and a manufacturing method thereof.

  Conventionally, a solid-state imaging device is generally of a surface irradiation type in which electrodes and wirings are formed on a substrate surface and light is irradiated from above. In this surface irradiation type, there is a problem that the sensitivity is lowered as the pixels are miniaturized. For the purpose of improving the sensitivity reduction in the fine pixels in the surface type, for example, as disclosed in Patent Documents 1 and 2, the optical waveguide structure has a problem. A solid-state image sensor has been proposed. In order to improve sensitivity reduction of fine pixels, a back-illuminated solid-state image sensor that is not a front-illuminated type is proposed in Patent Document 3.

Hereinafter, a conventional solid-state imaging device will be described with reference to FIGS.
FIG. 6 shows a cross-sectional view of a conventional surface irradiation type solid-state imaging device having an optical waveguide structure. The solid-state imaging device shown in FIG. 6 is a CMOS type solid-state imaging device having a surface irradiation type and an optical waveguide structure. A photodiode 48 constituting a light receiving sensor portion of each pixel is formed in a silicon substrate 60, a multilayer wiring layer 43 including an interlayer insulating film is provided on the silicon substrate 60, and a color layer above the wiring layer 43 is colored. The filter layer 57 and the micro lens 59 are provided.

  After the wiring layer 43 is formed, a part of the interlayer insulating film on the photodiode 48 is etched to form the cladding layer 54, and the etched hole is filled with a material having a higher refractive index than the cladding layer 54. Layer 55 is formed. The clad layer 54 and the core layer 55 form an optical waveguide. Here, the depth of the optical waveguide, which is the depth of the etched hole portion, is regulated by the height of the wiring layer 43 and is generally about 2.0 μm. For example, in patent document 2, it is about 1.9 micrometers. The light incident on the microlens 59 is condensed on the core layer 55 as shown in the optical path 61 and introduced into the optical waveguide. As can be seen from this figure, it is clear that the sensitivity decreases as the diameter of the core layer 55, which is the opening through which light passes, becomes narrower. The core layer 55 needs to be formed in a portion where the wiring layer 43 is not present. For this reason, there is a problem in that the diameter of the core layer 55 is narrowed and the sensitivity is lowered as the pixels are miniaturized.

  This is because the diameter of the core layer 55 becomes narrow due to the miniaturization, and the alignment accuracy of processing may vary, and it becomes difficult to condense light onto the core layer 55 with the microlens 59 with high accuracy. In this conventional example, an optical waveguide that allows light to efficiently pass through the opening of the wiring layer 43 is used. However, when the optical waveguide is not used, sensitivity reduction due to pixel miniaturization is further increased.

  In order to improve sensitivity reduction due to narrowing of the aperture through which light passes due to this pixel miniaturization, there has been proposed a back-illuminated solid-state imaging device in which light is incident from the back surface on the opposite side of the wiring layer.

FIG. 7 shows a cross-sectional view of a conventional back-illuminated CMOS solid-state imaging device.
In FIG. 7, a photodiode 78 constituting a light receiving sensor portion of each pixel is formed in a silicon substrate 90. A wiring layer 73 including an interlayer insulating film (disposed on the lower side in FIG. 7) is formed on the silicon substrate 90, and a substrate support material 71 made of silicon or the like is formed on the surface of the wiring layer 73 via an adhesion layer 72. Glued to. A part of the silicon substrate 90 to which the substrate supporting material 71 is adhered is shaved by polishing or the like, and the silicon substrate 90 is processed to a desired film thickness t. Further, a light shielding layer 81, a color filter layer 87, and a microlens 89 are formed on the side opposite to the wiring layer 73. As can be seen from FIG. 7, the light is introduced from the opposite side of the wiring layer 73 and the opening of the light shielding layer 81 is large, and the opening is significantly larger than that of the surface irradiation type solid-state imaging device of FIG. It can be seen that the reduction in sensitivity can be greatly improved since it is large and does not have a multilayer wiring layer as shown in FIG.

  Here, the structure of the light receiving sensor unit including the photodiode 78 will be described. A photodiode 78 made of an n-type diffusion layer is separated from an adjacent photodiode by a P-well 77 which is a p-type diffusion layer. A dark current prevention layer 75, which is a p + type diffusion layer, is disposed at the interface of the silicon substrate 90 on the side in contact with the wiring layer 73 (hereinafter referred to as the front surface side) to reduce the dark current generated at the silicon interface. . In addition, a dark current prevention layer 79 which is a p-type diffusion layer is disposed at the interface of the silicon substrate 90 opposite to the wiring layer 73 (hereinafter referred to as the back surface side) to reduce the dark current generated at the silicon interface. ing. Thus, the photodiode 78 which is an n-type diffusion layer is surrounded by the p-type diffusion layer.

JP 2004-221527 A JP 2004-221532 A JP 2008-177487 A

  In the backside illumination type CMOS solid-state imaging device as shown in FIG. 7, the sensitivity can be improved, but there is a problem that the color mixture deteriorates. That is, in FIG. 7, the light vertically incident on the microlens 89 is collected on the photodiode 78 as indicated by the optical path 91, but the oblique light 92 incident from an oblique direction enters the P well 77 adjacent to the photodiode 78. It reaches there and undergoes photoelectric conversion, and the generated electrons diffuse and leak into adjacent photodiodes, increasing color mixing. Alternatively, the oblique light 92 reaches the adjacent photodiode 78 where it is photoelectrically converted to increase color mixing. This color mixture is affected by the thickness t of the silicon substrate 90 and the cell size. If it is intended to reduce the influence of oblique light, it is possible to reduce the influence of oblique light by reducing the thickness t of the silicon substrate 90, but then the silicon substrate 90 cannot sufficiently absorb light, Sensitivity will decrease. In addition, as the pixel size becomes smaller, the influence of oblique light becomes more prominent, and there is a problem that color mixture increases due to pixel miniaturization. In order to ensure sufficient sensitivity of green light (wavelength 530 nm), the thickness t of the silicon substrate needs to be 2.5 μm or more. In recent years, CMOS-type solid-state image pickup devices with high pixels up to 1.75 μm have already been commercialized as high-pixel CMOS solid-state image pickup devices mounted on digital cameras and mobile phones in recent years. It is desired to reduce the pixel size of 0.0 μm. In view of the miniaturization of the pixels, it is difficult to realize a sensor with high sensitivity and less color mixing even in the back-illuminated solid-state imaging device as described in FIG.

  As described above, in miniaturization of pixels in a CMOS type solid-state image pickup device, both high sensitivity and low color mixing are achieved in both a conventional front-illuminated solid-state image pickup device and a back-illuminated solid-state image pickup device. Is difficult. In view of the above problems, an object of the present invention is to provide a CMOS-type solid-state image pickup device with fine pixels and high sensitivity and low color mixing.

  The solid-state imaging device of the present invention is formed on a surface of a semiconductor substrate, a plurality of light receiving portions formed in the semiconductor substrate and subjected to photoelectric conversion, a separation portion for separating the light receiving portions, and a surface of the semiconductor substrate. A wiring layer for reading a signal photoelectrically converted by the light receiving unit, a low refractive index film formed on a back surface of the semiconductor substrate with respect to the front surface, and an upper region of the light receiving unit of the low refractive index film. And a plurality of microlenses formed in an upper region of the light receiving unit on the high refractive index film. And

Further, the high refractive index film is also formed on the low refractive index film.
Further, the thickness of the low refractive index film is 0.5 μm or more, the distance from the microlens side end portion of the low refractive index film to the semiconductor substrate is 1.8 μm or less, and the opening is formed on the semiconductor substrate. The length in the parallel direction is 0.6 μm or more and 1.2 μm or less.

The aspect ratio of the opening is 0.7 or more and 1.5 or less.
The light emitting device further includes a light shielding film formed in the upper region of the separation portion between the back surface of the semiconductor substrate and the low refractive index film or the high refractive index film.

The semiconductor device further includes a planarizing layer formed between the back surface of the semiconductor substrate including the light shielding film and the low refractive index film or the high refractive index film.
In addition, a cross-sectional area of a plane parallel to the semiconductor substrate of the opening portion increases as the distance from the semiconductor substrate increases.

Further, the high refractive index film and the low refractive index film contain a synthetic resin.
Furthermore, the method of manufacturing a solid-state imaging device according to the present invention includes a step of forming a plurality of light receiving portions separated by a separation portion in a semiconductor substrate, and a signal photoelectrically converted by the light receiving portion on the surface of the semiconductor substrate. Forming a wiring layer to be read; forming a low refractive index film having an opening in an upper region of the light receiving portion on a back surface of the semiconductor substrate; and a high refractive index so as to embed the opening. The method includes a step of forming a film and a step of forming a plurality of microlenses in the upper region of the light receiving portion on the high refractive index film.

  In addition, when the low refractive index film is formed, the opening is formed so that a cross-sectional area of a plane parallel to the semiconductor substrate of the opening increases as the distance from the semiconductor substrate increases.

  As described above, high sensitivity and low color mixing can be realized even with a solid-state imaging device having fine pixels.

  As described above, by providing an optical waveguide region on the back surface of the photodiode of the backside illumination type solid-state imaging device, the sensitivity is improved by taking a large opening for introducing light in the backside illumination type in the solid-state imaging device. By adopting the structure, color mixing can be reduced.

Sectional drawing of the CMOS type solid-state image sensor in 1st Embodiment Sectional drawing of the CMOS type solid-state image sensor in 2nd Embodiment Sectional drawing of the CMOS type solid-state image sensor in 3rd Embodiment Sectional drawing of the CMOS type solid-state image sensor in 4th Embodiment Process sectional drawing explaining the manufacturing method of the solid-state image sensor of this invention Sectional view of a conventional surface-illuminated solid-state image sensor with an optical waveguide structure Sectional view of a conventional back-illuminated CMOS solid-state image sensor

(First embodiment)
FIG. 1 is a cross-sectional view of a CMOS solid-state image sensor according to the first embodiment. The CMOS type solid-state imaging device of FIG. 1 is a backside illumination type. As a semiconductor substrate, for example, a photodiode 8 constituting a light-receiving sensor portion of each pixel is formed in a silicon substrate 20, and a photo of an n-type diffusion layer is formed as in the conventional back-illuminated solid-state imaging device of FIG. The diode 8 surrounds the p-type diffusion layer. On the surface side of the silicon substrate 20, a dark current prevention layer 5 made of a p + type diffusion layer that suppresses dark current generated at the surface side interface is formed. A dark current prevention layer 9 made of a p-type diffusion layer is formed on the back side of the silicon substrate 20 to suppress dark current generated at the back side interface. At the same time as the purpose of separating adjacent photodiodes 8, a P-well 7 constituting a well of a transistor in the pixel is formed. A gate electrode 4 made of polysilicon or the like is formed on the surface of the silicon substrate 20. In the pixel, at least a transfer transistor that transfers the photodiode 8, a reset transistor that discharges the transferred signal electrons, and an amplification transistor that amplifies the signal electrons are arranged (not shown). This constitutes the gate of the transistor. The surface of the silicon substrate 20 includes an interlayer insulating film, for example, a wiring layer 3 composed of three layers of wiring is formed, and voltage or current is supplied to the source, drain or gate of the transistor, or It functions as a wiring for reading a signal from the amplification transistor. The silicon substrate 20 on which the wiring layer 3 is formed is bonded to the substrate support material 1 through the adhesion layer 2, and the back side of the silicon substrate 20 is polished by CMP (Chemical Mechanical Polishing) or the like, for example. The substrate 20 is processed to a thickness t. Since light is absorbed at this thickness t, the solid-state imaging device in the visible light region for digital cameras and cameras for mobile phones absorbs light with respect to green light (wavelength 530 nm) which is the central wavelength of this visible light. A sufficient thickness of 2.5 μm or more is necessary. Further, the oxide film 10 is formed on the surface of the back surface of the silicon substrate 20, and the light shielding layer 11 is further formed. Although the light shielding layer 11 is not always necessary, by providing the light shielding layer 11, it is possible to block light incident between the plurality of adjacent photodiodes 8 and prevent color mixing. A passivation layer 12 made of SiN or the like is formed on the light shielding layer 11. A clad layer 14 having an opening in the upper region of the photodiode 8 is formed on the upper portion, and a core layer 15 is formed at least in the opening. The core layer 15 is made of a material having a refractive index higher than that of the cladding layer 14, and an optical waveguide region is formed by the cladding layer 14 and the core layer 15. The clad layer 14 has a refractive index of about 1.5 with respect to light having a wavelength of 530 nm, and is made of, for example, a silicon oxide film or a standard resist material used in a semiconductor lithography process. Similarly, the refractive index of the core layer 15 is 1.6 to 2.0 with respect to light having a wavelength of 530 nm, which is higher than that of the cladding layer 14, and is, for example, higher than that of a standard resist material used in SiN or semiconductor lithography processes. A polymer material having a high refractive index or a metal material having a high refractive index such as TiO ₂ dispersed in a polymer material having a high refractive index or a relatively low refractive index is used. A color filter layer 17 is formed on the optical waveguide region via an adhesion layer 16, and a planarizing layer 18 is formed on the color filter layer 17, and a microlens 19 is formed. At this time, if the distance between the microlens 19 and the clad layer 14 is secured to such an extent that no color mixing occurs, it is not necessary to form the core layer 15 on the clad layer 14, but the clad layer as shown in FIG. By forming the core layer 15 on 14, the distance between the microlens 19 and the cladding layer 14 can be easily adjusted.

  As can be seen from FIG. 1, the light incident on the microlens 19 is condensed near the entrance of the core layer 15 and introduced into the core layer 15 as indicated by the optical path 21. The light introduced by utilizing the fact that the light bends in the high refractive index direction is confined in the core layer 15 having a higher refractive index than the surrounding cladding layer 14 and propagates to the silicon substrate 20. During this propagation, the directivity of incident light becomes high, and the light enters the silicon substrate 20 perpendicularly. As a result, the oblique light as shown in FIG. 7 is reduced, so that the color mixture can be reduced. Further, unlike the surface-illuminated solid-state imaging device shown in FIG. 6, since there is no complicated multi-layer wiring layer, an opening through which light passes can be made large and the diameter of the core layer 15 in the optical waveguide region can be made large. Sensitivity can be improved compared to the irradiation type.

  Here, in order to increase the directivity of light so that the core layer 15 functions as an optical waveguide region to reduce color mixing, it is preferable to set the waveguide region height h within a certain range. For example, when the incident light is visible light, and the cladding layer 14 and the core layer 15 are formed with the above-described refractive index, the waveguide region height h is about 0.5 μm or more, more preferably a wave of 0.8 μm or more. is necessary. Further, the width of the microlens 19 in the direction parallel to the surface of the silicon substrate 20 is about 1.0 to 1.4 μm, the width of the cladding layer 14 is 0.2 to 0.4 μm, and the opening diameter of the optical waveguide region is 0.6. In the case of ˜1.2 μm, in order to suppress color mixing due to light leakage and reduction of optical characteristics due to light attenuation and diffusion, the surface of the photodiode 8 (dark current) from the height of the optical waveguide region or the opening of the optical waveguide region. The distance to the interface with the prevention layer 9 is preferably 1.8 μm or less, more preferably 1.2 μm or less. For example, the aspect ratio of the optical waveguide region that is the opening of the cladding layer 14 is preferably set to 0.7 to 1.5. In a conventional solid-state imaging device in which an optical waveguide is formed with a front-illuminated type, since it is restricted by the wiring layer, it is difficult to set the height of the optical waveguide region to an optimum height. By forming the optical waveguide region in the image sensor, the height of the optical waveguide region can be optimized.

  As described above, a high-sensitivity and low-mixture solid-state image sensor is realized with a small pixel of 1.4 μm or less smaller than 1.75 μm by introducing an optical waveguide region into a back-illuminated CMOS solid-state image sensor. I can do it.

Next, a manufacturing method relating to the formation of the optical waveguide region of the CMOS type solid-state imaging device of FIG. 1 will be described with reference to FIG.
FIG. 5 is a process cross-sectional view illustrating a method for manufacturing a solid-state imaging device of the present invention. In FIG. 5, the silicon substrate 20 and the portion below the silicon substrate 20 are omitted for simplicity.

  First, in FIG. 5A, the oxide film 10 is formed on the back surface of the silicon substrate 20, and the light shielding film 11 is selectively formed on the surface of the oxide film 10. Further, a passivation layer 12 is formed on the surfaces of the oxide film 10 and the light shielding film 11. Next, in FIG. 5B, the cladding layer 14 is formed in the upper region of the light shielding film 11 on the passivation film 12. Thereafter, an opening serving as an optical waveguide region is formed in the upper region of the photodiode 8 in the cladding layer 14.

  The simplest method with a low cost for forming the clad layer 14 is a method using a general semiconductor photolithography process. A photosensitive and transparent resist is applied by spin coating or the like, pre-baked, and post-baked after exposure and development. If the transparency is insufficient, decolorization may be performed by irradiating with ultraviolet rays after post-baking. As the resist material, a normal resist material used in semiconductor photolithography or a similar material can be used. For example, a novolac resin-based, polyvinylphenol-based, or polyacrylic acid-based polymer can be used. As a material used for the clad layer 14, it is desirable to use a material having a wavelength of 530 nm at the center of visible light and a refractive index of about 1.5. As described above, it is necessary to control the height of the optical waveguide region in order to make the optical waveguide region function sufficiently. However, the height of the optical waveguide region is determined by the resist film thickness when the cladding layer 14 is formed. . This resister film thickness can be controlled relatively easily by the viscosity of the resist material and the rotational speed of the spin coat, just like the resist material of ordinary photolithography, and the optical waveguide region can be easily formed at the desired height. it can. Further, in order to increase the difference in refractive index between the clad layer 14 and the core layer 15 to enhance the function of the optical waveguide region, the resist material of the clad layer 14 has no photosensitivity and has a lower refractive index. In the case of using, a clad layer 14 may be formed by applying a resist and then forming another mask material by photolithography and etching. However, in this case, the etching process and the process of removing the mask are increased as compared with the case where the photosensitive resist is simply processed by the lithography technique, and the process becomes complicated accordingly.

Next, in FIG. 5C, a core layer 15 is formed on the opening on the passivation film 12 and, if necessary, on the cladding layer 14. As with the clad layer 14, the simplest method with a low cost for forming the core layer 15 is to use a general semiconductor photolithography process. That is, a resist material is applied by spin coating and cured by heat or ultraviolet irradiation. In this case, patterning is unnecessary, exposure development is not necessary, and the resist does not need to have photosensitivity. The resist used when forming the core layer 15 needs to use a material prepared so as to have a refractive index higher than that of the cladding layer 14. A variety of synthetic resins having a high transparency and a high refractive index may be selected, or a resin having a relatively low refractive index dispersed in a metal oxide having a high refractive index may be used. Examples of the synthetic resin include a phenol resin, an epoxy resin, a melamine resin, a polyester resin, an alkyd resin, a polyurethane resin, a polyimide resin, and a silicon resin such as polysiloxane. Metal oxides include oxides such as titanium, aluminum, zirconium, antimony, tin, zinc, indium, and tantalum. Since a core layer is not required outside the pixel region, the material of the core layer 15 outside the pixel region is removed by performing exposure development using a photosensitive resist for improving flatness outside the pixel region. Also good. Synthetic resin SiO ₂ used as the material of the cladding layer 14 without the use of, it is also possible to use a large SiN or SiCN refractive index than SiO ₂ as a material of the core layer 15. In the case of using SiO ₂ , SiN or SiCN, it is necessary to perform film formation using plasma for film formation, and the leakage current of the photodiode 8 is increased due to the plasma damage, and an image defect is generated as a solid-state imaging device. Cause trouble. Further, when an opening is formed in the SiO _{2 of the} clad layer 14, a similar problem occurs because a plasma etching apparatus is used. Further, these film forming apparatuses and etching apparatuses are expensive. Although it is necessary to form the openings of the clad layer 14 with SiN or SiCN, such embedding is very difficult and requires a special device. On the other hand, if a photosensitive synthetic resin is used, the clad layer 14 can be easily formed using a semiconductor lithography apparatus. If a synthetic resin is used for the core layer 15, the opening of the cladding layer 14 can be easily embedded by spin coating.

  Next, in FIG. 5 (d), the adhesion layer 16 is applied onto the core layer 15 by spin coating, and the non-adherence with the color filter layer 17 formed thereon is increased, and then the green pigment is formed. The green filter 22 is formed by a photolithography technique using a resist in which is dispersed. Further, in FIG. 5E, the red filter 23 is formed by a photolithography technique using a resistor or the like in which a red pigment is dispersed in a predetermined region on the adhesion layer 16. Although not shown, a blue filter is formed in the same manner, and a color solid-state imaging device is formed. Since the green, red, and blue color filters do not have the same film thickness, the flattening layer 18 is applied by spin coating to achieve flattening. When the planarization layer 18 is thinned in order to control the position of the upper portion of the planarization layer 18, the planarization layer 18 may be etched back using oxygen plasma after coating.

  Finally, in FIG. 5F, the microlens 19 is formed on the planarizing layer 18 corresponding to the color filter layer 17. A photosensitive resist for forming the microlens 19 is applied by spin coating, processed into a rectangular cross-sectional shape by a photolithography technique, and then annealed at a high temperature to be processed into a desired shape. When the shape processing is insufficient, the shape may be further processed by using etching such as oxygen plasma. If the transparency is insufficient, the microlens 19 may be decolored by ultraviolet irradiation after the shape processing of the microlens 19.

As described above, the optical waveguide region, color filter, and microlens are continuously formed using the same equipment as the color filter processing by forming the optical waveguide region using a resist material using a photolithography technique. Therefore, the optical waveguide region can be formed easily and inexpensively. Further, by using the resist process, the optical waveguide region can be formed at a desired height by simply optimizing with the resist material viscosity and the spin coating rotation number without using a complicated process. That is, it can be seen that by forming an optical waveguide region using a photolithography technique using a resist material, it is possible to provide a CMOS solid-state imaging device with high sensitivity and low color mixing with fine pixels at a lower cost.
(Second Embodiment)
Next, FIG. 2 shows a cross-sectional view of a CMOS type solid-state imaging device according to the second embodiment of the present invention. The present embodiment shown in FIG. 2 is almost the same as the first embodiment shown in FIG. 1, and the same parts are denoted by the same reference numerals. The difference is that a planarizing layer 13 is formed on the passivation layer 12.

In order to make the optical waveguide region function effectively, it is important to form the thickness and shape of the optical waveguide region with good controllability. If the shape of the optical waveguide region is different between pixels, the sensitivity varies due to the reflection, and the noise becomes a noise of the sensitivity, and the image quality is deteriorated. By forming the clad layer 14 and the core layer 15 after planarization by the planarization layer 13, the optical waveguide region can be formed uniformly with good controllability. Therefore, in the present embodiment, high-sensitivity and low color mixing can be achieved with fine pixels at a lower cost as in the first embodiment, and a high-quality CMOS solid-state imaging device free from noise due to sensitivity roughness can be realized.
(Third embodiment)
Next, FIG. 3 shows a cross-sectional view of a CMOS type solid-state imaging device according to the third embodiment of the present invention. The present embodiment shown in FIG. 3 is substantially the same as the first embodiment shown in FIG. 1, and the same parts are denoted by the same reference numerals. The difference is that the light shielding film 11 is omitted.

If the optical waveguide region can be formed in a desired shape with good controllability, light can be prevented from entering between adjacent photodiodes 8 even if the light shielding layer 11 is deleted, and the light shielding layer 11 can be omitted. Can do. If the light shielding layer 11 is omitted, the flatness is improved, so that a CMOS-type solid-state imaging device with high sensitivity and low color mixing with fine pixels and high sensitivity and no noise can be realized as in the second embodiment. . Furthermore, since the number of steps is reduced by omitting the light shielding layer 11, the optical waveguide region can be formed at a lower cost than in the first and second embodiments. Further, if the light shielding layer 11 is eliminated, it is not necessary to form the cladding layer 14 and the core layer 15 in the optical waveguide region at the position of the opening of the light shielding layer 11, so Since it is not necessary to consider the margin, it is possible to realize a fine pixel more easily. That is, the third embodiment shown in FIG. 3 can more easily realize high-sensitivity and low color mixing with fine pixels, and further realize a high-quality CMOS solid-state imaging device free from noise of sensitivity. Is suitable.
(Fourth embodiment)
Next, FIG. 3 shows a cross-sectional view of a CMOS type solid-state imaging device in the fourth embodiment of the present invention. The present embodiment shown in FIG. 4 is almost the same as the first to third embodiments shown in FIGS. 1 to 3, and the same parts are denoted by the same reference numerals. The difference is in the difference in the shapes of the clad layer 14 and the core layer 15.

  As described in the third embodiment, on the premise that the light shielding layer 11 is omitted, it is necessary to control the optical path of incident light in the optical waveguide region so that light does not enter between adjacent photodiodes 8. However, in order to guide incident light to the center of the photodiode 8 with better controllability, the core layer 15 has a tapered shape whose diameter is narrowed on the photodiode 8 side. Since the light propagates while being confined in the optical waveguide region, the light can be effectively guided to the center of the photodiode 8 by forming the optical waveguide region so that the photodiode 8 side becomes narrow. A method for forming a tapered optical waveguide region as shown in FIG. 4 will be described with reference to FIG. 5. For example, when the cladding layer 14 is formed by photolithography in FIG. After applying the original photosensitive resist, the exposure is performed by multiple exposure. For example, in the case of two multiple exposures, the first exposure is focused on the opposite side of the photosensitive resist photodiode. In the second exposure, the photosensitive resist is focused on the lower part on the photodiode side to reduce the exposure amount, and then developed to widen the upper opening with a large exposure amount. Accordingly, the lower opening with a small exposure amount becomes narrow, and the cladding layer 14 can be processed into a tapered shape as shown in FIG. Instead of this multiple exposure, a method may be used in which the focus is changed by one exposure and the exposure amount is changed in accordance with the focus. According to this method, the shape of the cladding layer 14 can be easily controlled in more detail once. By adopting the tapered optical waveguide region structure shown in FIG. 4, the fourth embodiment can achieve the same effects as the first to third embodiments. As can be seen from the fourth embodiment shown in FIG. 4, a special method and equipment can be obtained only by adjusting the exposure conditions by forming the optical waveguide region by lithography using a photosensitive resist. The shape of the optical waveguide region for controlling the optical path can be optimized in order to realize the desired high sensitivity, low color mixing, and low sensitivity without using it, that is, without extra cost.

  INDUSTRIAL APPLICABILITY The present invention can reduce color mixing while improving sensitivity, and is useful for a solid-state imaging device that captures an image by photoelectrically converting incident light, a manufacturing method thereof, and the like.

DESCRIPTION OF SYMBOLS 1 ... Substrate support material 2 ... Adhesion layer 3 ... Wiring layer 4 ... Gate electrode 5 ... Dark current prevention layer 7 ... P well 8 ... Photodiode 9 ... Dark Current prevention layer 10 ... Oxide film 11 ... Light shielding layer 12 ... Passivation layer 13 ... Planarization layer 14 ... Cladding layer 15 ... Core layer 16 ... Adhesion layer 17 ... Color filter layer 18 ... Planarizing layer 19 ... Micro lens 20 ... Silicon substrate 21 ... Optical path 22 ... Green filter 23 ... Red filter 43 ... Wiring layer 48 ... Photo Diode 54 ... Cladding layer 55 ... Core layer 57 ... Color filter layer 59 ... Micro lens 60 ... Silicon substrate 61 ... Optical path 71 ... Substrate support material 72 ... Dense Layer 73 ... Wiring layer 75 ... Dark current prevention layer 77 ... P well 78 ... Photodiode 79 ... Dark current prevention layer 81 ... Light shielding film 87 ... Color filter layer 89 .... Microlens 90 ... Silicon substrate 91 ... Optical path 92 ... Oblique light

Claims (10)

A semiconductor substrate;
A plurality of light receiving portions formed in the semiconductor substrate and subjected to photoelectric conversion;
A separation unit for separating the light receiving unit;
A wiring layer for reading a signal formed on the surface of the semiconductor substrate and photoelectrically converted by the light receiving unit;
A low refractive index film formed on the back surface of the semiconductor substrate with respect to the surface;
An opening formed by opening an upper region of the light receiving portion of the low refractive index film;
A high refractive index film formed so as to embed the opening;
And a plurality of microlenses formed in the upper region of the light receiving unit on the high refractive index film.   The solid-state imaging device according to claim 1, wherein the high refractive index film is also formed on the low refractive index film.   The thickness of the low refractive index film is 0.5 μm or more, the distance from the microlens side end of the low refractive index film to the semiconductor substrate is 1.8 μm or less, and the opening is parallel to the semiconductor substrate. 3. The solid-state imaging device according to claim 1, wherein a length in a direction is 0.6 μm or more and 1.2 μm or less.   The solid-state imaging device according to claim 3, wherein an aspect ratio of the opening is 0.7 or more and 1.5 or less. 5. The light shielding film according to claim 1, further comprising a light shielding film formed in an upper region of the separation portion between the back surface of the semiconductor substrate and the low refractive index film or the high refractive index film. The solid-state image sensor described in 1. The solid-state imaging device according to claim 5, further comprising a planarization layer formed between a back surface of the semiconductor substrate including the light shielding film and the low refractive index film or the high refractive index film.   7. The solid-state imaging device according to claim 1, wherein a cross-sectional area of a surface of the opening parallel to the semiconductor substrate increases as the distance from the semiconductor substrate increases.   The solid-state imaging device according to claim 1, wherein the high refractive index film and the low refractive index film contain a synthetic resin. Forming a plurality of light receiving parts separated by a separation part in a semiconductor substrate;
Forming a wiring layer for reading a signal photoelectrically converted by the light receiving unit on the surface of the semiconductor substrate;
Forming a low refractive index film having an opening in the upper region of the light receiving portion on the back surface of the semiconductor substrate with respect to the surface;
Forming a high refractive index film so as to embed the opening;
And a step of forming a plurality of microlenses in the upper region of the light receiving portion on the high refractive index film.   10. The opening is formed such that when the low refractive index film is formed, a cross-sectional area of a plane parallel to the semiconductor substrate of the opening increases as the distance from the semiconductor substrate increases. The manufacturing method of the solid-state image sensor as described in 2.

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