JP2010263124A - Method for manufacturing iii-v semiconductor optical device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for manufacturing III-V semiconductor optical device for reducing variation of the shape of microstructure. <P>SOLUTION: The method for manufacturing a III-V semiconductor optical device 40 includes: a step S3-3 for facing a mold 30 to a semiconductor layer 15; a step S3-5, S3-7 for measuring a level distribution of a concavo-convex pattern 30P of the mold 30 and a part 15AS of a surface 15S of the semiconductor layer 15; a step S3-9 for forming a resin layer 17; and a step S3-11 for determining the relative position relation between the mold 30 and the III-V semiconductor substrate 3 in which variation of thickness of the remaining film R17A, R17B, R17C, R17D, R17E of the resin layer 17 is less than a predetermined amount of the variation by calculating the variation of thickness when the concavo-convex pattern 30P of the mold 30 is virtually pressed to the resin layer 17. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a group III-V semiconductor optical device.

  Patent Document 1 below describes a fine pattern forming method using a nanoimprint method. According to this method, it is possible to align the wafer and the mold by configuring the mold used for nanoimprinting with a material that transmits light or the like.

JP 2000-323461 A

  Adopting a nanoimprint method for forming a fine structure of a semiconductor optical device, for example, a diffraction grating of a distributed feedback semiconductor laser has been studied. If such a fine structure is formed by the nanoimprint method, there is an advantage that the manufacturing cost of the semiconductor optical device can be reduced.

  In the case of forming a fine structure of a semiconductor optical device by the nanoimprint method, first, a semiconductor layer and a resin layer for forming a fine structure are formed in this order on a semiconductor substrate. And the mold which has an uneven | corrugated pattern for a fine structure is pressed against this resin layer, and after hardening a resin layer in that state, a mold and a resin layer are spaced apart. In this way, the uneven pattern of the mold is transferred to the resin layer. Thereafter, when the semiconductor layer is etched using this resin layer as a mask, the semiconductor layer surface is exposed and etched deeper in the region where the thickness of the resin layer remaining on the semiconductor layer (residual film of the resin layer) is thinner. The concave / convex pattern of the mold can be transferred to the semiconductor layer. Then, the transfer of the concave / convex pattern of the mold to the resin layer is usually performed a plurality of times while changing the position where nanoimprinting is performed (step-and-repeat method). That is, the semiconductor layer is divided into a plurality of virtual regions, and the concave / convex pattern is transferred to the resin layer by molding for each virtual region.

  When the microstructure is formed by the nanoimprint method as described above, the surface of the semiconductor layer that forms the microstructure and the pattern surface on which the concave / convex pattern of the mold is faced in parallel are pressed against the resin layer. Is important. This is because if the parallelism between the surface of the semiconductor layer and the pattern surface of the mold is poor, the thickness of the remaining film of the resin layer to which the uneven pattern has been transferred varies from a desired value. For example, when forming a diffraction grating composed of a plurality of concaves and convexes having a certain height as a fine structure, the thickness of the residual film of the resin layer corresponding to the plurality of convex portions of the diffraction grating is ideally uniform. . However, if the parallelism between the surface of the semiconductor layer and the pattern surface of the mold is poor, the thickness of these remaining films varies, and the uneven shape of the diffraction grating also varies. Therefore, before the mold is pressed against the resin layer, it is necessary to face the semiconductor layer surface and the pattern surface of the mold in parallel.

  However, since the surface of the semiconductor substrate is not completely flat and has a certain height distribution, the surface of the semiconductor layer formed thereon also has a certain height distribution. Therefore, even if the parallelism between the entire surface of the semiconductor layer and the pattern surface of the mold is sufficiently high, the parallelism between the surface of the virtual region of the semiconductor layer and the pattern surface of the mold may be low. As a result, due to the height distribution on the surface of the semiconductor substrate, the shape of the fine structure such as the diffraction grating to be formed varies.

  When manufacturing a semiconductor optical device using a silicon substrate as a semiconductor substrate, the flatness of the surface of the silicon substrate can be made extremely high, so that the fine structure resulting from the height distribution of the surface of the semiconductor substrate as described above can be obtained. Variations in shape do not matter so much. However, when manufacturing a group III-V semiconductor optical device using a group III-V semiconductor substrate such as an InP substrate as the semiconductor substrate, the flatness of the surface of the group III-V semiconductor substrate made of a compound semiconductor is Since it is very bad compared with the flatness, the variation in the shape of the fine structure due to the height distribution on the surface of the semiconductor substrate becomes a big problem. In the above Patent Document 1, nothing is mentioned about the nanoimprint method in the case of manufacturing a semiconductor optical device using a III-V group semiconductor substrate. In addition, in order to reduce the variation in the shape of the fine structure due to the above-described height distribution on the surface of the semiconductor substrate, a method of strongly pressing the mold against the resin layer is conceivable, but in general, a semiconductor substrate, particularly a III-V semiconductor There is a possibility that the substrate is easily cracked, and that the substrate is broken by being pressed with a large pressure, or that crystal defects such as dislocations are introduced into the semiconductor substrate.

  The present invention has been made in view of such problems, and is a method for manufacturing a group III-V semiconductor optical device including a step of forming a microstructure by a nanoimprint method, which reduces variations in the shape of the microstructure. It is an object of the present invention to provide a method for manufacturing a group III-V semiconductor optical device.

  In order to solve the above-described problems, a method for manufacturing a group III-V semiconductor optical device according to the present invention includes a step of forming a semiconductor layer on a group III-V semiconductor substrate, and a microstructure is formed in the semiconductor layer by a nanoimprint method. The nanoimprint process includes a step of preparing a mold having a concavo-convex pattern for a fine structure, and a surface of the mold concavo-convex pattern and the semiconductor layer so that the mold and the semiconductor layer are separated from each other. A facing process for facing the part, a mold height distribution measuring process for measuring the height distribution of the uneven pattern of the mold, and a semiconductor layer height distribution measuring process for measuring the height distribution of the part of the surface of the semiconductor layer And after the step of forming the resin layer on the semiconductor layer, the mold height distribution measuring step, and the semiconductor layer height distribution measuring step, Distribution of the residual film thickness of the resin layer formed corresponding to the convex part of the concave-convex pattern when virtually pressed against the resin layer on the part of the surface of the mold, the height distribution of the concave-convex pattern of the mold And the relative positional relationship between the mold and the group III-V semiconductor substrate such that the amount of variation in the remaining film thickness is not more than a predetermined amount by calculating based on the height distribution of the part of the surface of the semiconductor layer. And a resin layer on the part of the surface of the semiconductor layer so that the mold and the group III-V semiconductor substrate have the relative positional relationship determined in the relative positional relationship determining step. A pressing step for pressing the concave / convex pattern of the mold onto the resin, a curing step for curing the resin layer on the surface of the semiconductor layer with the mold pressed against the resin layer, and a mold and a resin layer after the curing step. Separate And a step of forming a microstructure in the semiconductor layer by etching the semiconductor layer using the resin layer as a mask after the separation step.

  According to the III-V semiconductor optical device manufacturing method of the present invention, before actually pressing the mold concavo-convex pattern onto the resin layer on a part of the surface of the semiconductor layer, the mold concavo-convex pattern is formed on the surface of the semiconductor layer. Virtually pressing the resin layer on a part of the resin layer, the relative positional relationship between the mold and the group III-V semiconductor substrate is determined so that the variation in the residual film thickness of the resin layer is less than a predetermined amount. Yes. Thereafter, the concave / convex pattern of the mold is pressed against a resin layer on a part of the surface of the semiconductor layer so that the mold and the III-V semiconductor substrate have such a relative positional relationship. Therefore, even if there is a height distribution on the surface of the III-V group semiconductor substrate, the variation in the thickness of the remaining film of the resin layer that is actually formed can be made a predetermined amount or less. As a result, variation in the shape of the fine structure can be reduced.

  Furthermore, in the pressing step, it is preferable to press the mold against the resin layer so that the mold and the semiconductor layer do not come into contact with each other. Thus, when the mold is pressed against the resin layer, the resin layer between the mold and the semiconductor layer functions as a buffer layer that relieves pressure transmitted from the mold to the semiconductor layer and the III-V group semiconductor substrate. As a result, it is possible to suppress the occurrence of crystal defects such as dislocations in the semiconductor layer and the III-V group semiconductor substrate due to the pressure.

  Furthermore, in the pressing step, the maximum pressure when pressing the mold against the resin layer is preferably 0.01 MPa or more and 1 MPa or less. As a result, the uncured resin can be spread and the unnecessary resin can be pushed out between the concave / convex pattern of the mold and the semiconductor layer, and crystal defects such as dislocations are generated in the semiconductor layer and the III-V semiconductor substrate. Can be suppressed.

  Furthermore, in the method for producing a group III-V semiconductor optical device according to the present invention, the fine structure is preferably a diffraction grating. Thus, a III-V semiconductor optical device having a diffraction grating can be manufactured.

  According to the present invention, a method for manufacturing a group III-V semiconductor optical device including a step of forming a microstructure by a nanoimprint method, the group III-V semiconductor optical capable of reducing variation in the shape of the microstructure A method for manufacturing a device is provided.

FIG. 1 is a flowchart showing a method for manufacturing a group III-V semiconductor optical device of this embodiment. FIG. 2 is a flowchart showing details of the nanoimprint process. FIG. 3A illustrates a cross section in the semiconductor layer forming step. FIG. 3B is a plan view showing a semiconductor formation step. FIG. 4A is a diagram showing a cross section of the mold prepared in the mold preparation process. FIG. 4B is a plan view of the mold prepared in the mold preparation process. FIG. 4C is a diagram showing a cross section of the mold prepared in the mold preparation process. FIG. 5 is a schematic cross-sectional view showing the facing process. FIG. 6 is a schematic cross-sectional view showing a mold height distribution measuring step. FIG. 7 is a schematic cross-sectional view showing the semiconductor layer height distribution measuring step. FIG. 8 is a schematic cross-sectional view showing the resin layer forming step. FIG. 9 is a schematic cross-sectional view showing the relative positional relationship determining step. FIG. 10 is a view showing a cross section in the pressing step. FIG. 11 is a diagram showing a cross section in the separation step. FIG. 12 is a diagram showing a cross section in the repetition process. FIG. 13 is a view showing a cross section in the diffraction grating forming step. FIG. 14 is a partially broken perspective view of the distributed feedback semiconductor laser manufactured by the manufacturing method according to the embodiment.

  Hereinafter, a method for manufacturing a group III-V semiconductor optical device according to an embodiment will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used for the same elements when possible. In addition, the dimensional ratios in the components in the drawings and between the components are arbitrary for easy viewing of the drawings.

  A method for manufacturing a distributed feedback semiconductor laser having a diffraction grating as a fine structure will be described as a method for manufacturing a group III-V semiconductor optical device of the present embodiment.

  FIG. 1 is a flowchart showing a method for manufacturing a group III-V semiconductor optical device of this embodiment. As shown in FIG. 1, the manufacturing method of the III-V group semiconductor optical device of this embodiment has semiconductor layer formation process S1 and nanoimprint process S3 which forms a diffraction grating by the nanoimprint method.

  FIG. 2 is a flowchart showing details of the nanoimprint process. As shown in FIG. 2, in the nanoimprint process S3, a mold preparation process S3-1 for preparing a mold, an opposing process S3-3 for facing the mold and the semiconductor layer, and a mold for measuring the height distribution of the mold. Height distribution measuring step S3-5, semiconductor layer height distribution measuring step S3-7 for measuring the height distribution of the surface of the semiconductor layer, and resin layer forming step S3-9 for forming a resin layer on the semiconductor layer, The relative positional relationship determining step S3-11 for determining the relative positional relationship between the mold and the III-V group semiconductor substrate, the pressing step S3-13 for pressing the concave / convex pattern of the mold against the resin layer, and the curing step for curing the resin layer S3-15, a separation step S3-17 for separating the mold and the resin layer, a determination step S3-19 for determining whether or not a region for nanoimprinting remains, and a tree A diffraction grating forming step S3-21 of etching the semiconductor layer to layer as a mask, can be performed. Details of these steps will be described below.

(Semiconductor layer formation process)
FIG. 3A illustrates a cross section in the semiconductor layer forming step. FIG. 3B is a plan view showing the semiconductor layer forming step.

  As shown in FIG. 3A, in the semiconductor layer forming step S1, the first cladding layer 5, the first optical confinement layer 7, and the like are formed on the group III-V semiconductor substrate 3 by, eg, metal organic vapor phase epitaxy. The active layer 9, the second light confinement layer 11, and the semiconductor layer 15 are formed in this order. The first clad layer 5, the first light confinement layer 7, the active layer 9, and the second light confinement layer 11 form a stacked body 13. In FIG. 3A, an orthogonal coordinate system 2 is shown. The Z axis is set in the thickness direction of the group III-V semiconductor substrate 3, and the X axis and the Y axis are set in directions perpendicular thereto. It is set. Also in each figure after FIG. 3 (A), the orthogonal coordinate system 2 is shown as needed.

  The group III-V semiconductor substrate 3 is a first conductivity type (for example, n-type) semiconductor substrate and is made of a group III-V compound semiconductor such as InP or GaN. The first cladding layer 5 is made of a first conductivity type III-V group compound semiconductor such as InP or GaN. The first optical confinement layer 7 is made of a first conductivity type III-V group compound semiconductor such as GaInAsP. The active layer 9 has, for example, an MQW (multiple quantum well) structure or an SQW (single quantum well) structure. The active layer 9 is made of, for example, a III-V group compound semiconductor such as GaInAsP or AlGaInAs. The second optical confinement layer 11 is made of a III-V group compound semiconductor such as GaInAsP of the second conductivity type (p-type when the first conductivity type is n-type). The semiconductor layer 15 is made of a second conductivity type III-V group compound semiconductor such as GaInAsP. A diffraction grating 15P is formed in the semiconductor layer 15 in a later step (see FIG. 14). Note that the first light confinement layer 7 and the second light confinement layer 11 may not be formed.

  As shown in FIG. 3B, the semiconductor layer 15 includes a plurality of virtual regions 15A. As will be described later, nanoimprinting is sequentially performed on each of the plurality of virtual regions 15A. When the group III-V semiconductor substrate 3 has a disk shape with a diameter of 2 inches, for example, the length in the X-axis direction and the length in the Y-axis direction of the virtual region 15A can be set to 6 mm and 8 mm, respectively.

(Nanoimprint process)
Next, each process which can be performed in nanoimprint process S3 is demonstrated.

(Mold preparation process)
4A and 4C are views showing a cross section of the mold prepared in the mold preparation process, and FIG. 4B is a plan view of the mold prepared in the mold preparation process.

  As shown in FIGS. 4A and 4B, the mold 30 prepared in the mold preparation step S3-1 includes a rectangular flat plate portion 30B extending in parallel with the XY plane, and a flat plate portion 30B. It has a rectangular plate-like mesa portion 30R that is formed on a part of the surface on the negative side of the Z-axis and extends parallel to the XY plane. An uneven pattern 30P for the diffraction grating 15P (see FIG. 14) is formed on the entire surface of the pattern surface 30M on the Z-axis negative side of the mesa portion 30R.

  In this embodiment, the concavo-convex pattern 30P has a line and space shape in which a line shape and a space shape are alternately arranged periodically. Specifically, the concavo-convex pattern 30P extends along the Y axis, extends along the Y axis, and a plurality of line portions 30L having the same width in the X axis direction and the same height in the Z axis direction, respectively. A plurality of space portions 30S having the same width in the direction and the same height in the Z-axis direction are included, and the line portions 30L and the space portions 30S are alternately arranged in the X-axis direction. The multiple line portions 30L correspond to the convex portions of the concave / convex pattern 30P, and the multiple space portions 30S correspond to the concave portions of the concave / convex pattern 30P. The height of the line portion 30L in the Z-axis direction can be set to, for example, 100 nm to 200 nm. The total value of the period of the concavo-convex pattern 30P, that is, the width in the X-axis direction of one line portion 30L and the width in the X-axis direction of one space portion 30S can be set to, for example, 150 nm to 250 nm.

  The width X30P in the X-axis direction and the width Y30P in the Y-axis direction of the concavo-convex pattern 30P are substantially the same as the length of the virtual region 15A in the X-axis direction and the length in the Y-axis direction (see FIG. 3B). For example, 6 mm and 8 mm, respectively.

  The height of the mesa portion 30R in the Z-axis direction can be set to 15 μm, for example. The length in the X-axis direction and the length in the Y-axis direction of the flat plate portion 30B can be set to, for example, 20 mm to 100 mm and 20 mm to 100 mm, respectively, and the thickness in the Z-axis direction can be set to, for example, 1 mm to 30 mm. it can.

  The mold 30 is made of, for example, quartz. The mold 30 having the above-described shape is obtained, for example, by preparing a flat plate-like quartz substrate and etching it by a photolithography method. Since a flat quartz substrate having a very high surface flatness is available, the flatness of the surface of the pattern surface 30M and the flat plate portion 30B formed by processing it can be increased. There are some irregularities on the surface of 30M and the flat plate portion 30B. FIG. 4C is a view showing a cross section of the mold in which such unevenness is emphasized. As shown in FIG. 4C, since the pattern surface 30M has a certain degree of unevenness in the Z-axis direction, the pattern surface 30M is not completely flat but curved. The size of the unevenness of the pattern surface 30M in the Z-axis direction may be, for example, about 35 nm per 6 mm in the direction along the XY plane. For this reason, the tip position on the negative side of the Z-axis of the line portion 30L of the uneven pattern 30P varies to some extent.

(Opposite process)
FIG. 5 is a schematic cross-sectional view showing the facing process. As shown in FIG. 5, in the facing step S <b> 3-3, the mold 30 and the group III-V semiconductor substrate 3 on which the stacked body 13 and the semiconductor layer 15 are formed are placed in the nanoimprint apparatus 50. The nanoimprint apparatus 50 includes a mold support part 51 and a substrate support part 53. In addition, the nanoimprint apparatus 50 includes height distribution measuring devices 55 and 57 used in later steps. The mold 30 is supported by the mold support 51 and the group III-V semiconductor substrate 3 is supported by the substrate support 53 so that the mold 30 and the semiconductor layer 15 are separated in the Z-axis direction (first direction). The concave / convex pattern 30P of the mold 30 and a part 15AS of the surface 15S of the semiconductor layer 15 are opposed to each other. The part 15AS of the surface 15S means one surface of the plurality of virtual regions 15A.

  By performing this facing process, the first virtual surface 30I parallel to the XY plane in the mold 30 and the second virtual surface 3I in the III-V semiconductor substrate 3 become parallel.

(Mold height distribution measurement process)
FIG. 6 is a schematic cross-sectional view showing the mold height distribution measurement step, and shows a state in which the mold 30 is supported by the mold support portion 51. As shown in FIG. 6, in the mold height distribution measuring step S <b> 3-5, the height distribution of the uneven pattern 30 </ b> P of the mold 30 is measured using the height distribution measuring device 55. Specifically, for example, the coordinates of the plurality of measurement points 30C in the orthogonal coordinate system 2 are measured by measuring the distance to the plurality of measurement points 30C in the uneven pattern 30P while scanning the height distribution measuring device 55 in the XY plane. (X, Y, Z) are respectively calculated. As the height distribution measuring device 55, for example, an air gauge proximity sensor or a laser length measuring device can be used.

(Semiconductor layer height distribution measurement process)
FIG. 7 is a schematic cross-sectional view showing the semiconductor layer height distribution measuring step, and shows a state where the III-V group semiconductor substrate 3 is supported by the substrate support portion 53. In FIG. 7, the unevenness of the surface 3S of the group III-V semiconductor substrate 3 is highlighted. As shown in FIG. 7, the surface 3S of the III-V group semiconductor substrate 3 has some unevenness. As the silicon substrate, a substrate having a very high surface flatness is available. Compared with the surface flatness of the silicon substrate, the flatness of the surface 3S of the group III-V semiconductor substrate 3 made of a compound semiconductor is available. Is very low. Therefore, the flatness of the surface 13S of the stacked body 13 is also lowered, and the flatness of the surface 15S of the semiconductor layer 15 is also lowered.

  As shown in FIG. 7, in the semiconductor layer height distribution measuring step S <b> 3-7, at least the above-described facing step S <b> 3-3 of the mold 30 of the surface 15 </ b> S of the semiconductor layer 15 using the height distribution measuring device 57. The height distribution of the part 15AS of the surface 15S of the semiconductor layer 15 opposed to the uneven pattern 30P is measured. Specifically, for example, by measuring the distance to the plurality of measurement points 15C in the part 15AS of the surface 15S while scanning the height distribution measuring device 57 in the XY plane, a plurality of measurements in the orthogonal coordinate system 2 is performed. The coordinates (X, Y, Z) of the point 15C are calculated. The height distribution measurement by the height distribution measuring device 57 is performed by using the common coordinate system and the height distribution measuring by the height distribution measuring device 55 in the above-described mold height distribution measuring step S3-5. Therefore, after the semiconductor layer height distribution measurement step S3-7, it is possible to calculate the relative positional relationship between the concave / convex pattern 30P of the mold 30 and the part 15AS of the surface 15S of the semiconductor layer 15.

  In the semiconductor layer height distribution measuring step S3-7, in addition to the part 15AS of the surface 15S of the semiconductor layer 15 opposed to the concave / convex pattern 30P of the mold 30 in the facing step S3-3, the semiconductor layer 15 The height distribution of other portions of the surface 15S may be measured. For example, the height distribution of the entire surface 15S of the semiconductor layer 15 can be measured. As the height distribution measuring device 57, for example, an air gauge proximity sensor or a laser length measuring device can be used in the same manner as the height distribution measuring device 55. Note that the height distribution measuring device 55 and the height distribution measuring device 57 may be the same height distribution measuring device.

(Resin layer forming process)
FIG. 8 is a schematic cross-sectional view showing the resin layer forming step. As shown in FIG. 8, in the resin layer forming step S3-9, the resin layer 17 is formed on the semiconductor layer 15 by, eg, spin coating. As the resin layer 17, a thermoplastic resin or an ultraviolet curable resin can be used. The thickness of the resin layer 17 is not particularly limited, but can be, for example, 0.1 μm to 0.5 μm.

(Relative positional relationship determination process)
FIG. 9 is a schematic cross-sectional view showing the relative positional relationship determining step. As shown in FIG. 9, in the relative positional relationship determination step S3-11, the relative angle formed between the first virtual surface 30I in the mold 30 and the second virtual surface 3I in the III-V group semiconductor substrate 3 is opposed to each other. While changing virtually from the parallel state immediately after step S3-3, the concave / convex pattern 30P of the mold 30 was virtually pressed against the resin layer 17A on the part 15AS of the surface 15S of the semiconductor layer 15. Assume a case. For example, while making the XY coordinates of the center position of the concave / convex pattern 30P of the mold 30 coincide with the XY coordinates of the center position of the part 15AS of the surface 15S, the distance in the Z-axis direction of these center positions is shortened. A case is assumed where the relative angle formed by the first virtual surface 30I and the second virtual surface 3I is changed. In this way, it is assumed that the mold 30 and the III-V group semiconductor substrate 3 are moved so as to satisfy a certain relative positional relationship.

  For example, the relative angle between the first virtual surface 30I and the second virtual surface 3I is changed so that the average plane of the pattern surface 30M of the mold 30 and the average plane of the part 15AS of the surface 15S are parallel to each other. Or by changing to approach parallel. The average plane of the pattern surface 30M is, for example, a plane that is fitted by a fitting method such as a least square method from the height distribution of the concave / convex pattern 30P of the mold 30 measured in the above-described mold height distribution measuring step S3-5. Can do. Similarly, the average plane of the part 15AS of the surface 15S is obtained from, for example, the least square method or the like from the height distribution of the part 15AS of the surface 15S measured in the semiconductor layer height distribution measuring step S3-7. It can be set as the plane fitted by the fitting method.

  Then, the height distribution of the concavo-convex pattern 30P of the mold 30 measured in the mold height distribution measurement step S3-5 and the surface 15S of the semiconductor layer 15 measured in the semiconductor layer height distribution measurement step S3-7. Based on the height distribution of the part 15AS, the amount of variation in the remaining film thicknesses R17A, R17B, R17C, R17D, and R17E of the resin layer 17 formed corresponding to the plurality of line portions 30L of the uneven pattern 30P is calculated. . Thereafter, it is determined whether or not the variation amount is equal to or less than a predetermined amount. If this variation amount is larger than a predetermined amount, a step of further changing the relative positional relationship between the mold 30 and the III-V semiconductor substrate 3 and the remaining film thicknesses R17A, R17B, R17C, R17D of the resin layer 17 are performed. The process of calculating the variation amount of R17E is repeated until the variation amount becomes equal to or less than a predetermined amount.

  The predetermined amount of variation depends on the height difference in the height distribution in the Z-axis direction of the protrusions of the concavo-convex pattern 30P of the mold 30 and the height difference in the height distribution of the part 15AS on the surface 15S of the semiconductor layer 15. Can be determined. For example, in this embodiment, the height difference of the line portion 30L in the Z-axis direction (see FIG. 4A) and the height difference of the part 15AS of the surface 15S are 35 nm and 35 nm, respectively. At this time, the predetermined amount of variation of the remaining film thicknesses R17A, R17B, R17C, R17D, and R17E of the resin layer 17 can be set to 35 nm to 70 nm. In this way, the relative positional relationship between the mold 30 and the group III-V semiconductor substrate 3 is determined so that the variation amount is equal to or less than the predetermined amount. When the mold 30 and the III-V group semiconductor substrate 3 satisfy the determined relative positional relationship, as shown in FIG. 9, the relative angle between the first virtual surface 30I and the second virtual surface 3I is θm. In the present embodiment, when the mold 30 and the III-V group semiconductor substrate 3 satisfy the determined relative positional relationship, the first virtual surface 30I is parallel to the X axis and the Y axis, and the second virtual surface 3I is X The second imaginary plane 3I is generally non-parallel to the Y axis, although it forms an angle of θm with the axis and is parallel to the Y axis.

(Pressing process)
FIG. 10 is a view showing a cross section in the pressing step. As shown in FIG. 10, in the pressing step S3-13, the mold 30 and the III-V group semiconductor substrate 3 are arranged so as to have the relative positional relationship determined in the above-described relative positional relationship determining step S3-11. The uneven pattern 30P of the mold 30 is pressed against the resin layer 17A on the part 15AS of the surface 15S of the layer 15. Specifically, this can be performed as follows.

  First, the XY coordinates of the center position of the uneven pattern 30P of the mold 30 are matched with the XY coordinates of the center position of the part 15AS of the surface 15S. Then, at least one of the mold support portion 51 and the substrate support portion 53 is tilted so that the relative angle formed by the first virtual surface 30I and the second virtual surface 3I is θm. FIG. 10 shows a state in which the relative angle formed by the first virtual surface 30I and the second virtual surface 3I is θm by tilting only the substrate support portion 53. The mold support part 51 and the substrate support part 53 can be inclined at a predetermined angle by a known method. For example, the mold support 51 and the substrate support 53 can be inclined at a predetermined angle by a stepping motor or a piezoelectric actuator connected to the mold support 51 and the substrate support 53.

  Next, the mold 30 is moved to the Z-axis negative side while maintaining the relative angle formed between the first virtual surface 30I and the second virtual surface 3I at θm, and the mold 30 is formed on the resin layer 17A on the part 15AS. The concave / convex pattern 30P is pressed. In this way, the mold 30 and the III-V group semiconductor substrate 3 are molded on the resin layer 17A on the part 15AS so that the relative positional relationship determined in the above-described relative positional relationship determining step S3-11 is achieved. Thirty uneven patterns 30P can be pressed. In the case where a thermoplastic resin is used as the resin layer 17, the resin layer 17A is heated to the glass transition temperature or higher before pressing the concave / convex pattern 30P of the mold 30 onto the resin layer 17A.

  When pressing the concave / convex pattern 30P of the mold 30 against the resin layer 17A on the part 15AS, it is preferable that the mold 30 and the semiconductor layer 15 do not come into contact with each other. Thus, when the mold 30 is pressed against the resin layer 17A, the resin layer 17 between the mold 30 and the semiconductor layer 15 is a buffer that relaxes the pressure transmitted from the mold 30 to the semiconductor layer 15 and the III-V group semiconductor substrate 3. Acts as a layer. As a result, it is possible to suppress the occurrence of crystal defects such as dislocations in the semiconductor layer 15 or the III-V group semiconductor substrate 3 due to the pressure transmitted to the semiconductor layer 15 or the III-V group semiconductor substrate 3.

  The maximum pressure when pressing the concave / convex pattern 30P of the mold 30 against the resin layer 17A on the part 15AS of the surface 15S of the semiconductor layer 15 is preferably 0.01 MPa or more and 1 MPa or less. If this maximum pressure is 0.01 MPa or more, the uncured resin can be spread and the unnecessary portion of the resin can be pushed out between the concave / convex pattern 30P and the semiconductor layer 15AS. This is because the occurrence of crystal defects such as dislocations in the semiconductor layer 15 and the III-V group semiconductor substrate 3 can be suppressed.

(Curing process)
Next, the resin layer 17A on the part 15AS of the surface 15S of the semiconductor layer 15 is cured in a state where the uneven pattern 30P of the mold 30 is pressed against the resin layer 17A on the part 15AS. This can be performed by irradiating the resin layer 17A on the part 15AS with ultraviolet rays when an ultraviolet curable resin is used as the resin layer 17, and when a thermoplastic resin is used as the resin layer 17, a semiconductor. This can be done by setting the temperature of the resin layer 17A on the part 15AS of the surface 15S of the layer 15 to the glass transition temperature or lower.

(Separation process)
FIG. 11 is a diagram showing a cross section in the separation step. As shown in FIG. 11, in the separation step S3-17, the mold 30 and the resin layer 17 are separated after the curing step. As a result, the uneven pattern 30P of the mold 30 is transferred to the part 15AS of the surface 15S of the semiconductor layer 15. Thus, the line and space pattern 17P is formed in the resin layer 17A on the part 15AS.

(Judgment process)
FIG. 12 is a diagram illustrating a cross-section in the determination process. As shown in FIG. 12, in the determination step S3-19, it is determined whether or not a region for performing nanoimprinting remains in the other part 15AS of the surface 15 of the semiconductor layer 15. When such a region remains, for the other part 15AS of the surface 15 to be nanoimprinted next, the above-described relative positional relationship determining step S3-11, pressing step S3-13, and curing step S3-15 Then, the separation step S3-17 is performed in this order. When the other portion 15AS of the surface 15 to be nanoimprinted next is not measured for the height distribution in the semiconductor layer height distribution measuring step S3-7, the relative positional relationship determining step S3-11 is performed. Before, semiconductor layer height distribution measurement step S3-7 is performed on the other part 15AS of the surface 15 to be nanoimprinted next. In this way, the line and space pattern 17P is formed for each of the resin layers 17A on the other part 15AS of the surface 15S.

(Diffraction grating forming process)
FIG. 13 is a view showing a cross section in the diffraction grating forming step. As shown in FIG. 13, in the diffraction grating formation step S3-21, the semiconductor layer 15 is etched by the reactive ion etching method, for example, using the resin layer 17 as a mask. Then, the region of the resin layer 17 where the remaining film is thinner is exposed earlier and the semiconductor layer 15 underneath is etched deeper. Thereby, the line and space shape of the resin layer 17 is transferred to the semiconductor layer 15 to form a diffraction grating 15P. The resin layer 17 remaining after forming the diffraction grating 15P is removed by, for example, reactive plasma etching or the like before proceeding to the next step.

  After these steps, as shown in FIG. 14, a buried layer 21 is formed on the semiconductor layer 15 on which the diffraction grating 15P is formed, for example, by metal organic vapor phase epitaxy. The buried layer 21 embeds the diffraction grating 15P. The buried layer 21 is made of a second conductivity type III-V group compound semiconductor such as InP. The buried layer 21 may be made of the same material as the semiconductor layer 15 or may be made of a different material. The semiconductor layer 15 and the buried layer 21 form the second cladding layer 23.

  Thereafter, the second cladding layer 23, the second optical confinement layer 11, the active layer 9, the first optical confinement layer 7, and the first cladding layer 5 are wet-etched to form a semiconductor mesa. Further, after the mesa buried layer 31 for embedding the semiconductor mesa is formed, the third cladding layer 25 is formed on the mesa buried layer 31 and the second cladding layer 23. The mesa buried layer 31 is made of, for example, a semi-insulating III-V compound semiconductor such as InP doped with Fe. The mesa buried layer 31 has a laminated structure in which a III-V group compound semiconductor layer made of a first conductivity type InP or the like and a III-V group compound semiconductor layer made of a second conductivity type InP or the like are laminated. Also good. The third cladding layer 25 is made of a III-V group compound semiconductor such as second conductivity type InP, for example. Note that the third cladding layer 25 may not be formed. Thereafter, the contact layer 27 and the upper electrode 29 are formed in this order on the third cladding layer 25. The contact layer 27 is made of a III-V group compound semiconductor such as a second conductivity type GaInAs, for example. The upper electrode 29 has a laminated structure made of, for example, Ti / Pt / Au. Further, the lower electrode 33 is formed on the back surface of the III-V group semiconductor substrate 3. The lower electrode 33 is made of, for example, an AuGeNi alloy. Through the above steps, the distributed feedback semiconductor laser 40 having the diffraction grating 15P can be manufactured.

  According to the method of manufacturing the distributed feedback semiconductor laser 40 of the present embodiment as described above, before the concave / convex pattern 30P of the mold 30 is actually pressed against the resin layer 17A on the part 15AS of the surface 15S of the semiconductor layer 15, It is assumed that the relative angle formed by the first virtual surface 30I and the second virtual surface 3I is changed, and the uneven pattern 30P of the mold 30 is pressed against the resin layer 17A on the part 15AS of the surface 15S of the semiconductor layer 15. In this case, the relative positional relationship between the mold 30 and the III-V group semiconductor substrate 3 is obtained so that the variation of the remaining film thicknesses R17A, R17B, R17C, R17D, and R17E of the resin layer 17 becomes a predetermined amount or less. (See FIG. 9). Thereafter, the concave / convex pattern 30P of the mold 30 is pressed against the resin layer 17A on the part 15AS of the surface 15S of the semiconductor layer 15 so that the mold 30 and the III-V group semiconductor substrate 3 have such a relative positional relationship. (See FIG. 10).

  For example, in the above-described embodiment, the concave / convex pattern 30P of the mold 30 is applied to the resin layer 17A on the part 15AS of the surface 15S of the semiconductor layer 15 while the first virtual surface 30I and the second virtual surface 3I are in parallel. When pressed, due to the height distribution of the surface 3S of the III-V semiconductor substrate 3, the variations in the remaining film thicknesses R17A, R17B, R17C, R17D, and R17E of the resin layer 17 become large. On the other hand, in the above-described embodiment, the remaining film thicknesses R17A and R17B of the resin layer 17 when it is assumed that the uneven pattern 30P of the mold 30 is pressed against the resin layer 17A on the part 15AS of the surface 15S of the semiconductor layer 15. , R17C, R17D, R17E, and the mold 30 and the III-V group semiconductor substrate 3 determine such a relative positional relationship with respect to a part 15AS of the surface 15S of the semiconductor layer 15 so that the variation thereof becomes a predetermined amount or less. In addition, parallelization with the concave / convex pattern 30P is virtually performed locally.

  Therefore, even if there is a height distribution on the surface 3S of the III-V group semiconductor substrate 3, the variation of the residual film thickness R17A, R17B, R17C, R17D, R17E of the actually formed resin layer is less than a predetermined amount. can do. As a result, variation in the shape of the diffraction grating 15P can be reduced (see FIGS. 13 and 14).

  The present invention is not limited to the above-described embodiment, and various modifications can be made.

  For example, in the above-described embodiment, the diffraction grating 15P is formed in the second cladding layer 23. However, the diffraction grating 15P may be formed in another semiconductor layer, for example, the first cladding layer 5 (see FIG. 14). ).

  In the above-described embodiment, the method of manufacturing the distributed feedback semiconductor laser having the diffraction grating 15P as the fine structure has been described. However, the fine structure may be, for example, a two-dimensional photonic crystal.

  The present invention can also be applied to a method of manufacturing a light emitting diode, a surface emitting laser, or an optical waveguide having a two-dimensional photonic crystal as a fine structure.

  3 ... III-V semiconductor substrate, 3I ... second virtual surface, 15 ... semiconductor layer, 15S ... surface of the semiconductor layer, 15AS ... part of the surface of the semiconductor layer, ..Resin layer, 30... Mold, 30P... Concavity and convexity pattern of mold, 30I... First virtual surface, 40... Distributed feedback semiconductor laser (III-V semiconductor optical device), R17A, R17B, R17C, R17D, R17E ... residual film thickness of resin layer, S1 ... semiconductor layer forming step, S3 ... nanoimprint step, S3-1 ... mold preparation step, S3-3 ... Opposing step, S3-5 ... mold height distribution measuring step, S3-7 ... semiconductor layer height distribution measuring step, S3-9 ... resin layer forming step, S3-11 ... relative positional relationship Determination step, S3-13 ... Pressing step, S3-15 ··· Curing step, S3-17 ··· Separating step, S3-19 ··· Repeating step, S3-21 ··· Diffraction grating forming step.

Claims (4)

Forming a semiconductor layer on a III-V semiconductor substrate;
A nanoimprint process for forming a fine structure in the semiconductor layer by a nanoimprint method; and
Have
The nanoimprint process includes:
Preparing a mold having a concavo-convex pattern for the fine structure;
An opposing step of opposing the concavo-convex pattern of the mold and a part of the surface of the semiconductor layer so that the mold and the semiconductor layer are separated from each other;
A mold height distribution measuring step for measuring the height distribution of the uneven pattern of the mold;
A semiconductor layer height distribution measuring step for measuring the height distribution of the part of the surface of the semiconductor layer;
Forming a resin layer on the semiconductor layer;
After the mold height distribution measurement step and the semiconductor layer height distribution measurement step, when the uneven pattern of the mold is virtually pressed against the resin layer on the part of the surface of the semiconductor layer, Variations in the residual film thickness of the resin layer formed corresponding to the convex portions of the concave / convex pattern are obtained by calculating the height distribution of the concave / convex pattern of the mold and the height of the part of the surface of the semiconductor layer. A relative positional relationship determining step for determining a relative positional relationship between the mold and the group III-V semiconductor substrate such that a variation amount of the residual film thickness is equal to or less than a predetermined amount by calculating based on a thickness distribution; ,
The mold and the group III-V semiconductor substrate have the relative positional relationship determined in the relative positional relationship determination step so that the mold is placed on the resin layer on the part of the surface of the semiconductor layer. A pressing step of pressing the uneven pattern;
A curing step of curing the resin layer on the part of the surface of the semiconductor layer with the mold pressed against the resin layer;
After the curing step, a separation step of separating the mold and the resin layer,
Forming the microstructure in the semiconductor layer by etching the semiconductor layer using the resin layer as a mask after the separating step;
A method for producing a group III-V semiconductor optical device, comprising:   The method of manufacturing a group III-V semiconductor optical device according to claim 1, wherein, in the pressing step, the mold is pressed against the resin layer so that the mold and the semiconductor layer do not contact each other.   3. The group III-V semiconductor optical device according to claim 1, wherein in the pressing step, a maximum pressure when pressing the mold against the resin layer is 0.01 MPa or more and 1 MPa or less. 4. Method. The method for manufacturing a group III-V semiconductor optical device according to claim 1, wherein the microstructure is a diffraction grating.

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