JP2010263104A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To form fine and accurate STI using a silica-based SOD film. <P>SOLUTION: A semiconductor device is element-isolated by an element isolation insulating film including a silicon oxide film in a groove formed in a semiconductor substrate 1, and the element isolation insulating film includes: an oxidation-resistive side-wall film 5 provided on the side face of the groove; a silicon oxide film 8 arranged at a lower part of the groove surrounded with the sidewall film 5 and formed by a thermal oxidation method; and a silica-based SOD film 7 filling an upper part of the groove surrounded with the sidewall film. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device in which an insulating film is formed in a shallow trench isolation (STI) region by spin coating and a manufacturing method thereof.

  In recent years, when manufacturing miniaturized semiconductor devices, STI in which an insulating film is embedded in a groove formed in a semiconductor substrate is generally used as element isolation.

  As the miniaturization progresses, the aspect ratio of the trench for forming the STI increases, so that it is difficult to completely fill the trench with an insulating film formed by a normal CVD method. For this reason, it has been proposed to use a material such as polysilazane that can be filled in the groove by spin coating (Patent Document 1).

Polysilazane is also called a silazane-type polymer and is a polymer material having a basic structure of-(SiH ₂ -NH)-and is used by being dissolved in a solvent (xylene, di-n-butyl ether, etc.). Silazane-type polymers also include substances in which hydrogen is replaced by other functional groups such as methoxy groups. A polymer to which no functional group / modifying group is added is called perhydropolysilazane.

  Hereinafter, a silica-based insulating film formed by a spin coating method such as polysilazane is referred to as a silica-based SOD (Spin On Dielectric) film. The silica-based SOD film is also called spin on glass (SOG). In this specification, a film obtained by modifying a precursor film such as polysilazane formed by spin coating into silicon oxide with water vapor or the like is referred to as a silica-based SOD film.

In order to form an STI using a silica-based SOD film, it is necessary to apply a polysilazane-based solution or the like by a spin coating method and then perform a heat treatment to modify the solid insulating film. That is, by heat-treating the polysilazane film in a high-temperature steam atmosphere, nitrogen in the applied polysilazane film reacts with water and becomes ammonia and is released. Thereby, the Si—N bond is replaced with the Si—O bond, and the film is reformed to a film containing silicon oxide (SiO ₂ ) as a main component.

When heat-treating the polysilazane film in a water vapor atmosphere, a film (liner film) having oxidation resistance such as silicon nitride (Si ₃ N ₄ ) is applied to the entire groove inner wall so that the oxidation damage does not reach the semiconductor substrate. A method of applying a polysilazane film after the formation is proposed (Patent Document 2).

  Here, as a silica-based SOD film formed by spin coating, the above-mentioned polysilazane having a volume shrinkage smaller than that of silicon hydride is preferable as a precursor. However, cracks and the like accompanying the volume shrinkage are still eliminated. Do not mean. Therefore, in Patent Documents 3 and 4, a polysilicon film is further laminated on a liner film such as silicon nitride by a CVD method, and a precursor film such as polysilazane is formed by spin coating in the formed void portion, and in a water vapor atmosphere. A method is disclosed in which polysilazane is modified into silicon oxide by heat treatment, and at the same time, polysilicon is oxidized into silicon oxide to expand its volume, thereby preventing cracks associated with volumetric shrinkage of the silica-based SOD film. Yes.

Japanese Patent No. 3178212 JP 2005-340446 A JP 2004-273519 A JP 2005-347636 A

For example, when a DRAM element is to be formed with a design rule of 60 nm or less, the opening width of the STI trench formed in the memory cell portion is about the same as the design rule, and the aspect ratio is about 4-6. . When such a fine groove is filled with a polysilazane film through a silicon nitride liner film and modification is performed in a water vapor atmosphere, the polysilazane film in the vicinity of the surface is sufficiently modified to form dense silicon oxide. However, the modification did not proceed sufficiently in the polysilazane film inside the groove. This is because ammonia (NH ₃ ) is degassed from the surface of silicon nitride, which is a liner film, and this ammonia inhibits the substitution of Si—N bonds in the polysilazane film by Si—O bonds. It is guessed.

  As described above, the insufficiently modified insulating film is exposed on the surface of the semiconductor substrate after the surface is polished by CMP (Chemical Mechanical Polishing) processing of STI formation. There was a case. This is presumably because the film quality becomes sparse and the etching rate increases with volume shrinkage during modification of the polysilazane film or the like. For this reason, there is a problem that a short circuit of the wiring layer due to the step is caused, and the manufacturing yield is lowered.

  As in Patent Documents 3 and 4, when polysilicon is laminated on the liner film, the problem of degassing from the surface of silicon nitride, which is the liner film, is expected to be improved. As the degree of integration increases further, the groove width of the element isolation region becomes narrower, and forming a plurality of films in such a narrow groove narrows the opening of the groove, that is, further increases the aspect ratio. Thus, it becomes difficult to form an SOD film by spin coating. On the other hand, when the polysilicon layer is formed thin so as to maintain the opening width to some extent, the compression effect due to volume expansion when the polysilicon layer changes to silicon oxide is reduced, and the silica-based SOD film is sufficiently densified. Not achieved. Further, Patent Document 4 discloses a method of performing a heat treatment in an atmosphere containing water vapor at a high temperature (900 to 1200 ° C.) enough to oxidize a part of the silicon nitride liner film. This increases the amount of polysilazane.

  In the present invention, an oxidation-resistant sidewall film provided on a side surface of a trench forming element isolation (STI), a thermally oxidized silicon layer provided at a lower portion of the trench surrounded by the sidewall film, and the side There is provided a semiconductor device having element isolation comprising a silica-based SOD film filled with an upper part of a silicon layer in a groove surrounded by a wall film.

  In the present invention, after a silicon layer is formed to half the groove depth by selective epitaxial growth on the surface of the semiconductor substrate (silicon substrate) exposed at the bottom of the groove surrounded by the sidewall film, the silica-based SOD precursor film The precursor film is modified into a silica-based SOD film mainly composed of a silicon oxide film, and at least a part of the silicon layer below the groove is formed by filling the upper part of the groove with heat treatment in a high-temperature steam atmosphere. There is provided a method for converting the silane to silicon oxide.

  When forming a fine STI using a silica-based SOD film, it becomes possible to modify the precursor film such as polysilazane filling the trench into a dense film of silicon oxide. For this reason, it is possible to easily form an STI having a flat structure. It is possible to prevent a decrease in manufacturing yield and manufacture a fine semiconductor device.

3 is a flowchart illustrating a method for forming an STI according to an embodiment of the present invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing explaining the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention.

  Hereinafter, examples for carrying out the present invention will be described with reference to the drawings. However, the present invention is not limited only to these examples, and appropriate modifications may be made without departing from the scope of the present invention. It may be added.

Example 1
FIG. 1 is a flowchart for explaining an STI formation method according to this embodiment, and FIGS. 2 to 8 are process cross-sectional views for explaining a method for manufacturing a semiconductor device according to an example of the present invention.

  First, in order to form a trench for STI in a semiconductor substrate (silicon substrate) 1, a silicon oxide film 2 formed by a thermal oxidation method and a silicon nitride film 3 formed by a CVD method are stacked as a hard mask, and known photolithography is performed. Using technology, the silicon nitride film 3 and the silicon oxide film 2 are patterned to form an opening (4a) that exposes the surface of the semiconductor substrate 1 (FIG. 2).

  Next, anisotropic etching of silicon is performed using the silicon nitride film 3 as a mask to form an element isolation groove (groove pattern 4) (FIG. 1: S1). A silicon oxide thin film (not shown) is formed on the surface of the groove pattern 4 by thermal oxidation (FIG. 1: S2). This thermal oxidation is performed to recover etching damage. Thereafter, a silicon nitride film having a film thickness that does not completely fill the inside of the groove pattern 4 is deposited by a known method such as a CVD method (FIG. 1: S3), and anisotropic etching is performed to thereby form a silicon nitride film. A side wall film 5 is formed (FIG. 1: S4). At this time, the surface of the semiconductor substrate 1 at the bottom of the groove pattern 4 is exposed (FIG. 3).

  Next, a silicon layer 6 is formed on the semiconductor substrate exposed at the bottom of the groove pattern 4 by selective epitaxial growth (FIG. 1: S5). A silicon layer is not formed on a portion (groove side surface and hard mask surface) where the surface (silicon) of the semiconductor substrate 1 is not exposed. In this example, the thickness of the silicon layer 6 is adjusted to be about half the depth of the groove pattern 4 (including the hard mask portion) (FIG. 4). As a result, for example, a groove pattern with an aspect ratio of 4 to 6 before the silicon layer is formed becomes a groove pattern with an aspect ratio of 2 to 3. The thickness of the silicon layer cannot be generally limited by the size of the STI to be formed, but is preferably 100 nm or more. Further, the upper limit of the film thickness may be a film thickness in which the silica-based SOD film filling the upper portion of the silicon layer remains even after the silicon layer is oxidized and subjected to a planarization process such as CMP.

  As a SOD precursor, a polysilazane solution (more specifically, a di-n-butyl ether solution of perhydropolysilazane) is applied by spin coating, and the solvent is volatilized by baking at about 150 ° C. A polysilazane film is formed so as to fill the inside of the silicon nitride film 3 and cover the upper surface of the silicon nitride film 3 (FIG. 1: S6). The applied polysilazane film is then subjected to an oxidation treatment (steam oxidation) in a steam atmosphere at a temperature of about 400 to 600 ° C. (FIG. 1: S7). As a result, the polysilazane film is modified into a silica-based SOD film 7 (silicon oxide film), and the silicon layer 6 is also oxidized to become a thermally oxidized silicon film 8. Since the sidewall film 5 formed of silicon nitride has oxidation resistance, the side surface of the groove pattern 4 is not oxidized (FIG. 5). In the present specification, silicon that is thermally oxidized is referred to as a thermally oxidized silicon film, and is distinguished from silicon oxide (silica-based SOD film) formed by modifying a precursor such as polysilazane.

  In the present invention, the following two effects can be achieved by providing the silicon layer 6 below the groove pattern.

  First, since the aspect ratio of the groove pattern opening 4 is reduced, the opening filling by the application of the silica-based SOD film 7 (polysilazane film) is facilitated, and the modification of the SOD precursor film by the oxidation treatment is promoted. The This reduces the film thickness (groove depth) of the SOD precursor film that fills the groove, and also prevents the modification of the SOD precursor film because there is no silicon nitride film at the bottom of the groove. This is because the generation of ammonia is reduced.

  Second, since the volume expands when the silicon layer 6 is oxidized, a compressive effect is produced on the silica-based SOD film located at the top. In general, when a SOD precursor film is modified into a silica-based SOD film, the film tends to shrink. Therefore, when a fine groove is embedded, the film quality tends to be sparse due to shrinkage. In the present invention, due to the compression effect from below, the silica-based SOD film can be prevented from becoming a sparse film quality due to shrinkage, and can be modified into a silica-based SOD film (silicon oxide) having a dense film quality.

  Thereafter, the surface of the semiconductor substrate is exposed by a known method. Specifically, as shown in FIG. 6, the surface is planarized by CMP until the upper surface of the silicon nitride film 3 is exposed. Next, as shown in FIG. 7, the silicon nitride film 3 and the silicon oxide film 2 are removed by wet etching, and the portion of the silica-based SOD film 7 that protrudes from the upper surface of the semiconductor substrate 1 is removed (FIG. 7). 1: S8). Thereby, element isolation by STI is formed.

  In the present invention, since the polysilazane film is modified to a dense silica-based SOD film 7 (silicon oxide), the removal amount of the silica-based SOD film can be easily controlled in the wet etching process. Therefore, it is possible to prevent the silica-based SOD film from being greatly swollen, and it is possible to easily form a flat element isolation.

  A transistor or the like which is a component of the semiconductor device can be formed by a known method on the semiconductor substrate on which element isolation by STI is thus formed. For example, as shown in FIG. 8, the gate insulating film 10 is formed by a thermal oxidation method. The gate electrode 11 is formed using a laminated film of polycrystalline silicon and a metal such as tungsten (W). Impurities such as arsenic (As) or boron (B) are introduced into the semiconductor substrate 1 by ion implantation to form an impurity diffusion layer 12. The impurity diffusion layer 12 functions as a source / drain electrode of the MOS transistor. Thereafter, an interlayer insulating film, a contact plug connected to each electrode, an upper wiring layer, and the like are formed to complete the semiconductor device.

(Modification)
In the steam oxidation process of FIG. 5, it is not always necessary to change the silicon layer 6 to the thermally oxidized silicon film 8. As shown in FIG. 9, the silicon layer 6 may remain at the bottom of the groove pattern 4. Further, as shown in FIG. 10, the oxidation may have progressed to a part of the semiconductor substrate 1 under the sidewall film 5. In this case, the semiconductor substrate 1 that is not covered with the sidewall film 5 is also oxidized and becomes a thermally oxidized silicon film 8.

  The extent to which the silicon layer 6 is oxidized may be selected so as to be optimal in consideration of the capability necessary for device isolation (the capability of suppressing leakage current to adjacent devices) and the depth of the groove pattern.

  Further, as a precursor of the silica-based SOD film, any material other than polysilazane can be used as long as it is a material that can be filled into the groove by a coating method such as spin coating and can be modified into a silicon oxide film by treatment in a high-temperature water vapor atmosphere. Known materials can also be used. In particular, in the present invention, since the compression effect when the epitaxially grown silicon layer formed in the lower portion of the groove is oxidized is large, a silica-based SOD film having a dense film quality can be obtained even when a precursor having a larger volume shrinkage than polysilazane is used. Can do.

  The sidewall film may be a film having oxidation resistance (oxygen-impermeable), and may be a laminated film of a silicon nitride film and another film (for example, a silicon oxynitride film SiON).

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Silicon oxide film 3 Silicon nitride film 4 Groove pattern 4a Opening 5 Side wall film 6 Silicon layer 7 Silica-type SOD film 8 Thermal silicon oxide film 10 Gate insulating film 11 Gate electrode 12 Impurity diffusion layer

Claims (13)

A semiconductor device in which elements are isolated by an element isolation insulating film including a silicon oxide film in a groove formed in a semiconductor substrate,
The element isolation insulating film is
An oxidation-resistant sidewall film provided on the side surface of the groove;
A thermally oxidized silicon film formed by a thermal oxidation method disposed under the groove surrounded by the sidewall film;
A semiconductor device comprising a silica-based SOD film filled in an upper part of a groove surrounded by the sidewall film.   The semiconductor device according to claim 1, wherein the oxidation-resistant sidewall film includes a silicon nitride film.   The thermally oxidized silicon film formed by thermal oxidation disposed under the trench surrounded by the sidewall film is exposed to the semiconductor substrate at the trench bottom where the oxidation-resistant sidewall film is formed. 3. The semiconductor device according to claim 1, wherein at least a part of the epitaxially grown silicon layer is obtained by thermally oxidizing at the same time that the silica-based precursor film filled in the upper part of the silicon layer is modified into a silica-based SOD film. .   The semiconductor device according to claim 3, further comprising a silicon layer epitaxially grown at a bottom portion of the groove surrounded by the sidewall film.   4. The semiconductor device according to claim 1, wherein the element isolation insulating film includes an insulating layer formed by thermally oxidizing a part of a semiconductor substrate under the sidewall film. 5.   6. The semiconductor device according to claim 1, wherein the silica-based SOD film is formed by applying a polysilazane-based coating solution, removing the solvent, and then performing steam reforming. Forming a groove for element isolation on the surface of the semiconductor substrate;
Forming an oxidation-resistant sidewall film on the side surface of the groove;
Forming a silicon layer by epitaxial growth on a semiconductor substrate exposed at the bottom of the groove;
Filling a silica-based precursor film in the groove on the silicon layer;
A step of modifying the silica-based precursor film into a silica-based SOD film by performing a heat treatment in a water vapor atmosphere, and changing at least a part of the silicon layer under the groove into a thermally oxidized silicon film;
A method for manufacturing a semiconductor device comprising:   The method for manufacturing a semiconductor device according to claim 7, wherein the oxidation-resistant sidewall film includes a silicon nitride film.   9. The method of manufacturing a semiconductor device according to claim 7, wherein the silica-based precursor film is a polysilazane-based film.   10. The method of manufacturing a semiconductor device according to claim 7, wherein a heat treatment is performed in a water vapor atmosphere under a condition that a part of the silicon layer at a lower portion of the groove is oxidized into silicon oxide and a silicon layer at the bottom of the groove remains. .   10. The method of manufacturing a semiconductor device according to claim 7, wherein heat treatment is performed in a water vapor atmosphere under a condition that the entire silicon layer under the groove is oxidized into silicon oxide.   Furthermore, the manufacturing method of the semiconductor device of Claim 11 which heat-processes in water vapor | steam atmosphere on the conditions which oxidize to a part of semiconductor substrate under the said silicon layer.   The aspect ratio of a groove formed for element isolation is 4-6, and the aspect ratio of the groove after forming a silicon layer by epitaxial growth is 2-3. Semiconductor device manufacturing method.

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