JP2010257209A - Bus switch, computer system, and management method for computer system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To move a virtual machine which directly controls an I/O device between servers while operating the virtual machine. <P>SOLUTION: In a bus switch, a PCI Express switch 30 as the bus switch for connecting servers 10 and 20 and an I/O device 40 in which a virtual machine operates by a star type connection system is integrated with a packet duplication unit 30F for duplicating a memory access request (packet) from an I/O device 40, and for transmitting packets with the same contents to the servers 10 and 20 and an output suppression unit 30G for suppressing a memory access request to a designated address region and a duplication exclusion unit 30H for excluding a memory access request related with interruption from the object of duplication. Then, the packet duplication units 30F, the output suppression unit 30G and the duplication exclusion unit 30H are controlled as necessary, and the virtual machine is moved while being operated. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a technique for moving a virtual machine between servers.

  In recent years, virtualization technology has been put into practical use in which multiple virtual machines are constructed on a single physical server and an arbitrary OS (Operating System) or application is operated for each virtual machine using a control program called a hypervisor. ing. Since the virtual machine uses a memory address virtualized by the hypervisor, the input / output device (I / O device) must be controlled via the hypervisor, and overhead is required when accessing the I / O device. Has resulted in performance degradation. For this reason, a technique has been proposed in which a virtual machine can directly control the I / O device by providing a mechanism for mutually converting the memory address virtualized by the hypervisor and the memory address of the I / O device. ing.

JP 2008-21252 A

  By the way, in the virtual machine environment, for example, when the operation rate decreases at night or the like, it is possible to conserve power by consolidating the virtual machines into one physical server. However, in a virtual machine that directly controls an I / O device, the state of the I / O device is not managed by the hypervisor, so that the virtual machine cannot be moved while it is running.

  Accordingly, in view of the problems of the prior art, an object of the present invention is to provide a technology capable of moving a virtual machine between servers while operating a virtual machine that directly controls an I / O device. To do.

  For this reason, this technology replicates memory access requests from input / output devices to a bus switch that connects multiple servers running virtual machines and input / output devices using a star connection method. Are incorporated into a plurality of servers, a suppression unit that suppresses memory access requests for the first designated address area, and a replication exclusion unit that excludes memory access requests related to interrupts from replication targets. In addition, in this technology, when a virtual machine movement instruction is issued, the replication unit is controlled so that a memory access request is transmitted to the movement source server and the movement destination server, and the virtual machine of the movement source server uses the virtual machine. While transferring the memory contents to the destination server, the suppression unit is controlled so that memory access requests to the memory address area being transferred are suppressed, and memory access requests related to interrupts are excluded from replication targets. The replication exclusion unit is controlled so that

  According to the present technology, it is possible to move a virtual machine from a source server to a destination server while operating a virtual machine that directly controls an input / output device.

1 is an embodiment diagram of a computer system to which the present technology is applied. It is a detailed block diagram of a PCI Express switch. It is a flowchart explaining operation | movement of a PCI Express switch. It is a flowchart of the movement process performed with a movement origin server. It is a flowchart of the movement process performed with a movement origin server. It is a flowchart of the movement process performed by a movement destination server.

Hereinafter, the present technology will be described in detail with reference to the accompanying drawings.
FIG. 1 shows an embodiment of a computer system to which the present technology is applied.
Two physical servers (hereinafter referred to as “servers”) 10 and 20 are connected to an I / O such as a network adapter or a hard disk controller via a PCI Express switch 30 (registered trademark) as a bus switch adopting a star connection method. Connected to the O device 40. The server 10 includes a central processing unit CPU, a memory MEM, and an IO hub HUB. In the server 10, at least one virtual machine (VM) 14 as a virtual computer is constructed by the hypervisor 12 that implements the virtualization technology. The virtual machine 14 is connected between the VM memory 18 having a memory address virtualized by the hypervisor 12 and the I / O device 40 via an IOMMU (Input / Output Memory Management Unit) 16 incorporated in the IO hub HUB. You can send and receive data directly. Here, the IOMMU 16 is hardware for mutually converting the memory address of the VM memory 18 and the memory address of the I / O device 40. Since the server 20 has the same configuration as the server 10, the description thereof will be omitted. The servers 10 and 20 are connected to a management network 50 used by the hypervisor for virtual machine control via a NIC (Network Interface Controller) 60.

  The hypervisors 12 and 22 as examples of the control means are implemented by installing a computer system management program recorded on a computer-readable recording medium such as a CD-ROM in the servers 10 and 20.

  The PCI Express switch 30 is an LSI (Large Scale Integration) compliant with the PCI-SIG (Peripheral Component Interconnect Special Interest Group) MR-IOV (Multi-Root I / O Virtualization) standard, and connects to multiple physical servers. It is possible. The I / O device 40 described above is also a device that conforms to the PCI-SIG MR-IOV standard and can be connected to a plurality of physical servers.

  As shown in FIG. 2, the PCI Express switch 30 includes an input buffer 30A and an output buffer 30B for transmitting / receiving packets to / from the servers 10 and 20, and an input buffer 30C for transmitting / receiving packets to / from the I / O device 40. An output buffer 30D and a routing unit 30E are included. The input buffers 30A and 30C and the output buffers 30B and 30D are provided with queues for temporarily storing packets to be transmitted and received. The routing unit 30E performs routing control for transmitting and receiving packets between the server 10 or 20 and the I / O device 40, or between the two servers 10 and 20. The PCI Express switch 30 further includes a packet duplication unit 30F, an output suppression unit 30G, and a duplication exclusion unit 30H so that the virtual machine can be moved between physical servers while the virtual machine is operating.

  When the memory access request from the I / O device 40, that is, the memory write request packet (hereinafter referred to as “packet”) arrives at the input buffer 30C, the packet duplication unit 30F sends the same packet to the servers 10 and 20. Provides a function to copy a packet to transmit. The output suppression unit 30G provides a function of suppressing a packet for a specified address area from being output from the input buffer 30C when a packet from the I / O device 40 arrives at the input buffer 30C. The duplication exclusion unit 30H provides a function of excluding an interrupt request packet from duplication targets among the packets duplicated by the packet duplication unit 30F. The function of excluding the interrupt request packet from the replication target is, for example, designating an address area for duplicating the packet, designating an address area for excluding the packet duplication, tracking configuration access, and MSI / MSI- It can be implemented by recognizing and automatically excluding X (Message Signaled Interrupt). The packet duplication unit 30F, the output suppression unit 30G, and the duplication exclusion unit 30H are each controlled according to a control signal from the outside of the PCI Express switch 30.

The hypervisors 12 and 22 control the functions provided by the packet duplication unit 30F, the output suppression unit 30G, and the duplication exclusion unit 30H provided in the PCI Express switch 30, and keep the virtual machine running. Realize the move. At this time, each function provided from the packet duplication unit 30F, the output suppression unit 30G, and the duplication exclusion unit 30H is used in the following form. In the following description, it is assumed that the virtual machine 14 of the server 10 is moved to the server 20 while operating.
(1) Replication function provided by the packet replication unit 30F In the movement with the virtual machine 14 operating, the virtual machine 14 and the I / O device 40 continue to operate even during the movement. Therefore, even when the hypervisors 12 and 22 cooperate to move, for example, when the contents of the VM memory 18 are transferred to the server 20, the memory space of the virtual machine 14 from the I / O device 40. A memory access including a write to occurs. This access is performed directly between the virtual machine 14 and the I / O device 40, and the hypervisor 12 cannot be involved.

Therefore, by providing a replication function in the PCI Express switch 30, memory writing from the I / O device 40 is performed by both the migration source server 10 and the migration destination server 20. In this way, the memory contents are synchronized between the migration source server 10 and the migration destination server 20 even when the memory is written from the I / O device 40 not involving the hypervisor 12.
(2) Suppression Function Provided by Output Suppression Unit 30G Even if memory writing from the I / O device 40 is performed to the migration source server 10 and the migration destination server 20 by the replication function, it is assumed that the memory contents do not match. Is done. For example, when data is read from the VM memory 18 of the migration source server 10 and transferred to the migration destination server 20, if there is a memory write from the I / O device 40, the VM memory 18 of the migration source server 10 and the migration The VM memory 28 of the destination server 20 is overwritten. Thereafter, when the data in the VM memory 18 arrives at the destination server 20 from the source server 10, the VM memory 18 is overwritten with old data.

Therefore, by providing a suppression function in the PCI Express switch 30, the output of a packet that overwrites the memory area being transferred from the source server 10 to the destination server 20 is suppressed, and the source server 10 and the destination server 20 Avoid inconsistent memory contents.
(3) Exclusion Function Provided by Replication Exclusion Unit 30H The CPU has a function of converting memory writing to a specific address into an interrupt according to the address and data content. During migration of the virtual machine 14, the memory write from the I / O device 40 is transmitted to the migration source server 10 and the migration destination server 20 by the replication function. However, the interrupt cannot be transmitted to both the migration source server 10 and the migration destination server 20. This is because, while the virtual machine 14 is moving, the virtual machine 14 of the source server 10 can process an interrupt, but the virtual machine 24 of the destination server 20 cannot process an interrupt, and the source and destination are duplicated. This is because there is a risk of interrupt processing.

  Therefore, by providing an exclusion function in the PCI Express switch 30, the interrupt from the I / O device 40 is excluded from the replication target so that the source server 10 and the destination server 20 do not process the interrupt twice.

  FIG. 3 shows an operation that the PCI Express switch 30 executes when a packet arrives from the I / O device 40 to the input buffer 30C. Note that the flowchart shown in FIG. 3 does not describe the operation of each unit, but describes what operation is performed as the entire PCI Express switch 30.

  In step 1 (abbreviated as “S1” in the figure, the same applies hereinafter), the PCI Express switch 30 determines whether the memory area written by the packet is locked. Here, whether or not the memory area written by the packet is locked is, for example, a comparison between the packet contents and lock information (information indicating the locked memory address) of the control signal input to the output suppression unit 30G. It can be determined from. If the memory area is locked, the PCI Express switch 30 proceeds to step 2 (Yes), but proceeds to step 5 if the memory area is not locked (No).

  In Step 2, the PCI Express switch 30 suppresses the output suppression unit 30G from outputting a packet from the queue of the input buffer 30C. Here, while packet output is suppressed, packets that arrive at the input buffer 30C are sequentially stored in the queue in the order of arrival.

  In step 3, the PCI Express switch 30 determines whether or not the lock of the memory area written by the packet has been released. Here, whether or not the memory area is unlocked can be determined, for example, based on whether or not a control signal is no longer input to the output suppression unit 30G. The PCI Express switch 30 proceeds to step 4 if the memory area is unlocked (Yes), and waits if the memory area is not unlocked (No).

In step 4, the PCI Express switch 30 cancels the suppression of packet output by the output suppression unit 30G.
In step 5, the PCI Express switch 30 determines whether there is a packet duplication instruction. Here, whether or not there is a packet duplication instruction can be determined through, for example, whether or not a control signal is input to the packet duplication unit 30F. The PCI Express switch 30 proceeds to step 6 if there is a packet duplication instruction (Yes), and proceeds to step 9 if there is no packet duplication instruction (No).

  In step 6, the PCI Express switch 30 determines whether the packet is a replication target. Here, whether or not a packet is a replication target can be determined by the following three methods. The first method is a method in which only a packet from the I / O device 40 for a specific address area is to be copied, that is, a packet to be copied is designated. The second method is a method of designating only a packet from the I / O device 40 other than a specific address area as a replication target, that is, a packet to be excluded from the replication target. In the third method, the configuration setting operation of the PCI Express switch 30 from the server 10 is monitored, the memory address used for the interrupt is detected, and the packet from the I / O device 40 corresponding to the detected address area is to be copied. It is a method to exclude from. The PCI Express switch 30 proceeds to step 7 if the packet is to be copied (Yes), but proceeds to step 9 if the packet is not to be copied (No).

  In step 7, the PCI Express switch 30 duplicates the packet arriving at the input buffer 30C by the packet duplication unit 30F. Here, a destination different from the packet arriving at the input buffer 30C is set in the duplicated packet.

  In step 8, the PCI Express switch 30 sends the packet that has arrived at the input buffer 30C and the packet duplicated by the packet duplication unit 30F to the destination servers 10 and 20.

In step 9, the PCI Express switch 30 sends the packet arriving at the input buffer 30 </ b> C to the destination server 10 or 20.
According to the PCI Express switch 30, when a packet arrives from the I / O device 40 to the input buffer 30C, it is determined whether or not a memory area written by the packet is locked. If the memory area is locked, the packet is prevented from being output from the queue of the input buffer 30C until the lock is released. If there is a packet duplication instruction and the packet is a duplication target (other than an interrupt request packet), the packet is duplicated and then sent to the destination of each packet. On the other hand, if there is no packet duplication instruction or if the packet is an interrupt request that is not a duplication target, the packet arriving from the I / O device 40 is sent to the destination.

Next, the contents of the movement process for moving the virtual machine in the computer system will be described.
4 and 5 show the movement processing that is executed when the hypervisor 12 of the movement source server 10 receives an instruction to move a virtual machine from an administrator or the like. Note that the virtual machine movement instruction includes at least movement destination information indicating that the virtual machine is to be moved by the server 20.

  In step 11, the hypervisor 12 notifies the hypervisor 22 of the movement destination server 20 specified by the movement destination information included in the movement instruction that the virtual machine movement is started.

  In step 12, the hypervisor 12 determines whether or not there is a response from the movement destination server 20. Then, if there is a response from the destination server 20, the hypervisor 12 advances the process to step 13 (Yes), but if there is no response from the destination server 20, the hypervisor 12 waits for the process (No).

  In step 13, the hypervisor 12 instructs the PCI Express switch 30 to perform packet duplication, that is, outputs a control signal to the packet duplication unit 30 </ b> F of the PCI Express switch 30.

  In step 14, the hypervisor 12 sets a memory lock area for locking data writing to the VM memory 18 in order to transfer the VM memory 18 of the virtual machine 14 to the VM memory 28 of the migration destination server 20 while dividing the VM memory 18. . Here, the size of the memory lock area may be determined according to the data size that can be included in one packet, for example. Further, the hypervisor 12 outputs a control signal including lock information for specifying a memory lock area to the output suppression unit 30G of the PCI Express switch 30.

In step 15, the hypervisor 12 reads data from the memory lock area of the VM memory 18.
In step 16, the hypervisor 12 transmits the data read from the VM memory 18 to the destination server 20 in the packet format via the management network 50.

  In step 17, the hypervisor 12 determines whether or not there is a response from the movement destination server 20. Then, if there is a response from the destination server 20, the hypervisor 12 advances the process to step 18 (Yes), but if there is no response from the destination server 20, the hypervisor 12 waits for the process (No).

  In step 18, the hypervisor 12 determines whether or not the transfer of the VM memory 18 is completed. Here, whether or not the transfer of the VM memory 18 has been completed can be determined, for example, based on whether or not the data has been transferred to the last address of the VM memory 18. Then, if the transfer of the VM memory 18 is completed, the hypervisor 12 advances the process to step 19 (Yes), while if the transfer of the VM memory 18 is not completed, the process returns to step 14 (No). .

In step 19, the hypervisor 12 stops the virtual machine 14 that was running on the migration source server 10.
In step 20, the hypervisor 12 outputs a switching instruction for instructing the PCI Express switch 30 to transfer the packet arriving from the I / O device 40 to the input buffer 30 </ b> C to the destination server 20.

  In step 21, the hypervisor 12 detects the overwrite area over which the virtual machine 14 has overwritten the VM memory 18 of the migration source server 10 while the VM memory 18 was being transferred in steps 14 to 18. Here, the overwrite area can be specified by referring to a memory overwrite flag attached to a page table provided in the CPU of the migration source server 10, for example.

  In step 22, the hypervisor 12 reads data of a predetermined size from the overwriting area of the VM memory 18. Here, the predetermined size may be determined according to the data size that can be included in one packet, for example.

In step 23, the hypervisor 12 transmits the data read from the VM memory 18 to the migration destination server 20 in the packet format via the management network 50.
In step 24, the hypervisor 12 determines whether or not there is a response from the movement destination server 20. Then, if there is a response from the destination server 20, the hypervisor 12 advances the process to step 25 (Yes), but if there is no response from the destination server 20, the hypervisor 12 waits for the process (No).

  In step 25, the hypervisor 12 determines whether or not the memory transfer of the overwrite area has been completed. Here, whether or not the memory transfer in the overwriting area has been completed can be determined, for example, based on whether or not the data has been transferred up to the last address in the overwriting area. The hypervisor 12 proceeds to step 26 if the memory transfer of the overwriting area is completed (Yes), but returns to step 22 if the memory transfer of the overwriting area is not completed (Yes). No).

  In step 26, the hypervisor 12 retrieves the processor state of the virtual machine 14 from the migration source server 10. Here, the processor state means, for example, the state of various registers of the virtual machine 14 and the value of the program counter.

In step 27, the hypervisor 12 transmits the processor status in packet format to the destination server 20 via the management network 50.
In step 28, the hypervisor 12 determines whether or not there is a response from the movement destination server 20. Then, if there is a response from the destination server 20, the hypervisor 12 advances the process to step 29 (Yes), but if there is no response from the destination server 20, the hypervisor 12 waits for the process (No).

In step 29, the hypervisor 12 deletes the virtual machine 14 from the migration source server 10.
FIG. 6 shows a migration process that is executed when the hypervisor 22 of the migration destination server 20 receives a notification to start migration of the virtual machine from the migration source server 10.

In step 31, the hypervisor 22 secures the VM memory 28 used by the virtual machine 24 on the memory MEM.
In step 32, the hypervisor 22 sets the IOMMU 26 incorporated in the IO hub HUB so that the memory address of the VM memory 28 and the memory address of the I / O device 40 can be converted into each other.

In step 33, the hypervisor 22 returns a response indicating that the preparation for moving the virtual server is completed to the movement source server 10 via the management network 50.
In step 34, it is determined whether the hypervisor 22 has received a packet from the migration source server 10, that is, whether the data in the VM memory 18 of the migration source server 10 has been received. Then, if the hypervisor 22 receives a packet from the source server 10, the process proceeds to step 35 (Yes), but if the packet is not received from the source server 10, the process waits (No). Note that the hypervisor 22 performs in parallel the time-out process for exiting the loop when a predetermined time elapses in order to prevent the process from entering an infinite loop when a packet does not arrive from the source server 10 for a long time. Is desirable.

In step 35, the hypervisor 22 writes the received data to the VM memory 28.
In step 36, the hypervisor 22 outputs a control signal for canceling the packet output suppression to the output suppression unit 30G of the PCI Express switch 30.

In step 37, the hypervisor 22 returns a response indicating that the data writing has been completed to the migration source server 10 via the management network 50.
In step 38, the hypervisor 22 determines whether a processor state has been received from the migration source server 10. If the hypervisor 22 receives the processor state, the process proceeds to step 39 (Yes). If the processor state is not received, the process returns to step 34 (No).

  In step 39, the hypervisor 22 sets the processor state of the virtual machine 24 based on the received processor state. As a result, the processor state can be synchronized between the virtual machine 14 of the migration source server 10 and the virtual machine 24 of the migration destination server 20.

In step 40, the hypervisor 22 activates the virtual machine 24 of the migration destination server 20.
In step 41, the hypervisor 22 returns a response indicating that the virtual machine 24 has been activated to the migration destination server 10 via the management network 50.

  According to the migration process, when the virtual machine 14 is moved from the migration source server 10 to the migration destination server 20, the migration destination server 20 secures an area of the VM memory 28 used by the virtual machine 24, An IOMMU 26 for directly controlling the I / O device 40 from the machine 24 is set. Further, the VM memory 18 used by the virtual machine 14 of the source server 10 is transferred while being divided from the source server 10 to the destination server 20.

  When the transfer of the VM memory 18 from the migration source server 10 to the migration destination server 20 is completed, the virtual machine 14 of the migration source server 10 is stopped, and the packet arriving at the PCI Express switch 30 from the I / O device 40 is It starts to be transferred to the server 20. Further, while the VM memory 18 is being transferred from the migration source server 10 to the migration destination server 20, the overwriting area of the VM memory 18 in which data has been overwritten in the migration source server 10 is after the transfer of the VM memory 18 is completed. The data is transferred while being divided from the source server 10 to the destination server 20.

  When the transfer of the overwrite area from the migration source server 10 to the migration destination server 20 is completed, the processor state of the virtual machine 14 of the migration source server 10 is transmitted to the migration destination server 20. In the destination server 20 that has received the processor state, the processor state of the virtual machine 24 is set and the virtual machine 24 is started in order to reproduce the processor state of the virtual machine 14 of the source server 10. On the other hand, in the migration source server 10, the virtual machine 14 is deleted.

  Therefore, the hypervisors 12 and 22 and the PCI Express switch 30 cooperate to move the virtual machine 14 from the source server 20 to the destination server while the virtual machine 14 that directly controls the I / O device 40 is operating. 20 can be moved.

The computer system described in the above embodiment includes two servers, but may include three or more servers.
Regarding the above embodiment, the following additional notes are disclosed.

  (Appendix 1) A bus switch for connecting a plurality of servers on which a virtual machine operates and input / output devices in a star connection method, and copying a plurality of memory access requests from the input / output devices to one server. A replication unit that transmits a memory access request having the same content to the server of the server, a suppression unit that suppresses a memory access request for the first designated address area, and a memory related to an interrupt among the memory access requests replicated by the replication unit And a duplication exclusion unit for excluding access requests from duplication targets.

  (Supplementary note 2) The bus according to Supplementary note 1, wherein the inhibition unit inhibits the memory access request by sequentially accumulating memory access requests from the input / output device to one server in a queue in the order of arrival. switch.

  (Supplementary note 3) The bus switch according to Supplementary note 1 or 2, wherein the duplication exclusion unit excludes a memory access request for the second designated address area from a duplication target.

  (Supplementary note 4) The bus switch according to Supplementary note 1 or Supplementary note 2, wherein the replication exclusion unit excludes a memory access request for a region other than the second designated address area from a replication target.

  (Supplementary Note 5) The duplication exclusion unit monitors a configuration setting operation from the one server, detects an address area for processing a memory access request related to an interrupt, and duplicates a memory access request for the detected address area. The bus switch according to appendix 1 or appendix 2, wherein the bus switch is excluded from the target.

  (Supplementary Note 6) A bus switch that connects a plurality of servers on which a virtual machine operates and an input / output device in a star connection method, and a control unit that controls the bus switch, the bus switch including the input / output A replication unit that replicates a memory access request from a device to one server and transmits a memory access request having the same content to a plurality of servers; a suppression unit that suppresses a memory access request for a first designated address area; Among the memory access requests replicated by the replication unit, a replication exclusion unit that excludes the memory access request related to the interrupt from the replication target, while the control means, when there is an instruction to move the virtual machine, The duplication unit is set so that the memory access request is transmitted to the source server and the destination server The control unit controls the memory access request to the memory address area being transferred while transferring the memory contents used by the virtual machine of the source server to the destination server. And controlling the duplication exclusion unit so that the memory access request related to the interrupt is excluded from the duplication target.

  (Supplementary note 7) Intervening between a plurality of servers on which a virtual machine operates and input / output devices, copying memory access requests from the input / output devices to one server, and accessing the same contents to the plurality of servers A replication unit that transmits a request; a suppression unit that suppresses a memory access request for a first designated address; and a replication that excludes a memory access request related to an interrupt from replication targets among memory access requests that are replicated by the replication unit The computer that controls the bus switch including the exclusion unit controls the replication unit so that the memory access request is transmitted to the migration source server and the migration destination server when the virtual machine migration instruction is issued. And the contents of the memory used by the virtual machine of the source server Controlling the suppression unit so that a memory access request to the memory address area being transferred is suppressed during transfer to the memory, and the memory access request related to the interrupt is excluded from the replication target And a step of controlling the duplication exclusion unit.

  (Appendix 8) Intervening between a plurality of servers on which a virtual machine operates and an input / output device, copying a memory access request from the input / output device to one server, and accessing the plurality of servers with the same contents A replication unit that transmits a request; a suppression unit that suppresses a memory access request for a first designated address; and a replication that excludes a memory access request related to an interrupt from replication targets among memory access requests that are replicated by the replication unit The replication unit is controlled so that the memory access request is transmitted to the migration source server and the migration destination server when the computer that controls the bus switch including the exclusion unit is instructed to migrate the virtual machine. And the contents of the memory used by the virtual machine of the source server Controlling the suppression unit so that a memory access request to the memory address area being transferred is suppressed during transfer to the memory, and the memory access request related to the interrupt is excluded from the replication target And a step of controlling the duplication exclusion unit.

10 server (source server)
12 Hypervisor 14 Virtual machine 18 VM memory 20 Server (destination server)
22 Hypervisor 24 Virtual machine 28 VM memory 30 PCI Express switch 30F Packet replication unit 30G Output suppression unit 30H Replication exclusion unit 40 I / O device

Claims (5)

A bus switch that connects multiple servers running virtual machines and input / output devices using a star connection method.
A replication unit that replicates a memory access request from the input / output device to one server and transmits the same memory access request to a plurality of servers;
A deterrence unit for deterring memory access requests to the first designated address area;
Among the memory access requests replicated by the replication unit, a replication exclusion unit that excludes memory access requests related to interrupts from replication targets;
A bus switch comprising:   2. The bus switch according to claim 1, wherein the inhibition unit inhibits the memory access request by sequentially accumulating memory access requests from the input / output device to one server in a queue in the order of arrival.   The bus switch according to claim 1 or 2, wherein the duplication exclusion unit excludes a memory access request for the second designated address area from a duplication target. A bus switch that connects multiple servers running virtual machines and input / output devices in a star connection method;
Control means for controlling the bus switch;
Including
The bus switch replicates a memory access request from the input / output device to one server and transmits a memory access request having the same contents to a plurality of servers, and a memory access request for a first designated address area A suppression unit that suppresses and a replication exclusion unit that excludes memory access requests related to interrupts from replication targets among memory access requests replicated by the replication unit,
The control unit controls the replication unit so that the memory access request is transmitted to the movement source server and the movement destination server when an instruction to move the virtual machine is given, and then the virtual machine of the movement source server. While the contents of the memory used by the server are being transferred to the destination server, the control unit is controlled so that the memory access request for the memory address area being transferred is suppressed, and the memory access request related to the interrupt The computer system is characterized in that the duplication exclusion unit is controlled so as to be excluded from duplication targets. It is interposed between a plurality of servers on which a virtual machine operates and input / output devices, replicates memory access requests from the input / output devices to one server, and transmits memory access requests having the same contents to the plurality of servers. A duplication unit; a deterrence unit that inhibits a memory access request for the first designated address; and a duplication exclusion unit that excludes a memory access request related to an interrupt from duplication targets among memory access requests duplicated by the duplication unit; A computer that controls the bus switch with
A step of controlling the replication unit so that the memory access request is transmitted to a source server and a destination server when there is an instruction to move the virtual machine, and the virtual machine of the source server uses Controlling the suppression unit so that a memory access request for the memory address area being transferred is suppressed while transferring the contents of the memory to the destination server, and the memory access request related to the interrupt is a replication target. Controlling the replication exclusion unit to be excluded from;
The management method of the computer system characterized by performing this.

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