JP2010232290A - Nitride semiconductor light-emitting diode and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor light-emitting diode which improves light-emission efficiency at the injection of a high-density current, and a manufacturing method for the nitride semiconductor light-emitting diode. <P>SOLUTION: The light-emitting diode at least includes an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer, and a light-emitting layer in the active layer is composed of a plurality of layers where at least two or more layers having different In mixed crystal ratios are formed in contact with each other. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a nitride semiconductor light-emitting diode element, and more particularly to a nitride semiconductor light-emitting diode element having high light emission efficiency in a region with a large current density and a method for manufacturing the same.

  According to Patent Document 1, there is a technique in which an active layer is formed of a well layer and a barrier layer, and a buffer layer is formed between the well layer and the barrier layer so as to have a band gap between the two. According to this structure, it has been reported that a lattice defect generated at the interface can be suppressed by smoothing the change of the lattice constant while realizing a potential barrier that can secure a sufficient number of carriers trapped in the quantum well. Yes.

Japanese Patent No. 3304742

In the nitride semiconductor light emitting diode, there is a problem that the efficiency decreases as the current density increases in a region where the current density exceeds several A / cm ² . One means for solving this problem is to increase the volume of the light emitting layer. As a proposal for realizing this, it is possible to increase the number of quantum wells and increase the thickness of the well layer. However, the former cannot increase the volume of the light emitting layer due to the bias of carriers. In the latter case, the luminous efficiency is lowered due to spatial separation of carriers by a piezoelectric field, and the problem cannot be solved. Since a light-emitting diode with high current density and high efficiency can increase the amount of light per unit area, the chip can be reduced in size and the unit cost of the chip can be reduced. Therefore, there is a demand for a nitride semiconductor light-emitting diode element and a method for manufacturing the nitride semiconductor light-emitting diode that can solve this problem.

  In view of the above circumstances, an object of the present invention is to provide a nitride semiconductor light emitting diode capable of improving the light emission efficiency when a high density current is injected and a method for manufacturing the nitride semiconductor light emitting diode. is there.

  The present invention provides a light emitting diode comprising at least an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer, wherein the light emitting layer in the active layer comprises a plurality of layers, and at least layers having different In mixed crystal ratios. It is a nitride semiconductor light emitting diode formed in contact with two or more.

  In the nitride semiconductor light emitting diode according to the present invention, the light emitting layer composed of the plurality of layers preferably has a larger In mixed crystal ratio in the light emitting layer formed on the n-type nitride semiconductor layer side.

  In the nitride semiconductor light emitting diode according to the present invention, the In mixed crystal ratio of at least two layers among the light emitting layers composed of the plurality of layers is preferably 10% or more.

  In the nitride semiconductor light emitting diode according to the present invention, it is preferable that the layer thickness of at least one layer excluding the layer having the largest In mixed crystal ratio among the plurality of light emitting layers is 2 nm or more.

  In the nitride semiconductor light emitting diode according to the present invention, in the light emitting layer composed of the plurality of layers, the layer thickness of the layer having a small In mixed crystal ratio is larger than the layer thickness of the layer having a large In mixed crystal ratio. It is preferable.

  In the nitride semiconductor light emitting diode according to the present invention, it is preferable that the active layer has a periodic structure of a barrier layer and a well layer, and at least one of the well layers is a light emitting layer composed of the plurality of layers.

  In the nitride semiconductor light emitting diode according to the present invention, the barrier layer is preferably composed of a GaN layer.

  In the nitride semiconductor light emitting diode according to the present invention, the barrier layer preferably has a thickness of 5 nm or more.

  In the nitride semiconductor light emitting diode according to the present invention, a GaN layer is preferably formed between the active layer and the p-type nitride semiconductor layer.

  In the nitride semiconductor light emitting diode according to the present invention, the thickness of the GaN layer formed between the active layer and the p-type nitride semiconductor layer is preferably 5 nm or more.

  In the method for manufacturing a nitride semiconductor light emitting diode according to the present invention, the light emitting layer composed of the plurality of layers is formed by changing a supply amount of trimethylindium to trimethylgallium by metal organic chemical vapor deposition for each layer. This is a method for manufacturing a nitride semiconductor light emitting diode.

  In the method for manufacturing a nitride semiconductor light emitting diode according to the present invention, the light emitting layer composed of the plurality of layers is preferably formed with a constant growth temperature by metal organic vapor phase epitaxy for each layer.

  In the method for manufacturing a nitride semiconductor light emitting diode according to the present invention, the GaN layer formed between the active layer and the p-type nitride semiconductor layer is formed at the same growth temperature as the light emitting layer composed of the plurality of layers. It is preferable.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the nitride semiconductor light-emitting diode which can improve the light emission efficiency when a high density electric current is inject | poured, and the nitride semiconductor light-emitting diode can be provided.

It is typical sectional drawing of a preferable example of the nitride semiconductor layer structure which is an example of the nitride semiconductor light-emitting diode of this invention. It is typical sectional drawing of a preferable example of the nitride semiconductor layer structure which is an example of the nitride semiconductor light-emitting diode of this invention. It is typical sectional drawing of a preferable example of the nitride semiconductor layer structure in the Example of this invention, and a comparative example.

  Embodiments of the present invention will be described below. In the drawings of the present invention, the same reference numerals represent the same or corresponding parts.

  FIG. 1 is a schematic cross-sectional view of a preferred example of a nitride semiconductor layer configuration that is an example of the nitride semiconductor light emitting diode of the present invention. In this nitride semiconductor light emitting diode, at least an n-type nitride semiconductor 2, an active layer 3, and a p-type nitride semiconductor layer 4 are formed on a substrate 1.

<Board>
In the present invention, the substrate 1 can be selected from a sapphire, SiC, GaN substrate and the like.

<N-type nitride semiconductor layer>
In the present invention, the n-type nitride semiconductor layer 2 may be formed of Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1), and a low-temperature buffer layer and an undoped layer may be formed. The dopant is selected from Si, Ge and the like.

<P-type nitride semiconductor layer>
In the present invention, the p-type nitride semiconductor layer 4 is formed of Al _x In _y Ga _1-xy N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1) on the active layer 3 described later, and the dopant is Mg, Zn or the like is selected.

<Active layer>
In the present invention, the active layer 3 may be a well layer formed on the n-type nitride semiconductor layer 2.

This well layer functions as a light emitting layer, and is formed in contact with at least two layers having different In mixed crystal ratios. The composition of the light emitting layer is preferably In _x Ga _1-x N (x> 0.1) from the viewpoint of light emission efficiency. Furthermore, in the present invention, the In mixed crystal ratio means the ratio of the number of moles of In to the number of moles of all group 13 elements.

  With such a structure, a thicker light emitting layer can be obtained, and the efficiency at a high current density can be increased. Furthermore, compared with the case of forming a thick light emitting layer with the same composition, the spatial separation of carriers due to the piezoelectric field can be reduced, and a highly efficient light emitting layer can be obtained.

  In the conventional structure similar to this structure, a buffer layer is formed between the well layer and the barrier layer. However, it is considered that the buffer layer does not emit light due to the layer thickness and the composition with respect to the light emitting layer, which is essentially different from the structure of the present invention.

  In the plurality of layers formed in the light emitting layer, the layer having a small In mixed crystal ratio is formed on the p layer side with respect to the layer having a larger In mixed crystal ratio. It is preferable in obtaining. In the plurality of layers formed in the light emitting layer, the difference in the In mixed crystal ratio between adjacent layers is preferably 2 to 10%.

  Further, it is preferable that the In mixed crystal ratio of at least two of the light emitting layers is 10% or more, respectively, in order to obtain the effect of trapping carriers in the quantum well and realize high luminous efficiency. More preferably, it is 10%.

  Furthermore, the thickness of the light emitting layer is that at least one layer excluding the layer with the largest In mixed crystal ratio is 2 nm or more. Light emission is obtained at each layer having a different In mixed crystal ratio, and luminous efficiency at a high current density is obtained. It is preferable in terms of improvement, and the total layer is more preferably 2 nm or more.

  Further, in each of the layers having different In mixed crystal ratios formed in the light emitting layer, when the layer having a small In mixed crystal ratio has a larger layer thickness than the larger layer, carriers in the layer having a small In mixed crystal ratio and a layer having a large In mixed crystal ratio. Is preferable in that light emission having a plurality of wavelengths is obtained, and as a result, the light emission efficiency at a high current density is increased.

  In addition, the smaller the In mixed crystal ratio, the more preferable the layer thickness with the optimum crystal quality.

Further, the active layer 3 may have a periodic structure of a well layer 3a and a barrier layer 3b as shown in FIG.
In that case, at least one of the well layers 3a mainly contributing to light emission among the plurality of well layers 3a is preferably a light emitting layer composed of a plurality of layers having different In mixed crystal ratios. By forming the plurality of well layers 3a, the light emission efficiency of the light emitting layer can be increased.

  In the present invention, it is preferable that the barrier layer 3b is a GaN layer in that the crystal quality can be improved and, as a result, the light emission efficiency of the light emitting layer can be increased. Further, the thickness of the barrier layer 3b is preferably 5 nm or more from the viewpoint of improving the light emitting efficiency of the light emitting layer. On the other hand, it is preferable that the layer thickness is thin from the viewpoint of reducing the operating voltage. Is most preferred.

  The light emitting layer is formed by metal organic vapor phase epitaxy, and each layer having a different In mixed crystal ratio is preferably formed by adjusting the molar flow rate of trimethylindium with respect to trimethylgallium, and further formed at a constant growth temperature. It is preferable to prevent In evaporation.

  Forming a GaN layer between the active layer 3 and the p-type nitride semiconductor layer 4 is preferable in terms of preventing In evaporation of the light emitting layer and preventing diffusion of p-type dopant into the light emitting layer, and this effect is obtained. The layer thickness is preferably 5 nm or more.

  This GaN layer is formed by metal organic vapor phase epitaxy, and is preferably formed at the same temperature as the light emitting layer in terms of preventing evaporation of In in the light emitting layer.

<Electrode>
For example, in the case of an insulating substrate such as sapphire, the positive and negative electrodes are formed by etching from the p-type nitride semiconductor layer 4 side to the n-type nitride semiconductor layer 2 to form a current diffusion layer on the p-type nitride semiconductor 4. A positive electrode and a negative electrode can be formed on the exposed n-type nitride semiconductor layer 2.

  On the other hand, in the case of a conductive substrate such as GaN or SiC, a positive electrode can be formed on the p-type nitride semiconductor 4 with a current diffusion layer interposed therebetween, and a negative electrode can be formed on the back surface of the substrate 1.

<Example 1>
In Example 1, a nitride semiconductor light emitting diode element having the configuration shown in FIG. 3 was produced. First, a substrate 11 made of sapphire was prepared, and the substrate 11 was set in a reactor of an MOCVD apparatus. Then, the surface of the substrate 11 (C surface) is cleaned by raising the temperature of the substrate 11 to 1050 ° C. while flowing hydrogen into the reactor.

(Formation of n-type nitride semiconductor layer)
Next, the temperature of the substrate 11 is lowered to 510 ° C., hydrogen as a carrier gas, ammonia and TMG (trimethylgallium) as a source gas are flown into the reaction furnace, and GaN is formed on the surface (C surface) of the substrate 11. The buffer layer is laminated with a thickness of about 20 nm by the MOCVD method.
Next, the temperature of the substrate 11 is raised to 1050 ° C., hydrogen as a carrier gas, ammonia and TMG as source gases, and silane as an impurity gas are flown into the reaction furnace, and an n-type nitride composed of GaN doped with Si A semiconductor underlayer (carrier concentration: 1 × 10 ¹⁸ / cm ³ ) is laminated with a thickness of 6 μm on the buffer layer by MOCVD.

Subsequently, an n-type nitride semiconductor contact layer made of GaN is formed by MOCVD in the same manner as the n-type nitride semiconductor underlayer except that Si is doped so that the carrier concentration becomes 5 × 10 ¹⁸ / cm ^3. It is laminated on the n-type nitride semiconductor underlayer with a thickness of 0.5 μm.

  As described above, the buffer layer, the n-type nitride underlayer, and the n-type nitride contact layer are referred to as the n-type nitride semiconductor layer 12.

(Formation of active layer)
Next, the temperature of the substrate 11 is lowered to 700 ° C., nitrogen as a carrier gas, ammonia, TMG, and TMI (trimethylindium) as a source gas are flown into the reaction furnace, and the first on the n-type nitride semiconductor contact layer. An In _0.20 Ga _0.80 N layer having a thickness of 2.5 nm is formed as the well layer, and an In _0.15 Ga _0.85 N layer having a thickness of 3 nm is formed as the second well layer by changing the TMI flow rate with respect to TMG. 13

(Formation of evaporation prevention layer)
Subsequently, the temperature of the substrate 11 was maintained at 700 ° C., nitrogen as a carrier gas, ammonia as a source gas, and TMG were flowed into the reaction furnace to form a 15 nm GaN layer as an evaporation preventing layer 14 on the active layer 13. .

(Formation of p-type nitride semiconductor layer)
Next, the temperature of the substrate 11 is raised to 950 ° C., hydrogen as a carrier gas, ammonia, TMG and TMA (trimethylaluminum) as source gases, and CP2Mg as impurity gases are flown into the reactor, and Mg becomes 1 × 10 ²⁰ / A p-type nitride semiconductor clad layer made of Al _0.20 Ga _0.85 N doped at a concentration of cm ³ is laminated on the evaporation prevention layer 14 to a thickness of about 20 nm by the MOCVD method.

Next, the temperature of the substrate 11 is maintained at 950 ° C., hydrogen as the carrier gas, ammonia and TMG as the source gas, and CP2Mg as the impurity gas are flown into the reaction furnace, and Mg has a concentration of 1 × 10 ²⁰ / cm ³ . A p-type nitride semiconductor contact layer made of doped GaN is stacked on the p-type nitride semiconductor clad layer with an arbitrary thickness of 80 nm by MOCVD.

  As described above, the p-type nitride semiconductor layer 15 includes a p-type nitride semiconductor cladding layer and a p-type nitride semiconductor contact layer.

  Next, the temperature of the substrate 1 is lowered to 700 ° C., and annealing is performed by flowing nitrogen as a carrier gas into the reaction furnace.

(Formation of translucent electrode)
Next, the wafer is taken out of the reaction furnace, and a transparent electrode 16 made of ITO (indium tin oxide) is formed to a thickness of 100 nm on the surface of the uppermost p-type nitride semiconductor layer 15 by EB vapor deposition.

(Formation of pad electrode)
A mask patterned in a predetermined shape is formed on the translucent electrode 16, and etching is performed from the translucent electrode 16 side with an RIE (reactive ion etching) apparatus to expose the surface of the n-type nitride semiconductor contact layer. Let Pad electrodes 17 and 18 containing Ti and Al are formed at predetermined positions on the translucent electrode 16 and the exposed n-type nitride semiconductor contact layer, respectively. Thus, an LED element is obtained.

In this LED element, light emission of 450 nm can be obtained from the first well layer and light emission of 430 nm can be obtained from the second well layer, and they can be synthesized to obtain light emission having a broad peak at about 440 nm. Further, an LED having a higher luminous efficiency than that of Comparative Example 1 can be obtained. Moreover, since the light emitting layer thickness is large, an LED having high luminous efficiency can be obtained at a high current density of 50 A / cm ² or more.

<Example 2>
The same applies to Example 1 except that the conditions of the active layer 13 are changed.

(Formation of active layer)
The temperature of the substrate 11 is lowered to 700 ° C., nitrogen as the carrier gas, ammonia, TMG and TMI (trimethylindium) as the source gas are flowed into the reactor, and the first well layer is formed on the n-type nitride semiconductor contact layer. An In _0.20 Ga _0.80 N layer with a thickness of 2.5 nm, an In _0.15 Ga _0.85 N layer with a thickness of 3 nm as a second well layer by changing the TMI flow rate for TMG, and a third well layer thereon A 3.5 nm In _0.10 Ga _0.90 N layer was formed as the active layer 13.

In this LED element, it is possible to obtain light emission of 450 nm from the first well layer, 430 nm from the second well layer, and 410 nm from the third well layer, and they are synthesized to emit light having a peak at about 430 nm. Can be obtained. Although the luminous efficiency is inferior to that of Example 1, an LED having a small decrease in luminous efficiency can be obtained at a high current density of 50 A / cm ² or more as compared with a smaller current density.

<Example 3>
The same applies to Example 1 except that the conditions of the active layer 13 are changed.

(Formation of active layer)
The temperature of the substrate 11 is lowered to 700 ° C., nitrogen as the carrier gas, ammonia, TMG and TMI (trimethylindium) as the source gas are flowed into the reactor, and the first well layer is formed on the n-type nitride semiconductor contact layer. An In _0.15 Ga _0.85 N layer having a thickness of 3 nm and an In _0.20 Ga _0.80 N layer having a thickness of 2.5 nm were formed as the second well layer by changing the TMI flow rate with respect to TMG. .

  In this LED element, light emission of 430 nm can be obtained from the first well layer, and light emission of 450 nm can be obtained from the second well layer, and they can be synthesized to obtain light emission having a peak at about 440 nm. Although the luminous efficiency does not reach that of Example 1, an LED having higher luminous efficiency than that of Comparative Example 1 can be obtained.

<Example 4>
The same applies to Example 1 except that the conditions of the active layer 13 are changed.

(Formation of active layer)
The temperature of the substrate 11 is lowered to 700 ° C., nitrogen as the carrier gas, ammonia, TMG and TMI (trimethylindium) as the source gas are flowed into the reactor, and the first well layer is formed on the n-type nitride semiconductor contact layer. The In _0.20 Ga _0.80 N layer with a thickness of 2.5 nm, and subsequently, the TMI flow rate for TMG is changed, and the growth time is arbitrarily changed to arbitrarily change the In _0.15 Ga _0.85 N with a thickness of 1 to 4 nm as the second well layer. A layer is formed as the active layer 13.

  When the thickness of the second well layer is 2 nm or less, light emission from this layer is smaller than that of the first well layer, and light emission having a peak of about 450 nm of the first well layer is main, and light emission efficiency at a high current density. The effect of improvement is reduced. On the contrary, when the layer thickness is 3 nm or more, the crystal quality of the second well layer is lowered and the luminous efficiency is lowered. Therefore, the combination of this composition is most preferable when the layer thickness is 3 nm, that is, in Example 1.

<Example 5>
The same applies to Example 1 except that the conditions of the active layer 13 are changed.

(Formation of active layer)
The temperature of the substrate 11 is lowered to 700 ° C., nitrogen as the carrier gas, ammonia, TMG and TMI (trimethylindium) as the source gas are flowed into the reactor, and the first well layer is formed on the n-type nitride semiconductor contact layer. An In _0.20 Ga _0.80 N layer with a thickness of 2.5 nm, and subsequently a TMI flow rate with respect to TMG is arbitrarily changed, and an In _x Ga _1-x N layer with a thickness of 3 nm of the second well layer (x = 0.05 to 0.20) to form an active layer 13.

  When the In mixed crystal ratio of the second well layer is 10% or less, light emission from this layer becomes smaller than that of the first well layer, and light emission having a peak of about 450 nm of the first well layer is mainly used, and a high current density is obtained. The effect of improving the light emission efficiency is small. In order to obtain the effect of reducing the spatial separation of the carriers by the piezoelectric field by dividing the layer into the first well layer and the second well layer, the case where the In mixed crystal ratio is 15%, that is, the case of Example 1 is the most. preferable.

<Example 6>
The same applies to Example 1 except that the conditions of the active layer 13 are changed.

(Formation of active layer)
The temperature of the substrate 11 is lowered to 700 ° C., nitrogen as the carrier gas, ammonia, TMG and TMI (trimethylindium) as the source gas are flowed into the reactor, and the first well layer is formed on the n-type nitride semiconductor contact layer. An In _0.20 Ga _0.80 N layer with a thickness of 2.5 nm is formed, and then a TMI flow rate for TMG is changed to form an In _0.15 Ga _0.85 N layer with a thickness of 3 nm as a second well layer, followed by reaction with TMG. A barrier layer made of GaN having a thickness of 6 nm is formed by flowing into the furnace, and a five-cycle multi-quantum well structure having this cycle as one cycle is formed. Thereafter, an In _0.20 Ga _0.80 N layer having a thickness of 2.5 nm is formed as the first well layer, and an In _0.15 Ga _0.85 N layer having a thickness of 3 nm is formed as the second well layer by changing the TMI flow rate for TMG. The active layer 13 is used.

In this LED element, light emission of 450 nm can be obtained from the first well layer and light emission of 430 nm can be obtained from the second well layer, and they can be synthesized to obtain light emission having a broad peak at about 440 nm. Further, it is possible to obtain an LED having higher luminous efficiency than Comparative Example 1 and Example 1, which is preferable. Moreover, since the light emitting layer thickness is large, an LED having high luminous efficiency can be obtained at a high current density of 50 A / cm ² or more.

<Comparative Example 1>
The same applies to Example 1 except that the conditions of the active layer 13 are changed.

(Formation of active layer)
The temperature of the substrate 11 is lowered to 700 ° C., nitrogen as a carrier gas, ammonia, TMG and TMI (trimethylindium) as a source gas are flown into the reactor, and a thickness of 5.5 nm is formed on the n-type nitride semiconductor contact layer. A well layer made of In _0.17 Ga _0.80 N was formed as the active layer 13.

In this LED element, light emission of 440 nm can be obtained.
It should be understood that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the nitride semiconductor light-emitting diode which can improve the luminous efficiency when the electric current of a high current density is inject | poured, and the nitride semiconductor light-emitting diode can be provided.

  1,11 substrate, 2,12 n-type nitride semiconductor layer, 3,13 active layer, 3a well layer, 3b barrier layer, 4,15 p-type nitride semiconductor layer, 14 evaporation prevention layer, 16 translucent electrode 17 18 pad electrodes.

Claims (13)

In a light emitting diode comprising at least an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer,
The light emitting layer in the active layer is composed of a plurality of layers, and a nitride semiconductor light emitting diode in which at least two layers having different In mixed crystal ratios are formed in contact with each other.   2. The nitride semiconductor light emitting diode according to claim 1, wherein the light emitting layer composed of the plurality of layers has a larger In mixed crystal ratio of the light emitting layer formed on the n-type nitride semiconductor layer side.   3. The nitride semiconductor light emitting diode according to claim 1, wherein an In mixed crystal ratio of at least two of the plurality of light emitting layers is 10% or more.   4. The nitride semiconductor light-emitting diode according to claim 1, wherein a thickness of at least one layer excluding a layer having the largest In mixed crystal ratio among the plurality of light-emitting layers is 2 nm or more.   The nitriding according to any one of claims 1 to 4, wherein, in the light emitting layer comprising the plurality of layers, the layer thickness of the layer having a small In mixed crystal ratio is larger than the layer thickness of a layer having a larger In mixed crystal ratio. Semiconductor light emitting diode.   The nitride semiconductor light emitting diode according to any one of claims 1 to 5, wherein the active layer has a periodic structure of a barrier layer and a well layer, and at least one of the well layers is a light emitting layer composed of the plurality of layers.   The nitride semiconductor light emitting diode according to claim 6, wherein the barrier layer is made of a GaN layer.   The nitride semiconductor light-emitting diode according to claim 6 or 7, wherein the barrier layer has a thickness of 5 nm or more.   The nitride semiconductor light-emitting diode according to claim 1, wherein a GaN layer is formed between the active layer and the p-type nitride semiconductor layer.   The nitride semiconductor light-emitting diode according to claim 9, wherein the GaN layer formed between the active layer and the p-type nitride semiconductor layer has a thickness of 5 nm or more. In the manufacturing method of the nitride semiconductor light emitting diode according to claim 1,
The light emitting layer composed of the plurality of layers is formed by changing the supply amount of trimethylindium with respect to trimethylgallium by metal organic vapor phase epitaxy for each layer. In the manufacturing method of the nitride semiconductor light emitting diode according to claim 1,
12. The method for manufacturing a nitride semiconductor light emitting diode according to claim 11, wherein the light emitting layer composed of the plurality of layers is formed with a constant growth temperature by metal organic vapor phase epitaxy. In the manufacturing method of the nitride semiconductor light emitting diode according to claim 1,
The nitride semiconductor light emitting diode according to claim 11 or 12, wherein the GaN layer formed between the active layer and the p-type nitride semiconductor layer is formed at the same growth temperature as the light emitting layer composed of the plurality of layers. Production method.

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