JP2010220419A - Switching power supply - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switching power supply which even if an external CLK is input, prevents application of excessive voltage to a load DL. <P>SOLUTION: According to the switching power supply, when the switching power supply is on operation based on an internal CLK of a control unit that drives a switching element and an external CLK (internal CLK frequency<external CLK frequency) is input to the control unit, the control unit drives the switching element based on the external CLK. The switching power supply is provided with a duty ratio correcting unit which upon input of the external CLK, forcibly shortens the on-time of switching operation to correct an increase in a duty ratio. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a switching power supply, and more particularly to improvement of output voltage control when an external clock is driven.

  One type of switching power supply is configured to switch from an internal CLK to an external CLK when the external CLK is input when switching control is performed based on a clock (hereinafter referred to as CLK).

  FIG. 5 is a block diagram showing an example of such a conventional switching power supply. The DC input voltage Vin input to the input terminal T1 is applied to one end of the load LD through a series circuit of the first switching element SW1 and the inductor L, and the connection point between the first switching element SW1 and the inductor L. Is applied to the other end of the load LD via the second switching element SW2 connected to. A capacitor C is connected in parallel to the load LD.

  The first switching element SW1 and the second switching element SW2 are switched in a complementary manner by drive signals d1 and d2 output from the control unit CTL. An external CLK is input from the terminal T2 to the control unit CTL, an output voltage Vout is fed back from a connection point between the inductor L, the load LD, and the capacitor C, and the input terminal T1 is connected via the resistor R1.

  As the DC input voltage Vin input to the input terminal T1, for example, an output voltage of another switching power supply (not shown) is used. In this case, in order to avoid occurrence of a beat with the internal CLK of the control unit CTL, an external terminal T2 is used. CLK of another switching power supply (not shown) is input as CLK. For example, MOS FETs are used as the first switching element SW1 and the second switching element SW2. As the control unit CTL, for example, a voltage mode control IC is used.

  FIG. 6 is a timing chart for explaining the operation of FIG. In FIG. 6, (A) is CLK, the solid line indicates the internal CLK of the control unit CTL, and the dotted line indicates the external CLK. (B) is the lamp voltage inside the control unit CTL, the solid line shows the internal CLK operation time of the control unit CTL, and the dotted line shows the external CLK operation time. (C) is the drive signal d1 output from the control unit CTL, the solid line indicates the internal CLK operation time of the control unit CTL, and the dotted line indicates the external CLK operation time.

  The constant voltage control of the output voltage Vout is performed by driving the first switching element SW1 and the second switching element SW2 in a complementary manner with driving signals d1 and d2 output from the control unit CTL. The output voltage Vout is determined by the duty ratio D (= Ton / T) between the ON time (Ton) of the first switching element SW1 and the CLK cycle (T).

  The slope of the lamp voltage inside the control unit CTL shown in (B) is determined by the magnitude of the current I (= Vin / R1) based on the resistor R1. The control unit CTL compares the lamp voltage with the level of the error amplifier, and generates the drive signal d1 with the time width of the lamp voltage ≧ the error amplifier level as the ON time (Ton) of the first switching element SW1.

Japanese Patent Laid-Open No. 1-274662

  Patent Document 1 describes a switching power supply that requires two or more switching regulators.

  Incidentally, the switching power supply of FIG. 5 operates with the internal CLK of the control unit CTL when the external CLK is not input (internal CLK frequency <external CLK frequency). The error amplifier cannot respond at the moment when the external CLK is input. Therefore, the period until the error amplifier responds changes the period from T to T ′ (T> T ′) while Ton remains substantially fixed, and the duty ratio D is D ′ (D <D ′). It becomes.

  However, since the output voltage Vout is Vout = duty ratio D × Vin, the output voltage Vout increases and an excessive voltage is applied to the load DL. In the worst case, the load DL may be destroyed. .

  The present invention solves such a problem, and an object of the present invention is to provide a switching power supply capable of preventing an excessive voltage from being applied to a load DL even when an external CLK is input.

In order to achieve such a problem, the invention according to claim 1 of the present invention is:
When an external CLK (internal CLK frequency <external CLK frequency) is input to the control unit while operating at the internal CLK of the control unit driving the switching element, the control unit drives the switching element with the external CLK. In the switching power supply configured as follows:
A duty ratio correction unit is provided that corrects an increase in duty ratio by forcibly shortening the ON time of the switching operation when the external CLK is input.

The invention according to claim 2 is the switching power supply according to claim 1,
The duty ratio correction unit
The current adjusting unit may increase a current flowing through the control unit when the external CLK is input.

The invention according to claim 3 is the switching power supply according to claim 2,
The current adjusting unit is configured by a series circuit of a resistor and a transistor, and this series circuit is connected in parallel with a resistor that limits a current flowing through the control unit.

According to a fourth aspect of the present invention, in the switching power supply according to the first aspect,
The duty ratio correction unit
The voltage adjusting unit may decrease the voltage applied to the control unit when the external CLK is input.

  According to the switching power supply of the present invention, it is possible to prevent an excessive voltage from being applied to the load DL even when an external CLK is input.

It is a block diagram which shows one Example of this invention. It is a circuit diagram which shows the specific example of the electric current adjustment part IREG of FIG. 3 is a timing chart illustrating the operation of FIGS. 1 and 2. It is a block diagram which shows the other Example of this invention. It is a block diagram which shows an example of the conventional switching power supply. 6 is a timing chart for explaining the operation of FIG. 5.

  Hereinafter, the present invention will be described in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the present invention, and the same reference numerals are given to portions common to FIG.

  In FIG. 1, a current adjustment unit IREG is provided in parallel with the resistor R1. The current adjustment unit IREG increases the current I flowing through the control unit CTL when the external CLK is input.

  FIG. 2 is a circuit diagram showing a specific example of the current adjustment unit IREG. In FIG. 2, the collector of the transistor TR is connected to one end of the resistor R1 via the resistor R2, the emitter is connected to the other end of the resistor R1, and the base is connected to the input terminal T2.

  FIG. 3 is a timing chart for explaining the operations of FIG. 1 and FIG. 2. As in FIG. 6, (A) is CLK, the solid line indicates the internal CLK of the control unit CTL, and the dotted line indicates the external CLK. Yes. (B) is the lamp voltage inside the control unit CTL, the solid line shows the internal CLK operation time of the control unit CTL, and the dotted line shows the external CLK operation time. (C) is the drive signal d1 output from the control unit CTL, the solid line indicates the internal CLK operation time of the control unit CTL, and the dotted line indicates the external CLK operation time.

1) In a state of operating with the internal CLK of the control unit CTL, the transistor TR constituting the current adjustment unit IREG is OFF, and the input current I flowing through the control unit CTL is restricted only by the resistor R1.
2) When an external CLK is input while operating with the internal CLK of the control unit CTL, the transistor TR constituting the current adjustment unit IREG is turned on, and the resistor R2 constituting the current adjustment unit IREG is connected to the resistor R1. It will be connected in parallel. As a result, the input current I flowing through the control unit CTL is regulated by the parallel resistance value of the resistors R1 and R2, and increases compared to the state of 1). Note that internal CLK frequency <external CLK frequency.

3) As the input current I flowing through the control unit CTL increases, the slope of the lamp voltage inside the control unit CTL shown in (B) becomes steep, transitioning from Ton to Ton ′ (Ton> Ton ′), and the duty ratio Is also changed from D to D ′.
4) Here, by selecting the value of the resistor R2 so that D = D ′, it is possible to suppress the increase in the output voltage Vout, and an excessive voltage is applied to the load DL due to the increase in the output voltage Vout, which is destroyed. Can be prevented.

  1 and 2 show an example in which the current I flowing through the control unit CTL is adjusted by providing the current adjusting unit IREG including the resistor R2 and the transistor TR in parallel with the resistor R1. As shown in the figure, the voltage adjustment unit VREG is inserted between the input terminal T1 and the resistor R1, and when the external CLK is input, the output voltage of the voltage adjustment unit VREG is lowered by an amount corresponding to the increase of the duty ratio, and the output voltage Vout You may make it suppress a raise.

  For example, in a large-scale electronic device such as a semiconductor tester, a desired DC voltage is output to a first switching power supply that outputs a large-capacity DC current as a power supply device that supplies a plurality of types of DC voltages to an internal circuit. A plurality of second switching power supplies may be connected in parallel. In such a power supply device, when the switching elements of the first switching power supply and the second switching power supply are driven at different clock frequencies, beats due to interference of these different clock frequencies are generated and the DC voltage supplied to the internal circuit Beat noise is superimposed on the internal circuit, which adversely affects the operation of the internal circuit and the inspection function.

  In order to avoid such an adverse effect, the internal switching CLK of the first switching power supply is input to the second switching power supply as the external CLK and the second switching power supply is driven by the external CLK. By using the switching power supply according to the present invention as the switching power supply, it is possible to prevent an excessive voltage from being applied to the internal circuit that is the load of the second switching power supply.

  As described above, according to the present invention, a switching power supply that prevents an excessive voltage from being applied to the load DL even when an external CLK is input can be realized.

SW1, SW2 Switching element CTL control unit LD load IREG Current adjustment unit VREG Voltage adjustment unit

Claims (4)

When an external CLK (internal CLK frequency <external CLK frequency) is input to the control unit while operating at the internal CLK of the control unit driving the switching element, the control unit drives the switching element with the external CLK. In the switching power supply configured as follows:
A switching power supply comprising a duty ratio correction unit for correcting an increase in duty ratio by forcibly shortening an ON time of the switching operation when the external CLK is input. The duty ratio correction unit
The switching power supply according to claim 1, wherein the switching power supply is a current adjusting unit that increases a current flowing through the control unit when the external CLK is input.   3. The switching power supply according to claim 2, wherein the current adjusting unit is constituted by a series circuit of a resistor and a transistor, and the series circuit is connected in parallel with a resistor that limits a current flowing through the control unit. The duty ratio correction unit
The switching power supply according to claim 1, wherein the switching power supply is a voltage adjusting unit that decreases a voltage applied to the control unit when the external CLK is input.

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