JP2010206263A - Mixer circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a dynamic range of a post-stage circuit operation from being damaged, which is caused in a conventional mixer circuit such that an input signal or an offset voltage component generated in a mixer circuit, etc. is transmitted to the post-stage circuit. <P>SOLUTION: The mixer circuit includes: a down-conversion circuit 21 for output of currents Ida, Idb based on composite signals obtained by compositing RF signals IN1, IN2 to local signals IN_lop, IN_lon; and an active highpass filter 22 for removing a low-frequency component of the composite signal and for output of transmission signals OUT1, OUT2. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a mixer circuit, and more particularly to a mixer circuit including a down-conversion circuit that down-converts received RF (Radio Frequency) with a local signal.

  A receiving circuit used in a wireless communication device performs a down-conversion process (frequency conversion process) on an RF (Radio Frequency) signal obtained via an antenna, and performs subsequent signal processing. A circuit used for the down conversion process is a mixer circuit. The mixer circuit frequency-converts the RF signal based on the local signal, and outputs the converted signal as a transmission signal to a subsequent processing circuit. An example of this mixer circuit is disclosed in Patent Document 1.

  A block diagram of the mixer circuit 100 disclosed in Patent Document 1 is shown in FIG. As shown in FIG. 9, the mixer circuit 100 includes a mixing unit 120 and active filter units 130 and 140. The mixing unit 120 is a double balanced mixing circuit configured by using four MOS-FETs 121 to 124. The active filter units 130 and 140 are provided at the subsequent stage of the mixing unit 120. In the mixer circuit 100, the active filter units 130 and 140 prevent the local signal from passing to the subsequent circuit.

JP-A-11-55039

  However, when the mixer circuit 100 described in Patent Document 1 is used for a direct conversion wireless communication device, there is a problem that the offset voltage cannot be removed. In direct-conversion wireless communication devices, self-mixing in which local signals leak into the RF signal transmission path occurs. For this reason, in the direct-conversion wireless communication device, an offset voltage is generated in the output of the mixer circuit due to this self-mixing. In the mixer circuit 100, the active filter units 130 and 140 provided in the subsequent stage of the mixing unit 120 constitute a low-pass filter. Since the low-pass filter cannot remove the offset voltage which is a DC voltage, the mixer circuit 100 includes an offset voltage component in the output signal.

  In recent years, the operating power supply voltage has been lowered in semiconductor devices. Therefore, when an offset voltage component is transmitted to a circuit connected to the subsequent stage of the mixer circuit 100, there is a problem that signal distortion increases in the circuit connected to the subsequent stage. In particular, in the wireless communication device, a high gain amplifier having a large amplification factor is provided at the subsequent stage of the mixer circuit 100. Since the high gain amplifier amplifies the signal including the offset voltage component, when the offset voltage component generated in the mixer circuit 100 or the like is transmitted to the high gain amplifier, the amplitude of the output signal that can obtain a signal with low distortion is high gain. There arises a problem that it becomes smaller than the output dynamic range of the amplifier. In recent semiconductor devices in which the operating power supply voltage is low, this loss of dynamic range becomes a more significant problem.

  One aspect of the mixer circuit according to the present invention includes a down-conversion circuit that outputs a current based on a synthesized signal obtained by synthesizing an RF signal and a local signal, and an active that outputs a transmission signal by removing a low-frequency component of the synthesized signal. A high-pass filter.

  Another aspect of the mixer circuit according to the present invention includes a down-conversion circuit that outputs a current based on a synthesized signal obtained by synthesizing an RF signal and a local signal, and outputs a transmission signal by removing a low-frequency component of the synthesized signal. A high-pass filter.

  Since the mixer circuit according to the present invention outputs the combined signal generated by the down-conversion circuit via the active high-pass filter or the high-pass filter, it can output the transmission signal from which the offset voltage component of the combined signal is removed.

  The mixer circuit according to the present invention can remove the offset voltage component from the transmission signal output from the mixer circuit.

1 is a block diagram of a receiving circuit according to a first exemplary embodiment; 1 is a circuit diagram of a mixer circuit according to a first embodiment; FIG. 3 is a conceptual diagram showing frequency characteristics of the mixer circuit according to the first embodiment. FIG. 3 is a block diagram of a mixer circuit according to a second embodiment. FIG. 3 is a conceptual diagram showing frequency characteristics of the mixer circuit according to the first embodiment. FIG. 6 is a block diagram of a mixer circuit according to a third embodiment. FIG. 6 is a block diagram of a mixer circuit according to a fourth embodiment. FIG. 10 is a block diagram illustrating another example of the mixer circuit according to the fourth embodiment. 2 is a block diagram of a mixer circuit described in Patent Document 1. FIG.

Embodiment 1
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of a receiving circuit 1 according to the present embodiment. The receiving circuit 1 is included in the wireless communication device, and a signal that passes through the receiving circuit 1 is processed in the digital signal processing unit 17 shown in FIG. 1 or another circuit (not shown).

  As illustrated in FIG. 1, the reception circuit 1 includes an antenna 10, a low noise amplifier 11, a mixer circuit 12, a local oscillator 13, a low-pass filter 14, a high gain amplifier 15, an analog / digital conversion circuit 16, and a digital signal processing unit 17.

  The antenna 10 transmits and receives radio signals to and from other communication devices. The low noise amplifier 11 amplifies the RF signal obtained via the antenna 10 and transmits the amplified RF signal to a circuit arranged at the subsequent stage. The mixer circuit 12 performs a down-conversion process on the RF signal obtained via the low noise amplifier 11 based on the first and second local signals IN_lop and IN_lon generated by the local oscillator 13. Then, the mixer circuit 12 outputs a transmission signal. Details of the mixer circuit 12 will be described later.

  The local oscillator 13 generates first and second local signals IN_lop and IN_lon. The first and second local signals IN_lop and IN_lon are differential signals that are 180 degrees out of phase with each other. In the present embodiment, it is assumed that the transmission path from the low noise amplifier 11 to the analog-digital conversion circuit 16 transmits a differential signal. The first and second local signals IN_lop and IN_lon are differential signals because they correspond to the RF signals input to the mixer circuit 12 as differential signals. In the following description, the RF signal on the positive phase side constituting the RF signal is referred to as a first RF signal, and the RF signal on the negative phase side is referred to as a second RF signal.

  The low-pass filter 14 attenuates the signal level of a signal component having a frequency equal to or higher than a preset cutoff frequency among transmission signals output from the mixer circuit 12. That is, the low pass filter 14 removes a noise component having a frequency higher than the cutoff frequency included in the transmission signal.

  The high gain amplifier 15 is, for example, an amplifier having an automatic gain control mechanism (AGC: Auto Gain Control) that changes the gain so that the amplitude level of an output signal is kept constant. The high gain amplifier 15 generally has an amplification factor of about 40 dB, and this amplification factor is an amplification factor of a circuit provided before the high gain amplifier 15 (for example, active high pass filters 30a and 30b included in the mixer circuit 12). Higher than the rate. The high gain amplifier 15 amplifies and outputs the transmission signal obtained through the low pass filter 14.

  The analog / digital conversion circuit 16 converts the signal level of the transmission signal amplified by the high gain amplifier 15 into a digital value and transmits the digital value to the digital signal processing unit 17. At this time, signal transmission by the bus wiring is performed between the analog-digital conversion circuit 16 and the digital signal processing unit 17. The digital signal processing unit 17 reproduces the received data according to the digital value output from the analog-digital conversion circuit 16, and performs various processes based on the reproduced received data.

  Next, the mixer circuit 12 according to the present embodiment will be described in detail. FIG. 2 shows a circuit diagram of the mixer circuit 12. As shown in FIG. 2, the mixer circuit 12 includes a down conversion circuit 21 and a high-pass filter 22. The down-conversion circuit 21 outputs first and second currents Ida and Idb based on a synthesized signal obtained by synthesizing the first and second RF signals IN1 and IN2 and the first and second local signals IN_lop and IN_lon. . More specifically, the down-conversion circuit 21 generates a composite signal by down-converting the first and second RF signals IN1 and IN2 based on the first and second local signals IN_lop and IN_lon. First and second currents Ida and Idb based on the signal are output. The high pass filter 22 removes the low frequency component of the combined signal and outputs the first and second transmission signals OUT1 and OUT2. More specifically, the high-pass filter 22 is driven by the first and second currents Ida and Idb, and converts the first and second currents Ida and Idb into the first and second transmission signals OUT1. , The voltage corresponding to OUT2 is converted, and the low frequency component of the combined signal is removed. Note that the first and second transmission signals OUT1 and OUT2 are differential signals. In addition, when signal transmission is performed by a single-phase signal in the receiving circuit 1, the transmission signal becomes one signal.

  The down conversion circuit 21 includes NMOS transistors M1 to M4, capacitors Cin1 and Cin2, and bias resistors Rb1 and Rb2. The sources of the NMOS transistors M1 and M2 are connected in common. The first RF signal IN1 is input to the sources of the NMOS transistors M1 and M2 via the capacitor Cin1. Further, one end of the bias resistor Rb1 is connected between the capacitor Cin1 and the sources of the NMOS transistors M1 and M2. A bias voltage Vb is applied to the other end of the bias resistor Rb1. That is, the operating point of the first RF signal IN1 input via the capacitor Cin1 is controlled by the bias voltage Vb applied via the bias resistor Rb1.

  The first local signal IN_lop is input to the gate of the NMOS transistor M1, and the second local signal IN_lon is input to the gate of the NMOS transistor M2. The drain of the NMOS transistor M1 is connected to the first active high-pass filter 30a included in the high-pass filter 22. The drain of the NMOS transistor M2 is connected to the second active high-pass filter 30b included in the high-pass filter 22.

  The sources of the NMOS transistors M3 and M4 are connected in common. The second RF signal IN2 is input to the sources of the NMOS transistors M3 and M4 via the capacitor Cin2. Further, one end of the bias resistor Rb2 is connected between the capacitor Cin2 and the sources of the NMOS transistors M3 and M4. A bias voltage Vb is applied to the other end of the bias resistor Rb2. In other words, the operating point of the second RF signal IN2 input via the capacitor Cin2 is controlled by the bias voltage Vb applied via the bias resistor Rb1.

  The second local signal IN_lon is input to the gate of the NMOS transistor M3, and the first local signal IN_lop is input to the gate of the NMOS transistor M4. The drain of the NMOS transistor M3 is connected to the first active high-pass filter 30a included in the high-pass filter 22. The drain of the NMOS transistor M4 is connected to the second active high-pass filter 30b included in the high-pass filter 22.

  In the down conversion circuit 21, the current output from the drain of the NMOS transistor M1 and the current output from the drain of the NMOS transistor M3 are combined to generate the first current Ida. That is, the down-conversion circuit 21 down-converts the first RF signal IN1 based on the first and second local signals IN_lop and IN_lon. The down-conversion circuit 21 generates a combined signal by down-conversion processing, and this combined signal is output as the first current Ida. Further, the down conversion circuit 21 combines the current output from the drain of the NMOS transistor M2 and the current output from the drain of the NMOS transistor M4 to generate the second current Ida. That is, the down-conversion circuit 21 down-converts the second RF signal IN2 based on the first and second local signals IN_lop and IN_lon. The down conversion circuit 21 generates a combined signal by down conversion processing, and this combined signal is output as the second current Idb.

  The high pass filter 22 includes a first active high pass filter 30a and a second active high pass filter 30b. Since the first and second active high-pass filters 30a and 30b have the same configuration, the configuration of the first active high-pass filter 30a will be described here. In FIG. 2, the same reference numerals with b added to the same constituent elements of the second active high-pass filter 30 b as those belonging to the first active high-pass filter 30 a are used.

  The first active high-pass filter 30a includes an amplifier 31a, resistors R1a and R2a, and a capacitor Ca. The resistor R1a has one end to which the first current Ida output from the down conversion circuit 21 is input and the other end connected to one end of the capacitor Ca. The other end of the capacitor Ca is connected to the inverting input terminal of the amplifier 31a and one end of the resistor R2a. The resistor R2a is provided between the inverting input terminal and the output terminal of the amplifier 31a. That is, the resistor R2a functions as a feedback resistor for the amplifier 31a. The normal rotation input terminal of the amplifier 31a is connected to the ground terminal. The first transmission signal OUT1 is output from the output terminal of the amplifier 31a.

  That is, the first active high-pass filter 30a functions as an active high-pass filter in which the cutoff frequency fc is set by the resistor R1a and the capacitor Ca, and the amplification factor is determined by the resistor R1a and the resistor R2a. The first and second active high-pass filters 30a and 30b are set so that the cutoff frequency fc and the amplification factor are substantially the same. The second active high-pass filter 30b corresponds to the second current Idb, and the output signal is the second transmission signal OUT2.

  Here, the signal transfer characteristics of the first and second active high-pass filters 30a and 30b will be described. FIG. 3 shows signal transfer characteristics of the first and second active high-pass filters 30a and 30b. As shown in FIG. 3, the first and second active high-pass filters 30a and 30b have an attenuation characteristic with respect to a signal having a frequency lower than the cut-off frequency fc. That is, the signal pass bands of the first and second active high-pass filters 30a and 30b are higher than the cut-off frequency fc. At this time, the offset voltage component of the combined signal is a DC voltage, which is a frequency sufficiently lower than the cut-off frequency fc (for example, the frequency is as close as possible to 0 Hz). Therefore, the offset voltage component included in the combined signal is removed from the first and second transmission signals OUT1 and OUT2 output via the first and second active high-pass filters 30a and 30b. The offset voltage component included in the synthesized signal is generated due to self-mixing. This self-mixing is a phenomenon that occurs in a communication system that employs a direct conversion system, and refers to a phenomenon in which local signals IN_lon and IN_lon leak into the RF signal transmission path arranged in the previous stage of the mixer circuit 12.

  Further, as shown in FIG. 3, the cut-off frequency fc is set lower than the low frequency side frequency of the baseband band. The baseband band corresponds to the frequency of the first and second RF signals IN1 and IN2 or the frequency band of the synthesized signal. Therefore, when the cutoff frequency fc is set higher than the low frequency side frequency of the baseband, the signal level of the signal component to be transmitted is attenuated. In addition, when the cutoff frequency fc is set to a frequency that is too lower than the low frequency side frequency of the baseband band, a large amount of noise components having a frequency component lower than the baseband band are included in the transmitted signal. . That is, the cutoff frequency fc is preferably lower than the low frequency side frequency of the baseband band and close to the low frequency side frequency of the baseband band. Thereby, the noise component contained in the transmission signal can be reduced.

  From the above description, in the mixer circuit 12 according to the first exemplary embodiment, the high-pass filter 22 is provided in the subsequent stage of the down conversion circuit 21, thereby preventing the offset voltage from being transmitted to the circuit connected to the subsequent stage of the mixer circuit 12. can do. The high gain amplifier 15 provided at the subsequent stage of the mixer circuit 12 amplifies the signal with a high amplification factor. At this time, the mixer circuit 12 according to the first embodiment prevents the offset voltage from being transmitted to the high gain amplifier 15, so that the high gain amplifier 15 can amplify the signal by making the maximum use of the output dynamic range. it can. When the operating power supply voltage is lowered, the output dynamic range of the high gain amplifier 15 is also limited by the operating power supply voltage, so that the effect of preventing the output dynamic range from being reduced due to the offset voltage component is very large.

  In the mixer circuit 12 according to the first embodiment, the down-conversion circuit 21 drives the high-pass filter 22 with a current based on the combined signal, and the high-pass filter 22 generates a transmission signal by converting the current into a voltage. When the synthesized signal is converted into a voltage, a voltage drop occurs due to a load resistor or the like that converts a current into a voltage, and the operation dynamic range of the down-conversion circuit 21 becomes narrow due to the voltage drop. However, in the down-conversion circuit 21, the combined signal is transmitted by current without being converted into voltage, so this voltage drop does not occur. That is, in the down conversion circuit 21 according to the first embodiment, the dynamic range does not decrease due to the voltage drop due to the load resistance. Therefore, by using the down-conversion circuit 21 according to the first embodiment, the power supply voltage can be lowered while ensuring a wide dynamic range.

  In the down-conversion circuit 21 according to the first embodiment, the first RF signal IN1 and the second RF signal IN2 are input from the common connection node of the differential pair via a capacitor. In addition, the bias voltage of the common connection node of the differential pair is given via the bias resistors Rb1 and Rb2. Therefore, the down conversion circuit 21 according to the first embodiment does not require a current source for supplying an operating current to the differential pair. When a current source for supplying an operating current to the differential pair is provided, the dynamic range of the down conversion circuit 21 is reduced by a voltage necessary for the operation of the current source. However, since the down conversion circuit 21 according to the first embodiment does not use a current source that supplies an operating current to the differential pair, there is no reduction in dynamic range due to the provision of the current source. That is, in the down conversion circuit 21 according to the first embodiment, it is possible to ensure a sufficient dynamic range up to a lower power supply voltage.

  Further, the mixer circuit 12 according to the first embodiment can reduce flicker noise included in the low frequency component of the synthesized signal. Flicker noise is random noise generated from a semiconductor element, and is also called 1 / f noise. This flicker noise appears remarkably mainly in a band of several hundred Hz. That is, the frequency of flicker noise is sufficiently lower than the frequency of the main component of the synthesized signal. In the mixer circuit 12 according to the present embodiment, the high-pass filter 22 (active high-pass filters 30a and 30b) is provided at the subsequent stage of the down-conversion circuit 21. Therefore, the mixer circuit 12 according to the present embodiment can remove the flicker noise included in the synthesized signal by the high-pass filter 22. That is, the mixer circuit 12 according to the present embodiment can improve the S / N ratio of the first transmission signal OUT1 and the second transmission signal OUT2 against flicker noise.

Embodiment 2
FIG. 4 shows a block diagram of the mixer circuit 12a according to the second embodiment. As shown in FIG. 4, the mixer circuit 12a shows another configuration example of the high-pass filter 22 of the mixer circuit 12 in the first embodiment. The mixer circuit 12 a includes a high-pass filter 23 that shows another example of the high-pass filter 22. In the following description, the same components as those in the first embodiment are denoted by the same reference numerals as those in the first embodiment, and the description thereof is omitted.

  The high pass filter 23 includes a filter circuit composed of a secondary active high pass filter. The high pass filter 23 includes a first active high pass filter 40a and a second active high pass filter 40b. Since the first and second active high-pass filters 40a and 40b have the same configuration, the configuration of the first active high-pass filter 40a will be described here. In FIG. 4, the same reference numerals with b added to the same constituent elements of the second active high-pass filter 40 b as those belonging to the first active high-pass filter 40 a are used.

  The first active high-pass filter 40a includes an amplifier 41a, resistors R3a and R4a, and capacitors C1a and C2a. The capacitor C1a has one end to which the first current Ida output from the down conversion circuit 21 is input, and the other end connected to one end of the capacitor C2a and one end of the resistor R3a. The other end of the capacitor C2a is connected to the normal input terminal of the amplifier 41a. The resistor R3a is provided between the connection point between the capacitors C1a and C2a and the output terminal of the amplifier 31a. That is, the resistor R3a functions as a feedback resistor for the amplifier 31a. The resistor R4a is provided between the normal input terminal of the amplifier 41a and the ground terminal. The inverting input terminal of the amplifier 31a is connected to the output terminal of the amplifier 31a. The first transmission signal OUT1 is output from the output terminal of the amplifier 31a.

  That is, the first active high-pass filter 40a is a second-order high-pass filter in which the cutoff frequency fc is set by the resistors R3a and R4a and the capacitors C1a and C2a, and the buffer circuit has an amplification factor of 1. Function as. Note that the first and second active high-pass filters 40a and 40b are set so that the cutoff frequencies fc are substantially the same. The second active high-pass filter 40b corresponds to the second current Idb, and the output signal is the second transmission signal OUT2.

  Here, the signal transfer characteristics of the first and second active high-pass filters 40a and 40b will be described. FIG. 5 shows signal transfer characteristics of the first and second active high-pass filters 40a and 40b. As shown in FIG. 5, the first and second active high-pass filters 40a and 40b have a second-order attenuation characteristic for signals having a frequency lower than the cutoff frequency fc. That is, the attenuation characteristics of the first and second active high-pass filters 40a and 40b are steeper than those of the first and second active high-pass filters 30a and 30b according to the first embodiment. As a result, the first and second active high-pass filters 40a and 40b have more noise components having a frequency lower than the baseband band than the first and second active high-pass filters 30a and 30b according to the first embodiment. It becomes possible to attenuate. Further, similarly to the first embodiment, it is possible to remove the offset voltage component from the transmission signal.

  From the above description, the mixer circuit 12a according to the second embodiment uses a filter having a higher order than the first embodiment as the active high-pass filter. Thereby, in the mixer circuit 12a according to the second embodiment, it is possible to obtain a transmission signal with a noise component reduced as compared with the mixer circuit 12 according to the first embodiment.

Embodiment 3
FIG. 6 shows a block diagram of the mixer circuit 12b according to the third embodiment. As shown in FIG. 6, the mixer circuit 12 b shows another configuration example of the high-pass filter 23 of the mixer circuit 12 a in the second embodiment. The mixer circuit 12b includes a high-pass filter 24 that shows another example of the high-pass filter 23. In the following description, the same components as those in the first and second embodiments are denoted by the same reference numerals as those in the first and second embodiments, and the description thereof is omitted.

  The high pass filter 24 includes a filter circuit including a secondary active high pass filter with gain. The high pass filter 24 includes a first active high pass filter 50a and a second active high pass filter 50b. Since the first and second active high-pass filters 50a and 50b have the same configuration, the configuration of the first active high-pass filter 50a will be described here. Note that in FIG. 6, the same reference numerals with b added to the same constituent elements of the second active high-pass filter 50 b as the constituent elements belonging to the first active high-pass filter 50 a are used.

  In the first active high-pass filter 50a, resistors R5a and R6a are added to the inverting input terminal side of the amplifier 41a of the first active high-pass filter 40a according to the second embodiment. The resistor R5a is connected between the inverting input terminal of the amplifier 41a and the ground terminal. The resistor R6a is connected between the output terminal of the amplifier 41a and the inverting input terminal of the amplifier 41a. In the first active high-pass filter 50a, the amplification factor of the first active high-pass filter 50a is set by the resistor R5a and the resistor R6a. At this time, in the present embodiment, the amplification factor of the first active high-pass filter 50a is made smaller than the amplification factor of the high gain amplifier 15. Further, the amplification factor of the high gain amplifier 15 is set to be smaller than in the other embodiments in consideration of the amplification factor of the first active high-pass filter 50a. At this time, the total gain in the path from the mixer circuit 12b to the high gain amplifier 15 is preferably set equal to the total gain in the path from the mixer circuit to the high gain amplifier in the other embodiments.

  From the above description, the high-pass filter 24 according to the third embodiment amplifies the synthesized signal with a predetermined amplification factor and outputs it. Therefore, in the third embodiment, the gain of the high gain amplifier 15 can be reduced by the gain of the high pass filter 24. Thus, even when there is noise superimposed on the route from the mixer circuit 12b to the high gain amplifier 15, the amplification factor of the noise can be suppressed. Therefore, in the receiving circuit 1 according to the third embodiment, The signal-to-noise ratio (S / N) of the transmission signal output from the high gain amplifier 15 can be increased.

Embodiment 4
FIG. 7 shows a block diagram of the mixer circuit 12c according to the fourth embodiment. As shown in FIG. 7, the mixer circuit 12c has a high-pass filter 25 that is different from the other embodiments. In the following description, the same components as those in the first embodiment are denoted by the same reference numerals as those in the first embodiment, and the description thereof is omitted.

  The high pass filter 25 is a passive high pass filter. The high-pass filter 25 shown in FIG. 7 has a capacitor C3a as the first high-pass filter and has C3b as the second high-pass filter 60a. The capacitor C3a has the first current Ida input to one terminal and the other terminal connected to the output terminal of the first transmission signal OUT1. The capacitor C3b has the first current Idb input to one terminal and the other terminal connected to the output terminal of the second transmission signal OUT2.

  Capacitors C3a and C3b have characteristics as a single high-pass filter. Therefore, even if only the capacitors C3a and C3b are provided as high-pass filters, it is possible to remove the offset voltage component from the transmission signal as in the first embodiment. In addition, since the high-pass filter 25 according to the fourth embodiment is only required to provide one capacitor in one transmission path, the circuit scale can be made smaller than in the other embodiments.

  A modification of the high pass filter 25 is shown in FIG. In the example shown in FIG. 8, a high-pass filter is configured using resistors R7a and R7b in addition to capacitors C3a and C3b. In the high-pass filter 26 of the mixer circuit 12d shown in FIG. 8, a capacitor C3a in which the first high-pass filter 61a is inserted in series in the signal path, a resistor R7a provided between the output side terminal of the capacitor C3a and the ground terminal, It consists of. Further, in the high-pass filter 26 shown in FIG. 8, the second high-pass filter 61b is configured by a capacitor C3b inserted in series in the signal path, and a resistor R7b provided between the output side terminal of the capacitor C3b and the ground terminal. To do. In this way, by configuring the high-pass filter with a resistor and a capacitor, the cutoff frequency can be arbitrarily set by the resistance value of the resistor and the capacitance value of the capacitor.

  Note that the present invention is not limited to the above-described embodiment, and can be changed as appropriate without departing from the spirit of the present invention. The mixer circuit according to the present invention can be applied to quadrature demodulation processing that performs phase demodulation instead of down-conversion processing. In order to use the mixer circuit according to the present invention for orthogonal demodulation processing, two down-conversion circuits according to the present invention are used. Then, the I local signal and the I bar local signal obtained by inverting the I local signal are input to one of the two down conversion circuits, and the Q local signal and the Q bar local signal obtained by inverting the Q local signal are input to the other down conversion circuit. input. A high-pass filter is provided at least at the output terminal of the signal to be output by the orthogonal demodulation process. As a result, it is possible to configure an orthogonal demodulation circuit with improved accuracy of a signal to be output as in the case of using the mixer circuit according to the present invention.

DESCRIPTION OF SYMBOLS 1 Reception circuit 10 Antenna 11 Low noise amplifier 12-12d Mixer circuit 13 Local oscillator 14 Low pass filter 15 High gain amplifier 16 Analog-digital conversion circuit 17 Digital signal processing part 21 Down conversion circuit 22-26, 60a, 61a, 60a, 61b High pass filter 30a 40a, 50a Active high-pass filters 30b, 40b, 50b Active high-pass filters 31a, 41a Amplifiers Ca, Cb, Cin1, Cin2, C1a-C3a, C1b-C3b Capacitors M1-M4 NMOS transistors R1a-R7a, R1b-R7b Resistors Rb1, Rb2 bias resistor

Claims (14)

A down-conversion circuit that outputs a current based on a synthesized signal obtained by synthesizing an RF signal and a local signal;
An active high-pass filter that removes low-frequency components of the combined signal and outputs a transmission signal;
A mixer circuit.   The mixer circuit according to claim 1, wherein the active high-pass filter includes an amplifier, and a cutoff frequency is set by a resistor and a capacitor provided in an input path and a feedback path of the amplifier.   The mixer circuit according to claim 1, wherein the active high-pass filter generates the transmission signal by amplifying the combined signal with a predetermined amplification factor.   4. The mixer circuit according to claim 1, wherein the active high-pass filter has a cutoff frequency lower than a frequency of a signal component on a low frequency side among signal components included in the synthesized signal. The active high-pass filter is
A low pass filter having a cutoff frequency higher than the frequency of the signal component on the high frequency side of the signal component included in the synthesized signal;
A high gain amplifier provided at a subsequent stage of the low pass filter and having an amplification factor higher than that of the active high pass filter;
The mixer circuit according to claim 1, wherein the transmission signal is output to an analog-to-digital converter via a signal. The down-conversion circuit is driven by the current with the active high-pass filter as a load,
The mixer circuit according to claim 1, wherein the active high-pass filter converts the current into a voltage.   The mixer circuit according to claim 1, wherein the down-conversion circuit is used as a demodulator of an orthogonal demodulation circuit. A down-conversion circuit that outputs a current based on a synthesized signal obtained by synthesizing an RF signal and a local signal;
A high-pass filter that removes low-frequency components of the combined signal and outputs a transmission signal;
A mixer circuit.   The mixer circuit according to claim 8, wherein the high-pass filter includes an amplifier, and a cutoff frequency is set by a resistor and a capacitor provided in an input path and a feedback path of the amplifier.   The mixer circuit according to claim 8 or 9, wherein the high-pass filter amplifies the combined signal at a predetermined amplification factor to generate the transmission signal.   11. The mixer circuit according to claim 8, wherein the high-pass filter has a cutoff frequency lower than a frequency of a signal component on a low frequency side among signal components included in the synthesized signal. The high-pass filter is
A low pass filter having a cutoff frequency higher than the frequency of the signal component on the high frequency side of the signal component included in the synthesized signal;
A high gain amplifier provided at a subsequent stage of the low pass filter and having an amplification factor higher than that of the high pass filter;
The mixer circuit according to claim 8, wherein the transmission signal is output to an analog-to-digital converter via a signal. The down-conversion circuit is driven by the current with the high-pass filter as a load,
The mixer circuit according to claim 8, wherein the high-pass filter converts the current into a voltage.   The mixer circuit according to any one of claims 8 to 13, wherein the down-conversion circuit is used as a demodulator of an orthogonal demodulation circuit.

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