JP2010199500A - Wiring board and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wiring board capable of increasing the number of connection terminals without reducing an interval between the connection terminals, and a display device. <P>SOLUTION: The wiring board includes an aperture region formed on a side of a first wiring layer of an insulation layer where a protective layer is opened and the connection terminals with signal lines respectively connected are arranged side by side, and a through hole region formed closer to a tip of a base material than the aperture region where through holes for electrically connecting signal lines on one of surfaces of an insulation film with signal lines on the other surface are formed. A first terminal region where a plurality of first connection terminals are arranged side by side along at least one side of the aperture region and a second terminal region separate from the first connection terminal where a plurality of second connection terminals are arranged side by side are formed in the aperture region. The first and second connection terminals are respectively formed on the side of the first wiring layer side of the insulation layer. In addition, the first connection terminals are electrically connected respectively with the signal lines of the first wiring layer formed on the same layer. The second terminals are electrically connected respectively with the signal lines of the second wiring layer through the through holes formed on the through hole region. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a wiring board and a display device, and more particularly to a wiring board for supplying a driving signal for the display device from the outside.

  The liquid crystal display device includes a pair of transparent substrates made of resin that sandwich liquid crystal as an envelope, and pixels are formed in the liquid crystal spreading direction. Each of the pixels is configured to generate an electric field for independently driving liquid crystal molecules, and obtains a light transmittance corresponding to the driving of the liquid crystal molecules.

  One substrate (hereinafter referred to as a first substrate) includes, for example, a plurality of gate lines extending in the X direction and juxtaposed in the Y direction, and a plurality of drains extending in the Y direction and juxtaposed in the X direction. The region surrounded by the line includes at least a thin film transistor (TFT) that is turned on by a scanning signal from the gate line and a pixel electrode to which a video signal is supplied from the drain line through the turned on thin film transistor. Constitutes a pixel. Thereby, each pixel is driven independently. The other substrate (hereinafter referred to as the second substrate) is formed with a black matrix and R (red), G (green), and B (blue) color filters corresponding to each pixel. It is configured to perform color display according to the amount of transmitted light.

  On the other hand, the video signal supplied to each drain line and the scanning signal supplied to the gate line are generally generated based on a control signal input from an external device. For this reason, in a liquid crystal display device using a glass substrate, a video signal driving circuit (drain driver) or a scanning signal driving circuit (gate driver) that generates a video signal is an ACF ((Anisotropy Conductive Film) tape. In general, the structure is thermocompression-bonded on the first substrate by using the.

  In contrast, in a liquid crystal display device using a resin substrate, when an image signal driving circuit or a scanning signal driving circuit is to be mounted by thermocompression bonding, an inorganic material such as a gate insulating film of a thin film transistor is used due to thermal stress. It has been pointed out that cracks and the like occur in the formed thin film.

  As means for solving the above-described problems, it has been proposed to form a video signal driving circuit and a scanning signal driving circuit on a resin-made first substrate together with a thin film transistor. However, when the thin film transistor is formed using an amorphous silicon TFT, a scanning signal driving circuit can be formed because of characteristics required for the thin film transistor, but there is a problem that a scanning line driving circuit cannot be formed.

  For this reason, in a conventional liquid crystal display, a scanning line driving circuit is mounted on a flexible wiring board connected to the liquid crystal display device, and a scanning signal is supplied to each drain line via a signal line of the flexible wiring board. On Film) technology is used.

  However, due to the progress of higher definition of mobile devices represented by mobile phones in recent years, the increase in the number of pixels is larger than the progress of the size of the liquid crystal display device body due to the restrictions on the size of the mobile devices. The number will also increase significantly. For this reason, the number of electrode terminals for inputting video signals necessary for liquid crystal display, control signals for the scanning line driving circuit, etc. from one side of the liquid crystal display device is greatly increased, while electrode terminals for inputting these signals. Since the increase in the area where the electrode is formed is small, there is a problem that the arrangement interval (pitch) of the electrode terminals is very narrow, and the alignment between the electrode terminals and the connection terminals is very difficult. .

  As a method for solving this problem, it is conceivable to increase the arrangement interval of the electrode terminals. However, when the arrangement interval is increased, the width of the flexible wiring board becomes large, and the flexible wiring is formed from one side of the liquid crystal display device. There is a problem that it becomes difficult to connect the substrates.

  The present invention has been made in view of these problems, and an object of the present invention is to provide a wiring board and a display device capable of increasing the number of connection terminals without reducing the interval between the connection terminals. It is in.

  In order to solve the above problems, a wiring board having a wiring layer in which a plurality of signal lines are arranged on a base material and a protective layer for protecting the wiring layer, the first wiring board being formed through an insulating layer. A wiring region in which one wiring layer and a second wiring layer are formed, and a connection terminal formed on the first wiring layer side of the insulating layer, the protective layer being opened and the signal lines being connected to each other; An opening region arranged in parallel and a through hole that is formed in the tip side region of the base material relative to the opening region and electrically connects the signal lines on one surface and the other surface of the insulating film are formed. A first terminal region having a through-hole region, a plurality of first connection terminals arranged in parallel along at least one side of the opening region, and a region separated from the first connection terminal, A second terminal region in which second connection terminals are arranged in parallel is formed in the opening region; The second connection terminals are respectively formed on the first wiring layer side of the insulating layer, and the first connection terminals are electrically connected to the signal lines of the first wiring layer formed in the same layer, respectively. The second connection terminal is a wiring board that is electrically connected to the signal line of the second wiring layer through a through hole formed in the through hole region.

  Further, in order to solve the above-mentioned problem, a plurality of drain lines, a plurality of gate lines intersecting with the drain lines, and a plurality of thin film transistors are provided, and a drive signal is externally supplied to the drain lines and / or the gate lines. And a wiring board according to claim 1 connected to the electrode terminal for inputting a control signal, and surrounded by the drain line and the gate line. This is a display device in which the region is a pixel region.

  According to the present invention, the number of connection terminals can be increased without reducing the interval between the connection terminals.

It is a top view for demonstrating schematic structure of the liquid crystal display device of Embodiment 1 of this invention. It is a figure for demonstrating the structure of the wiring board connected to the liquid crystal display device of Embodiment 1 of this invention. It is sectional drawing for demonstrating the structure of the wiring board connected to the liquid crystal display device of Embodiment 1 of this invention. It is sectional drawing for demonstrating the structure of the wiring board connected to the liquid crystal display device of Embodiment 1 of this invention. It is a top view for demonstrating schematic structure of the wiring board in the liquid crystal display device of Embodiment 2 of this invention.

  Hereinafter, an example of an embodiment to which the present invention is applied will be described with reference to the drawings. However, in the following description, the same components are denoted by the same reference numerals, and repeated description is omitted.

<Embodiment 1>
<overall structure>
FIG. 1 is a plan view for explaining a schematic configuration of a liquid crystal display device according to Embodiment 1 of the present invention. However, the liquid crystal display device shown in FIG. 1 has a relatively small diagonal in the liquid crystal display region. In the first embodiment, a case where the present invention is applied to a liquid crystal display device will be described. However, the present invention is not limited to this, and an EL display device, another electronic device, or the like may be used.

  As shown in FIG. 1, the liquid crystal display device of Embodiment 1 includes a semiconductor element side substrate (TFT side substrate, first substrate) SUB1 on which pixel electrodes and the like are formed, and a color filter and a black matrix (light shielding film). And a color filter side substrate (CF side substrate, second substrate) SUB2 disposed opposite to the first substrate SUB1, and a liquid crystal (not shown) sandwiched between the first substrate SUB1 and the second substrate SUB2. A liquid crystal display device can be obtained by combining the liquid crystal display panel and a backlight unit (not shown) serving as a light source. The first substrate SUB1 and the second substrate SUB2 are fixed (fixed) and the liquid crystal sandwiched between the two substrates SUB1 and SUB2 is fixed by a sealing material SL formed around the display area AR. Is also configured to be sealed. In the following description, the liquid crystal display panel is also referred to as a liquid crystal display device.

  As the first substrate SUB1 and the second substrate SUB2, a known transparent resin substrate is used. A first substrate SUB1 and a second substrate SUB2 are formed with this resin substrate to constitute a liquid crystal display device. The first substrate SUB1 and the second substrate SUB2 are not limited to the above-described resin substrates, and may be glass substrates, and may be other insulating substrates such as quartz glass. For example, if quartz glass is used, the process temperature can be increased and the gate insulating film can be densified, so that the reliability of the thin film transistor TFT described later can be improved. However, since the liquid crystal display device of Embodiment 1 is configured to use a plastic (resin) substrate, a liquid crystal display device that is lightweight and excellent in impact resistance can be provided.

  In the liquid crystal display device according to the first embodiment, a region in which display pixels (hereinafter abbreviated as pixels) are formed in a region in which liquid crystal is sealed is a display region AR, and the outermost region of the display region AR is formed. The outermost circumference of the display area is appropriately described. Even in the region where the liquid crystal is sealed, a region where pixels are not formed and which is not involved in display is not the display region AR.

  Furthermore, in the liquid crystal display device of the first embodiment, an amorphous silicon TFT is used as the thin film transistor TFT, and only the scanning signal drive circuit (gate driver) GDR that can be formed of amorphous silicon is formed on the first substrate SUB1. It becomes the composition which is done. On the other hand, a video signal drive circuit (drain driver) DDR that is difficult to form with amorphous silicon is mounted on a wiring board (flexible wiring board) FPC, and is a flexible wiring board connected to the electrode terminal portion CNA. A video signal is input together with a control signal for the gate driver GDR input via the FPC. The configurations of the flexible wiring board FPC and the electrode terminal portion CNA will be described in detail later. In the following description, the drain driver and the gate driver are simply abbreviated as a drive circuit (driver) when it is not necessary to distinguish between the drain driver and the gate driver.

  As shown in FIG. 1, in the liquid crystal display device according to the first embodiment, scanning is performed on the liquid crystal side surface of the first substrate SUB1 and in the display area AR, extending in the X direction in FIG. A signal line (gate line) GL is formed. In addition, video signal lines (drain lines) DL extending in the Y direction and juxtaposed in the X direction are formed.

  A rectangular region surrounded by the drain line DL and the gate line GL constitutes a region in which pixels are formed, whereby each pixel is arranged in a matrix in the display region AR. Each pixel has a thin film transistor TFT that is turned on by a scanning signal from the gate line GL and a drain line through the turned on thin film transistor TFT, for example, in a portion indicated by a circle A in FIG. The pixel electrode PX to which the video signal from DL is supplied, and the common electrode CT connected to the common line CL and supplied with a reference signal having a reference potential with respect to the potential of the video signal. An electric field having a component parallel to the surface of the first substrate SUB1 is generated between the pixel electrode PX and the common electrode CT, and liquid crystal molecules are driven by this electric field. Such a liquid crystal display device is known to be capable of so-called wide viewing angle display, and is called an IPS system or a lateral electric field system because of the peculiarity of applying an electric field to liquid crystal.

  In the configuration of the common electrode CT shown in the enlarged view A ′, the reference signal is input to the common electrode CT formed independently for each pixel through the common line CL. However, the configuration is limited to this. For example, the common electrode CT is formed so that the common electrodes CT of the pixels adjacently arranged in the X-axis direction are directly connected, and from the left and right ends (the end portion of the first substrate SUB1) in the X-axis direction. Alternatively, the reference signal may be input from both sides via the common line CL.

  In the first embodiment, each drain line DL and each gate line GL extend beyond the sealing material SL at their ends, the gate line GL is connected to the gate driver GDR, and the drain line DL is an electrode terminal portion. The configuration extends to the CNA.

<Configuration of wiring board>
FIG. 2 is a diagram for explaining a configuration of a wiring board connected to the liquid crystal display device according to the first embodiment of the present invention. FIGS. 3 and 4 are connected to the liquid crystal display device according to the first embodiment of the present invention. It is sectional drawing for demonstrating the structure of a wiring board. In particular, FIG. 2 is an enlarged view of a part of the wiring board shown in FIG. 1, and is a view in which wiring (signal lines and signal wirings) of a second wiring layer, which will be described later, is omitted for simplicity of explanation. . 3 is a cross-sectional view taken along line BB ′ shown in FIG. 2, and FIG. 4 is a cross-sectional view taken along line CC ′ shown in FIG.

  The wiring board FPC of Embodiment 1 uses, for example, a polyimide-based or liquid crystal polymer (LCP) -based resin material, which is a flexible insulator (base film), as a base material BF, and copper or the like on both surfaces of the base material BF. The wiring is formed of the conductive material, and a plurality of the wirings are arranged in the width direction of the base material BF. In particular, the wiring board FPC according to the first embodiment has a configuration in which the first wiring CO1 is arranged in parallel at intervals of 50 μm on the surface connected to the electrode terminal of the liquid crystal display panel, which is the connection partner (hereinafter referred to as “the wiring substrate FPC”). In this explanation, the wiring layer on this side is referred to as a first wiring layer). In addition, the second wiring CO2 is arranged in parallel at intervals of 200 μm on the surface facing the first wiring layer through the base material BF and not connected to the electrode terminal. In particular, in the wiring board FPC according to the first embodiment, each second wiring CO2 arranged in parallel with the second wiring layer is connected to any one of the first wirings CO1 arranged in parallel with the first wiring layer. It is the structure formed in the position which opposes via the material BF. In the wiring board FPC of the first embodiment, every third wiring CO2 provided in parallel in the second wiring layer is formed with respect to the first wiring CO1 provided in parallel in the first wiring layer. It is the composition which becomes.

  In the wiring board of the first embodiment, as described above, the wiring formation area COA in which the first and second wirings CO1 and CO2 are formed (in the present specification, the area in which the drain driver DDR is mounted). Are also included in the wiring formation region) and a connection terminal region OPA in which a connection terminal as a terminal for connecting the electrode terminal of the liquid crystal display panel as a connection partner is formed, and a through hole (hole) TH1 in the base material BF. And a through hole region THA that is a region for electrically connecting the second wiring CO2 and the third wiring CO3. In particular, in the wiring board FPC according to the first embodiment, the through hole region THA is formed on the end side of the wiring board FPC, that is, on the end side in the extending direction of the first and second wirings CO1 and CO2. A connection terminal region (opening region) OPA is formed in a region between the region THA and the wiring formation region COA. With such a configuration, the second wiring CO2 is connected to the first wiring layer side through the through hole TH1 without affecting the interval between the first wirings CO1 formed in the first wiring layer. Are connected to the third wirings CO3 formed in the above.

  In the wiring board FPC of the first embodiment, as shown in FIG. 3, in the wiring formation region COA, the first surface 15 μm thick on one surface (the lower surface side in FIG. 3) of the substrate BF 15 μm thick. The wiring CO1 is formed, and the surface of the first wiring CO1 is covered with a known solder resist SR (which may be a cover film or the like) having a thickness of 8 μm. On the other hand, a second wiring CO2 having a thickness of 15 μm is formed on the other surface (upper surface side in FIG. 3) of the substrate BF, and a layer of a known adhesive ADH is formed on the surface of the second wiring CO2. A known cover film CF having a thickness of 18 μm and a thickness of 12.5 μm is adhered.

  In the connection terminal area OPA continuous to the wiring formation area COA, the solder resist SR is removed, and an exposed portion of the first wiring CO1 formed extending from the wiring formation area COA, for example, By performing well-known gold plating, the first connection terminal CN1 corresponding to each first wiring CO1 is formed. In the wiring board FPC according to the first embodiment, the third wiring CO3 that is electrically connected to the second wiring CO2 through the through hole TH1 extends to the connection terminal area OPA, and is connected to the connection terminal area OPA. The second connection terminal CN2 corresponding to each third wiring CO3 (that is, the second wiring CO2) is formed by performing well-known gold plating on the extended and exposed portion. However, as is apparent from FIG. 2, in the wiring board FPC of the first embodiment, the first connection terminal CN1 and the second connection terminal CN2 are formed on the same straight line. Accordingly, the second connection terminal CN2 is not formed on the extended line of the first connection terminal CN1 in the portion where the second wiring CO2, that is, the third wiring CO3 is not formed. Further, the first connection terminal CN1 and the second connection terminal CN2 are formed at a predetermined interval in the extending direction, and as shown in FIG. 3, through a known anisotropic conductive film ACF. Even when the electrode terminal on the liquid crystal display panel side and the first and second electrode terminals CN1 and CN2 are electrically connected, the first connection terminal CN1 and the second connection terminal CN2 are not electrically connected ( (No short circuit).

  In the through hole area THA, as shown in FIG. 2, a thin film of copper, which is the same conductive material as the second wiring CO2, is formed along the inner peripheral surface of the through hole (hole) TH1 formed in the base material BF. In addition, a through hole land THL having a diameter of 0.25 mm is formed in the peripheral portion of the through hole TH1 to ensure connection reliability between the second wiring layer side and the third wiring layer side by the through hole TH1. ing. Further, the conductive material is not formed in the central portion of the through hole TH1, and a through hole TH2 having a diameter of 0.03 mm is formed through which the inner peripheral surface of the conductive material opens and passes.

  Thus, since the through-hole land THL is formed in the wiring board FPC according to the first embodiment, the through-hole land THL occupies a region larger than the through-hole TH1 and the wiring width. . For this reason, in the wiring board FPC of the first embodiment, the through hole TH1 including the through hole land THL is formed at a position shifted (moved) in the extending direction of each second wiring CO2, and each wiring CO1. By disposing (moving) the through-hole land THL including the through-hole TH1 in the juxtaposed direction of CO2, CO2, and CO3, the arrangement of the through-hole land THL with respect to the juxtaposed direction of the wirings CO1, CO2, and CO3 The interval, that is, the wiring interval of the second wiring layer can be reduced.

  Further, as is clear from FIG. 3, in the wiring board FPC of the first embodiment, the wiring board FPC is formed on the other surface side of the base material BF (upper side of the base material BF shown in FIG. 3) and connected from the wiring formation region COA. Each second wiring CO2 extending from the terminal area OPA to the through hole area THA is connected to the through hole land THL of one through hole TH1. Further, also on one surface side of the base material BF (below the base material BF shown in FIG. 3), as shown in FIGS. 2 and 3, the through-hole land THL of one through-hole TH1 is the third hole TH1. It is connected to any one of the wirings CO3 and connected to the second connection terminal CN2.

  On the other hand, in the connection terminal area OPA, the portion where the second connection terminal CN2 is not formed on the extension in the extending direction of the first connection terminal CN1 is, as shown in FIG. 4, one surface side of the base material BF (FIG. 4). Only the first wiring CO1 is formed on the lower side of the base material BF shown in the figure. That is, the second wiring CO2 is not formed on the other surface side of the base material BF (upper side of the base material BF shown in FIG. 4), and a well-known cover film CF is bonded with the adhesive ADH. It has become.

<Electrode terminal structure of liquid crystal display panel and connection with wiring board>
On the side of the liquid crystal display panel, all drain lines DL are formed in the same layer in the display area by using a well-known photolithography technique, but the drain lines DL are formed in a two-layer structure outside the display area AR. It becomes the composition which becomes. For example, in the drain line DL having a two-layer structure, the first drain line DL1 connected to the wiring of the first wiring layer of the wiring board is formed in the same layer as the conventional drain line DL, as shown in FIG. The second drain line DL2 connected to the second wiring CO2 is formed in the upper layer of the interlayer insulating film IN formed in the upper layer of the first drain line DL1. With such a two-layer structure, the first connection terminal CN1 and the second connection terminal CN2 are connected to the first and second drain lines DL1 and DL2 using the anisotropic conductive film ACF. It can be easily configured. Further, even in the portion where only the first connection terminal CN1 is formed, the connection between the first connection terminal CN1 and the first drain line DL1 using the anisotropic conductive film ACF can be easily performed.

  Note that the wiring board FPC according to the first embodiment has a structure in which the thickness of the base material BF is 15 μm and the thickness of the connection terminal is relatively thick, ie, 15 μm or more, so that the level difference is large. The first and second connection terminals CN1 and CN2 are formed on the side. However, the thickness of the interlayer insulating film IN of the liquid crystal display panel of Embodiment 1 is 0.4 μm, and the thicknesses of the wirings DL1 and DL2 connected to the drain line DL are each 0.2 μm. Since it is small, in the electrode terminal portion CNA on the liquid crystal display panel side of Embodiment 1, the protective film PAS and the interlayer insulating film IN of the first and second drain lines DL1 and DL2 are removed as shown in FIG. It is configured to carry out clothing with an ITO film.

  As described above, in the liquid crystal display device according to the first embodiment, the wiring substrate FPC including the wiring region in which the first wiring CO1 and the second wiring CO2 formed through the base material BF which is an insulating material is formed. The connection terminal region OPA in which the opening region of the solder resist SR is formed on the first wiring layer CO1 side of the base material BF, and the second wiring CO2 is formed in the tip side region of the base material BF from the opening region. And a third through hole region in which a through hole TH1 for connecting the third wiring CO3 is formed. In this opening region, a first terminal region (indicated by Y in FIG. 2) in which a plurality of first connection terminals CN1 are arranged in parallel and a second terminal in which a plurality of second connection terminals CN2 are arranged in parallel. Terminal regions (indicated by X in FIG. 2) are respectively formed, and the first and second connection terminals CN1 and CN2 are respectively formed on the first wiring layer CO1 side of the base material BF. . Furthermore, the first connection terminal CN1 is electrically connected to the wiring of the first wiring layer CO1 formed in the same layer, and the second connection terminal CN2 is connected via the through hole TH1 and the third wiring CO3. Therefore, the number of connection terminals can be increased without reducing the interval between the first and second connection terminals CN1 and CN2. it can.

  As a result, even when the drain driver DDR is mounted on the wiring board, the liquid crystal display panel and the wiring board FPC can be easily connected without increasing the width of the wiring board FPC. Can do.

<Embodiment 2>
FIG. 5 is a plan view for explaining a schematic configuration of a wiring board in the liquid crystal display device according to the second embodiment of the present invention. However, the wiring board of the second embodiment is the same as that of the first embodiment except for the wiring shapes of the second and third wiring layers CO2 and CO3, the formation positions of the through holes TH1, and the number of second connection terminals CN2. The configuration is the same as that of the wiring board. Therefore, in the following description, only the wiring shape of the second and third wiring layers CO2 and CO3, the formation position of the through hole TH1, and the number of second connection terminals CN2 will be described in detail.

  As is apparent from FIG. 5, in the wiring board FPC of the second embodiment, the through-hole land THL having an outer periphery size (diameter) of 0.25 μm is extended in each wiring formed in the first and second wiring layers. The hole land THL (through hole TH1) is formed in the width direction of the base material BF so that the substantial interval in the direction becomes 0 (zero). Furthermore, in the wiring board of the first embodiment, two rows of through-hole lands THL (through holes TH1) are formed in the extending direction of each wiring formed in the first and second wiring layers. In the wiring board FPC of the second embodiment, the wiring board FPC is formed in three rows, and each wiring of the third wiring layer that connects the second connection terminal CN2 and each through-hole land THL bypasses the through-hole land THL. . With this configuration, the number of through-hole lands THL, that is, the number of through-holes TH1 formed in the width direction of the wiring board FPC (the number of second wirings CO2 and second connection terminals CN2) is increased, and the wiring direction is increased. The amount of protrusion of the through hole area THA is suppressed. As a result, in the second embodiment, even when the wiring CO1 interval and the first connection terminal CN1 of the first wiring layer are formed at 50 μm, the second connection between the first connection terminals CN1 is every 150 μm. The two connection terminals CN2 can be formed.

  In the case of the above-described configuration, the region in the range of 450 μm indicated by L1 in FIG. 5, that is, the three through-hole lands THL aligned from the upper right to the lower left in FIG. It is possible to form 12 connection terminals in total, including nine first connection terminals CN1 and three second connection terminals CN2. In this case, since only the first connection terminal CN1 on the Y column side is provided in the conventional configuration, the wiring board FPC according to the second embodiment does not change the width of the wiring board and the terminal pitch of the first connection terminals CN1 is changed. It is possible to increase the number of connection terminals, that is, the number of wirings (number of connection terminals) to 4/3 times while maintaining 50 μm.

  In the case of the wiring board FPC of the second embodiment, the distance between the connection terminal area OPA and the through hole land THL is 0.1 mm or more, and the distance between the base BF, that is, the front end of the wiring board FPC and the through hole land THL is 0.2 mm. Even in the case described above, the length of the through hole area THA in the direction of the wirings CO1 and CO2 can be formed with 0.1 + 0.25 × 3 + 0.2 = 1.05 mm. On the other hand, in the wiring board FPC of the second embodiment, the length of the first connection terminal CN1 is 0.8 mm, the length of the second connection terminal is 0.5 mm, and the extension of the first connection terminal CN1 and the second connection terminal CN2 is. Since the distance in the current direction is 0.2 mm, the total length of the connection terminal area OPA and the through-hole area THA is 2.55 mm, which is applicable to a small liquid crystal display device.

  In particular, in a small liquid crystal display device used for a mobile phone or the like, it is common to form an electrode terminal on the short side of the display device. Therefore, the present invention is particularly applied to a high-definition small liquid crystal display device. It is valid.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment of the invention, but the invention is not limited to the embodiment of the invention and does not depart from the gist thereof.

AR ... display area, SUB1 ... first substrate, SUB2 ... second substrate DL ... drain line, GL ... gate line, CL ... common line DT ... drain electrode, TFT ... Thin film transistor, PX ... Pixel electrode CT ... Common electrode, SL ... Seal material, CNA ... Electrode terminal DDR ... Drain driver, GDR ... Drain driver FPC ... Wiring Substrate, THA ... through-hole region, OPA ... connection terminal region COA ... wiring region, CO1-3 ... first to third wiring layers (wiring)
CN1 ... first connection terminal, CN2 ... second connection terminal, TH1 ... through hole TH2 ... through hole, THL ... through hole land CF ... cover film, ADH ... adhesion Agent, BF ... Substrate SR ... Solder resist, ACF ... Anisotropic conductive film, PAS ... Protective film IN ... Interlayer insulating film, DL1, DL2 ... Signal line

Claims (9)

A wiring board having a wiring layer in which a plurality of signal lines are arranged in parallel on a substrate, and a protective layer for protecting the wiring layer,
A wiring region in which a first wiring layer and a second wiring layer formed through an insulating layer are formed;
An opening region formed on the first wiring layer side of the insulating layer, in which the protective layer is opened and connection terminals to which the signal lines are respectively connected are arranged;
A through-hole region that is formed in the tip side region of the base material relative to the opening region, and in which a through-hole that electrically connects a signal line on one surface of the insulating film and the other surface is formed;
A first terminal region in which a plurality of first connection terminals are arranged in parallel along at least one side of the opening region; and a region separated from the first connection terminal, wherein the plurality of second connection terminals are arranged in parallel. A second terminal region to be formed in the opening region,
The first and second connection terminals are respectively formed on the first wiring layer side of the insulating layer,
The first connection terminal is electrically connected to a signal line of the first wiring layer formed in the same layer,
The wiring board, wherein the second connection terminal is electrically connected to a signal line of the second wiring layer via a through hole formed in the through hole region. The wiring board according to claim 1,
The number of signal lines in the first wiring layer is greater than the number of signal lines in the second wiring layer. In the wiring board according to claim 1 or 2,
The substrate is made of a resin material having flexibility. The wiring board according to any one of claims 1 to 3,
A conductor formed for each through hole;
On the second wiring layer side with respect to the insulating layer, a second wiring layer extending from the wiring region beyond the opening region to the through hole region and reaching the through hole;
A third wiring layer which is formed on the first wiring layer side with respect to the insulating layer and in which a plurality of signal lines extending from the through hole to the second connection terminal are arranged in parallel;
A wiring board, wherein the signal line of the second wiring layer and the second connection terminal are electrically connected. The wiring board according to any one of claims 1 to 4,
The first connection terminals are juxtaposed along one side of the opening region, and the second connection terminals are juxtaposed along a side opposite to one side where the first connection terminals are juxtaposed. A flexible wiring board characterized by The wiring board according to claim 5,
The second connection terminal is formed at an extended position in the extending direction of the first connection terminal, and the parallel pitch of the second connection terminals is an integral multiple of the parallel pitch of the first connection terminals. A wiring board characterized by that. The wiring board according to any one of claims 1 to 6,
A wiring board, wherein the base material is formed of an insulating material, and the first and second wiring layers are opposed to each other through the base material. A plurality of drain lines, a plurality of gate lines intersecting with the drain lines, a plurality of thin film transistors, and electrode terminals for inputting drive signals to the drain lines or / and the gate lines from the outside,
The wiring board according to any one of claims 1 to 7, which is connected to the electrode terminal and inputs a control signal;
With
A display device in which a region surrounded by the drain line and the gate line is a pixel region. The display device according to claim 8, wherein
The electrode terminal is disposed opposite to the first electrode terminal connected to the first connection terminal, the first electrode terminal via an insulating film, and connected to the second connection terminal. And an electrode terminal.

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