JP2010199490A - Temperature measurement device of power semiconductor device, and power semiconductor module using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a temperature measurement circuit of a power semiconductor device preventing degradation of temperature detection accuracy even when a power element is in any condition while suppressing manufacturing cost, and to provide a power semiconductor module using the same. <P>SOLUTION: The temperature measurement circuit of the power semiconductor device includes power elements 5, 6 and diodes DD2, DU2 for temperature detection on a silicon chip, and detects a temperature of the power semiconductor device. The temperature measurement circuit includes temperature measurement parts 9, 10 for detecting a temperature of the silicon chip by detecting a forward current flowing between an anode and cathode with potentials of the anode and cathode of the diodes DD2, DU2 for temperature detection maintained to be negative than an emitter or source potential of the power element. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a temperature measuring device for a power semiconductor device and a power semiconductor module using the same, and in particular, detects the temperature of a silicon chip with high accuracy.

In recent vehicle equipment, in order to achieve high efficiency and energy saving measures, a step-up / down converter and an inverter are mounted on a drive system of an electric motor that generates drive force.
FIG. 5 is a block diagram showing a schematic configuration of a vehicle drive system using a conventional buck-boost converter.
In FIG. 5, the vehicle drive system includes a power source 1101 that supplies power to the buck-boost converter 1102, a buck-boost converter 1102 that performs voltage boost and buck, and an inverter that converts the voltage output from the buck-boost converter 1102 into a three-phase voltage. 1103 and an electric motor 1104 for driving the vehicle are provided. Note that the power source 1101 can be configured by a power supply voltage from an overhead wire or a battery connected in series.

  When the vehicle is driven, the step-up / down converter 1102 boosts the voltage of the power source 1101 (eg, 280 V) to a voltage suitable for driving the electric motor 1104 (eg, 750 V) and supplies the boosted voltage to the inverter 1103. Then, by turning on / off the switching element, the voltage boosted by the buck-boost converter 1102 is converted into a three-phase voltage, current is passed through each phase of the electric motor 1104, and the switching frequency is controlled to control the vehicle. The speed of the can be changed.

  On the other hand, at the time of braking of the vehicle, the inverter 1103 performs a rectifying operation by performing on / off control of the switching element in synchronization with the voltage generated in each phase of the electric motor 1104 to convert it into a DC voltage, and then the buck-boost converter. 1102. The step-up / down converter 1102 can perform a power regeneration operation by reducing the voltage (eg, 750 V) generated from the electric motor 1104 to the voltage (eg, 280 V) of the power source 1101.

FIG. 6 is a block diagram showing a schematic configuration of the step-up / down converter of FIG.
In FIG. 6, the buck-boost converter 1102 includes a reactor L for storing energy, a capacitor C for storing charge, switching elements SW1 and SW2, and switching elements SW1 and SW2 for energizing and interrupting current flowing into the inverter 1103. Control circuits 1111 and 1112 are provided for generating control signals instructing conduction and non-conduction, respectively.

  The switching elements SW1 and SW2 are connected in series, and a power source 1101 is connected to a connection point of the switching elements SW1 and SW2 via a reactor L. Here, the switching element SW1 is provided with an IGBT (Insulated Gate Bipolar Transistor) 1105 that performs a switching operation in accordance with a control signal from the control circuit 1111. The flywheel diode D1 that flows a current in a direction opposite to the current flowing in the IGBT 1105 is the IGBT 1105. Connected in parallel.

  Further, the switching element SW2 is provided with an IGBT 1106 that performs a switching operation in accordance with a control signal from the control circuit 1112, and a flywheel diode D2 that flows a current in a direction opposite to the current flowing in the IGBT 1106 is connected in parallel to the IGBT 1106. The collector of the IGBT 1106 is connected to both the capacitor C and the inverter 1103.

FIG. 7 is a diagram showing a waveform of a current flowing through the reactor L in FIG. 6 during the boosting operation.
7, the step-up operation, IGBT1105 switching element SW1 Then on (conductive), a current I flows through the reactor L through the IGBT1105, energy LI ^2/2 is stored in the reactor L.
Next, when the IGBT 1105 of the switching element SW1 is turned off (non-conducting), a current flows through the flywheel diode D2 of the switching element SW2, and the energy stored in the reactor L is sent to the capacitor C.

On the other hand, in the step-down operation, IGBT1106 switching element SW2 is a result on (conductive), a current I flows through the reactor L through the IGBT1106, energy LI ^2/2 is stored in the reactor L.

  Next, when the IGBT 1106 of the switching element SW2 is turned off (non-conducting), a current flows through the flywheel diode D1 of the switching element SW1, and the energy stored in the reactor L is regenerated to the power source 1101.

Here, by changing the on-duty ratio (ON Duty) of the flywheel diode D2 (in the case of step-up operation) or the IGBT 1106 (in the case of step-down operation) of the switching element 2, it is possible to adjust the voltage of the step-up / step-down voltage. Yes, the approximate voltage value can be obtained by the following equation (1).
V _L / V _H = ON Duty (%) (1)
However, V _L is the voltage of the power supply 1101, V _H is the voltage of the capacitor C, ON Duty is the ratio of the conduction period to the switching period of the flywheel diode D2 (in the case of step-up operation) or the switching element SW2 (in the case of step-down operation). is there.

Here, since there are actually fluctuations in the load, fluctuations in the power supply voltage V _L , etc., the voltages V _H and V _L are monitored, and the on-duty ratio (ON Duty) is set so that the boosted / lowered voltage becomes the target value. ) Is being controlled.

FIG. 8 is a block diagram showing an intelligent power module (IPM) for a buck-boost converter.
In FIG. 8, the IPM 2100 includes a lower arm switching unit 2101, an upper arm switching unit 2102, and a control circuit 2103 that controls both switching units 2101 and 2102. Note that the switching units 2101 and 2102 are electrically separated from the control circuit 2103.

  Each of switching units 2101 and 2102 has switching elements SW11 and SW12. Each of these switching elements SW11 and SW12 has IGBTs 2111 and 2112 and flywheel diodes D11 and D12 connected in reverse parallel to IGBTs 2111 and 2112.

  Gate drivers 2113 and 2114 are connected to the gates of the IGBTs 2111 and 2112. The gate drivers 2113 and 2114 receive gate control signals from the control circuit 2103 via the photocouplers 2115 and 2116, and also from the IGBT protection circuits 2117 and 2118 that suppress overcurrent and overheating of the IGBTs 2111 and 2112. A protection signal is input.

Further, the converter output voltage V _H output from the IGBT 2112 of the switching unit 2102 of the upper arm is supplied to the output voltage detection circuit 2119. In the output voltage detection circuit 2119, the level of the output voltage detected by the voltage dividing circuit 2120 is adjusted by the level adjustment circuit 2121, and the output of the level adjustment circuit 2121 and the triangular wave signal generated by the triangular wave generator 2122 are compared with the comparator 2123. To be converted into a PWM signal. The PWM signal output from the comparator 2123 is supplied to the control circuit 2103 via the photocoupler 2124.

The control circuit 2103 receives a step-up / step-down command value input from an external arithmetic processing unit, and a low-pass filter that smoothes the PWM signal output from the output voltage detection circuit 2119 of the switching unit 2101 of the lower arm. A voltage comparator 2132 input via 2131; and a gate signal generator 2133 into which a deviation between the step-up / step-down command value output from the voltage comparator 2132 and the output voltage V _H is input.

The gate control signal output from the gate signal generator 2133 is output to the gate drivers 2113 and 2114 of the switching units 2101 and 2102 via the photocouplers 2115 and 2116.
Voltage dividing resistors R11 and R12 are respectively connected between the second emitter terminal 2126 provided in the IGBTs 2111 and 2112 and the ground in order to shunt the emitter current and detect the emitter current value. The overcurrent detection signals output from the connection points of the respective voltage dividing resistors R11 and R12 are input to the IGBT protection circuits 2117 and 2118, and are gated when the overcurrent detection signals are equal to or greater than a preset overcurrent threshold. A gate current stop signal for stopping the gate current supply to the IGBTs 2111 and 2112 is output to the drivers 2113 and 2114.

Further, the IGBT protection circuits 2117 and 2118 include a temperature measurement circuit 2143 for measuring the chip temperature by detecting the voltage VF between the terminals of the temperature detection diodes 2141 and 2142 embedded in the same chip as the switching elements SW11 and SW12. Each has.
As shown in FIGS. 9 and 10, the temperature measurement circuit 2143 has a constant current circuit 2144 that supplies a constant current IF of, for example, 200 μA to the temperature detection diodes 2141 and 2142. Thus, when the constant current IF from the constant current circuit 2144 is supplied to the temperature detection diodes 2141 and 2142, the voltage VF across the temperature detection diodes 2141 and 2142 is a voltage value proportional to the temperature (proportional constant is negative). (VF = 1.5V when the chip temperature is 150 ° C., and VF = 2.1V when the chip temperature is 15 ° C.). Actually, the change amount 600 mV of the voltage VF is the full span of the temperature signal.

  The temperature measurement circuit 2143 has a triangular wave generator 2145 that serves as an oscillator for generating a pulse width modulation (PWM) signal, and the triangular wave signal output from the triangular wave generator 2145 has a preset lower limit value. And the upper limit value are alternately generated so as to repeatedly rise and fall.

Then, the temperature measurement circuit 2143 converts the voltage VF across the temperature detection diodes 2141 and 2142 described above into impedance by the buffer circuit 2146 as shown in FIG. 10, and then supplies the converted voltage to the level conversion circuit 2147. From 2147, the level-adjusted voltage Vlev is output. In the level converting circuit 2147, to coincide with the voltage Vlev for the voltage VF _H of the upper limit value and the high-temperature side of the triangular wave signal output from the triangular wave generator 2145 (e.g., 155 ° C.), and the lower limit value of the triangular wave signal and the low temperature side (e.g. so as to coincide with the voltage Vlev for the voltage VF _L of 25 ° C.), convert the level of the voltage VF. This conversion is a linear conversion.

Further, the output voltage Vlev whose level is adjusted by the level conversion circuit 2147 and the triangular wave signal Vtri output from the triangular wave generator 2145 are input to the comparator 2148. The comparator 2148 compares the output voltage Vlev and the triangular wave signal Vtri, and outputs a pulse width modulation (PWM) signal that is at a high level when Vlev <Vtri and is at a low level when Vlev ≧ Vtri. The duty ratio of the pulse width modulation signal of the comparator 2148 is proportional to the voltage Vlev. Since the voltage Vlev is obtained by linearly converting the terminal voltage VF as described above, the duty ratio is also proportional to the voltage VF across the temperature detection diodes 2141 and 2142 described above. For example a duty ratio of 0% is a low temperature (e.g. 25 ° C.) side end voltage VF _L, the duty ratio of 100% high temperature (e.g. 165 ° C.) side across a voltage VF _H, pulse width modulation by the next stage of the photocoupler 2149 (PWM) Transmission as a pulse width modulation (PWM) signal for temperature detection from the switching units 2101 and 2102 of the upper arm and the lower arm to the PWM-analog converter 2151 provided on the control circuit 2103 side through the signal isolation transmission circuit Is done.

  In this PWM-analog converter 2151, the pulse width modulation signal input from the photocoupler 2149 is supplied to a binarization circuit 2152 that converts it into a binary signal. In this binarization circuit 2152, the voltage is applied when the duty ratio is 0%. An IGBT chip is generated by generating a binary signal having a voltage V2 when V1 and the duty ratio are 100%, converting the impedance of the binary signal by the buffer circuit 2153, smoothing the binary signal by the low-pass filter 2154, and converting it to a DC level. An IGBT chip temperature signal proportional to the temperature can be obtained.

  The IGBT chip temperature signal is transmitted to the host system of the IPM 2100, and the host system constantly detects the temperature of the IGBT chip. For example, when the IGBT chip temperature exceeds a preset first predetermined temperature T1, the switching is performed. When the IGBT chip temperature exceeds a second predetermined temperature T2 higher than the first predetermined temperature T1, the switching operation (step-up / step-down operation) by the switching elements SW11 and SW12 is stopped. The protection function that works.

Further, when the terminal voltage VF or the voltage Vlev is input to the IGBT protection circuits 2117 and 2118 described above and the terminal voltage VF or the voltage Vlev is determined to be an abnormal value, a gate current stop signal is output from the IGBT protection circuits 2117 and 2118. Output immediately.
FIG. 11 is a cross-sectional view showing a silicon chip on which an IGBT and a temperature detection diode described in Patent Document 1 are formed.

In this silicon chip, a p-well region 2002 is formed on the surface layer of one main surface of a low-concentration n-type semiconductor substrate 2001, and an emitter region 2003 which is an n ⁺ region is selected on the surface layer of the p-well region 2002. The gate electrode 2005 is formed on the surface of the p well region 2002 sandwiched between the emitter region 2003 and the n ⁻ region of the n-type semiconductor substrate 2001 via the gate insulating film 2004, An emitter electrode 2006 is formed across the contact region of the p-well region 2002.

A p ⁺ or n ⁺ collector region 2007 is formed on the surface layer of the other main surface of the semiconductor substrate 2001, and a collector electrode 2008 is formed on the surface of the collector region 2007.
Further, the main surface of p-well region 2002 of the semiconductor substrate 2001 is formed, in a region away from the p-well region 2002, the anode region 2010 is a p-type is formed, n ⁺ form on the surface layer of the anode region 2010 The cathode region 2011 is formed, the anode electrode 2012 is formed on the surface of the anode region 2010, and the cathode electrode 2013 is formed on the surface of the cathode region 2011. The anode region 2010 and the cathode region 2011 constitute a temperature detection diode 2014.

Here, the cathode electrode 2013 is connected to the emitter electrode 2006, and an emitter terminal 2021 is led out from the emitter electrode 2006. A gate terminal 2022 is led out from the gate electrode 2005, an anode terminal 2023 is led out from the anode electrode 2012, and a collector terminal 2024 is led out from the collector electrode 2008.
Patent Document 2 discloses a semiconductor device in which a temperature detection pn diode is formed on a semiconductor substrate on which an IGBT is formed via an oxide film.

JP-A-8-316471 JP 2001-85629 A

In the conventional example described in Patent Document 1, when the collector region 2007 is p ^+, that is, when the power device is an IGBT, the cathode region 2011, the anode region 2010, the semiconductor of the temperature detection diode 2014, and the semiconductor An npnp four-layer parasitic thyristor is formed in the n ⁻ region and the p ⁺ collector region of the substrate 2001, but the impurity concentration at the junction between the anode region 2010 and the cathode region 2011 is extremely high. For example, even if a current of several mA to several tens of mA flows from the anode region 2010 to the cathode region 2011, latch-up does not occur in this portion.

On the other hand, when the collector region 2007 is n ⁺ , the power device is a MOSFET, and the above parasitic thyristor is configured, so that it does not latch up.
The temperature detection diode 2014 is usually made of three diodes connected in series to increase the output voltage for easy handling. The forward voltage of the three temperature detecting diodes 2014 in series varies from 1.5 V to 2.1 V depending on the temperature. This means that when the cathode electrode 2013 is connected to the emitter electrode 2006, the anode region 2010 has a potential difference of + 1.5V to + 2.1V with respect to the emitter region 2003.

On the other hand, the potential difference Vce of the collector electrode 2008 with respect to the emitter electrode 2006 when the IGBT is turned on by the gate signal is several hundreds V when the IGBT is not turned on, but when the IGBT is turned on, it becomes about + 2V when the 200A is turned on. When attention is paid to the pn ⁻ junction between the n ⁻ region of the semiconductor substrate 2001 and the anode region 2010 in such a state, if the potential of the n ⁻ region is sufficiently higher than the potential of the anode region 2010, the pn ⁻ junction is not affected. The reverse bias is sufficiently high, and there is almost no current flowing from the n ⁻ region to the anode region 2010. However, when the potential of the n ⁻ region is not sufficiently higher than the potential of the anode region 2010, the pn ⁻ Only a slight reverse bias is applied to the junction, and current leakage from the n ⁻ region to the anode region 2010 occurs.

The anode of the temperature detecting diode 2014, and a constant current flows through the constant current circuit 2144, IGBT becomes conductive pn ^- the joint, becomes weak reverse bias state, a constant from the constant current circuit 2144 There is an unsolved problem that leakage current from the n ⁻ layer of the semiconductor substrate 2001 is added to the current and flows to the n ⁺ layer of the temperature detection diode 2014.

FIG. 12 is a graph showing the forward current dependence of the forward voltage of the temperature detection diode 2014. When the IGBT is turned on and the reverse bias voltage at the junction between the anode region 2010 and the n ⁻ region becomes low, n ^This indicates that the forward voltage of the temperature detecting diode 2014 increases when the forward current increases due to leakage of current from the layer. This indicates that the temperature is determined to be lower than the actual temperature according to FIG.

In addition, as in the conventional example described in Patent Document 2, when a pn diode for temperature detection is formed on a semiconductor substrate on which an IGBT is formed via an oxide film, there is no risk of leakage current. Since the temperature detecting diode is formed after forming the oxide film on the semiconductor substrate, there is an unsolved problem that the manufacturing cost increases.
Therefore, the present invention has been made paying attention to the unsolved problems of the above-described conventional example, and it is possible to prevent a decrease in temperature detection accuracy in any state of the power element while suppressing the manufacturing cost. An object of the present invention is to provide a temperature measurement circuit for a power semiconductor device, and a power semiconductor module using the same.

  In order to solve the above-described problem, a temperature measurement circuit for a power semiconductor device according to an embodiment of the present invention is a power semiconductor device that detects a temperature of a power semiconductor device in which a power element and a temperature detection diode are provided on a silicon chip. In the temperature measurement circuit, when the power element is an n-channel type, the potential of the anode and the cathode of the temperature detection diode is maintained at a negative potential from the emitter or source potential of the power element, When a forward current flowing between the anode and the cathode is detected and the power element is a p-channel type, the anode and cathode potentials of the temperature detection diode are set to be positive from the emitter or source potential of the power element. A forward current flowing between the anode and cathode while detecting the potential is detected, and the silicon chip is It is characterized by comprising a temperature measuring unit for detecting the temperature of the flop.

A temperature measurement circuit for a power semiconductor device according to another aspect of the present invention is characterized in that the power element and the temperature detection diode are separated by junction separation in the silicon chip.
Furthermore, a temperature measurement circuit for a power semiconductor device according to another aspect of the present invention is characterized in that the power element is composed of an IGBT or a MOSFET.

Furthermore, the temperature measurement circuit for a power semiconductor device according to another aspect of the present invention maintains a difference between the anode and cathode potentials of the temperature detecting diode and the emitter or source potential of the power element at a predetermined value or more. It is characterized by doing so.
Furthermore, a temperature measurement circuit for a power semiconductor device according to another embodiment of the present invention is characterized in that the predetermined value is a value of 5 V or more.

  Still further, a power semiconductor module according to another embodiment of the present invention includes a temperature measurement circuit for the power semiconductor device described above and an arm drive for driving the power element based on a control signal supplied from the control circuit for the power element. A power supply circuit for generating a positive potential and a negative potential in the arm drive circuit, and applying the negative potential of the power supply circuit to an anode of the temperature detection diode.

  A semiconductor module according to another aspect of the present invention includes a temperature measurement circuit for the power semiconductor device described above, and an arm drive circuit for driving the power element based on a control signal supplied from the control circuit for the power element. The arm drive circuit includes a power supply circuit that generates a positive potential, and the power supply circuit includes a constant voltage element that generates a lower potential from the positive potential, and the potential generated by the constant voltage element Is applied to the low potential side terminal of the power element, and the potential of the low potential side terminal of the power supply circuit is applied to the cathode terminal of the temperature detection diode.

  According to the present invention, when detecting the temperature of a power semiconductor device in which a power element and a temperature detection diode are provided on a silicon chip, a plurality of terminals of the power element have potentials of the anode and cathode of the temperature detection diode. Since the forward current flowing between the anode and the cathode is detected while maintaining the negative potential from the terminal potential on the low potential side, the power element and the temperature detecting diode are separated via the insulating film. There is an effect that the temperature of the silicon chip can be detected with high accuracy by a low-cost configuration based on junction separation, not a high-cost configuration.

  The power semiconductor device having the above-described structure includes a temperature measurement circuit and an arm drive circuit that drives the power element, the arm drive circuit having a power supply circuit that generates a positive potential and a negative potential, Is applied to the anode of the temperature detection diode, an effect is obtained that a power semiconductor module capable of detecting the temperature of the silicon chip with high accuracy can be provided.

  Further, the power supply circuit has a constant voltage element that forms a potential lower than the positive potential, and the potential generated by the constant voltage element is applied to the emitter terminal or the source terminal of the power element, and the ground potential of the power supply circuit is set. A power semiconductor module that can detect the temperature of the silicon chip with high accuracy can also be provided by applying the temperature detection diode to the cathode terminal of the temperature detection diode.

It is a block diagram which shows the structure of the intelligent power module for buck-boost converters concerning the 1st Embodiment of this invention. It is a flowchart which shows an example of the temperature measurement process sequence performed with the IGBT protection circuit of FIG. It is a characteristic diagram which shows the content of the silicon chip temperature calculation map which shows the relationship between the both-ends voltage of the diode for temperature detection, and silicon chip temperature. It is a block diagram which shows the structure of the intelligent power module for buck-boost converters concerning the 2nd Embodiment of this invention. It is a block diagram which shows schematic structure of the vehicle drive system using the conventional buck-boost converter. It is a block diagram which shows schematic structure of the buck-boost converter of FIG. It is a figure which shows the waveform of the electric current which flows into the reactor of FIG. 4 at the time of pressure | voltage rise operation. It is a block diagram which shows schematic structure which shows the intelligent power module for the conventional buck-boost converter. It is a figure which shows the conventional diode for temperature detection, Comprising: (a) is a circuit diagram of a diode for temperature detection, (b) is a characteristic view which shows the relationship between the temperature of a diode for temperature detection, and a forward drop voltage. It is a circuit diagram which shows a temperature measurement circuit. It is sectional drawing which shows the power semiconductor device which incorporated the temperature detection diode. It is a characteristic diagram which shows the relationship between the forward current and forward voltage of a temperature detection diode.

Hereinafter, a signal transmission circuit according to an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a schematic configuration of an intelligent power module (IPM: Intelligent Power Module) to which a signal transmission circuit according to an embodiment of the present invention is applied.
In FIG. 1, the intelligent power module for a buck-boost converter includes an upper arm 1 and a lower arm 2 that control a current flowing into a load. The upper arm 1 and the lower arm 2 have power switching elements SWU and SWD for energizing and interrupting the current flowing into the load. Control signals instructing conduction and non-conduction of these power switching elements SWU and SWD are generated by the control circuit 3 respectively. Here, the control circuit 3 can be configured by a CPU or a logic IC, or a system LSI on which the logic IC and the CPU are mounted.

  The power switching elements SWU and SWD of the upper arm 1 and the lower arm 2 are connected in series. The power switching element SWU is provided with an IGBT 6 that performs a switching operation based on the gate signal SU4, and a flywheel diode DU1 that allows a current to flow in a direction opposite to the current that flows in the IGBT 6 is connected in parallel to the IGBT 6. Further, the silicon chip on which the IGBT 6 is formed is provided with a temperature detection diode DU2 having a voltage at both ends corresponding to the temperature change of the chip, and the IGBT 6 is used to detect the emitter current value by flowing a part of the emitter current. An overcurrent detection unit 11 is provided for detecting an overcurrent by means of resistors RU1 and RU2 connected to a second emitter terminal provided at.

  Further, the power switching element SWD is provided with an IGBT 5 that performs a switching operation in accordance with the gate signal SD4, and a flywheel diode DD1 that allows a current to flow in a direction opposite to the current that flows in the IGBT 5 is connected in parallel to the IGBT 5. Further, the silicon chip on which the IGBT 5 is formed is provided with a temperature detection diode DU2 having a voltage across the chip corresponding to the temperature change of the chip, and an IGBT 6 for detecting the emitter current value by dividing the emitter current. An overcurrent detection unit 12 is provided for detecting an overcurrent by means of resistors RU1 and RU2 connected to a second emitter terminal provided at.

Here, the silicon chip on which the IGBTs 5 and 6 and the temperature detection diodes DD2 and DU2 are formed has the configuration shown in FIG. 11 as in the conventional example described above, and the temperature detection diodes DD2 and DU2 have an insulating film therebetween. They are formed directly on one main surface side of the semiconductor substrate 2001 without being interposed, and are separated from each other by junction separation.
On the upper arm 1 side, a gate driver IC 8 that generates a gate signal SU4 for driving the control terminal of the IGBT 6 is provided, and a constant current of 200 μA, for example, is supplied from the built-in constant current circuit to the temperature detection diode DU2. The overheat detection signal SU6 consisting of the voltage VF across the temperature detection diode DU2 at this time is monitored, and the overcurrent detection signal SU5 from the overcurrent detection unit 11 is monitored to generate an IGBT protection signal. An IGBT protection circuit 10 for supplying a protection signal to the gate driver IC 8 is provided.

  On the lower arm 2 side, a gate driver IC 7 for generating a gate signal SD4 for driving the control terminal of the IGBT 5 is provided, and a constant current of 200 μA, for example, is applied from the built-in constant current circuit to the temperature detection diode DD2. The overheat detection signal SD6 composed of the voltage VF across the temperature detection diode DD2 at this time is monitored, and the overcurrent detection signal SD5 from the overcurrent detection unit 11 is monitored to generate an IGBT protection signal. An IGBT protection circuit 9 including a temperature measurement unit that supplies a protection signal to the gate driver IC 7 is provided.

  The IGBT protection circuits 9 and 10 include an arithmetic processing unit such as a microcomputer, for example, and correspond to, for example, the characteristics shown in FIG. 9B obtained in advance from the input overheat detection signals SU6 and SD6. The silicon chip temperature Tc is calculated with reference to the silicon chip temperature calculation map describing the relationship between the values of the overheat detection signals SU6 and SD6 and the silicon chip temperature Tc, and various protection operations are performed based on the silicon chip temperature Tc. . In the present embodiment, the IGBT protection circuits 9 and 10 perform the protection operation that the IPM host system performs in the description of the background art. That is, when the calculated silicon chip temperature Tc exceeds the preset first predetermined temperature T1, the IGBT protection that limits the switching frequency of the gate signal to the gates of the IGBTs 5 and 6 to 1/2 of the normal switching frequency. A signal is output to the gate driver ICs 7 and 8, and when the silicon chip temperature Tc exceeds a second predetermined temperature T2 higher than a preset first predetermined temperature T1, an IGBT protection signal for stopping the output of the gate signal is output to the gate driver IC7. And 8 are output. Further, when the current values of the overcurrent detection signals SU5 and SD5 exceed a predetermined current value Iov set in advance, an IGBT protection signal for stopping the output of the gate signal is output to the gate driver ICs 7 and 8.

Specifically, the temperature measurement process shown in FIG. 2 is executed by the IGBT protection circuits 9 and 10.
In this temperature measurement process, first, in step S1, the voltage at the anode terminal of the temperature detection diode DD2 (or DU2) is detected, and the difference between this voltage and the power supply voltage -Vn, which will be described later, is calculated. obtain. Next, the process proceeds to step S2, and the silicon chip temperature Tc is calculated with reference to the silicon chip temperature calculation map shown in FIG. 3 based on the detected both-end voltage VF. Here, the silicon chip temperature calculation map corresponds to the characteristic diagram of FIG. 9B described above, and has a configuration in which the horizontal axis represents the both-end voltage VF and the vertical axis represents the silicon chip temperature Tc. The characteristic line L1 is set so that the silicon chip temperature Tc decreases from 150 ° C. to 25 ° C. as the both-end voltage VF increases from 1.5V to 2.1V.

  Next, the process proceeds to step S3, where it is determined whether or not the calculated silicon chip temperature Tc exceeds the first predetermined temperature T1, and if Tc ≦ T1, it is determined that the normal state is present, and the timer allocation is performed as it is. Finish the process. When Tc <T1, the routine proceeds to step S4, where it is determined whether or not the calculated silicon chip temperature Tc exceeds the second predetermined temperature T2, and when Tc ≦ T2, the routine proceeds to step S5. In step S5, the protection signal Sp1 for limiting the switching frequency of the gate signal supplied to the gate of the current IGBT 5 or 6 to 1/2 is output to the gate driver IC 7 or 8, and then the timer interrupt process is terminated. Return to the predetermined main program. When Tc> T2 in step S4, the process proceeds to step S6, the protection signal Sp2 for stopping the gate signal supplied to the IGBT 5 or 6 is output to the gate driver IC 7 or 8, and the timer interrupt process is terminated. Return to the predetermined main program. The temperature measurement process in FIG. 2 corresponds to the operation of the temperature measurement unit.

  Further, the control circuit 3 includes a gate signal generator 21 that generates a gate signal that is a pulse signal that controls driving of the power switching elements SWU and SWD based on a control signal input from an external host system. The gate signal output from the gate signal generator 21 is supplied to the gate driver ICs 8 and 7 of the upper arm 1 and the lower arm 2 via the photocouplers 23 and 22, respectively.

  Further, the upper arm 1 and the lower arm 2 described above generate a positive power supply 31 for generating the positive power supply voltage + Vp for the gate driver ICs 8 and 7 and a negative power supply voltage -Vn for the temperature detection diodes DU2 and DD2. Power supply circuits 33 and 34 connected in series with a negative power supply 32 are provided. A connection point between the positive power supply 31 and the negative power supply 32 of the power supply circuits 33 and 34 is grounded to the ground potential.

  Here, the positive potential + Vp of the positive power supply 31 is normally set in the range of 15.5 V to 16.5 V so that the gate drive voltage is about 15 V with respect to the emitter potential of the IGBTs 5 and 6. is there. The positive potential + Vp of the positive power supply 31 is connected to the power supply terminals of the gate driver ICs 7 and 8 and the IGBT protection circuits 9 and 10 that drive the gates of the IGBTs 5 and 6.

The ground potential is connected to the ground terminals of the gate driver ICs 7 and 8 that drive the gates of the IGBTs 5 and 6, the ground terminals of the IGBT protection circuits 9 and 10, and the emitters of the IGBTs 5 and 6.
Further, the negative potential −Vn of the negative power supply 32 has a reverse bias with respect to the pn ⁻ junction between the n ⁻ region of the semiconductor substrate 2001 and the anode region 2010 in the configuration of FIG. 11 in the temperature detection diodes DU2 and DD2. The voltage must be sufficiently working, and the negative potential −Vn must be set so that the difference between the potential of the anode electrode 2012 and the emitter potential of the IGBTs 5 and 6 is equal to or greater than a predetermined value that satisfies the condition regarding the reverse bias. As the predetermined value, a value of 5 V or more is preferable.

  The above description is for the case where the IGBTs 5 and 6 are n-channel type and the potential of the emitter terminal is lower than the potential of the collector terminal. When the IGBTs 5 and 6 are of the p-channel type, it is necessary to set the positive potential + Vn instead of the negative potential −Vn so that the potential of the cathode electrode 2012 is higher than the predetermined value with respect to the emitter potential of the IGBTs 5 and 6. is there. In the case of the p-channel type, the potential of the collector terminal is lower than the potential of the emitter terminal.

  As described above with reference to FIG. 9, the temperature detection diodes DU2 and DD2 are difficult to handle because one diode has a low forward voltage of about 0.5V to 0.7V due to temperature change, and three diodes are connected in series. A forward voltage due to a temperature change is set to 1.5V to 2.0V by adopting the configuration. For this reason, the negative power supply voltage of the temperature detection diodes DU2 and DD2 is set to a negative potential corresponding to the maximum forward voltage of the temperature detection diodes DU2 and DD2, and the negative potential of the anode electrode 2012 (corresponding to the predetermined value). In this case, it is set to -5.0 V).

Next, the operation of the first embodiment will be described.
As an overall operation, when a control command value is input from an external host system to the gate signal generator 21 of the control circuit 3, the input control command value and the upper arm 1 and compares the output voltage V _H when the control IGBT5 and 6 of the lower arm 2, and generates a gate control signal for IGBT5 and 6 so that the output voltage V _H to the control command value matches the generated gate control signal Are output to the gate driver ICs 8 and 7 of the upper arm 1 and the lower arm 2 through the photocouplers 22 and 23, respectively.

Thus, the gate driver IC8 and 7 gate signal from SU4, SD5 is outputted to the gate of IGBT6,5, by the gate of IGBT6,5 is driven, so that the output voltage V _H matches the control command value Switching operation is performed.
At this time, in the power supply circuits 33 and 34 of the upper arm 1 and the lower arm 2, the positive power supply 31 supplies the power supply terminals of the gate driver ICs 8 and 7 and the IGBT protection circuits 10 and 9, for example 15.5 to 16.5 V The negative potential of −7.0 V or less is generated by adding the negative potential of the anode electrode 2012 to the negative potential corresponding to the maximum forward voltage of the temperature detection diodes DU2 and DD2 by the negative power source 32. Vn is generated, and this negative potential -Vn is applied to the cathodes of the temperature detection diodes DU2 and DD2.

  Therefore, when the negative potential −Vn generated by the negative power supply 32 is set to −7.0 V, the silicon chip temperature when the constant current of IF = 200 μA is supplied to the temperature detection diodes DU2 and DD2 is 25 ° C. Even when the forward voltage drop of the temperature detection diodes DU2 and DD2 is as high as 2.0V, the potential of the anode electrode of the temperature detection diodes DU2 and DD2 (the anode of the uppermost diode) is −5V. Become.

Therefore, as described above, even when the potential Vce of the collector electrode 2008 of the IGBTs 5 and 6 drops from several hundreds V when non-conductive to about +2 V when conductive, the n ⁻ region and the anode of the semiconductor substrate 2001 shown in FIG. When attention is paid to the pn ⁻ junction with the region 2010, a sufficient reverse bias can be applied to the pn ⁻ junction, and current leakage from the n ⁻ region of the semiconductor substrate 2001 to the anode region 2010 can be prevented. It can be surely suppressed.

  Therefore, the forward currents of the temperature detection diodes DD2 and DU2 are only the constant current IF output from the constant current circuits built in the IGBT protection circuits 9 and 10, and both ends of the temperature detection diodes DU2 and DD2 Since the voltage VF depends only on the temperature change, the temperature measurement processing of FIG. 2 is executed by the IGBT protection circuits 9 and 10, so that the silicon chip temperature Tc is based on the voltage VF across the temperature detection diodes DU2 and DD2. Can be detected with high accuracy.

  Therefore, when the silicon chip temperature Tc exceeds the first predetermined temperature T1, the IGBT protection circuits 9 and 10 output an IGBT protection signal that limits the switching frequency to 1/2 of the normal switching frequency to the gate driver ICs 7 and 8. Limit the switching frequency of IGBTs 5 and 6. When the silicon chip temperature Tc exceeds the second predetermined temperature T2, an IGBT protection signal for stopping the output of the gate signals SD4 and SU4 from the IGBT protection circuits 9 and 10 is output to the gate driver ICs 7 and 8, and the gates of the IGBTs 5 and 6 Stops the output of the gate signal. Since the silicon chip temperature Tc can be detected with high accuracy, the protection function of the IGBT protection circuits 9 and 10 can be accurately exhibited without causing malfunction.

Next, a second embodiment of the present invention will be described with reference to FIG.
In the second embodiment, the configuration of the power supply circuit is different from that of the power supply circuits 33 and 34 of the first embodiment described above.
That is, in the second embodiment, as shown in FIG. 4, except that the configuration of the power supply circuits 33 and 34 provided in the upper arm 1 and the lower arm 2 is different from that of the first embodiment described above. 1 has the same configuration as that of FIG. 1 described above, and the same reference numerals are given to corresponding parts to FIG. 1, and the detailed description thereof will be omitted.

  Here, as shown in FIG. 4, the power supply circuits 33 and 34 have a voltage at both ends of V55 and a DC power supply 55 that generates a positive potential + Vp to be supplied to the power supply terminals of the gate driver ICs 7 and 8 and the IGBT protection circuits 9 and 10. The high potential side terminal of the DC power supply 55 is connected to the positive power supply terminal 56, and the negative potential −Vn is supplied from the low potential side terminal. A resistor R21 and a constant voltage element 57 formed of, for example, a Zener diode are connected in series to the DC power supply 55, and a smoothing capacitor C21 is connected in parallel with the constant voltage element 57. Furthermore, the resistor R21 and the constant voltage element 57 are connected. Is connected to the ground potential, and the potential at this connection point becomes the reference ground potential.

  When the constant voltage defined by the constant voltage element 57 is + Vn, the potential of the low potential side terminal of the DC power supply 55 is −Vn. The potential + Vp of the positive power supply terminal 56 is a value (V55−Vn) obtained by subtracting the constant voltage + Vn from the both-ends voltage V55 of the DC power supply 55. The value of the potential + Vp of the positive power supply terminal 56 is set to a voltage of 15.5 to 16.5 V required at the power supply terminals of the gate driver ICs 7 and 8 and the IGBT protection circuits 9 and 10. This is a value for making the gate drive voltage Vg for the gates of the IGBTs 5 and 6 be in the vicinity of 15V. Here, the Zener voltage of the constant voltage element 57 is set so that Vn ≧ 7.0V, and the configuration of the DC power supply 55 is determined so that (V55−Vn) is in the range of 15.5 to 16.5. .

  The potential + Vp of the positive power supply terminal 56 of the power supply circuits 33 and 34 is applied to the power supply terminals of the gate driver ICs 7 and 8 and the IGBT protection circuits 9 and 10, and the connection point between the resistor R21 and the constant voltage element 57 is the gate of the IGBT. Are connected to the ground terminals of the gate protection ICs 7 and 8 and the IGBT protection circuit, and the potential -Vn of the low potential side terminals of the power supply circuits 33 and 34 is applied to the cathodes of the temperature detection diodes DD2 and DU2.

According to the second embodiment, the anode region 2010 of the temperature detection diodes DD2 and DU2 and the emitter region 2003 of the IGBTs 5 and 6 are always in a reverse bias state at a high voltage, and as in the first embodiment, the semiconductor Leakage from the n ⁻ region of the substrate 2001 to the anode region 2010 of the temperature detection diodes DD2 and DU2 can be reliably suppressed. Therefore, the forward currents of the temperature detection diodes DD2 and DU2 are only the constant current IF output from the constant current circuits built in the IGBT protection circuits 9 and 10, and both ends of the temperature detection diodes DU2 and DD2 Since the voltage VF depends only on the temperature change, the IGBT protection circuits 9 and 10 can detect the silicon chip temperature Tc with high accuracy based on the overheat temperature signals SU6 and SD6.

  In the first and second embodiments, the case where the IGBTs 5 and 6 are applied as the power elements of the upper arm 1 and the lower arm 2 has been described. However, the present invention is not limited to this. Alternatively, a MOSFET can be applied. In this case, the low potential side region of the anode region of the temperature detection diodes DD2 and DU2 and the source region or drain region of the MOSFET can be always in a reverse bias state at a high voltage, Leakage of the temperature detection diodes DD2 and DU2 into the anode region can be reliably suppressed, and the silicon chip temperature Tc can be detected with high accuracy.

In the first and second embodiments, the case where the insulation between the upper arm 1 and the lower arm 2 and the control circuit 3 is performed by a photocoupler has been described. However, the present invention is not limited to this. An insulating device such as an air-core type insulating transformer can be applied.
Further, in the first and second embodiments, the case where the IGBT protection circuits 9 and 10 are provided in the upper arm 1 and the lower arm 2 has been described. However, the present invention is not limited to this, and the conventional example described above. As described in FIG. 10, the temperature measurement circuit 2143 is provided on the upper arm 1 and the lower arm 2, the PWM-analog converter 2151 is provided on the control circuit 3 side, and the silicon-chip temperature Tc is detected by the PWM-analog converter 2151. May be output.

  DESCRIPTION OF SYMBOLS 1 ... Upper arm, 2 ... Lower arm, 3 ... Control circuit, 5, 6 ... IGBT, 7, 8 ... Gate driver IC, 9, 10 ... IGBT protection circuit, 11, 12 ... Overcurrent detection part, 31 ... Positive power supply 32 ... Negative power supply, 55 ... DC power supply, 57 ... Constant voltage element, SWU, SWD ... Power switching element, DD2, DU2 ... Temperature detection diode

Claims (7)

A temperature measurement circuit for a power semiconductor device that detects the temperature of a power semiconductor device provided with a power element and a temperature detection diode on a silicon chip,
When the power element is an n-channel type, the anode and cathode potentials of the temperature detecting diode are kept between the anode and cathode in a state where the potential is maintained at a negative potential from the emitter or source potential of the power element. Detected forward current,
When the power element is a p-channel type, the anode and cathode potential of the temperature detection diode is kept between the anode and cathode in a state where the potential is maintained at a positive potential from the emitter or source potential of the power element. Detected forward current,
A temperature measurement circuit for a power semiconductor device, comprising a temperature measurement unit for detecting the temperature of the silicon chip.   2. The temperature measurement circuit for a power semiconductor device according to claim 1, wherein the power element and the temperature detection diode are separated from each other by junction separation in the silicon chip.   The temperature measurement circuit for a power semiconductor device according to claim 1, wherein the power element is composed of an IGBT or a MOSFET.   4. The difference between the anode and cathode potential of the temperature detecting diode and the emitter or source potential of the power element is maintained at a predetermined value or more. A temperature measurement circuit for the power semiconductor device according to 1.   5. The temperature measuring circuit for a power semiconductor device according to claim 4, wherein the predetermined value is a value of 5 V or more.   A temperature measurement circuit for a power semiconductor device according to any one of claims 1 to 5, and an arm drive circuit for driving the power element based on a control signal supplied from a control circuit for the power element. A power semiconductor module comprising a power supply circuit for generating a positive potential and a negative potential in the arm drive circuit, and applying the negative potential of the power supply circuit to an anode of the temperature detection diode.   A temperature measurement circuit for a power semiconductor device according to any one of claims 1 to 5, and an arm drive circuit for driving the power element based on a control signal supplied from a control circuit for the power element. The arm drive circuit includes a power supply circuit that generates a positive potential, the power supply circuit includes a constant voltage element that generates a potential lower than the positive potential, and the potential generated by the constant voltage element is the power A power semiconductor module, wherein the power semiconductor module is applied to a low potential side terminal of the element, and a potential of the low potential side terminal of the power supply circuit is applied to a cathode terminal of the temperature detection diode.

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