JP2010186136A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of attaining compactness of a product, suppressing product cost and attaining low power consumption. <P>SOLUTION: The liquid crystal display device includes a liquid crystal display panel provided with an array substrate, having a plurality of signal lines and a plurality of pixels, a counter substrate and a liquid crystal layer; a switching circuit including a plurality of groups of switching elements connected to respective N signal lines and selectively giving an input video signal to any of the N signal lines; a driver circuit 81, connected to the plurality of groups of switching elements and giving the video signal to the plurality of groups of switching elements and a control circuit 82, connected to the driver circuit and controlling timing for the driver circuit to give the video signal to the plurality of groups of switching elements. The driver circuit 81 and the control circuit 82 are formed on one and the same polycrystalline silicon chip 80. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device.

  In recent years, for example, a liquid crystal display device including a liquid crystal display panel has been used as an image display device for displaying an image. The liquid crystal display panel includes an array substrate having a glass substrate. On the glass substrate, a plurality of signal lines and a plurality of scanning lines are arranged to intersect each other. Pixels are formed in regions surrounded by signal lines and scanning lines.

  Each pixel has a thin film transistor (hereinafter referred to as TFT) provided at each intersection of a signal line and a scanning line, a pixel electrode connected to the TFT, and an auxiliary capacitance element connected to the pixel electrode. is doing. The auxiliary capacitance element has an auxiliary capacitance line parallel to the scanning line, and an auxiliary capacitance electrode that overlaps the auxiliary capacitance line with an insulating film interposed therebetween.

  The liquid crystal display panel further includes a counter substrate and a liquid crystal layer. The counter substrate has another glass substrate and a counter electrode formed on the other glass substrate. The liquid crystal layer is sandwiched between an array substrate and a counter substrate that are arranged to face each other while maintaining a gap.

  The liquid crystal display device as described above includes a driver circuit (source driver) that supplies a video signal to a signal line (source line), and a control circuit (hereinafter referred to as Tcon) that controls the driver circuit based on input image data and a synchronization signal. (Refer to Patent Document 1, for example). Tcon is formed on the drive circuit board. A gradation circuit (hereinafter referred to as Vref) and a power supply circuit are also formed on the drive circuit board. The liquid crystal display panel and the drive circuit board are connected via a driver circuit.

  The driver circuit includes a shift register, a data register, a latch circuit, a level shift circuit, and a D / A conversion circuit. In the driver circuit, the image data is taken into the data register according to the control of the shift register. The image data captured in the data register is converted into an analog voltage by the D / A conversion circuit via the latch circuit and the level shift circuit according to the control signal and output.

Further, the Tcon and the driver circuit are constituted by separate IC chips, and a main method of data transfer between these ICs is a transmission method using a differential signal such as a CMOS / TTL level or RSDS, mini-LVDS.
JP 2008-9365 A

  In the case of the conventional method in which the Tcon and the driver circuit are configured in separate chips, a memory for temporarily storing image data in each IC and a circuit block for transferring data between the Tcon and the driver circuit are required, which reduces the product cost. Will be soaring.

  In recent years, differential signals (RSDS, mini-LVDS) tend to be used in place of the CMOS / TTL level transmission method in order to increase the speed of data transmission and reduce EMI noise associated with higher definition of liquid crystal display devices. . However, RSDS and mini-LVDS are systems in which a steady current is passed through a differential signal line, and there is a demerit that power consumption increases compared to the conventional system.

  The present invention has been made in view of the above points, and an object of the present invention is to provide a liquid crystal display device capable of reducing the size of the product, suppressing the product cost, and reducing the power consumption. There is to do.

In order to solve the above-described problem, a liquid crystal display device according to an aspect of the present invention includes:
An array substrate having a plurality of signal lines formed on the substrate, and a plurality of pixels each including a switching element and a pixel electrode and connected to the plurality of signal lines; and a counter substrate disposed opposite to the array substrate; A liquid crystal layer sandwiched between the array substrate and the counter substrate, and a liquid crystal display panel comprising:
A switching circuit including a plurality of switching element groups each connected to the N signal lines and selectively providing an input video signal to any of the N signal lines;
A driver circuit that is connected to the plurality of switching element groups and supplies the video signals to the plurality of switching element groups,
A control circuit that is connected to the driver circuit and controls the timing at which the driver circuit provides the video signal to the plurality of switching element groups;
The driver circuit and the control circuit are formed on the same polycrystalline silicon chip.

  According to the present invention, it is possible to provide a liquid crystal display device that can reduce the size of the product, reduce the product cost, and reduce the power consumption.

Hereinafter, a liquid crystal display device according to an embodiment of the present invention will be described in detail with reference to the drawings.
As shown in FIGS. 1, 2, and 4, the liquid crystal display device includes a liquid crystal display panel P, a backlight unit B, a silicon chip 80, a personal computer (PC) 61, a drive circuit board 62, A gradation circuit (Vref) 63, a power circuit (Power) 64, and an FPC 65 are provided.

  The liquid crystal display panel P includes an array substrate 1, a counter substrate 2 disposed to face the array substrate 1, and a liquid crystal layer 3 sandwiched between the array substrate 1 and the counter substrate 2. The array substrate 1 has an effective region R1 that overlaps the array substrate 1. The liquid crystal display panel P has a display area R2 for displaying an image. In the array substrate 1, the effective area R1 includes the display area R2 in plan view.

  The array substrate 1 includes, for example, a rectangular glass substrate 10 as a transparent insulating substrate. In the display region R <b> 2, a plurality of scanning lines 15 as a plurality of first wirings and a plurality of signal lines 20 as a plurality of second wirings are formed on the glass substrate 10. The scanning line 15 and the signal line 20 are formed orthogonal to each other. In the display region R <b> 2, a plurality of auxiliary capacitance lines 18 parallel to the scanning lines 15 are formed on the glass substrate 10. In this embodiment, a pixel 11 is formed in each region surrounded by two adjacent signal lines 20 and two adjacent scanning lines 15. These pixels 11 are arranged in a matrix in the display region R2.

  The pixel 11 includes a TFT 12 as a switching element formed in the vicinity of the intersection of the scanning line 15 and the signal line 20, a pixel electrode 26 connected to the TFT 12, an auxiliary capacitance element 17 connected to the pixel electrode 26, have. The TFT 12 has a channel layer, a gate electrode, and the like.

  In the non-display region R3 outside the display region R2, a scanning line driving circuit 30, a switching circuit 50, and a plurality of OLB pads 40 are provided on the glass substrate 10. In the non-display region R3, the silicon chip 80 is mounted (COG mounting) on the glass substrate 10. The scanning line driving circuit 30 is connected to the scanning line 15. The OLB pad 40 has at least a vertical start pulse pad 41, a vertical clock pad 42, an auxiliary capacitance pad 43, and a plurality of driver circuit pads 44. The driver circuit pad 44 includes a video pad and the like.

The vertical start pulse pad 41, the vertical clock pad 42, the auxiliary capacitance pad 43 and the pad 44 are provided side by side along one side of the edge of the glass substrate 10. The vertical start pulse pad 41 and the vertical clock pad 42 are connected to the scanning line driving circuit 30. The auxiliary capacity pad 43 is connected to the auxiliary capacity line 18. The pad 44 is connected to the silicon chip 80.
As described above, the array substrate 1 is formed.

  Although the detailed description of the counter substrate 2 is omitted, for example, a rectangular glass substrate is provided as a transparent insulating substrate. A counter electrode 71 and an alignment film are sequentially formed on the glass substrate. Thus, the counter substrate 2 is formed.

  A gap between the array substrate 1 and the counter substrate 2 is held by a columnar spacer. The array substrate 1 and the counter substrate 2 are bonded together by a sealing material 5 disposed along the outer periphery of the display region R2. A liquid crystal layer 3 is formed in a region surrounded by the array substrate 1, the counter substrate 2 and the sealing material 5. A liquid crystal injection port 6 is formed in a part of the sealing material 5, and the liquid crystal injection port 6 is sealed with a sealing material 7.

  The personal computer 61 controls the silicon chip 80 by outputting a signal to the silicon chip 80. The gradation circuit 63 and the power supply circuit 64 are formed on the drive circuit board 62. The FPC 65 connects between the liquid crystal display panel P and the drive circuit board 62.

  The backlight unit B includes a light guide plate Ba, a light source (not shown) arranged to face one side edge of the light guide plate Ba, and an optical sheet and a reflection plate arranged on the front and back surfaces of the light guide plate Ba. The light guide plate Ba is disposed to face the array substrate 1. The backlight unit B emits light toward the liquid crystal layer 3. When the outer surface side of the counter substrate 2 is the display image viewing side, the backlight unit B only needs to be positioned on the outer surface side of the array substrate 1.

  In this embodiment, the liquid crystal display panel P transmits white light in a state where no voltage is applied to the liquid crystal layer 3 to display white, and the liquid crystal layer 3 is in a state where a voltage is applied to the liquid crystal layer 3. A normally white type that displays gray or black by adjusting the amount of transmission is adopted.

Next, the silicon chip 80 will be described.
As shown in FIGS. 1, 3 and 5, the silicon chip 80 is formed by integrating a driver circuit 81 and a control circuit 82. In other words, the driver circuit 81 and the control circuit 82 are formed as the same polycrystallized silicon chip 80. More specifically, the silicon chip 80 is formed by forming the driver circuit 81 and the control circuit 82 on the same polycrystalline silicon substrate. The silicon chip 80 receives a signal input from the personal computer 61 and generates a timing signal for driving the liquid crystal display panel P and processes image data.

  The driver circuit 81 is connected to a plurality of switching element groups 51 (see FIG. 6), which will be described later, and supplies a video signal S1-n to each of the plurality of switching element groups 51. The control circuit 82 is connected to the driver circuit 81, and controls the timing at which the driver circuit 81 provides the video signal S1-n to the plurality of switching element groups 51.

  The silicon chip 80 includes an LVDS receiver (Receiver) 83, a control unit (Control) 84, a data circuit (Data) 85, five data registers (Data reg1-5) 86 as a storage unit, a selection circuit (Selector) 87, and a latch. A circuit (Latch) 91, a level shifter (Level shifter) 92, a D / A converter (D / A Converter) 93, and an output amplifier (Output amplifier) 94 are included.

  The LVDS receiver 83, the control unit 84, the data circuit 85, the data register 86, and the selection circuit 87 form a control circuit 82. The latch circuit 91, the level switch 92, the D / A converter 93, and the output amplifier 94 form a driver circuit 81.

  The LVDS receiver 83 receives a differential signal from the personal computer 61 and sends it to the control unit 84 and the data circuit 85. Here, a case where LVDS is used for data transmission between the personal computer 61 and the silicon chip 80 will be described as an example, but an interface system other than LVDS may be used.

  The data circuit 85 performs processing such as data rearrangement under the control of the control unit 84 and then sends the data to the data register 86. The data register 86 temporarily holds (stores) image data based on the write control signal WE from the control unit 84. The data register 86 preferably stores image data that is the basis of the video signal applied to the plurality of signal lines 20 that are simultaneously selected by the switching circuit 50.

  After the image data for one line is stored in the data register 86, the image data is sequentially read from each data register 86 in accordance with the selection of the analog switch, and is selected by the selection circuit 87 by the selection signal SEL of the control unit 84. Then, it is supplied to the latch circuit 91. The latch circuit 91 is controlled by a polarity signal POL from the control unit 84 and a strobe signal STB which is a pulse generated with a predetermined time delay from the start signal. Thereafter, the voltage is converted by the level switch 92, converted to a predetermined analog voltage by the D / A converter 93 based on the gradation voltage Vref from the gradation circuit 63, and the polarity signal POL and strobe from the control unit 84 are converted. The video signal S1-n is output from the output amplifier 94 controlled by the signal STB. As a result, the video signal S1-n based on the image data is output from the silicon chip 80 to the liquid crystal display panel P (switching circuit 50).

  A control signal ASW1-5 for controlling a switching circuit 50 described later is also formed from the control unit 84 and supplied from the silicon chip 80 to the switching circuit 50.

Next, the switching circuit 50 will be described.
As shown in FIGS. 3 and 6, the switching circuit 50 includes a plurality of switching element groups 51, and each switching element group 51 includes a plurality of switching elements 52. In this embodiment, each switching element group 51 has five switching elements 52. The switching circuit 50 is a 1/5 multiplexer circuit. The switching element 52 is, for example, a TFT, and may be formed in the same manner as the TFT 12 described above.

  The switching circuit 50 is connected to the plurality of signal lines 20. Further, the switching circuit 50 is connected to the silicon chip 80 via the connection wirings 53, and the video signals S1-n from the output amplifier 94 are respectively supplied via the connection wirings 53. Here, the number of connection wirings 53 is 1/5 of the number of signal lines 20. Since the number of connection wirings 53 can be reduced, only one driver circuit 81 needs to be mounted, and it is not necessary to mount a plurality of driver circuits such as three as in the prior art.

  The switching element (analog switch) 52 is supplied with a control signal ASW1 supplied from the control unit 84 of the silicon chip 80 so that five signal lines 20 per driver output (connection wiring 53) of the silicon chip 80 are driven in a time-sharing manner. By -5, ON / OFF is switched and multi-select driving is executed. These control signals ASW1-5 are generated by the control unit 84 based on the synchronization signal from the personal computer 61 (see FIG. 5).

  In one horizontal scanning period, an ON control signal ASW1-5 is given to the switching element 52, and a desired video signal is written to the pixels 11 arranged in a horizontal row. When forming the switching circuit 50, the switching circuit 50 can be formed using the same material when forming the pixels 11 and the like.

  According to the liquid crystal display device configured as described above, the liquid crystal display device includes the switching circuit 50. For this reason, the signal line 20 can be selectively (time-division) driven. When the number of selections is increased, the number of output terminals (connection portions with the switching circuit 50) of the silicon chip 80 can be reduced. In this embodiment, the number of output terminals of the silicon chip 80 can be reduced to 1/5 of the number of signal lines 20. Therefore, only one driver circuit 81 needs to be mounted, and the size of the silicon chip 80 can be reduced when the driver circuit is formed. The above is effective when the definition is increased and the number of signal lines 20 is increased.

  Further, since the pitch of the output terminals can be increased when the number of output terminals of the silicon chip 80 is small, high-definition alignment is not required, and a liquid crystal display device can be easily manufactured.

  For example, when the output side connection pitch is set to a predetermined value of 45 μm or more and 60 μm or less, when applied to an XGA liquid crystal display panel P having 1024 × 768 pixels, either multi-select driving of 4 selection or 5 selection is used. Even in this case, the silicon chip 80 can be formed with one chip. In addition, when applied to a WXGA liquid crystal display panel P having 1280 × 800 pixels, it is possible to obtain a silicon chip 80 with one chip by using multi-selective driving with five selections.

  As described above, one driver circuit 81 is sufficient and the driver circuit 81 is small, so that the driver circuit 81 and the control circuit 82 can be formed on the same silicon chip 80. Since the memory part of the silicon chip 80 only needs to have five data registers 86, the product can be downsized and the increase in product cost can be suppressed. It is also possible to reduce power consumption by reducing the circuit scale.

  In addition, since a differential interface such as RSDS or mini-LVDS used for data transmission between the driver circuit 81 and the control circuit 82 is not required, the power consumption of the liquid crystal display device can be reduced.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. Various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiments. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

The switching circuit 50 only needs to include a plurality of switching element groups 51 that are respectively connected to the N signal lines 20 and selectively supply an input video signal to any of the N signal lines 20. The silicon chip 80 may be formed with N storage units that temporarily store image data that is the basis of the video signal. The switching circuit 50 may be a 1 / N multiplexer circuit. The N is not limited to 5, and may be 4 or less, or 6 or more.
The switching circuit 50 may be formed by other than the 1 / N multiplexer circuit.

  Further, it is possible to supply signals such as a vertical start pulse and a vertical clock supplied to the scanning line driving circuit 30 via the silicon chip 80.

1 is a schematic configuration diagram showing a liquid crystal display device according to an embodiment of the present invention. The perspective view which shows the liquid crystal display panel and backlight unit of the said liquid crystal display device. FIG. 3 is a plan view of the array substrate shown in FIG. 2. FIG. 4 is an equivalent circuit diagram of a pixel on the array substrate shown in FIG. 3. The schematic block diagram which shows the silicon chip shown in FIG.1 and FIG.3. FIG. 3 is an enlarged plan view showing a part of a non-display area of the array substrate, particularly a diagram showing a switching circuit.

  DESCRIPTION OF SYMBOLS 1 ... Array substrate, 2 ... Counter substrate, 3 ... Liquid crystal layer, 10 ... Glass substrate, 11 ... Pixel, 12 ... TFT, 15 ... Scanning line, 20 ... Signal line, 26 ... Pixel electrode, 30 ... Scanning line drive circuit, DESCRIPTION OF SYMBOLS 40 ... OLB pad, 50 ... Switching circuit, 51 ... Switching element group, 52 ... Switching element, 53 ... Connection wiring, 61 ... Personal computer, 62 ... Drive circuit board, 63 ... Gradation circuit, 64 ... Power supply circuit, 65 ... FPC, 71 ... Counter electrode, 80 ... Silicon chip, 81 ... Driver circuit, 82 ... Control circuit, 83 ... LVDS receiver, 84 ... Control unit, 85 ... Data circuit, 86 ... Data register, 87 ... Selection circuit, 91 ... Latch Circuit 92. Level switch 93. D / A converter 94 Output amplifier P Liquid crystal display panel B Backlight unit R 1 Effective area R ... display area, R3 ... the non-display area.

Claims (5)

An array substrate having a plurality of signal lines formed on the substrate, and a plurality of pixels each including a switching element and a pixel electrode and connected to the plurality of signal lines; and a counter substrate disposed opposite to the array substrate; A liquid crystal layer sandwiched between the array substrate and the counter substrate, and a liquid crystal display panel comprising:
A switching circuit including a plurality of switching element groups each connected to the N signal lines and selectively providing an input video signal to any of the N signal lines;
A driver circuit that is connected to the plurality of switching element groups and supplies the video signals to the plurality of switching element groups,
A control circuit that is connected to the driver circuit and controls the timing at which the driver circuit provides the video signal to the plurality of switching element groups;
The driver circuit and the control circuit are liquid crystal display devices formed on the same polycrystalline silicon chip. N storage units that are formed on the silicon chip and temporarily store image data that is the basis of the video signal;
2. The liquid crystal display device according to claim 1, wherein each storage unit stores image data serving as a basis of a video signal applied to a plurality of signal lines simultaneously selected by the switching circuit. The switching circuit is formed on the substrate;
The liquid crystal display device according to claim 1, wherein the silicon chip on which the driver circuit and the control circuit are formed is mounted on the array substrate.   The liquid crystal display device according to claim 1, wherein the switching circuit is a 1 / N multiplexer circuit. A backlight unit that is located on the outer surface side of the array substrate or the outer surface side of the counter substrate and emits light to the liquid crystal layer;
The liquid crystal display panel displays white by transmitting a backlight in a state where no voltage is applied to the liquid crystal layer, and adjusts a transmission amount of the backlight in a state where a voltage is applied to the liquid crystal layer. The liquid crystal display device according to claim 1, wherein the liquid crystal display device adopts a normally white type that displays black.

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