JP2010182216A - Memory controller, nonvolatile storage device, nonvolatile storage system and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nonvolatile storage system that observes a timeout rule in consideration of factors determined depending on the type of a nonvolatile memory. <P>SOLUTION: In the nonvolatile storage system 100, a nonvolatile memory control part 214 can interrupt a collection process in response to a collection process stop signal output from a timeout monitoring part 213 to reliably prevent a timeout. The nonvolatile storage system 100 can thus strictly observe a timeout value (timeout rule). <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a memory controller, a nonvolatile storage device, a nonvolatile storage system, and a program. In particular, the present invention relates to an aggregation process for releasing an area where unnecessary information is stored in a nonvolatile memory and increasing a storable area.

Nonvolatile memory modules including a rewritable nonvolatile memory mainly include a non-detachable type and a removable type. The non-detachable nonvolatile memory module is used by being incorporated in, for example, a digital still camera or a portable audio device main body. On the other hand, detachable nonvolatile memory modules are often used for semiconductor memory cards, and in recent years, their demand is increasing.
A semiconductor memory card is very expensive compared to optical disks and tape media, but has advantages such as small size and light weight, excellent earthquake resistance, and easy handling. For this reason, semiconductor memory cards are often used as recording media for portable devices such as digital still cameras and mobile phones, and the demand for such memory cards is increasing. Also, in recent years, the capacity of semiconductor memory cards has been increasing, and application studies to realize a hard disk replacement device for personal computers, recording media for digital televisions, etc. using this large-capacity semiconductor memory card. Is also progressing.

A semiconductor memory card generally has a flash memory used as a nonvolatile main memory and a memory controller for controlling the flash memory.
The memory controller performs information read / write control with respect to the flash memory in response to an information read / write instruction from an access module such as a digital still camera or a personal computer main body.
A flash memory generally performs writing / reading of information in units of “pages” and erasing information in units of “blocks”.
A “block” is a unit in which the flash memory erases information, and is formed from a plurality of “pages” (formed in units of pages). As the capacity per block, 512 kbytes or 256 kbytes are usually used in many cases.

A “page” is a unit for the flash memory to write / read information. A “page” is composed of a predetermined number of memory cells. As a capacity per page, 2 kbytes or 4 kbytes are often adopted.
Since the flash memory cannot be updated by overwriting the data (information), the data (information) can be written by writing to a block that has enough free space to write the data (information). ) Is memorized. At this time, blocks in which information is written in only a partial area are sequentially generated, and the number of blocks having a sufficient free area is gradually reduced when data is written. In order to cope with this, a process called “aggregation process” is executed. “Aggregation processing” refers to processing that frees an area where unnecessary information (for example, overlapping information) is stored in a nonvolatile memory and increases the storable area. Specifically, It is executed as follows.
(1) First, for a block in which information is written only in a partial area (hereinafter referred to as “block A”), only necessary information among the information written in the block A is Move to another block (referred to as “block B”) capable of securing a capacity for writing necessary information. At this time, information that is not written in the logical order (logical page order) in the block A is rearranged in the logical order (logical page order) or when moving from the block A to the block B. By reading the data in the logical order, information in the logical order (logical page order) is written to the block B, and necessary information of the block A is moved to the block B.
(2) Next, after the necessary information is moved from block A to block B, the entire block A is erased.

As a result, in a non-volatile memory (for example, a flash memory), an area where unnecessary information is stored can be released, and a storable area can be increased.
An example of the aggregation process will be described with reference to FIGS.
As shown in FIG. 7A, in block A, the necessary data (information) is “necessary data 2”, “necessary data 1”, “necessary data 3”, “necessary data 0” in page order. And unnecessary data (information) is written in page units in the order of “unnecessary data 0”, “unnecessary data 1”, “unnecessary data 2”, “unnecessary data 3”, “unnecessary data 4”. Has been written. Then, a block B having a free capacity equal to or larger than the capacity of “necessary data 0” to “necessary data 3” (in the example of FIG. 7, the block B is an erased block and no data is written in it) Block) is the destination block.

In block A, the necessary data is not written in the logical order (logical page order), so the necessary data is rearranged in the logical order (logical page order). Then, the necessary data rearranged in the logical order (logical page order) is written into the block B which is an erased block.
Then, the data erasure process is executed for the block A which is the old block.
As a result, the blocks A and B of the nonvolatile memory are in the state shown in FIG. 7B, the block A is released, only the necessary data is moved to the block B, and the data is recorded in the logical order.
The aggregation process is not always performed, but is performed as necessary when data is written in the nonvolatile memory. For this reason, when the aggregation process is executed, the write process takes a longer time than when the aggregation process is not executed.

On the other hand, Patent Literature 1 discloses an example of a method of dividing the aggregation processing and an example of a nonvolatile storage device that executes the method. The operation of the conventional nonvolatile memory device disclosed in Patent Document 1 will be described with reference to FIG.
In a conventional nonvolatile storage device, when a process other than an erasure process such as data writing (hereinafter referred to as “non-erase process”) is executed, if the vacant capacity is insufficient in the nonvolatile memory, the vacant capacity is secured. As much as possible, the aggregation process is executed before the non-erase process.
FIG. 8 shows a conceptual operation flow of a conventional nonvolatile memory device. FIG. 8 shows an operation flow in the case where free capacity cannot be secured in the nonvolatile memory after the non-erase process T1 is executed.
As shown in FIG. 8, the conventional non-volatile storage device executes the non-erase process T1 and then executes the aggregation process G1 so as to secure a free space in the non-volatile memory. At this time, the conventional nonvolatile memory device divides the aggregation process G1 into the data movement process Gd1, the pre-erase process Gr1, the main erase process Ge1, and the post-erase process Go1 (hereinafter, this divided process is referred to as “divided process G1”). “GC configuration processing”)), the aggregation processing G1 is executed by executing each divided processing.

Then, the conventional nonvolatile storage device interrupts the aggregation process and executes the non-erase process when each GC configuration process is completed. That is, the conventional nonvolatile memory device executes the aggregation process G1 and the non-erase process as follows.
(1) After ending the data movement process Gd1, the non-erase process T2 is executed.
(2) After the non-erase process T2, the pre-erase process Gr1 is executed.
(3) After the pre-erase process Gr1, the non-erase process T3 is executed.
(4) After the non-erase process T3 ends, the erase main process Ge1 is executed.
(5) Erase After the main process Ge1, the non-erase process T4 is executed.
(6) After the non-erase process T4, the post-erase process Go1 is executed.
(7) When the post-erase process Go1 is completed and the aggregation process G1 is completed, other non-erase processes T5, T6,... Are sequentially executed until the free space becomes insufficient.

In the conventional nonvolatile memory device, by executing the processing in this way, it is possible to prevent the processing time of the write processing accompanied by the execution of the aggregation processing from becoming significantly longer than the case where the execution of the aggregation processing is not performed. ing.
JP 2008-146341 (page 7-9, FIG. 1)

By the way, in a nonvolatile memory device, a timeout value for a processing instruction is normally defined. That is, in the nonvolatile memory device, a timeout rule (time-out value rule) is provided in order to avoid a deadlock when there is no response to a processing command within a certain period. In the non-volatile storage device, it is necessary to perform aggregation processing so as to meet this timeout rule.
Further, the program busy time, erase busy time, page size, write cycle time, read cycle time, and the number of pages in one block differ depending on the type (product type) of the flash memory installed in the nonvolatile storage device. In the nonvolatile memory device, it is necessary to perform control so as to meet the time-out regulations in consideration of factors determined by the type (type) of these flash memories.

However, the writing method executed in the conventional nonvolatile memory device has a problem that the timeout rule may not be observed.
In view of the above problems, the present invention considers a factor determined by the type (product type) of a nonvolatile memory (for example, a flash memory), a memory controller, a nonvolatile storage device, and a nonvolatile An object is to provide a storage system and a program.

A first invention is a memory controller that performs data read / write control on a nonvolatile memory based on a predetermined command, the nonvolatile memory control unit, a timeout value acquisition unit, a timeout monitoring unit, .
The non-volatile memory control unit performs data read / write processing on the non-volatile memory based on a predetermined command, and opens an area where unnecessary information is stored in the non-volatile memory. An aggregation process, which is a process for increasing the storable area, is executed. The timeout value acquisition unit acquires a timeout value for a predetermined command. The time-out monitoring unit measures the elapsed time from the start time of the process when the process executed by the nonvolatile memory control unit is started based on a predetermined command, and the time before the elapsed time exceeds the timeout value. Then, the aggregation processing stop signal is output to the nonvolatile memory control unit. The nonvolatile memory control unit interrupts the aggregation process when the aggregation process stop signal is output from the timeout monitoring unit and the aggregation process has not ended.

In this memory controller, the timeout value acquisition unit acquires a timeout value for a predetermined command, and when the process executed by the nonvolatile memory control unit is started based on the predetermined command, The elapsed time is measured, and an aggregation processing stop signal is output to the nonvolatile memory control unit at a time before the elapsed time exceeds the timeout value. Since the aggregation process is interrupted based on the aggregation process stop signal output from the timeout monitoring unit, it is possible to reliably prevent the occurrence of timeout.
2nd invention is 1st invention, Comprising: A non-volatile memory control part performs the aggregation process by performing the several step process from 1st step process to Nth step process (N: natural number more than 2). Execute. The timeout monitoring unit sets the processing TA1 based on a predetermined command, and the total processing time TB (k) from the first step processing of the aggregation processing to the k-th step processing (k is a natural number satisfying k ≦ N−1). And the total processing time TB (k + 1) from the first step processing of the aggregation processing to the (k + 1) -th step processing (k is a natural number satisfying k + 1 ≦ N), and the time corresponding to the timeout value of a predetermined command is TO When
TA1 + TB (k) <TO <TA1 + TB (k + 1)
In this case, the aggregation process stop signal is output by the time before the (k + 1) th step process is executed.

In this memory controller, the aggregation process is executed by performing a plurality of step processes from the first step process to the Nth step process (N: natural number of 2 or more) by the nonvolatile memory control unit. Since the multiple step processing is usually determined by the type (type) of nonvolatile memory, this memory controller takes into account the factors determined by the type (type) of nonvolatile memory and specifies the timeout. Can be protected. In other words, in this memory controller, the aggregation process is executed in consideration of the processing time of each step process determined by the type (type) of the nonvolatile memory, so what kind of type (type) the nonvolatile memory is Even so, the occurrence of a timeout can be surely prevented.
3rd invention is 2nd invention, Comprising: A non-volatile memory control part acquires the information regarding the processing time of each step process of an aggregation process from a non-volatile memory, A timeout monitoring part is non-volatile memory control. The aggregation processing stop signal is output based on the information regarding the processing time of each step processing of the aggregation processing acquired by the unit.

A fourth invention is a nonvolatile memory device comprising a nonvolatile memory and a memory controller according to any one of the first to third inventions.
Thereby, a non-volatile memory device having the same effect as any of the first to third inventions can be realized.
A fifth invention is a nonvolatile memory system comprising the nonvolatile memory device according to the fourth invention, and a processing instruction unit for issuing a command for instructing the nonvolatile memory device to read / write data. is there.
Thus, a nonvolatile memory system that exhibits the same effect as that of the fourth invention can be realized.
A sixth aspect of the invention is a program that causes a computer to execute a control method for controlling a memory controller that performs data read / write control on a nonvolatile memory based on a predetermined command. A control method for controlling the memory controller includes a nonvolatile memory control step, a timeout value acquisition step, and a timeout monitoring step.

  In the nonvolatile memory control step, data read / write processing is performed on the nonvolatile memory based on a predetermined command, and an area where unnecessary information is stored in the nonvolatile memory is released, and the nonvolatile memory An aggregation process, which is a process for increasing the storable area, is executed. In the timeout value acquisition step, a timeout value for a predetermined command is acquired. In the timeout monitoring step, when the process executed by the nonvolatile memory control step is started based on a predetermined command, the elapsed time from the start of the process is measured, and the time before the elapsed time exceeds the timeout value In, an aggregation processing stop signal is output. In the nonvolatile memory control step, the aggregation process is interrupted when the aggregation process stop signal is output in the timeout monitoring step and the aggregation process is not completed.

  Thus, it is possible to realize a program that causes a computer to execute a control method for controlling a memory controller that exhibits the same effect as that of the first invention.

  According to the present invention, it is possible to execute aggregation processing while observing the timeout rule. Furthermore, the aggregation process can be adaptively executed in consideration of factors determined by the type of nonvolatile memory. As a result, in the memory controller, the non-volatile memory device, or the non-volatile memory system, the number of usable non-volatile memories (for example, flash memory) is increased, and the non-volatile memory (for example, flash memory) can be selected according to the application. It becomes possible.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment]
<1.1: Configuration of Nonvolatile Storage System>
FIG. 1 is a schematic configuration diagram of a nonvolatile memory system 100 according to the first embodiment.
As shown in FIG. 1, the nonvolatile storage system 100 includes information (data) based on a processing command unit 1 (for example, a host device that records data in a nonvolatile storage device) and a command (command or the like) from the processing command unit 1. And a non-volatile storage device 2 that reads / writes data). The nonvolatile memory device 2 includes a nonvolatile memory 22 (for example, a flash memory) that stores information (data), and a memory that controls reading / writing of information (data) with respect to the nonvolatile memory 22 And a controller 21.

The memory controller 21 includes an interface unit (hereinafter, IF unit) 211, a timeout value acquisition unit 212, a timeout monitoring unit 213, and a nonvolatile memory control unit 214.
The IF unit 211 performs interface processing for communication between the processing command unit 1 and the memory controller. Specifically, the IF unit 211 receives a command (command or the like) transmitted from the processing command unit 1 and sends the received command (command or the like) to the nonvolatile memory control unit 214 according to the content of the received command. Alternatively, it is output to the timeout value acquisition unit 212. When the IF unit 211 receives an instruction including information on the timeout value, the IF unit 211 outputs the received instruction to the timeout value acquisition unit.
The timeout value acquisition unit 212 acquires a timeout value from an instruction (command or the like) output from the IF unit 211. Then, the acquired timeout value is output to the timeout monitoring unit 213.

  The time-out monitoring unit 213 holds the time-out value output from the time-out value acquisition unit 212 and also information on the processing contents executed by the nonvolatile memory control unit 214 (information indicating how far an arbitrary processing has been executed) Is acquired from the non-volatile memory control unit 214. The timeout monitoring unit 213 monitors the processing of the nonvolatile memory control unit 214, and when the nonvolatile memory control unit 214 shifts to the next processing based on the processing time of the nonvolatile memory control unit 214 and the timeout value, Determine whether a timeout occurs. If the timeout monitoring unit 213 determines that a timeout occurs (a specific determination method will be described later), the timeout monitoring unit 213 outputs an aggregation processing stop signal to the nonvolatile memory control unit 214. The timeout monitoring unit 213 has a function of measuring elapsed time, and can measure elapsed time from an arbitrary timing.

The non-volatile memory control unit 214 controls the non-volatile memory 22 based on a command (command or the like) output from the IF unit 211. In addition, the nonvolatile memory control unit 214 outputs information about the processing contents executed by the nonvolatile memory control unit 214 to the timeout monitoring unit 213. Further, when the aggregation process stop signal is output from the timeout monitoring unit 213, the nonvolatile memory control unit 214 stops the aggregation process.
<1.2: Operation of nonvolatile storage system>
The operation of the nonvolatile storage system configured as described above will be described.
The processing command unit 1 transmits data including a timeout value of a command scheduled to be issued to the nonvolatile memory control unit 214 (this data is transmitted by, for example, a data packet or a command packet) to the IF unit 211 of the memory controller 21. Send. Here, the following description will be made assuming that the command to be issued is a Write command.

The IF unit 211 analyzes the received data, determines that the data includes information related to the timeout value of the Write command, and outputs the received data to the timeout value acquisition unit 212.
The timeout value acquisition unit 212 acquires the timeout value of the Write command from the input data. The acquired timeout value is output to the timeout monitoring unit 213.
Further, the processing instruction unit 1 issues an instruction to be issued (Write instruction) to the memory controller 21. The IF unit 211 receives a command to be issued (Write command) transmitted from the processing command unit 1, and outputs the received Write command to the nonvolatile memory control unit 214.

The nonvolatile memory control unit 214 executes data write processing (Write processing) to the nonvolatile memory 22 in accordance with the Write command. Then, the non-volatile memory control unit 214 executes the aggregation process after executing the write process.
On the other hand, the timeout monitoring unit 213 starts measuring elapsed time in accordance with the timeout rule. This will be specifically described with reference to FIG. FIG. 2 is a diagram schematically showing processing timings of write processing and aggregation processing in the nonvolatile storage system. In FIG. 2, it is assumed that the write process 1 is a write process that requires an aggregation process, and the write process 2 is a write process that does not require an aggregation process. Further, it is assumed that the aggregation process 1 and the aggregation process 2 are aggregation processes associated with the write process 1.
As shown in FIG. 2, the write processing (Write processing 1 in FIG. 2) is started by the nonvolatile memory control unit 214 at time t0. The timeout monitoring unit 213 starts measuring elapsed time from time t0, and monitors whether the processing time of the write processing and the aggregation processing exceeds the timeout value.

In the nonvolatile memory device 2, the aggregation process is divided into the following three step processes.
(1) New block acquisition process (2) Necessary data move / write process for each page (3) Old block erase process The time-out monitoring unit 213 monitors the process of the non-volatile memory control unit 214 and is non-volatile. Based on the processing time of the memory control unit 214 and the timeout value, when the nonvolatile memory control unit 214 shifts to the next processing, it is determined whether or not a timeout occurs. When the timeout monitoring unit 213 determines that a timeout occurs, the timeout monitoring unit 213 outputs an aggregation processing stop signal to the nonvolatile memory control unit 214. In the case of FIG. 2, the aggregation processing stop signal is output at time ts.

When the aggregation process stop signal is output from the timeout monitoring unit 213, the nonvolatile memory control unit 214 stops the transition to the next process after the currently executing process is completed. Note that the output timing of the aggregation processing stop signal may be the time before the transition to the next processing (processing determined to time out when executed), and is not necessarily being executed by the nonvolatile memory control unit 214. It is not necessary to match the end point of the process.
≪Judgment method to send aggregate processing stop signal≫
Next, a determination method in which the timeout monitoring unit 213 transmits an aggregation processing stop signal will be described with reference to FIG.
FIG. 3 shows an example of the time required for each step process of the aggregation process in the nonvolatile storage system 100.

As shown in FIG. 3, in this example, (1) the processing time of the new block acquisition processing is 100 [μs], and (2) the processing time of the necessary data movement / write processing of each page is 2000 [μs]. (3) The processing time of the old block erasing process is 3000 [μs]. The number of pages in one block is 128 pages.
For example, if the timeout value is 150 [ms] and the write process takes 4000 [μs],
100 [μs] +2000 [μs] × 72 <150 [ms] −4000 [μs] <100 [μs] +2000 [μs] × (72 + 1)
Therefore, during the move / write process on page 72, the timeout monitoring unit 213 sends an aggregation process stop signal to the nonvolatile memory control unit 214, and to what extent the process is completed in the aggregation process ( In this case, it is stored that the movement and writing of the 72nd page has been completed).

The non-volatile memory control unit 214 prevents timeout from occurring by temporarily interrupting the aggregation process based on the aggregation process stop signal output from the timeout monitoring unit 213.
Then, when the aggregation process can be resumed, the subsequent aggregation process is resumed based on information held by the timeout monitoring unit 213 (information indicating how far the aggregation process has been completed). For example, in the example of FIG. 2, the aggregation process is interrupted at time ts, the aggregation process is resumed at time tr, and the aggregation process ends at time te.
As described above, in the nonvolatile storage system 100, the nonvolatile memory control unit 214 interrupts the aggregation processing based on the aggregation processing stop signal output from the timeout monitoring unit 213, and reliably prevents the occurrence of timeout. be able to. As a result, in the non-volatile storage system 100, it is possible to proceed with the aggregation process within the time determined by the timeout value while strictly keeping the timeout value (timeout rule).

In the above description, the case where the processing instruction unit 1 notifies the memory controller 21 of the timeout value has been described. However, the present invention is not limited to this. For example, information regarding the timeout value is previously stored in the nonvolatile memory at the time of product shipment. 22 may be stored. In this case, the information regarding the timeout value read from the nonvolatile memory 22 may be notified from the nonvolatile memory control unit 214 to the timeout value acquisition unit 212, for example. If the timeout value is different for each command, the data indicating the relationship between these commands and the timeout is stored, or if the timeout value is uniformly determined, the data of the timeout value is stored. .
In addition, the processing time of each step process of the aggregation process is stored in the nonvolatile memory 22 connected to the nonvolatile memory control unit 214, and the processing time of each step process of the aggregation process is acquired by reading it. Alternatively, the processing time of each step processing of the aggregation processing may be notified from the processing command unit 1 to the nonvolatile storage device 2.

Moreover, although the case where the interruption timing of the aggregation process is determined based on each step processing time of the aggregation process has been described above, for example, the following may be performed.
The timeout monitoring unit 213 calculates the timing immediately before the timeout occurs (for example, by clock count) from the operation clock of the memory controller, and interrupts the aggregation process by generating an interrupt at the timing. May be.
In the above, it is assumed that a flash memory is used as the nonvolatile memory, but the present invention is not limited to this. For example, as the nonvolatile memory, a nonvolatile memory other than the flash memory (for example, EEPROM may be used.
[Second Embodiment]
FIG. 4 shows a schematic configuration diagram of a nonvolatile memory system 200 according to the second embodiment.

The nonvolatile storage system 100 according to the first embodiment includes one nonvolatile memory 22, but the nonvolatile storage system 200 according to the second embodiment includes a plurality of nonvolatile memories (in the case of FIG. Nonvolatile memory (first nonvolatile memory 22A, second nonvolatile memory 22B, and third nonvolatile memory 22C)). In the nonvolatile memory system 200 according to the second embodiment, the nonvolatile memory control unit 214 in the nonvolatile memory system 100 according to the first embodiment is replaced with a nonvolatile memory control unit 214A that controls a plurality of nonvolatile memories. It has a replacement configuration. The above points are the differences between the nonvolatile memory system 200 according to the second embodiment and the nonvolatile memory system 100 according to the first embodiment.
In the present embodiment, the same parts as those in the first embodiment are denoted by the same reference numerals, and description thereof is omitted.

The non-volatile storage system 200 includes a plurality of types of non-volatile memories (in FIG. 4, three non-volatile memories including a first non-volatile memory 22A, a second non-volatile memory 22B, and a third non-volatile memory 22C). In the following, for convenience of explanation, a case where there are three nonvolatile memories (first nonvolatile memory 22A, second nonvolatile memory 22B, and third nonvolatile memory 22C) will be described.
In the first embodiment, a table of the time required for each step process of aggregation processing of one kind of nonvolatile memory (flash memory) (table in FIG. 3) is used. However, as in this embodiment, nonvolatile storage is performed. In the system 200, when a plurality of types of non-volatile memories (flash memories) are connected, a table of processing time of aggregation processing is selected according to the connected non-volatile memories (flash memories).

Specifically, the non-volatile memory control unit 214A issues a command to each of the connected first non-volatile memory 22A, second non-volatile memory 22B, and third non-volatile memory 22C, and the response Is notified to the timeout monitoring unit 213. The timeout monitoring unit 213 determines what type of non-volatile memory (flash memory) from the notified response.
For example, the non-volatile memory control unit 214A issues an ID READ command to the second non-volatile memory 22B, and the manufacturer code included in the response of the connected second non-volatile memory 22B (flash memory B). Based on the table, the processing time table of the aggregation processing is selected. For example, it is assumed that the correspondence between the manufacturer code of the response of the ID READ command and the type of the nonvolatile memory (flash memory) is as shown in FIG. In this case, the non-volatile memory control unit 214A issues an ID READ command to the non-volatile memory, and acquires a manufacturer code based on the response. If the manufacturer code is “0B” in the response of the ID READ command issued to the second nonvolatile memory 22B, the nonvolatile memory control unit 214A determines that the nonvolatile memory connected from the table shown in FIG. It is determined that (flash memory) is “flash memory B”.

Then, the nonvolatile memory control unit 214A performs processing of each step process of the aggregation process corresponding to the nonvolatile memory (flash memory) (“flash memory B” in the above case) whose type has been determined from the table shown in FIG. Get time.
Then, when performing the aggregation process on the second nonvolatile memory 22B, the nonvolatile memory control unit 214A performs the process using the data of the “flash memory B” in the table illustrated in FIG.
Similarly, in the nonvolatile storage system 200, the first nonvolatile memory 22A is recognized as “flash memory A” and the third nonvolatile memory 22C is recognized as “flash memory C”. Then, when performing the aggregation process on the first nonvolatile memory 22A, the nonvolatile memory control unit 214A performs the process using the data of “flash memory A” in the table shown in FIG. When the aggregation process is performed on the memory 22C, the process is performed using the data of “flash memory C” in the table shown in FIG. The aggregation process is the same as that in the first embodiment, and a description thereof will be omitted.

As described above, in the non-volatile storage system 200, even when a plurality of types of non-volatile memories are connected, the processing time of each step process of the aggregation process determined by the type (type) of the non-volatile memory is acquired. Then, since the aggregation process is executed based on the processing time of each step process of the acquired aggregation process, it is possible to reliably prevent the occurrence of timeout. As a result, in the nonvolatile storage system 200, the timeout value (timeout regulation) can be strictly observed even when a plurality of types of nonvolatile memories are connected.
Note that, in the determination process of the connected nonvolatile memory, the connected nonvolatile memory (flash memory) may be determined using a device code or the like instead of the manufacturer code. That is, if a command can be issued to the nonvolatile memory and the type of the nonvolatile memory can be determined from the response, it may be used. In other words, the command used for determining the non-volatile memory in the non-volatile storage system may be any command that can obtain a response that can determine the connected non-volatile memory (flash memory).

The table of nonvolatile memory (flash memory) type and response in FIG. 5 and the table of flash memory type and time taken for each step of the aggregation process in FIG. 6 are stored in advance in the nonvolatile memory. It may be.
In the above description, the case where a plurality of nonvolatile memories are connected in the nonvolatile storage system 200 has been described. However, the present invention is not limited to this. For example, only one nonvolatile memory is a nonvolatile memory control unit. 214 A is connected to 214 A, issues a command to the non-volatile memory, determines the type of the non-volatile memory connected from the response, and each of the aggregation processing corresponding to the determined type non-volatile memory The aggregation process may be performed based on the processing time of the step process. By doing so, it is not necessary to change the memory controller 21A even if there are a plurality of types of nonvolatile memories mounted on the nonvolatile storage device 2A. In other words, when manufacturing the nonvolatile memory device 2A, the memory controller 21A can be shared regardless of the type of nonvolatile memory to be mounted.

[Other Embodiments]
In the nonvolatile memory system and nonvolatile memory device described in the above embodiment, each block may be individually integrated into one chip by a semiconductor device such as an LSI, or one chip so as to include a part or all of the blocks. It may be made.
Note that the name used here is LSI, but it may also be called IC, system LSI, super LSI, or ultra LSI depending on the degree of integration.
Further, the method of circuit integration is not limited to LSI, and implementation with a dedicated circuit or a general-purpose processor is also possible. An FPGA (Field Programmable Gate Array) that can be programmed after manufacturing the LSI or a reconfigurable processor that can reconfigure the connection and setting of circuit cells inside the LSI may be used.

Further, if integrated circuit technology comes out to replace LSI's as a result of the advancement of semiconductor technology or a derivative other technology, it is naturally also possible to carry out function block integration using this technology. Biotechnology can be applied as a possibility.
Moreover, each process of the said embodiment may be implement | achieved by hardware, and may be implement | achieved by software. Further, it may be realized by mixed processing of software and hardware. In addition, each functional unit of the above embodiment may be realized by a CPU bus configuration (a configuration in which a CPU, a ROM, a RAM, and a predetermined functional unit are connected by a bus). Further, when each process of the above embodiment is realized by software, it may be realized by using an OS.
Needless to say, when the non-volatile storage system and the non-volatile storage device according to the above-described embodiment are realized by hardware, it is necessary to adjust the timing for performing each process. In the above embodiment, for convenience of explanation, details of timing adjustment of various signals generated in actual hardware design are omitted.

  The specific configuration of the present invention is not limited to the above-described embodiment, and various changes and modifications can be made without departing from the scope of the invention.

  A memory controller, a nonvolatile storage device, a nonvolatile storage system, and a program according to the present invention execute aggregation processing appropriately while observing a timeout rule, and use a nonvolatile storage module such as a semiconductor memory card. This is useful in an image recording / reproducing apparatus, a moving picture recording / reproducing apparatus, a mobile phone, or the like.

1 is a schematic configuration diagram of a nonvolatile storage system 100 according to a first embodiment. The figure which showed typically the processing timing of Write processing and aggregation processing in a non-volatile storage system Table showing an example of the time required for each step of the aggregation process Schematic configuration diagram of a nonvolatile memory system 200 according to the second embodiment Table showing an example of manufacturer code of ID READ response for each type of nonvolatile memory (flash memory) Table showing an example of the time required for each step process of the aggregation process for each type of nonvolatile memory (flash memory) Diagram showing CG processing The figure which shows the conceptual operation | movement flow of a prior art example

100, 200 Nonvolatile storage system 1 Processing instruction unit 2, 2A Nonvolatile storage device 21, 21A Memory controller 22, 22A, 22B, 22C Nonvolatile memory 211 IF unit 212 Timeout value acquisition unit 213 Timeout monitoring unit 214, 214A Nonvolatile Memory control unit

Claims (6)

A memory controller that performs read / write control of data with respect to a nonvolatile memory based on a predetermined command,
Based on the predetermined command, data is read / written from / to the non-volatile memory, and an area where unnecessary information is stored in the non-volatile memory is released, and a non-volatile memory storage area A non-volatile memory control unit that executes aggregation processing that is processing to increase
A timeout value acquisition unit for acquiring a timeout value for the predetermined command;
When a process executed by the nonvolatile memory control unit is started based on the predetermined command, an elapsed time from the start time of the process is measured, and a time before the elapsed time exceeds the timeout value A timeout monitoring unit that outputs an aggregation processing stop signal to the nonvolatile memory control unit;
With
The non-volatile memory control unit is a case where an aggregation process stop signal is output from the timeout monitoring unit, and if the aggregation process is not completed, the aggregation process is interrupted.
Memory controller. The nonvolatile memory control unit performs the aggregation process by performing a plurality of step processes from a first step process to an Nth step process (N: a natural number of 2 or more),
The timeout monitoring unit sets the processing TA1 based on the predetermined command, and the total processing time TB (k from the first step processing of the aggregation processing to the k-th step processing (k is a natural number satisfying k ≦ N−1). ) And the total processing time TB (k + 1) from the first step process of the aggregation process to the (k + 1) -th step process (k is a natural number satisfying k + 1 ≦ N), and corresponds to the timeout value of the predetermined command When the time to do is TO
TA1 + TB (k) <TO <TA1 + TB (k + 1)
If this is the case, the aggregation process stop signal is output by the time before the (k + 1) th step process is executed.
The memory controller according to claim 1. The nonvolatile memory control unit obtains information on the processing time of each step process of the aggregation process from the nonvolatile memory,
The time-out monitoring unit outputs the aggregation process stop signal based on information on processing time of each step process of the aggregation process acquired by the nonvolatile memory control unit.
The memory controller according to claim 2. Non-volatile memory;
A memory controller according to any one of claims 1 to 3,
A non-volatile storage device comprising: The nonvolatile memory device according to claim 4;
A processing instruction unit for issuing a command for instructing data read / write control to the nonvolatile storage device;
A non-volatile storage system comprising: A program for controlling a memory controller that performs read / write control of data with respect to a nonvolatile memory based on a predetermined command,
Based on the predetermined command, data is read / written from / to the non-volatile memory, and an area where unnecessary information is stored in the non-volatile memory is released, and a non-volatile memory storage area A non-volatile memory control step for executing aggregation processing, which is processing for increasing
A timeout value acquisition step of acquiring a timeout value for the predetermined command;
When the process executed by the nonvolatile memory control step is started based on the predetermined command, the elapsed time from the start time of the process is measured, and the time before the elapsed time exceeds the timeout value A time-out monitoring step for outputting an aggregation processing stop signal;
With
In the non-volatile memory control step, the aggregation process stop signal is output by the timeout monitoring step, and if the aggregation process has not ended, the aggregation process is interrupted.
A program that controls the memory controller.

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