JP2010177226A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To make a semiconductor device, whose resistance value is adjustable, compact. <P>SOLUTION: A substrate connection region, an external wiring connection region, and a resistance adjusting region disposed between the substrate connection region and external wiring connection region are formed in one electrode pad to make the semiconductor device compact. The resistance adjusting region of the electrode pad is trimmed away to be able to adjust a resistance value between the substrate connection region and external wiring connection region of the electrode pad. Consequently, the semiconductor device whose resistance value is adjustable can be made compact. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device including an electrode pad for conducting a semiconductor substrate and external wiring and supplying power to the semiconductor substrate.

  In order to finely adjust the characteristics of the semiconductor device as necessary, or to adjust the detection current value flowing in the sense cell that detects the current flowing in the main cell of the semiconductor element, the resistance value of the electrode of the semiconductor device is adjusted. Technology has been developed. Patent Document 1 discloses a semiconductor device 90 capable of adjusting a resistance value and the like of an electrode layer installed on a semiconductor substrate. As shown in FIG. 21, the semiconductor device 90 includes a semiconductor substrate 91, a power feeding portion 92 of the semiconductor substrate, a silicon oxide film 93, a wire bonding electrode pad 94 formed on the surface of the silicon oxide film 93, and resistance adjustment. An electrode layer 95 and an insulating film 96 covering the outermost surface of the semiconductor device 91 are provided. A hole 961 is provided in the insulating film 96, and a part of the wire bonding electrode pad 94 is exposed. Wire bonding is performed on the electrode pad 94 for wire bonding exposed in the hole 961. The wire bonding electrode pad 94 is electrically connected to the power feeding portion 92. A trimming portion 951 is provided in the resistance adjustment electrode layer 95. In the semiconductor device 90, the wire bonding electrode pad 94 and the resistance adjustment electrode layer 95 are formed on the surface of the silicon oxide film 93, and then laser trimming is performed to form a trimming portion 951 in the resistance adjustment electrode layer 95. When forming the trimming portion 951, the resistance adjustment electrode layer 95 is applied with a measuring needle connected to the measuring device, and laser trimming is performed while measuring the resistance value, thereby adjusting the resistance value of the semiconductor device. Thereafter, the surface of the resistance adjustment electrode layer 95 is covered with an insulating film 96 as shown in FIG. The resistance adjustment electrode layer 95 is a part of an electrode layer that needs to be protected by the insulating film 96, and is provided separately from the wire bonding electrode pad 94.

JP-A-63-293970

  In Patent Document 1, an electrode pad for connecting a power feeding portion of a semiconductor device and an external wiring and an electrode layer whose resistance can be adjusted by trimming are separately provided. In order to adjust the resistance, it is necessary to add an electrode layer for resistance adjustment, so that the size of the semiconductor device has become larger than a semiconductor device without a resistance adjustment function.

  Therefore, in the present invention, a semiconductor device comprising a semiconductor substrate, an insulating film provided on the surface of the semiconductor substrate, and an electrode pad provided on the surface of the semiconductor substrate and the insulating film, the electrode pad being insulated A substrate connection region that is electrically connected to the semiconductor substrate through the film, an external wiring connection region in which external wiring is electrically connected to the surface, and a substrate connection region and the external wiring connection region are provided. And a resistance adjustment region.

  In the present invention, since the substrate connection region, the resistance adjustment region, and the external wiring connection region are formed in one electrode pad, the electrode pad for connecting the semiconductor substrate and the external wiring as in the prior art. In addition, there is no need to provide an electrode layer whose resistance can be adjusted by trimming, which can contribute to a compact semiconductor device.

  The resistance adjustment region of the present invention includes, for example, a plurality of conductive portions extending from the substrate connection region to the external wiring connection region. According to such a configuration, it is possible to increase the resistance value of the resistance adjustment region by cutting at least one of the plurality of conductive portions.

  Furthermore, it is preferable that at least one of the plurality of conductive portions has a resistance different from that of the other conductive portions. According to the magnitude of the resistance value to be adjusted, the conductive part to be trimmed can be appropriately selected from the conductive parts having different resistances, so that the resistance value of the electrode pad can be adjusted more appropriately.

  The resistance adjustment region includes a main conductive portion that connects the substrate connection region and the external wiring connection region, and a plurality of sub conductive portions that short-circuit the main conductive portion, and the plurality of sub conductive portions are the main conductive portions. Are short-circuited at different positions. Then, the resistance value between the substrate connection region and the external wiring connection region may be adjusted by appropriately cutting any of the plurality of sub conductive portions by trimming. As such a resistance adjustment region, for example, a main conductive portion meandering in a serpentine shape from the substrate connection region to the external wiring connection region and a sub conductive portion that short-circuits the meandering main conductive portion can be used.

  Further, the resistance adjustment region of the present invention is preferably exposed on the surface of the semiconductor device. By trimming the resistance adjustment region exposed on the surface of the semiconductor device, the resistance value between the substrate connection region of the electrode pad and the external wiring connection region can be adjusted. Trimming can be performed in an inspection process for a completed semiconductor device, such as a characteristic inspection process.

  According to the present invention, since the resistance adjustment region is provided in the electrode pad for connecting the semiconductor substrate and the external wiring, an increase in the size of the semiconductor device can be suppressed.

The top view of the semiconductor device (electrode pad) of a present Example. FIG. 2 is a cross-sectional view of the semiconductor device of the present embodiment, taken along the line II-II in FIG. 1. The figure which cut | disconnected the electroconductive part provided in the resistance adjustment area | region of the electrode pad of FIG. The top view of the electrode pad of the semiconductor device which concerns on the modification of a present Example. The top view of the electrode pad of the semiconductor device which concerns on the other modification of a present Example. The figure seen in the arrow direction from the VI-VI line cross section of FIG. The top view of the electrode pad of the semiconductor device which concerns on the other modification of a present Example. The top view of the electrode pad of the semiconductor device which concerns on the other modification of a present Example. The figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example. The figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example. FIG. 13 is a diagram showing a manufacturing process of the electrode pad of the semiconductor device of the example, and is a cross-sectional view taken along line XI-XI in FIG. 12. The figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example. It is a figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example, and is the XIII-XIII sectional view taken on the line of FIG. The figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example. The figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example. The figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example. FIG. 19 is a diagram showing a manufacturing process of the electrode pad of the semiconductor device of the example, and is a cross-sectional view taken along line XVII-XVII in FIG. 18. The figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example. The figure which shows the manufacturing process of the electrode pad of the semiconductor device of a present Example. The top view of the electrode pad of the semiconductor device which concerns on the other modification of a present Example. Sectional drawing of the semiconductor device of a prior art example.

The main features of the embodiments described below are listed below.
(Feature 1) The insulating film formed on the surface of the semiconductor substrate extends from the resistance adjustment region of the electrode pad formed on the surface of the insulating film to the substrate connection region.

  Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view of a semiconductor device 10 according to the present embodiment, and FIG. 2 is a cross-sectional view taken along line II-II in FIG. However, in FIG.1 and FIG.2, only the area | region in which the electrode pad was formed is shown in figure (similarly in FIGS. 3-20). The semiconductor device 10 includes a semiconductor substrate 1, a power feeding portion 2 formed on the semiconductor substrate 1, an insulating film 3 that covers the surface of the semiconductor substrate 1, and an electrode pad 4 that covers the surfaces of the semiconductor substrate 1 and the insulating film 3. And has. An electrode 6 is formed on the back surface of the semiconductor substrate 1. Here, the power supply portion means a portion where power is supplied from the external wiring through the electrode pad on the semiconductor substrate. For example, a contact region such as a main cell, which is an active region of a semiconductor element, or a sense cell for detecting a current in the main cell corresponds to the power feeding portion.

  As shown in FIGS. 1 and 2, the electrode pad 4 is exposed on the outermost surface of the semiconductor device 10. The electrode pad 4 penetrates the insulating film 3 and is electrically connected to the power feeding portion 2. The electrode pad 4 includes a substrate connection region 41 located above the power feeding portion 2, an external wiring connection region 43 connected to an external wiring (wire), and a resistor provided between the substrate connection region 41 and the external wiring connection region 43. And an adjustment area 45. As shown in FIG. 2, the resistance adjustment region 45 and the external wiring connection region 43 are provided at a position above the insulating film 3. The insulating film 3 extends beyond the resistance adjustment region 45 to a part of the substrate connection region 41 and is not in contact with the power feeding portion 2. As a material of the electrode pad 4, for example, a conductive material such as aluminum (Al) or copper (Cu) can be used.

  As shown in FIG. 1, the electrode pad 4 of the present embodiment is provided with a resistance adjustment region 45 including a plurality of conductive portions 451. The plurality of conductive portions 451 extend from the substrate connection region 41 toward the external wiring connection region 43. A hole 452 is provided between a plurality of adjacent conductive portions 451. The hole 452 functions as a non-conductive part of the resistance adjustment region 45. Note that a position where the hole 452 is provided may be filled with a non-conductive material.

  The plurality of conductive portions 451 are formed so that the length L, the width W, and the thickness D shown in FIGS. 1 and 2 are equal. The resistance value of the resistance adjustment region 45 can be adjusted by cutting some of the plurality of conductive portions 451 by trimming. For example, when six conductive portions 451 are provided as shown in FIG. 1, if one of them is cut as shown in FIG. 3 by trimming, the resistance value of the resistance adjustment region 45 is 20 %growing.

  According to this embodiment, the substrate connection region, the resistance adjustment region, and the external wiring connection region are formed on one electrode pad. Therefore, unlike the conventional case, there is no need to provide an electrode pad for connecting the power feeding portion of the semiconductor device and the external wiring, and an electrode pad capable of adjusting the resistance by trimming, and a resistance adjustment region is provided. As a result, an increase in size of the semiconductor device can be suppressed.

  Further, a resistance adjustment region is provided in the electrode pad exposed on the surface of the semiconductor device, and the resistance between the substrate connection region of the electrode pad and the external wiring connection region is obtained by trimming the resistance adjustment region. The value can be adjusted. For this reason, for example, trimming can be performed in an inspection process of a completed semiconductor device such as an inspection process of electrical characteristics of the semiconductor device. Since the trimming can be performed after the semiconductor substrate and the electrode layer are protected by the insulating film, the characteristics of the semiconductor device due to the trimming can be prevented from being deteriorated. An insulating film exists at a position below the resistance adjustment region where trimming is performed, and the insulating film extends beyond the resistance adjustment region to a part of the substrate connection region. For this reason, even if trimming is performed on the resistance adjustment region, it is difficult to damage a semiconductor substrate or the like installed at a position below the trimming region.

  In the above embodiment, the plurality of conductive portions 451 provided in the resistance adjustment region 45 of the electrode pad 4 are all the same material, the same shape, and the same size, but a plurality of materials, shapes, and sizes are different. You may combine an electroconductive part. Thereby, a combination of conductive parts having different resistance values can be obtained.

For example, as shown in FIG. 4, conductive portions 453a to 453d having the same length and thickness but different widths can be combined. Width of the conductive portion 453a is _{W 1,} the width of the conductive portion 453b is _{W 2,} the width of the conductive portion 453c is _{W 3,} the width of the conductive portion 453d is a _{W 4,} the width _W 1 to W- The size of ₄ is W ₁ > W ₂ > W ₃ > W ₄ . As in FIG. 1, a hole is provided between adjacent conductive portions. If the thickness of the conductive portions 453a to 453d is D, the cross-sectional area obtained by cutting the conductive portions 453a to 453d along a plane perpendicular to the direction from the substrate connection region 41 to the external wiring connection region 43 is the conductive portion. DW ₁ in 453a, DW _{2 in} the conductive portion 453b, DW _{3 in} the conductive portion 453c, and DW _{4 in the} conductive portion 453d, and DW ₁ > DW ₂ > DW ₃ > DW ₄ . Since the lengths of the conductive portions 453a to 453d are all L and are the same, the resistance values of the conductive portions 453a to 453d are the smallest in the conductive portion 453a, and the conductive portions 453b, 453c, and conductive portions. It becomes large in order of 453d.

  In this way, since the conductive portions 453a to 453d have different resistance values, the amount of increase in the resistance value of the resistance adjustment region 45 differs depending on the conductive portion to be trimmed. By appropriately selecting and conducting trimming from the conductive portions 453a to 453d having different resistance values, the increase amount of the resistance value of the resistance adjustment region 45 can be adjusted.

Similarly, the lengths and widths of the conductive portions are all the same, and combinations of conductive portions having different resistance values can be obtained by changing the thickness. FIG. 5 is a plan view of the electrode pad 4 according to the modified example, and FIG. 6 is a view as seen in the direction of the arrow from the VI-VI line cross section of FIG. As shown in FIGS. 5 and 6, by using the conductive portions 454a to 454c having the same length and width and different thicknesses, the substrate connection region 41 to the external wiring connection region 43 are used in the same manner as described above. It is possible to obtain the conductive portions 454a to 454c having different cross-sectional areas cut along a plane perpendicular to the direction toward. As in FIG. 1, a hole is provided between adjacent conductive portions. As shown in FIG. 5, the thickness of the conductive portion 454a is _{D 1,} the thickness of the conductive portion 454b is _{D 2,} the thickness of the conductive portion 454c is a _{D 3,} the thickness _D 1 to D The size of ₃ is D ₁ > D ₂ > D ₃ . The cross-sectional area cut along a plane perpendicular to the direction from the substrate connection region 41 to the external wiring connection region 43 is the largest in the conductive portion 454a, and decreases in the order of the conductive portion 454b and the conductive portion 454c. For this reason, the resistance values of the conductive portions 454a to 454c are different from each other, the conductive portion 454a is the smallest, and the conductive portions 454b and the conductive portion 454c increase in this order. The amount of increase in the resistance value of the resistance adjustment region 45 can be adjusted by appropriately selecting and conducting trimming from the conductive portions 454a to 454c having different resistance values.

  The width W and thickness D of the conductive portions are all the same, and combinations of conductive portions having different resistance values can be obtained by changing the length. As shown in FIG. 7, a plurality of conductive portions 455a to 455e having the same width and thickness, and different lengths, and a constant resistance portion 47 to which each of the plurality of conductive portions 455a to 455d is connected. If the resistance adjustment region 45 is provided, the resistance values of the conductive portions 455a to 455e can be made different. As in FIG. 1, a hole is provided between adjacent conductive portions. By appropriately selecting from the conductive portions 455a to 455e having different resistance values and performing trimming, the increase amount of the resistance value of the resistance adjustment region 45 can be adjusted.

Moreover, the combination of the conductive parts having different resistance values can be obtained by changing the material of the conductive parts. The conductive portion 456a shown in FIG. 8 is formed of a material having a relatively low resistance. The conductive portion 456b is formed of a material having a relatively high resistance. As in FIG. 1, a hole is provided between adjacent conductive portions. Table 1 shows specific resistances of typical metals used as electrode materials. As a material having a relatively low resistance, for example, Al, Cu or the like can be suitably used. As a material having relatively high resistance, for example, platinum (Pt), iron (Fe), titanium (Ti), chromium (Cr), or the like can be preferably used. In FIG. 8, the same material is used for the conductive portion 456a, the substrate connection region 41 of the electrode pad 4 and the external wiring connection region 43.

  Since the conductive portion 456a and the conductive portion 456b have the same size and the same shape as the conductive portion 451 shown in FIG. 1, the resistance value of the conductive portion 456b formed of a material with high resistance is a material with low resistance. It is higher than the formed conductive portion 456a. By appropriately selecting from the conductive portions 456a and 456b having different resistance values and performing trimming, the amount of increase in the resistance value of the resistance adjustment region 45 can be adjusted.

  Two or more kinds of metal materials used for the conductive portion may be selected. For example, one conductive portion may be provided for each of the metal materials shown in Table 2. Further, the material used for the conductive portion and the material used for the substrate connection region of the electrode pad and the external wiring connection region may be different.

  Next, the manufacturing process of the electrode pad 4 of the semiconductor device 10 according to the present embodiment will be described. In addition, since the manufacturing method of a general semiconductor device can be utilized about the other manufacturing process (namely, manufacturing process of structures other than the electrode pad 4) of the semiconductor device 10, the detailed description is abbreviate | omitted here. To do. The electrode pad 4 of the semiconductor device 10 according to the present embodiment can be manufactured by an electrode patterning technique using a resist.

  An example of the manufacturing process of the electrode pad 4 shown in FIGS. 1 and 2 will be described. First, as shown in FIG. 9, the insulating film 3 is formed on the semiconductor substrate 1, and the insulating film 3 located above the power feeding portion 2 is removed by etching. Next, as shown in FIG. 10, electrode pads 34 are formed on the surfaces of the semiconductor substrate 1 and the insulating film 3.

  Next, as shown in FIGS. 11 and 12, a resist 35 is formed on the surface of the electrode pad 34. FIG. 11 is a view showing a state in which a resist 35 is stacked with respect to FIG. 10, and FIG. 12 is a plan view in the state of FIG. 11 corresponds to a cross-sectional view taken along line XI-XI in FIG. The resist 35 is patterned in accordance with the shape of the electrode pad 4 shown in FIG. That is, the resist 35 is provided with an opening 351. The position of the opening 351 corresponds to the position of the hole 452 shown in FIG.

  Next, a part of the electrode pad 34 located in the opening 351 of the resist 35 is removed by etching by RIE (Reactive Ion Etching) method or the like. After the etching is completed, the resist is removed. By patterning the electrode pad 34 in this way, the electrode pad 4 shown in FIGS. 1 and 2 can be manufactured.

  The electrode pad 4 shown in FIGS. 4 to 7 can also be manufactured using the above method. The electrode pad 4 shown in FIGS. 4 to 7 can be manufactured by patterning the resist 35 shown in FIGS. 11 and 12 according to FIGS. The electrode pad 4 having the conductive portions 454a to 454c having different thicknesses shown in FIGS. 5 and 6 is manufactured by repeating the manufacturing process shown in FIGS. 10 to 12 three times using an appropriately patterned resist, for example. Can do.

  Moreover, the electrode pad 4 provided with the conductive part 456a and the conductive part 456b of different materials as shown in FIG. 8 can be manufactured by a lift-off method. In the lift-off method, a resist 36 is formed on the surfaces of the semiconductor substrate 1 and the insulating film 3 as shown in FIGS. 13 and 14 after the state shown in FIG. 9 (a state in which a part of the insulating film 3 is removed) is obtained. Perform the process. 13 is a view showing a state in which a resist 36 is laminated with respect to FIG. 9, and FIG. 14 is a plan view in the state of FIG. 13 corresponds to a cross-sectional view taken along line XIII-XIII in FIG. The resist 36 has an opening 361. The position of the opening 361 corresponds to the position of the conductive portion 456b using a relatively high resistance material shown in FIG.

  Next, as illustrated in FIG. 15, the conductive film 38 is formed using a material used for the conductive portion 456 b, and then the resist 36 is removed. Thereby, as shown in FIG. 16, only the conductive film 38 at the position of the conductive portion 456b remains. Next, as shown in FIGS. 17 and 18, a resist 37 is formed. FIG. 17 is a view showing a state in which a resist 37 is laminated with respect to FIG. 16, and FIG. 18 is a plan view in the state of FIG. FIG. 17 corresponds to a cross-sectional view taken along line XVII-XVII in FIG. The resist 37 is formed in a portion excluding the positions of the conductive portion 456a using the material having a relatively low resistance shown in FIG. Next, as illustrated in FIG. 19, a conductive film 39 is formed using a material used for the conductive portion 456a and the like, and then the resist is removed. The electrode pad 4 shown in FIG. 8 can be manufactured by patterning the electrode pad 34 in this way.

  As described above, the electrode pad according to the present embodiment can be manufactured by applying the technique used in the manufacturing process of the conventional semiconductor device. Since it can be manufactured without significantly changing the manufacturing process of the conventional semiconductor device, it can be manufactured without significantly increasing the labor, cost, and time in the manufacturing process.

  Further, in this embodiment, it is not necessary to perform a step of forming an insulating film after adjusting the resistance by trimming, and thus the characteristics of the semiconductor device are not varied again by the step performed after adjusting the resistance. Since the resistance value can be adjusted according to the characteristics of the completed semiconductor device, the characteristics of the semiconductor device can be adjusted more appropriately.

  In the semiconductor device 20 according to the second embodiment, as shown in FIG. 20, the electrode pad 24 includes a resistance adjustment region 55 provided between the substrate connection region 41 and the external wiring connection region 43. In addition, duplication description is abbreviate | omitted about the part which is common in Example 1. FIG.

  The resistance adjustment region 55 includes a main conductive portion 551 meandering in a serpentine shape from the substrate connection region 41 toward the external wiring connection region 43, and a sub conductive portion 553a and a sub conductive portion 553b that short-circuit the main conductive portion 551. Yes.

  By cutting at least one of the sub-conductive portion 553a and the sub-conductive portion 553b, the path of the current flowing through the resistance adjustment region 55 becomes longer, so that the resistance value of the resistance adjustment region 55 can be increased.

  The electrode pad 24 of the semiconductor device 20 according to the second embodiment can be manufactured by the same method as the manufacturing method of the electrode pad 4 described in the first embodiment. For example, the resist 35 shown in FIGS. 11 and 12 can be manufactured by patterning according to FIG.

  As described above, according to the first and second embodiments of the present invention, the substrate connection region, the resistance adjustment region, and the external wiring connection region are formed on one electrode pad. Therefore, unlike the conventional case, there is no need to provide an electrode pad for connecting the power feeding portion of the semiconductor device and the external wiring, and an electrode pad capable of adjusting the resistance by trimming, and a resistance adjustment region is provided. As a result, an increase in size of the semiconductor device can be suppressed.

  Further, according to the first and second embodiments described above, the resistance adjustment region is provided on the electrode pad exposed on the surface of the semiconductor device, and trimming is performed on the resistance adjustment region, so that the electrode pad The resistance value between the substrate connection region and the external wiring connection region can be adjusted. For this reason, for example, trimming can be performed in an inspection process of a completed semiconductor device such as an inspection process of electrical characteristics of the semiconductor device. Since the trimming can be performed after the semiconductor substrate and the electrode layer are protected by the insulating film, the characteristics of the semiconductor device due to the trimming can be prevented from being deteriorated. That is, the insulating film exists at a position below the resistance adjustment region where trimming is performed, and the insulating film extends from the resistance adjustment region to the substrate connection region. For this reason, even if trimming is performed on the resistance adjustment region, it is difficult to damage a semiconductor substrate or the like installed at a position below the trimming region.

  Further, it is not necessary to perform a step of forming an insulating film after adjusting the resistance by trimming. Therefore, the characteristics of the semiconductor device are not varied again by the step performed after adjusting the resistance. Since the resistance value can be adjusted according to the characteristics of the completed semiconductor device, the characteristics of the semiconductor device can be adjusted more appropriately.

  As mentioned above, although the Example of this invention was described in detail, these are only illustrations and do not limit a claim. The technology described in the claims includes various modifications and changes of the specific examples illustrated above.

  The technical elements described in this specification or the drawings exhibit technical usefulness alone or in various combinations, and are not limited to the combinations described in the claims at the time of filing. In addition, the technology exemplified in this specification or the drawings can achieve a plurality of objects at the same time, and has technical usefulness by achieving one of the objects.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Electric power feeding part 3 Insulating film 4, 24, 34 Electrode pad 6 Electrode layer 10, 20 Semiconductor device 35, 36, 37 Resist 38, 39 Conductive film 41 Substrate connection area 43 External wiring connection area 45, 55 Resistance adjustment area 47 constant resistance parts 351 and 361 opening 451 conductive part 452 holes 453a to 453d conductive parts 454a to 454c conductive parts 455a to 455e conductive parts 456a and 457b conductive parts 551 main conductive parts 553a and 553b sub conductive parts

Claims (6)

A semiconductor device comprising: a semiconductor substrate; an insulating film provided on a surface of the semiconductor substrate; and an electrode pad provided on the surface of the semiconductor substrate and the insulating film,
The electrode pad includes a substrate connection region that is electrically connected to the semiconductor substrate through the insulating film, an external wiring connection region in which external wiring is electrically connected to the surface, the substrate connection region, and the A semiconductor device comprising: a resistance adjustment region provided between the external wiring connection region and the semiconductor device. The resistance adjustment region includes a plurality of conductive portions extending from the substrate connection region to the external wiring connection region,
The semiconductor device according to claim 1, wherein at least one of the plurality of conductive portions is cuttable.   The semiconductor device according to claim 2, wherein at least one of the plurality of conductive portions has a resistance different from that of the other conductive portions. The resistance adjustment region includes a main conductive portion that connects the substrate connection region and the external wiring connection region, and a plurality of sub conductive portions that short-circuit the main conductive portion.
2. The semiconductor device according to claim 1, wherein the plurality of sub-conductive portions short-circuit the main conductive portion at different positions, and at least one of the plurality of sub-conductive portions can be cut. .   The semiconductor device according to claim 4, wherein the main conductive portion is a conductive portion meandering in a serpentine shape.   The semiconductor device according to claim 1, wherein the resistance adjustment region is exposed on a surface of the semiconductor device.

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