JP2010171488A5 - - Google Patents
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- JP2010171488A5 JP2010171488A5 JP2009009595A JP2009009595A JP2010171488A5 JP 2010171488 A5 JP2010171488 A5 JP 2010171488A5 JP 2009009595 A JP2009009595 A JP 2009009595A JP 2009009595 A JP2009009595 A JP 2009009595A JP 2010171488 A5 JP2010171488 A5 JP 2010171488A5
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- gain
- signal
- noise amplifier
- low noise
- frequency
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- 238000001514 detection method Methods 0.000 claims description 11
- 238000006243 chemical reaction Methods 0.000 claims description 9
- 230000000051 modifying Effects 0.000 claims description 6
- 230000001276 controlling effect Effects 0.000 claims description 3
- 238000005562 fading Methods 0.000 claims description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000875 corresponding Effects 0.000 description 1
Description
上記目的を達成するため、本願請求項1に記載の発明は、
受信信号を増幅するロウノイズアンプと、ロウノイズアンプで増幅された受信信号を増幅し中間周波数の信号に周波数変換して出力するRF処理部と、中間周波数の受信信号をデジタル信号に変換した後に復調する復調部と、を備えたデジタル放送受信装置において、
前記復調部は、
受信信号の振幅レベルを検出する振幅検出回路と、
中間周波数の受信信号をデジタル信号に変換するAD変換回路と、
該AD変換回路で変換された時間軸のデータを周波数軸のデータに変換するデータ変換回路と、
前記周波数軸のデータに基づいて、フェージングによるサブキャリアの周波数変動の大きさを検出する周波数変動検出手段と、
前記振幅検出回路の出力に応じて前記RF処理部の利得を制御する利得制御信号を生成して前記RF処理部へ出力する利得制御回路と、
前記周波数変動検出手段の出力および前記振幅検出回路の出力に応じて前記ロウノイズアンプの利得を切り替える利得切替え制御信号を生成して前記ロウノイズアンプへ出力する利得切替え制御回路と、
を備えることを特徴としている。
In order to achieve the above object, the invention described in claim 1 of the present application is
A low noise amplifier that amplifies the received signal, an RF processing unit that amplifies the received signal amplified by the low noise amplifier, converts the frequency to an intermediate frequency signal, and outputs the signal, and after converting the intermediate frequency received signal to a digital signal In a digital broadcast receiver comprising a demodulator for demodulating,
The demodulator
An amplitude detection circuit for detecting the amplitude level of the received signal;
An AD conversion circuit that converts a received signal of an intermediate frequency into a digital signal;
A data conversion circuit that converts time-axis data converted by the AD conversion circuit into frequency-axis data;
Based on the data on the frequency axis, frequency fluctuation detecting means for detecting the magnitude of the frequency fluctuation of the subcarrier due to fading;
A gain control circuit that generates a gain control signal for controlling the gain of the RF processing unit in accordance with the output of the amplitude detection circuit and outputs the gain control signal to the RF processing unit;
A gain switching control circuit for generating a gain switching control signal for switching the gain of the low noise amplifier according to the output of the frequency variation detecting means and the output of the amplitude detecting circuit and outputting the gain switching control signal to the low noise amplifier;
It is characterized by having.
請求項5に記載の発明は、請求項4に記載のデジタル放送受信装置において、
前記受信信号はマルチキャリア・デジタル変調方式で変調された信号であり、
前記利得切替え制御回路は、
パイロット信号の変動量が前記所定のレベル以下の場合、受信電力が−70dBm以下の時に前記ロウノイズアンプの利得を高い利得に切り替える一方、受信電力が−30dBm以上の時に前記ロウノイズアンプの利得を低い利得に切り替え、
パイロット信号の変動量が前記所定のレベルより大きい場合、受信電力が−75dBm以下の時に前記ロウノイズアンプの利得を高い利得に切り替える一方、受信電力が−20dBm以上の時に前記ロウノイズアンプの利得を低い利得に切り替えることを特徴としている。
According to a fifth aspect of the present invention, in the digital broadcast receiving apparatus according to the fourth aspect,
The received signal is a signal modulated by a multicarrier digital modulation method,
The gain switching control circuit includes:
When the fluctuation amount of the pilot signal is less than or equal to the predetermined level, the gain of the low noise amplifier is switched to a high gain when the reception power is −70 dBm or less, while the gain of the low noise amplifier is changed when the reception power is −30 dBm or more. Switch to lower gain,
When the fluctuation amount of the pilot signal is larger than the predetermined level , the gain of the low noise amplifier is switched to a high gain when the reception power is −75 dBm or less, while the gain of the low noise amplifier is changed when the reception power is −20 dBm or more. It is characterized by switching to a low gain.
復調部4は、図4に示すように、RF処理部3で所定の振幅レベルまで増幅された放送受信信号をデジタル信号に変換するAD変換回路41と、AD変換された受信データを高速フーリエ変換することで時間軸情報から周波数軸情報に変換するFFT42、伝送路で生じた歪みを補正する波形等化回路43、マルチキャリア・デジタル変調方式の一つであるOFDM(直交周波数分割多重化方式)のような変調方式に対応した復調方式で受信データを復調する復調回路44、受信データに含まれている誤り訂正符号に基づいて受信データの誤り訂正を行う誤り訂正回路45を備える。 As shown in FIG. 4, the demodulator 4 includes an AD conversion circuit 41 that converts the broadcast reception signal amplified to a predetermined amplitude level by the RF processing unit 3 into a digital signal, and fast Fourier transform of the AD-converted reception data. FFT 42 that converts time axis information to frequency axis information, waveform equalization circuit 43 that corrects distortion generated in the transmission path, and OFDM (orthogonal frequency division multiplexing) that is one of the multicarrier digital modulation systems A demodulation circuit 44 that demodulates the received data by a demodulation method corresponding to the modulation method, and an error correction circuit 45 that performs error correction of the received data based on an error correction code included in the received data.
Claims (6)
前記復調部は、
受信信号の振幅レベルを検出する振幅検出回路と、
中間周波数の受信信号をデジタル信号に変換するAD変換回路と、
該AD変換回路で変換された時間軸のデータを周波数軸のデータに変換するデータ変換回路と、
前記周波数軸のデータに基づいて、フェージングによるサブキャリアの周波数変動の大きさを検出する周波数変動検出手段と、
前記振幅検出回路の出力に応じて前記RF処理部の利得を制御する利得制御信号を生成して前記RF処理部へ出力する利得制御回路と、
前記周波数変動検出手段の出力および前記振幅検出回路の出力に応じて前記ロウノイズアンプの利得を切り替える利得切替え制御信号を生成して前記ロウノイズアンプへ出力する利得切替え制御回路と、を備えることを特徴とするデジタル放送受信装置。 A low noise amplifier that amplifies the received signal, an RF processing unit that amplifies the received signal amplified by the low noise amplifier, converts the frequency to an intermediate frequency signal, and outputs the signal, and after converting the intermediate frequency received signal to a digital signal In a digital broadcast receiver comprising a demodulator for demodulating,
The demodulator
An amplitude detection circuit for detecting the amplitude level of the received signal;
An AD conversion circuit that converts a received signal of an intermediate frequency into a digital signal;
A data conversion circuit that converts time-axis data converted by the AD conversion circuit into frequency-axis data;
Based on the data on the frequency axis, frequency fluctuation detecting means for detecting the magnitude of the frequency fluctuation of the subcarrier due to fading;
A gain control circuit that generates a gain control signal for controlling the gain of the RF processing unit in accordance with the output of the amplitude detection circuit and outputs the gain control signal to the RF processing unit;
A gain switching control circuit that generates a gain switching control signal for switching the gain of the low noise amplifier in accordance with the output of the frequency fluctuation detecting means and the output of the amplitude detection circuit and outputs the gain switching control signal to the low noise amplifier. A digital broadcast receiver characterized by the above.
前記利得切替え制御回路は、
パイロット信号の変動量が前記所定のレベル以下の場合、受信電力が−70dBm以下の時に前記ロウノイズアンプの利得を高い利得に切り替える一方、受信電力が−30dBm以上の時に前記ロウノイズアンプの利得を低い利得に切り替え、
パイロット信号の変動量が前記所定のレベルより大きい場合、受信電力が−75dBm以下の時に前記ロウノイズアンプの利得を高い利得に切り替える一方、受信電力が−20dBm以上の時に前記ロウノイズアンプの利得を低い利得に切り替えることを特徴とする請求項4に記載のデジタル放送受信装置。 The received signal is a signal modulated by a multicarrier digital modulation method,
The gain switching control circuit includes:
When the fluctuation amount of the pilot signal is less than or equal to the predetermined level, the gain of the low noise amplifier is switched to a high gain when the reception power is −70 dBm or less, while the gain of the low noise amplifier is changed when the reception power is −30 dBm or more. Switch to lower gain,
When the fluctuation amount of the pilot signal is larger than the predetermined level , the gain of the low noise amplifier is switched to a high gain when the reception power is −75 dBm or less, while the gain of the low noise amplifier is changed when the reception power is −20 dBm or more. The digital broadcast receiving apparatus according to claim 4, wherein the digital broadcast receiving apparatus is switched to a low gain.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2009009595A JP5187204B2 (en) | 2009-01-20 | 2009-01-20 | Digital broadcast receiver |
Applications Claiming Priority (1)
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JP2009009595A JP5187204B2 (en) | 2009-01-20 | 2009-01-20 | Digital broadcast receiver |
Publications (3)
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JP2010171488A JP2010171488A (en) | 2010-08-05 |
JP2010171488A5 true JP2010171488A5 (en) | 2012-03-08 |
JP5187204B2 JP5187204B2 (en) | 2013-04-24 |
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JP2009009595A Expired - Fee Related JP5187204B2 (en) | 2009-01-20 | 2009-01-20 | Digital broadcast receiver |
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JP2001024454A (en) * | 1999-07-07 | 2001-01-26 | Matsushita Electric Ind Co Ltd | Automatic gain controller and its method and radio communication apparatus having automatic gain control function |
JP2003101468A (en) * | 2001-09-21 | 2003-04-04 | Toshiba Corp | Method for installing antenna of radio communication equipment and radio communication equipment |
JP3959320B2 (en) * | 2002-08-23 | 2007-08-15 | パイオニア株式会社 | Receiver and AGC method |
JP2006261710A (en) * | 2005-03-15 | 2006-09-28 | Sanyo Electric Co Ltd | Digital broadcast receiver for mobile reception |
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