JP2010165924A - Simulation device, simulation method, and recording medium recorded with program for simulation - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To calculate an electric characteristic of an electric field effect transistor in a short time. <P>SOLUTION: This simulation device 1 includes a structure model setting part 11, a quantization state calculating part 12, and a state mixing part 13. The structure model setting part 11 sets a virtual structure model, assuming that hetero-structure of a FET has a confinement potential for forming a channel area and comprises a single semiconductor layer. The quantization state calculating part 12 calculates a virtual quantized electron state in each of the virtual structure models, as a virtual electron state. The state mixing part 13 mixes physical quantities of the virtual electron states, to calculate a physical quantity of a quantized electron state in the channel area. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a technique for modeling a field-effect transistor (FET) and calculating a quantized electronic state of a channel region of the FET by a numerical simulation, and more particularly, modeling a FET having a heterostructure to form a channel. The present invention relates to a technique for calculating a quantized electronic state of a region by numerical simulation.

  In order to further increase the performance of CMOS devices, research and development of FETs having a high mobility channel region using a heterostructure have been underway. For example, the device performance is improved by adopting a heterostructure using a high mobility semiconductor material other than silicon or introducing crystal strain into the channel region.

  In order to obtain the electrical characteristics of the MOSFET by numerical simulation, the Schrodinger equation is solved to obtain an electronic state that takes into account confinement quantization in the inversion layer, that is, a quantized electronic state. It is effective to simulate carrier transport in a low-dimensional electron system.

  In recent years, with the shortening of MOSFET channels, the electric field in the carrier transport direction has increased, and carriers have a tendency to increase in energy. Therefore, the simulation based on the parabolic energy band structure using a simple effective mass has a problem that the calculation accuracy is low. In order to improve the calculation accuracy, a detailed quantized electronic state based on the full band structure of the energy band is required. The full band structure can be strictly calculated by a strong coupling approximation method or a pseudopotential method. A calculation method of a full band structure by the strong coupling approximation method is disclosed in Non-Patent Document 1, for example. For example, Non-Patent Document 2 discloses a method for calculating a full band structure by the pseudopotential method.

H. Fitriawan, M. Ogawa, S. Souma and T. Miyoshi, "Fullband Simulation of Nano-Scale MOSFETs Based on a Non-equilibrium Green's Function Method", IEICE Transactions on Electronics, E91-C, pp. 105-109 ( 2008). M. V. Fischetti and S. E. Laux, "Monte Carlo Study of Electron Transport in Silicon Inversion Layers", Physical Review B 48, 2244 (1993).

  In order to precisely calculate the quantized electronic state based on the full-band structure, a huge amount of calculation and a large memory space are required. For example, in the strong coupling approximation method disclosed in Non-Patent Document 1, the atoms constituting the crystal must be considered one by one, and more than one atomic orbital must be considered for each atom. The matrix size of the low-dimensional electron Hamiltonian in the inversion layer becomes very large. Therefore, when an FET having a certain size is targeted, the calculation amount for solving the Schrödinger equation becomes enormous, and there is a possibility that the simulation does not end in a realistic calculation time.

  As a method of suppressing the amount of calculation, Non-Patent Document 2 discloses a method of solving the Schroedinger equation based on the pseudopotential method. This method pre-calculates a full band structure in a bulk state defined by wave number space (or momentum space). By using this full band structure, a quantized full band structure can be calculated at high speed.

  FIG. 1 is a graph showing an example of a dispersion relationship calculated by the pseudopotential method and the strong coupling approximation method. This graph shows a dispersion relation (a is a lattice constant) of a valence band quantization band when a triangular potential having a confinement electric field strength of 50 kV / cm is formed in a region of 100 nm in the depth direction. FIG. 1 shows graphs of crystal orientations in the <100> direction and the <110> direction, respectively. As shown in FIG. 1, almost the same quantized electronic state is obtained by the pseudopotential method and the strong coupling approximation method, whereas the time for calculating the quantized electronic state by the pseudopotential method is about 10 seconds. The calculation time of the quantized electronic state by the strong coupling approximation method was about 6 hours.

  However, the calculation method of Non-Patent Document 2 cannot be applied to a structure in which different materials are stacked in a confinement direction perpendicular to the MOS interface in real space, such as a heterostructure of MOSFET. The reason is that since the electronic state in the bulk state is defined in the wave number space, the real space distribution cannot be incorporated into the Schroedinger equation.

  According to the present invention, there is provided a simulation apparatus that models a field effect transistor having a heterostructure in which a plurality of types of semiconductor layers are stacked and performs a numerical simulation of a quantized electronic state of a channel region in the heterostructure. The simulation apparatus assumes that the heterostructure has a confinement potential for forming the channel region and includes a single semiconductor layer of the plurality of types of semiconductor layers. A structural model setting unit that sets a virtual structural model corresponding to the virtual structural model, a quantized state calculating unit that calculates a virtual quantized electronic state of each of the virtual structural models as a virtual electronic state, and a physical property quantity of the virtual electronic state A state mixing unit for mixing and calculating a physical quantity of the quantized electronic state of the channel region.

  According to the invention, there is provided a simulation method for modeling a field effect transistor having a heterostructure in which a plurality of types of semiconductor layers are stacked and performing a numerical simulation of a quantized electronic state of a channel region in the heterostructure. The simulation method assumes that (a) the heterostructure has a confinement potential for forming the channel region and is composed of any one semiconductor layer of the plurality of semiconductor layers. Setting a virtual structure model corresponding to each semiconductor layer; (b) calculating a virtual quantized electronic state of each virtual structure model as a virtual electronic state; and (c) physical properties of the virtual electronic state. And calculating the physical quantity of the quantized electronic state of the channel region by mixing the quantities.

  According to the present invention, a computer that records a program for modeling a field effect transistor having a heterostructure in which a plurality of types of semiconductor layers are stacked and causing a computer to perform a numerical simulation of a quantized electronic state of a channel region in the heterostructure. A readable recording medium is provided. The numerical simulation assumes that (a) the heterostructure has a confinement potential for forming the channel region and is composed of any one of the plurality of semiconductor layers. (B) a quantized state calculation process for calculating a virtual quantized electronic state of each virtual structure model as a virtual electronic state; And a state mixing process for calculating the physical quantity of the quantized electronic state of the channel region by mixing the physical quantities of the virtual electronic state.

  As described above, in the simulation apparatus and the simulation method according to the present invention, and the program recorded in the recording medium, a plurality of types are assumed on the assumption that the heterostructure has a confinement potential for forming a channel region and is composed of a single semiconductor layer. Since the virtual structure model corresponding to each semiconductor layer is set, the virtual electronic state of the virtual structure model can be regarded as a bulk state, and the virtual electronic state can be calculated in a short time by numerical simulation. Moreover, the physical quantity of the quantized electronic state of the channel region is calculated by mixing the physical quantities of the virtual electronic state. By executing the numerical simulation using the physical property amount, the electric characteristics of the field effect transistor can be calculated with relatively high accuracy and in a short time.

It is a graph which shows an example of the dispersion | distribution relationship calculated by the pseudopotential method and the strong coupling approximation method. It is a functional block diagram which shows schematic structure of the simulation apparatus of 1st Embodiment which concerns on this invention. It is a flowchart which shows the operation | movement procedure of a simulation apparatus roughly. (A) is a diagram showing a cross-sectional structure of an FET, and (B) shows a distribution of potential V (z) and a distribution of electron existence probability | Ψ (z) | ² in the structure of (A). It is a figure shown roughly. It is a figure which shows roughly the confinement potential and distribution of the existence probability of an electron. It is a figure which shows roughly the confinement potential and distribution of the existence probability of an electron. It is a figure which shows roughly the cross-section of p-type MOSFET which has a Ge / Si heterostructure. It is a figure which shows the confinement potential and distribution of existence probability | Ψ (z) | ^{2 in} the base subband. It is a graph which shows the dispersion | distribution relationship calculated by various methods. It is a figure for demonstrating the wave number space used by a Monte Carlo simulation. It is a flowchart which shows roughly the process sequence of the simulation method which concerns on 2nd Embodiment. It is the graph which showed carrier density distribution n (z) of the confinement direction of the heterostructure which consists of three types of semiconductor layers.

  Embodiments according to the present invention will be described below with reference to the drawings. In all the drawings, the same components are denoted by the same reference numerals, and detailed description thereof is appropriately omitted so as not to overlap.

(First embodiment)
FIG. 2 is a functional block diagram showing a schematic configuration of the simulation apparatus 1 according to the first embodiment of the present invention. The simulation apparatus 1 has a function of modeling a field effect transistor (FET) having a heterostructure in which a plurality of types of semiconductor layers are stacked and calculating a quantized electronic state of a channel region in the heterostructure by numerical simulation.

  As shown in FIG. 2, the simulation apparatus 1 includes a processor (data processing unit) 2 such as a real computer or a virtual computer. The processor 2 includes a data input unit 10, a structural model setting unit 11, a quantization state calculation unit 12, and a state mixing unit 13. The user can control the operation of the processor 2 by operating the input operation unit 4 such as a keyboard or a pointing device while checking the operation screen displayed on the display 5.

  To the data input unit 10, element structure data of an FET to be numerically simulated is input from the outside. This FET is a MOSFET and has a heterostructure in which a plurality of types of semiconductor layers are stacked along a direction perpendicular to the MOS interface. This heterostructure includes a channel region through which the low-dimensional electron gas should flow.

  The data input unit 10 stores the input element structure data in the data storage unit 30 of the data storage device 3. The data storage device 3 may be composed of a recording medium such as a volatile memory or a non-volatile memory (for example, a semiconductor memory or a magnetic recording medium) and a circuit for writing and reading data on the recording medium. it can. The data storage unit 30 may be configured in advance on a predetermined storage area on the recording medium, or may be configured on an appropriate storage area allocated during the operation of the processor 2.

  A confinement potential for forming a channel region is formed in the heterostructure. The structural model setting unit 11 reads the device structure data from the data storage unit 30, and assumes that the heterostructure has a confinement potential and is composed of a single semiconductor layer among the multiple types of semiconductor layers. It has a function of setting a virtual structure model corresponding to each.

  The quantization state calculation unit 12 calculates each virtual quantized electronic state of the virtual structure model as a virtual electronic state. The state mixing unit 13 calculates the physical quantity of the quantized electronic state of the channel region by mixing the physical quantities of the plurality of virtual electronic states. The physical property amount is, for example, a physical property amount (mobility, diffusion coefficient, etc.) used to solve the carrier transport equation by numerical calculation.

  The carrier transport calculation unit 14 has a function of calculating the electrical characteristics of the FET by solving the carrier transport equation using the physical property amount calculated by the state mixing unit 13. Examples of carrier transport equations include, but are not limited to, Boltzmann transport equations using the Monte Carlo method.

  All or part of the functional blocks 10 to 14 of the simulation apparatus 1 in FIG. 2 may be realized by hardware such as a semiconductor integrated circuit, or a program recorded in a recording medium such as a nonvolatile memory or an optical disk Alternatively, it may be realized by a program code. Such a program or program code causes a computer system having a CPU to execute all or part of the processing of the functional blocks 10 to 14. The CPU includes a calculation unit that executes the processes of the functional blocks 10 to 14 and a main storage unit that stores the instructions for the process, and a series of processes while temporarily storing data used in the process in the storage device Execute.

The operation of the simulation apparatus 1 having the above configuration will be described below. FIG. 3 is a flowchart schematically showing an operation procedure of the simulation apparatus 1, FIG. 4A is a diagram showing a cross-sectional structure of the FET 100 to be simulated, and FIG. 4B is a diagram showing FIG. It is a figure which shows roughly distribution of potential V (z) in the structure of (A), and electron existence probability | Ψ (z) | ² . Here, z is a variable indicating the position of the FET 100 in the depth direction, and Ψ (z) is a wave function of the quantized electronic state.

  As shown in FIG. 4A, the FET 100 is a MOSFET and includes semiconductor layers 110A, 110B, and 120 that form a heterostructure. These semiconductor layers 110A, 110B, and 120 are heterojunctioned. The semiconductor layers 110A, 110B, and 120 are stacked along the depth direction (z-axis direction) perpendicular to the MOS interface. In the semiconductor layer 110A, a well-like confinement potential is formed as shown in FIG. 4B, and a channel region where a one-dimensional electron or two-dimensional electron low-dimensional electron gas should flow is formed. A gate electrode 140 is formed on the heterostructure via a gate insulating film, and a source electrode 130S and a drain electrode 130D are formed on both sides of the gate electrode 140, respectively.

  Referring to FIG. 3, in step S <b> 10, the structural model setting unit 11 reads data indicating the element structure of the heterostructure MOSFET to be simulated from the data storage unit 30. Next, the structure model setting unit 11 sets virtual structure models respectively corresponding to the different semiconductor layers 110A and 110B constituting the heterostructure (step S11). That is, the structure model setting unit 11 assumes that the heterostructure has a confinement potential and includes only one of the semiconductor layers 110A and 110B, and the virtual structure model corresponding to each of the semiconductor layers 110A and 110B. Set.

Next, the quantization state calculation unit 12 calculates the quantization electronic states of the virtual structure model as virtual electronic states Φ _A and Φ _B by numerical simulation (step S12). Here, the virtual electronic state [Phi _A, a virtual quantization electronic states on the assumption that consists of only the semiconductor layer 110A which has a potential heterostructure confinement, virtual electronic state [Phi _B is heterostructure confining potential And a virtual quantized electronic state when it is assumed that the semiconductor layer 110B alone is included. As a result, the wave functions Ψ _A (z) and Ψ _B (z) of the electrons in the virtual electronic states Φ _A and Φ _B are calculated. The virtual electronic states Φ _A and Φ _B may be calculated using, for example, a known high-speed calculation method such as a pseudo-potential method, and thus detailed description thereof is omitted.

  Here, the energy band structure in the bulk state of each of the semiconductor layers 110A and 110B can obtain an appropriate energy value such as the lowest energy in the conduction band or the highest energy in the valence band as an origin. It is assumed that the energy difference between the energy origins, that is, the band offset, is included in the confinement potential V (z).

Next, the state mixing unit 13 calculates the existence probabilities of the electrons in the virtual electronic states Φ _A and Φ _B based on the wave functions Ψ _A (z) and Ψ _B (z) (steps I _A and I _B). S13). Subsequently, the state mixing unit 13 calculates the existence probability I of electrons in the actual quantized electronic state based on these existence probabilities I _A and I _B (step S14).

More specifically, the existence probability calculation unit in the state mixing unit 13 in FIG. 2 determines the channel region based on the wave functions Ψ _A (z) and Ψ _B (z) of the virtual electronic states Φ _A and Φ _B. The existence probabilities I _A and I _B of the respective electrons in the virtual electronic states Φ _A and Φ _B are calculated (step S13).

  Here, the existence probability I of electrons for the confinement potential V (z) can be calculated according to the following equation (1). The region to be integrated is the region (z1 <z <z2) of the semiconductor layer 110A.

As shown in FIG. 5, the electron existence probability I in the channel region is an integral value in the region (z1 <z <z2) of the semiconductor layer 110A of the electron existence probability | Ψ (z) | ^{2 in} the quantized electronic state. is there. In FIG. 5, F ₀ represents a region of the semiconductor layer 120, F ₁ represents a region of the semiconductor layer 110A, and F ₂ represents a region of the semiconductor layer 110B.

  It is assumed that the wave function Ψ (z) is normalized so that the integral value in all regions is 1. Further, the region of the semiconductor layer 110A does not need to be a continuous region. For example, when there are divided regions such as a region of z3 <z <z4 and a region of z5 <z <z6, the respective regions The existence probability I may be the sum of the integral values at.

Here, the wave functions Ψ _A (z) and Ψ _B (z) of the virtual electronic states Φ _A and Φ _B have a distribution as shown in FIG. The present embodiment is characterized in that it is considered that the following relational expression (2) is approximately established simultaneously with the above expression (1).

Integral values of wave functions Ψ _A (z), Ψ _B (z) in the region (z1 <z <z2) of the semiconductor layer 110A regarded as a channel region (that is, the existence probability of electrons in the region I _A , I _B ) Are given by the following equations (3A) and (3B), respectively.

  Therefore, it can be seen from the above equation (2) that the following equation (4) holds.

  The existence probability calculation unit in the state mixing unit 13 in FIG. 2 calculates the existence probability I in the channel region based on the equation (4). Since the mixing ratio is determined by the existence probability of electrons (the square of the absolute value of the wave function), the mixing ratio changes for each quantum number (subband) of the quantized electronic state.

The state mixing unit 13 calculates the physical property amount X necessary for solving the carrier transport equation by mixing the physical property amounts in the virtual electronic state based on the mixing ratio obtained in step S14 (step S15). Specifically, when a certain physical quantity in the quantized electronic state is X, the physical quantity in the virtual electronic state Φ _A is X _A and the physical quantity in the virtual electronic state Φ _B is X _B , The transport calculation unit 14 calculates the physical property amount X by mixing the physical property amounts X _A and X _B according to the following equation. Here, the physical property amount X is a physical property amount of a low-dimensional carrier necessary for solving the carrier transport equation such as the energy band structure, the existence probability of electrons, the mobility, and the scattering parameter.

_{X = I × X A + (} 1-I) × X B

It should be noted that when the physical property quantities X, X _A , and X _B have distributions and are expressed as, for example, X (t), X _A (t), and X _B (t), X _A (t ), X _B (t) may be mixed to calculate X (t).

  As described above, the physical property amount in the quantized electronic state of the heterostructure can be obtained using a calculation method based on the physical property amount in the bulk state. The carrier transport calculation unit 14 calculates the electrical characteristics of the FET 100 by performing a numerical operation based on the carrier transport equation (step S16). For example, the carrier transport equation may be solved by a Monte Carlo method or a non-equilibrium Green function method using eigenmode expansion of a low-dimensional carrier as a method for calculating transport of the low-dimensional carrier. When performing the carrier transport calculation, the carrier transport calculation may be performed in a self-consistent manner using the Poisson equation.

  When the confinement potential V (z) changes during the self-consistent calculation, the process returns from step S16 to step S12, and the quantized electronic state of the heterostructure is recalculated using the changed confinement potential. .

  Next, the effect of the numerical simulation of this embodiment will be described.

  As shown in FIG. 7, a simulation was performed on a p-type MOSFET 200 having a Ge / Si heterostructure in which a Ge channel region 210A having a thickness of 3 nm was formed on a silicon substrate 210B. The p-type MOSFET 200 has a gate electrode 230, a source electrode 220S, and a drain electrode 220D that face the channel region 210A. The x-axis direction indicates the channel direction (source electrode-drain electrode direction) of the MOSFET 200, the y-axis direction indicates the width direction of the gate electrode 230, and the z-axis direction indicates a direction perpendicular to the MOS interface.

FIG. 8 shows the confinement potential V (z) in the Ge / Si heterostructure of FIG. 7 and the distribution of the existence probability | Ψ (z) | ^{2 in} the finally obtained base subband. The mixing ratio I of the quantized electronic state of the Ge layer in the ground state obtained from this existence probability | Ψ (z) | ² is 65.5%, and the quantized electronic state of the Si layer is 1−I = 34. .5%. However, in this calculation, the band offset between Si / Ge is ignored.

  FIG. 9 shows the valence band base subband of the quantum electronic state calculated by the strong coupling approximation method in consideration of the atomic arrangement in the Ge / Si heterostructure for the crystal orientation in the <100> and <110> directions. The calculation result of the dispersion relation (solid line), the calculation result when the confinement potential is fixed and the material in the confinement direction is assumed to be only Si (dashed line), and the material in the confinement direction is assumed to be only Ge It is a figure which shows the calculation result (dotted line) at the time of doing, and the result (white circle) which mixed the result of the broken line and the dotted line by the mixing rate I.

  As can be seen from FIG. 9, the result obtained by the method of the present embodiment and the result calculated in consideration of the material distribution of the heterostructure are the crystal orientations in the <100> and <110> directions. Even in this case, you can see that they are in good agreement.

  When the confinement potential V (z) and the structure of the heterostructure change in the carrier transport direction between the source and drain (x-axis direction in FIG. 7), the above processing is repeatedly executed at each point in the carrier transport direction. Each of the quantized electronic states in the heterostructure may be calculated (steps S12 to S15 in FIG. 3).

  By the way, in this simulation, the band structure as a physical property amount is mixed, but the physical property amount of other parameters such as a scattering parameter can also be mixed.

  Carrier transport calculation is executed using the physical quantity of the quantized electronic state in the heterostructure obtained as described above (step S16). At this time, a general low-dimensional carrier transport calculation method may be used.

  An example of a low-dimensional carrier transport calculation method is a Monte Carlo simulation that solves the Boltzmann transport equation by the Monte Carlo method. Hereinafter, this Monte Carlo simulation will be described.

In the case of a bulk MOSFET, the carrier confinement direction is only the z-axis direction of FIG. 7, and the quantized carrier is a two-dimensional carrier. In this case, the state of the carrier is mainly expressed by wave numbers k _x and k _y with respect to the x-axis direction and the y-axis direction in FIG. 7, and the quantization energy bands of k _x and k _y are shown in FIG. It is expressed in a two-dimensional wave number space. In FIG. 10, energy contour lines are shown, and a is a lattice constant.

Also, the real space information in the z direction of the two-dimensional carrier is represented by a quantum number jz of the quantized electronic state and a wave function Ψ _jz (z) for each quantum number. The Monte Carlo simulation for such two-dimensional carrier, first, as shown in FIG. 10, the coordinate _X = _X 1 in the real space set as a calculation area, X _2, X 3, ..., at all points of _{X M,} The quantized electronic state of the Ge layer and the quantized electronic state of the Si layer are mixed by the above-described method, and the quantized electronic state in the Ge / Si heterostructure is calculated.

  In FIG. 10, only the band structure at a certain quantum number among the quantized electronic states is displayed, but the quantized electronic state includes physical property information such as scattering parameters in addition to the band structure for each quantum number. Is also included.

In FIG. 10, M coordinate points X _{1 to} X _M are considered as the coordinates of X, but M can be set to any positive value depending on the element structure and calculation accuracy.

  Furthermore, when M is 2 or more, the calculation accuracy can be improved by further interpolating the quantized electronic state between coordinate points with respect to the x-axis direction. In this case, a standard method such as linear interpolation or spline interpolation can be used as the interpolation method. However, the number of coordinate points M needs to be equal to or greater than the number of coordinate points necessary for interpolation.

When solving the carrier transport equations, X, k _x, in 3-dimensional quantized electronic states space of k _y by driving low-dimensional carrier, low-dimensional carrier transport calculation is performed. Although carriers are transported also in the y-axis direction, the MOSFET 200 of FIG. 7 can be ignored because it is considered uniform and sufficiently wide in the y-axis direction.

Low-dimensional carriers are charged particles such as electrons and holes, to exercise on k _x -k _y wavenumber plane in response to an electric field F. The charge of the carrier and q, the Planck's constants is h, the coordinates change .DELTA.k on k _x -k _y plane between the free time tau becomes Δk = 2π × q × F × τ / h. However, here, it is assumed that there is no influence of the magnetic field.

Here, the electric field F is, when the energy band structure of the quantization electron state _{E (x, k x, k} y) _{and, -δE (x, k x,} k y) is / δx, E (x, k _x , k _y ) determined by partial differentiation with respect to x. In other words, the real space coordinates of the _carrier, the electric field by k x -k _y wavenumber plane coordinates F are different.

  In the Monte Carlo simulation, the free time τ is defined as τ = −ln (r1) / Γ using a uniform random number r1 between 0 and 1. Here, ln is a natural logarithm, and Γ is the sum of individual scattering probabilities of various types of scattering such as phonon scattering, impurity scattering, and interface roughness scattering, that is, the total scattering probability.

  In addition, when empirically well-known parameters such as phonon energy are used as various scattering parameters, the physical property quantities (physical property parameters) of the Ge layer and Si layer are also mixed as the quantized electronic state for these physical property parameters. And use it.

  Such mixing of physical property parameters can also be applied to the case where the band structure calculation of the quantized electronic state is performed by a method based on a real space basis such as a strong coupling approximation method.

The movement in the real space is performed according to the velocity vector v = (v _x , v _y ). v is v = (v _x , v _y ) = (2π / h) × (δE (x, k _x , k _y ) / δk _x , δE (x, k _x , k _y ) / δk _y ), What is necessary is just to calculate by partial differentiation in the wave number space of E (x, k _x , k _y ).

  However, since the quantized electronic state actually changes with respect to the x-axis direction, the carrier is transported while changing the quantized electronic state while moving the carrier at a velocity v in the carrier real space. Become.

  By performing the low-dimensional carrier transport calculation as described above for a large number of low-dimensional carriers, the current value can be calculated from the number of low-dimensional carriers finally reaching the drain from the source.

  Also, the carrier density distribution can be calculated from the low-dimensional carrier distribution, and a new potential distribution can be obtained by substituting the obtained carrier density distribution into the Poisson equation and solving it. Furthermore, if carrier transport calculation is performed using this new potential distribution, a self-consistent solution can be obtained. At this time, when the potential distribution is updated, the calculation accuracy can be improved by newly updating the mixing ratio of the quantized electronic states.

  Although the bulk Ge / Si heterostructure MOSFET 200 whose confinement quantization direction is only the z direction has been described above as an example, the simulation of the present embodiment is applied to a two-dimensional confinement type or three-dimensional confinement type heterostructure device. Even can be applied. Even when there is an influence of a magnetic field, it is possible to execute the simulation of the present embodiment by incorporating the influence of the magnetic field into the Schroedinger equation and the carrier transport calculation.

  As described above, the simulation apparatus 1 according to the first embodiment calculates the mixing ratio based on the existence probability of the electrons in the virtual electronic state, and mixes and quantizes the physical quantity of the virtual electronic state based on the mixing ratio. Since the physical property quantity in the electronic state is calculated, a numerical simulation using the physical property quantity can be executed at high speed and with high accuracy. For example, the simulation apparatus 1 can calculate the electrical characteristics of the field effect transistor in a short time by solving a carrier transport equation using the physical property amount as a parameter.

(Second Embodiment)
Next, a second embodiment according to the present invention will be described. The configuration of the simulation apparatus of the present embodiment is basically the same as the configuration of the simulation apparatus 1 (FIG. 2) of the first embodiment except for the processing content of the state mixing unit 13. FIG. 11 is a flowchart schematically showing a processing procedure of the simulation method according to the second embodiment.

  As shown in FIG. 11, steps S10 to S12 are executed as in FIG. The difference between the simulation method of the present embodiment and the simulation method of the first embodiment is that the mixing ratio used for mixing the physical property amounts in the virtual electronic state is calculated based on the carrier density distribution in step S15.

  After the virtual electronic state is calculated in step S12, the state mixing unit 13 sets the mixing ratio to an appropriate initial value (step S20). Thereafter, the state mixing unit 13 tentatively calculates the physical property amount X necessary to solve the carrier transport equation by mixing the physical property amounts in the virtual electronic state based on the mixing ratio set in step S14 ( Step S15).

  After that, the carrier transport calculation unit 14 executes a numerical operation based on the carrier transport equation to tentatively calculate the electrical characteristics of the FET 100 (step S16). Thereafter, the process returns to the state mixing unit 13, and the state mixing unit 13 calculates a mixing ratio based on the carrier density distribution obtained by the numerical calculation (step S21), and the mixing ratio calculated in step S21. It is determined whether or not has converged (step S22). When it is determined that the mixing ratio has not converged (NO in step S22), the procedures in steps S15 to S22 are repeatedly executed.

  When the mixing ratio used in step S15 is compared with the new mixing ratio obtained in step S21 and the difference between the two is sufficiently small and the mixing ratio has converged (YES in step S22), the carrier transport calculation unit 14 At that time, the calculation result is output and the calculation is terminated. When executing the procedure of step S13, an initial value may be calculated using an initial distribution of carrier density.

FIG. 12 is a graph showing the carrier density distribution n (z) in the confinement direction of a heterostructure composed of three types of semiconductor layers C, D, and E. During this _{graph, F C, F D, F} E respectively represent semiconductor layers C, D, a region of the E. Integral value N _C of the carrier density present in the region F _C, the integral value N _D of the carrier density present in the region F _D, depending on the integration value N _E of the density of carriers present in the region F _E, the respective semiconductor layers C , D, and E can determine the mixing ratio of the quantized electronic states.

Specifically, when the physical properties value having a quantized electron state and X, the properties of the virtual electronic state of the region F _C and X _C, the physical properties of the virtual electronic state area F _D and X _D if the physical properties of the virtual electronic state area F _E and X _E, can be calculated properties amount X according to the following mixing formula.

X = X _C × N _C / N + X _D × N _D / N + X _E × N _E / N

  Here, N is an integral value in the entire region of the carrier density distribution n (z).

  In this case, since the mixing ratio is determined by the carrier density distribution, the present invention can be applied to a MOSFET having a channel region having a heterostructure made of three or more kinds of substances.

  In the present embodiment, the heterostructure formed of three types of semiconductor layers has been described. However, any number of types of semiconductor layers may be used for the heterostructure, and naturally, a MOSFET having a heterostructure channel formed of two types of materials. It can also be applied to. In the method of the present embodiment, the same mixing ratio is used for any quantum number (subband) state of the quantized electronic state. Therefore, the mixing ratio can be calculated with a small amount of calculation, although slightly, compared with the case of the second embodiment.

  As described above, according to the second embodiment, a MOSFET having a heterostructure composed of two or more different kinds of semiconductor layers in consideration of a full band structure and a detailed quantized electronic state in consideration of confined quantization. It is possible to accurately and quickly calculate the electrical characteristics of

  As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

DESCRIPTION OF SYMBOLS 1 Simulation apparatus 2 Processor (data processing part)
DESCRIPTION OF SYMBOLS 3 Data storage device 4 Input operation part 5 Display 10 Data input part 11 Structural model setting part 12 Quantization state calculation part 13 State mixing part 14 Carrier transport calculation part 30 Data storage part 100 FET
110A, 110B, 120 Semiconductor layer 130S Source electrode 130D Drain electrode 140 Gate electrode 200 MOSFET
210A Channel region 210B Silicon substrate 220S Source electrode 220D Drain electrode 230 Gate electrode

Claims (13)

A simulation apparatus for modeling a field effect transistor having a heterostructure in which a plurality of types of semiconductor layers are stacked and performing a numerical simulation of a quantized electronic state of a channel region in the heterostructure,
Assuming that the heterostructure has a confinement potential for forming the channel region and is composed of any one of the semiconductor layers, a virtual structure corresponding to each of the semiconductor layers. A structural model setting unit for setting a model;
A quantized state calculation unit for calculating a virtual quantized electronic state of each of the virtual structure models as a virtual electronic state;
A state mixing unit that mixes the physical quantities of the virtual electronic state to calculate the physical quantities of the quantized electronic state of the channel region; and
A simulation apparatus comprising:   2. The simulation apparatus according to claim 1, wherein the physical property amount of the quantized electronic state of the channel region is a physical property amount used for solving a carrier transport equation by a numerical operation. The simulation apparatus according to claim 1 or 2,
The heterostructure is
A first semiconductor layer in which the confinement potential is distributed;
A second semiconductor layer heterojunction with the first semiconductor layer;
Including
The state mixing unit includes:
Based on the wave function of the virtual electronic state of each of the first and second semiconductor layers, calculate the probability of existence of each electron of the virtual electronic state in the channel region, and based on the calculated presence probability, An existence probability calculating unit for calculating the existence probability of electrons in the quantized electronic state of the channel region;
Including
The existence probability of electrons in the quantized electronic state of the channel region is I, the existence probability of electrons in the virtual electronic state of the first semiconductor layer is I _A, and the virtual electronic state of the second semiconductor layer When the existence probability of the electron of I is defined as I _B , the existence probability calculation unit has the following formula: I = I × I _A + (1−I) × I _B = I _B / (1−I _A + I _B ) And calculating the existence probability I based on
The said state mixing part is a simulation apparatus which mixes the physical quantity of the said virtual electronic state using the said existence probability I as a mixing ratio. 4. The simulation apparatus according to claim 3, wherein the physical property amount of the first semiconductor layer in the virtual electronic state is X _A, and the physical property amount of the second semiconductor layer in the virtual electronic state is X _B. And when the physical property amount of the channel region in the quantized electronic state is X,
The state mixing unit calculates the physical properties X of the quantized electronic states on the basis of the equation _{X = I × X A + (} 1-I) × X B, a simulation device. 3. The simulation apparatus according to claim 1, wherein the carrier transport calculation unit calculates the electrical characteristics of the field effect transistor by solving a carrier transport equation using the physical property amount calculated by the state mixing unit. Further comprising
The state mixing unit calculates a provisional physical quantity by mixing physical quantities of the virtual electronic states,
The carrier transport calculation unit obtains a carrier density distribution by solving the carrier transport equation by numerical calculation using the provisional physical property amount calculated by the state mixing unit,
The said state mixing part is a simulation apparatus which mixes the physical quantity of the said quantization electronic state based on the said carrier density distribution.   5. The simulation device according to claim 1, wherein the electric field effect transistor is electrically connected by solving the carrier transport equation using the physical property amount calculated by the state mixing unit. A simulation apparatus further comprising a carrier transport calculation unit for calculating characteristics.   The simulation apparatus according to claim 1, wherein the quantization state calculation unit calculates the virtual electronic state in a one-dimensional electronic system or a two-dimensional electronic system. . A simulation method for modeling a field effect transistor having a heterostructure in which a plurality of types of semiconductor layers are stacked and performing a numerical simulation of a quantized electronic state of a channel region in the heterostructure,
(A) Corresponding to each of the plurality of types of semiconductor layers, assuming that the heterostructure has a confinement potential for forming the channel region and is composed of any one of the plurality of types of semiconductor layers. Setting a virtual structure model to be
(B) calculating a virtual quantized electronic state of each of the virtual structure models as a virtual electronic state;
(C) mixing physical quantities of the virtual electronic state to calculate physical quantities of the quantized electronic state of the channel region;
A simulation method comprising: The simulation method according to claim 8, comprising:
The heterostructure is
A first semiconductor layer in which the confinement potential is distributed;
A second semiconductor layer heterojunction with the first semiconductor layer;
Including
The step (c)
Based on the wave function of the virtual electronic state of each of the first and second semiconductor layers, calculate the probability of existence of each electron of the virtual electronic state in the channel region, and based on the calculated presence probability, Calculating the existence probability of electrons in the quantized electronic state of the channel region;
Including
The existence probability of electrons in the quantized electronic state of the channel region is I, the existence probability of electrons in the virtual electronic state of the first semiconductor layer is I _A, and the virtual electronic state of the second semiconductor layer when the electron existence probability of the _{I B, I = I × I} a + (1-I) × I B = I B / (1-I a + I B), the probability the presence based on the formula of I Is calculated,
In the step (c), the physical property amount of the virtual electronic state is mixed using the existence probability I as a mixing ratio. A simulation method according to claim 9, the physical properties of in the virtual electronic state of the first semiconductor layer and X _A, the physical properties of in the virtual electronic state of the second semiconductor layer X _B And when the physical property amount of the channel region in the quantized electronic state is X,
In the step (c), the physical property quantity X of the quantized electronic state is calculated based on an equation: X = I × X _A + (1−I) × X _B. The simulation method according to claim 8, comprising:
The step (c) includes a step of calculating a provisional physical property amount by mixing physical property amounts of the virtual electronic states, and obtaining a carrier density distribution by solving a carrier transport equation by numerical calculation using the temporary physical property amount. Including
In the step (c), the physical property amount of the virtual electronic state is mixed based on the carrier density distribution. The simulation method according to any one of claims 8 to 11,
(D) calculating electric characteristics of the field effect transistor by solving a carrier transport equation using the physical property amount calculated by the state mixing unit;
A simulation method further comprising: A computer-readable recording medium for recording a program for modeling a field effect transistor having a heterostructure in which a plurality of types of semiconductor layers are stacked and causing a computer to perform a numerical simulation of a quantized electronic state of a channel region in the heterostructure There,
The numerical simulation is
(A) Corresponding to each of the plurality of types of semiconductor layers, assuming that the heterostructure has a confinement potential for forming the channel region and is composed of any one of the plurality of types of semiconductor layers. A structural model setting process for setting a virtual structural model to be performed;
(B) a quantized state calculation process for calculating a virtual quantized electronic state of each of the virtual structure models as a virtual electronic state;
(C) a state mixing process for calculating the physical quantity of the quantized electronic state of the channel region by mixing the physical quantities of the virtual electronic state;
Including a recording medium.

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