JP2010147154A - Semiconductor light-emitting element and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element and method of manufacturing the same capable of increasing the heat dissipation property and the die bonding strength and improving the die bonding reliability and yield. <P>SOLUTION: A semiconductor light-emitting element and a method of manufacturing the same are provided. The semiconductor light-emitting element includes: a semiconductor substrate 2; a first conductivity type clad layer 32 arranged on the semiconductor substrate 2; an active layer 33 arranged on the first conductivity type clad layer 32; a second conductivity type clad layer 34 arranged on the active layer 33; a vapor deposition layer 35 arranged on the second conductivity type clad layer 34; and a plating electrode layer 36 arranged on the vapor deposition layer 35. Both ends of the plating electrode layer 36 are thinner than the central part of the plating electrode layer 36. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor light emitting device and a manufacturing method thereof, and more particularly to a semiconductor light emitting device having improved heat dissipation and die bonding strength and a manufacturing method thereof.

  In a conventional semiconductor laser diode (LD), a gold (Au) plating layer is formed on the surface of the LD element in order to ensure heat dissipation and die bonding strength. That is, as shown in FIG. 17, an Au plating electrode layer 36 is formed on the semiconductor laser diode portion 50 via an Au vapor deposition layer 35. As shown in FIG. 17, such an LD element is die-bonded to the submount portion 54 via, for example, an Au—Sn layer 52.

  However, in the conventional LD element, as shown in FIG. 17, the end portion of the plated electrode layer 36 is thicker than the central portion. For this reason, as shown in FIG. 18, the cavity 56 is easily formed after die bonding. When such a cavity 56 is generated, there is a problem that heat dissipation and die bonding strength in the LD element cannot be obtained after die bonding.

In order to avoid crystal breakdown due to stress of the electrode film, a semiconductor optical device having a step shape or a taper shape at the end of the electrode film has already been disclosed (for example, see Patent Document 1).
JP 2008-244414 A

  An object of the present invention is to provide a semiconductor light emitting device having increased heat dissipation and die bonding strength, improved die bonding reliability and yield, and a method for manufacturing the same.

  According to one aspect of the present invention for achieving the above object, a semiconductor substrate, a first conductivity type cladding layer disposed on the semiconductor substrate, and an active layer disposed on the first conductivity type cladding layer A second conductivity type cladding layer disposed on the active layer, a vapor deposition layer disposed on the second conductivity type cladding layer, and a plating electrode layer disposed on the vapor deposition layer, Semiconductor light emitting elements that are thinner at both ends of the plated electrode layer than at the center of the plated electrode layer are provided.

  According to another aspect of the present invention, a semiconductor substrate, a first first conductivity type cladding layer disposed on the semiconductor substrate, and a first disposed on the first first conductivity type cladding layer. An active layer; a first second conductivity type cladding layer disposed on the first active layer; a first deposition layer disposed on the first second conductivity type cladding layer; and the first deposition. A first plating electrode layer disposed on the layer; a second first conductivity type cladding layer disposed on the semiconductor substrate; and a second active disposed on the second first conductivity type cladding layer. A second conductive-type cladding layer disposed on the second active layer, a second vapor-deposited layer disposed on the second second-conductivity-type clad layer, and the second vapor-deposited layer A second plating electrode layer disposed on the upper end of the first plating electrode layer. Both end portions of the thin and the second plating electrode layer than in a thin semiconductor light-emitting device than the central portion of the second plating electrode layer.

  According to another aspect of the present invention, a semiconductor substrate, a plurality of first conductivity type cladding layers disposed on the semiconductor substrate and separated from each other, and the plurality of first conductivity type cladding layers separated from each other. A plurality of active layers separated from each other, a plurality of second conductivity type cladding layers respectively disposed on the plurality of active layers and separated from each other, and a plurality of second conductivity type cladding layers A plurality of vapor deposition layers separated from each other, and a plurality of plating electrode layers disposed on the plurality of vapor deposition layers and separated from each other, and an end portion of the plurality of plating electrode layers includes the plurality of the plurality of plating electrode layers. A semiconductor light emitting device that is thinner than the central portion of the plated electrode layer is provided.

  According to another aspect of the present invention, a step of forming a first conductivity type cladding layer on a semiconductor substrate, a step of forming an active layer on the first conductivity type cladding layer, and a second step on the active layer. Forming a conductive clad layer, etching the second conductive clad layer, the active layer, and the first conductive clad layer; and over the semiconductor substrate and the second conductive clad layer. A step of forming a vapor deposition layer, a step of forming a plating electrode layer on the vapor deposition layer on the second conductivity type cladding layer, and thinning both ends of the plating electrode layer by etching, and the vapor deposition layer A method for manufacturing a semiconductor light emitting device is provided.

ADVANTAGE OF THE INVENTION According to this invention, the heat dissipation and die-bonding intensity | strength can be increased, and the semiconductor light-emitting device and its manufacturing method which improved the reliability and yield of die-bonding can be provided.

  Next, embodiments of the present invention will be described with reference to the drawings. In the following, the same reference numerals are assigned to the same blocks or elements to avoid duplication of explanation and simplify the explanation. It should be noted that the drawings are schematic and different from the actual ones. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  The following embodiments exemplify apparatuses and methods for embodying the technical idea of the present invention. In the embodiments of the present invention, the arrangement of each component is as follows. Not specific. Various modifications can be made to the embodiment of the present invention within the scope of the claims.

[First embodiment]
(Element structure)
As shown in FIG. 1, the semiconductor light emitting device according to the first embodiment of the present invention includes a semiconductor substrate 2, a first conductivity type cladding layer 32 disposed on the semiconductor substrate 2, and a first conductivity type cladding. An active layer 33 disposed on the layer 32, a second conductivity type cladding layer 34 disposed on the active layer 33, a vapor deposition layer 35 disposed on the second conductivity type clad layer 34, and the vapor deposition layer 35 And a plating electrode layer 36 disposed on the surface.

  As shown in FIG. 1, both end portions of the plated electrode layer 36 are thinner than the central portion of the plated electrode layer 36.

  The semiconductor light emitting elements according to the first embodiment are separated from each other by an element separation unit 90, as shown in FIG.

  In addition, a first conductivity type cladding layer 30 and an etching stop layer 31 disposed on the first conductivity type cladding layer 30 are provided between the semiconductor substrate 2 and the first conductivity type cladding layer 32. That is, the etching stop layer 31 is formed in the first conductivity type cladding layers 30 and 32.

  As the semiconductor substrate 2, the first conductivity type cladding layers 30 and 32, the active layer 33, and the second conductivity type cladding layer 34, for example, an AlGaAs compound semiconductor for emitting 780 nm wavelength light, which is infrared light, or red light is used. An InGaAlP-based compound semiconductor for light emission at a wavelength of 650 nm is applicable.

  As the semiconductor substrate 2 for laminating these semiconductor materials, a GaAs substrate is generally used, but other semiconductors are also applicable.

  Also, the conductivity type of the semiconductor substrate 2 is either n-type or p-type desired for the substrate side in relation to the set in which the LD is incorporated. The conductivity type of the semiconductor layer is also determined. In the following specific example, the semiconductor substrate 2 will be described as an n-type example.

  As shown in FIG. 1, the semiconductor light emitting device according to the first embodiment is arranged on a semiconductor substrate 2, an n-type cladding layer 30 disposed on the semiconductor substrate 2, and an n-type cladding layer 30. Etching stop layer 31, n-type cladding layer 32 disposed on etching stop layer 31, active layer 33 disposed on n-type cladding layer 32, and p-type cladding layer 34 disposed on active layer 33 A vapor deposition layer 35 disposed on the p-type cladding layer 34, and a plating electrode layer 36 disposed on the vapor deposition layer 35.

  An n-side electrode 14 is formed on the back surface of the semiconductor substrate 2. Further, the p-side electrode 15 is formed by the vapor deposition layer 35 and the plating electrode layer 36.

The n-type cladding layers 30 and 32 are made of, for example, Al _x1 Ga _1-x1 As (0.3 ≦ x1 ≦ 0.7, for example, x1 = 0.5). The n-type cladding layers 30 and 32 are doped with, for example, about 2 × 10 ¹⁸ cm ^{−3 of} Si.

The etching stop layer 31 is made of n-type or non-doped, for example, In _0.49 Ga _0.51 P, and is formed to have a thickness of about 0.01 μm to 0.05 μm, for example.

  The total thickness of the n-type cladding layer 30, the etching stop layer 31, and the n-type cladding layer 32 is, for example, about 2 μm to 4 μm.

The active layer 33 has a bulk structure of Al _y1 Ga _{1 -y1} As (0.05 ≦ y1 ≦ 0.2, for example, y1 = 0.15) or Al _y2 Ga _{1 -y2} As (0.01 ≦ y2 ≦ 0). .1, for example, y2 = 0.05) and a barrier layer made of Al _y3 Ga _1-y3 As (0.2 ≦ y3 ≦ 0.5, y2 <y3, for example, y3 = 0.3) Single Quantum Well (SQW)
Alternatively, a multi quantum well (MQW) structure as a whole is formed, for example, to about 0.01 μm to 0.2 μm.

The p-type cladding layer 34 is made of, for example, Al _x2 Ga _1-x2 As (0.3 ≦ x2 ≦ 0.7, for example, x2 = 0.5), and is formed to have a thickness of about 0.5 μm to 4 μm, for example. The In the p-type cladding layer 34, a p-type or non-doped, eg, In _0.49 Ga _0.51 P etch stop layer may be formed to a thickness of about 0.01 μm to 0.05 μm, for example.

  A structure in which a light guide layer is provided between the active layer 33 and the n-type cladding layer 32, and between the active layer 33 and the p-type cladding layer 34, and a beam expansion between the active layer 33 and the n-type cladding layer 32. Other semiconductor layers such as a structure in which layers are provided may be interposed between any of the layers.

In the above-described example, the example is an AlGaAs-based compound semiconductor. However, in the case of an InGaAlP-based compound, for example, In _0.49 (Ga _{1 -u} Al _u ) _0.51 P (0.45 ≦ u ≦ 0.8). For example, the n-type cladding layer 32 and the p-type cladding layer 34 can be formed by u = 0.7) layers, and In _0.49 (Ga _{1 -v 1} Al _{v 1} ) _0.51 P (0 ≦ v 1 ≦ 0.25). For example, the active layer may have an SQW structure or an MQW structure based on v1 = 0) / In _0.49 (Ga _{1 -v2} Al _v2 ) _0.51 P (0.3 ≦ v2 ≦ 0.7, for example, v2 = 0.4). 33 can be formed.

The etching stop layer 31 is not limited to In _0.49 Ga _0.51 P. For example, In _0.49 (Ga _0.8 Al _0.2 ) _0.51 P can be used.

(Production method)
A schematic cross-sectional structure for explaining one step of the method for manufacturing the semiconductor light emitting device according to the first embodiment is expressed as shown in FIGS. With reference to FIGS. 2-6, the manufacturing method of the semiconductor light-emitting device which concerns on 1st Embodiment is demonstrated.

  As shown in FIGS. 2 to 6, the method for manufacturing a semiconductor light emitting device according to the first embodiment includes a step of forming an n-type cladding layer 30 on a semiconductor substrate and an etching stop on the n-type cladding layer 30. A step of forming a layer 31, a step of forming an n-type cladding layer 32 on the etching stop layer 31, a step of forming an active layer 33 on the n-type cladding layer 32, and a p-type cladding layer on the active layer 33. A step of forming 34, a step of etching the p-type cladding layer 34, the active layer 33 and the n-type cladding layer 32, a step of forming a vapor deposition layer 35 on the entire surface of the semiconductor substrate 2 and the p-type cladding layer 34, There are a step of forming a plating electrode layer 36 on the vapor deposition layer 35 on the p-type cladding layer 34, a step of thinning both ends of the plating electrode layer 36 by etching, and a step of removing the vapor deposition layer 35. That.

(A) Specifically, as shown in FIG. 2, the n-type semiconductor substrate 2 is placed in, for example, a metal organic chemical vapor deposition (MOCVD) apparatus, and the reaction gas triethylgallium (TEG) is used. ), Trimethylaluminum (TMA), trimethylindium (TMI), phosphine (PH ₃ ), arsine (AsH ₃ ) and Si or Se-containing gas as the n-type dopant gas and p-type dopant depending on the conductivity type of the semiconductor layer Dimethyl zinc (DMZn) or Be-containing gas is introduced together with hydrogen (H ₂ ) as a carrier gas, and each semiconductor layer (30, 31, 32, 33, 34) is epitaxially grown at about 500 ° C. to 700 ° C.

(B) Next, as shown in FIG. 2, the p-type cladding layer 34, the active layer 33 and the n-type cladding layer 32 are etched by photolithography and a mask patterning step to form a ridge portion. For example, a mask made of SiO ₂ or SiN _x is formed by CVD or the like, and the etching stop layer 31 is exposed by exposing the p-type cladding layer 34, the active layer 33 and the n-type cladding layer 32 by dry etching, for example. By selectively etching until this occurs, the ridge portion is formed in a stripe shape as shown in FIG.

(C) Next, as shown in FIG. 2, a vapor deposition layer 35 is formed on the entire surface of the etching stop layer 31 and the p-type cladding layer 34 on the semiconductor substrate 2. As the vapor deposition layer 35, an Au layer, a Ti / Au layer, or the like can be applied. The thickness of the vapor deposition layer 35 is, for example, about 0.5 μm in the case of an Au layer.

(D) Next, as shown in FIG. 2, the resist layer 40 is patterned by, for example, photolithography and a mask patterning process, and the resist layer 40 is used as a mask on the vapor deposition layer 35 on the p-type cladding layer 34. A plating electrode layer 36 is formed by electroplating. The plating electrode layer 36 is formed in a layer structure as schematically shown by a broken line in FIG. Moreover, the plating electrode layer 36 formed in such a layer structure tends to be easily formed thick in the vicinity of the portion in contact with the resist layer 40. This is because a weak current flows on the surface of the resist layer 40 in contact with the plating electrode layer 36 during the electroplating process, and the growth of the plating electrode layer 36 is also promoted.

(E) Next, as shown in FIG. 3, the resist layer 40 is removed. As is apparent from the SEM photograph examples of the left end portion and the right end portion of the ridge structure shown in FIGS. 7 and 8, the thickness of both end portions of the plated electrode layer 36 is thicker than the thickness of the central portion. The thickness of the plating electrode layer 36 at the center is, for example, about 2.5 μm. The difference between the thickness of both ends of the plated electrode layer 36 and the thickness of the central portion is, for example, about 0.3 μm to 1.0 μm.

(F) Next, as shown in FIG. 4, a resist layer 38 is patterned by photolithography and a mask patterning process.

(G) Next, as shown in FIG. 5, for example, the plating electrode layer 36 is formed by wet etching.
The both end portions and the vapor deposition layer 35 are removed. As an etchant used for wet etching, aqua regia, iodine aqueous solution, or the like can be applied. Since the plating electrode layer 36 has a lower density of metal atoms than the vapor deposition layer 35 and is easily etched by the same wet etching process, the thickness of the plating electrode layer 36 is equal to the thickness of the vapor deposition layer 35. For example, it is necessary to form about 5 times.

(H) Next, as shown in FIG. 6, by removing the resist layer 38, it is possible to obtain a plated electrode layer 36 in which both ends are thinned.

(I) Next, as shown in FIG. 1, after the semiconductor substrate 2 is thinned by polishing, an n-side electrode 14 made of Au / Ge / Ni or Ti / Au is formed on the back surface of the semiconductor substrate 2. To do.

  An arrangement configuration of the semiconductor light emitting device according to the first embodiment on the semiconductor wafer 110 of the LD bar 100 is expressed as shown in FIG. Further, an example of a planar pattern configuration of the LD bar 100 of the semiconductor light emitting device according to the first embodiment is expressed as shown in FIG. 10A, and an enlarged view of FIG. It is expressed as shown in b).

(J) Next, as shown in FIG. 9 to FIG. 10, by making a scribe in the Y direction perpendicular to the extending direction X of the laser resonator 80 and performing a break, the stable cleaved surfaces 100 a and 100 b can be easily formed. Then, the LD bar 100 is formed. That is, a stable resonator mirror can be created. An example of an enlarged schematic cross-sectional structure of the laser resonator 80 of one semiconductor light emitting element in the LD bar 100 in which the cleavage plane is formed as described above corresponds to FIG.

  A laser resonator 80 having a p-side electrode 36 extends in the X direction, and a plurality of laser resonators 80 are arranged in parallel in the Y direction to form one LD bar 100. The width W1 of the LD bar 100 corresponds to the length of the laser resonator 80, and is about several tens of micrometers to several hundreds of micrometers, for example. On the other hand, the length W2 of the LD bar 100 is about several hundred μm to several tens of mm. The chip width of one LD element is about 250 μm, and the interval between adjacent LD elements on the LD bar 100 is about 10 μm to 100 μm, preferably about 14 μm to 30 μm.

  The mount structure of the semiconductor light emitting device according to the first embodiment is expressed as shown in FIG. In other words, an Au plated electrode layer 36 is formed on the semiconductor laser diode portion 50 through the Au vapor-deposited layer 35 with both ends thinned. As shown in FIG. 11, such an LD element is die-bonded to the submount portion 54 via, for example, an Au—Sn layer 52.

  In the semiconductor light emitting device according to the first embodiment, in order to ensure heat dissipation and die bonding strength, the gap between the die bonding is eliminated by applying the plated electrode layer 36 whose both end portions are thinner than the central portion. . For this reason, it is excellent in wettability, the peel strength is enhanced, and the adhesion is improved. For this reason, heat dissipation becomes good, and as a result, the operating temperature of the active layer 33 decreases and the operating current decreases, so that the life of the LD element tends to be extended.

  According to the first embodiment, when the LD element is die-bonded to the stem or the submount, by removing the end portion of the plated electrode layer that hinders die bonding, stable die bonding can be performed, and heat dissipation can be performed. Therefore, it is possible to provide a semiconductor light emitting device and a method for manufacturing the same which can improve the die bonding reliability and the yield.

[Second Embodiment]
(Element structure)
As shown in FIG. 12, the semiconductor light emitting device according to the second embodiment of the present invention includes a semiconductor substrate 2, a first first conductivity type cladding layer 32 disposed on the semiconductor substrate 2, and a first A first active layer 33 disposed on the first conductivity type cladding layer 32, a first second conductivity type cladding layer 34 disposed on the first active layer 33, and a first second conductivity type cladding. The first vapor deposition layer 35 a disposed on the layer 34, the first plating electrode layer 36 a disposed on the first vapor deposition layer 35 a, and the second first conductivity type cladding layer 42 disposed on the semiconductor substrate 2. A second active layer 43 disposed on the second first conductivity type cladding layer 42, a second second conductivity type cladding layer 44 disposed on the second active layer 43, and a second second layer. A second vapor deposition layer 35b disposed on the two-conductivity-type cladding layer 44 and a second vapor deposition layer 35b. It includes a second plating electrode layer 36b.

  Both end portions of the first plating electrode layer 36a are thinner than the center portion, and both end portions of the second plating electrode layer 36b are also thinner than the center portion.

  As shown in FIG. 12, the semiconductor light emitting devices according to the second embodiment are separated from each other by an element separation unit 90.

  In addition, a first conductivity type cladding layer 30 and an etching stop layer 31 disposed on the first conductivity type cladding layer 30 are provided between the semiconductor substrate 2 and the first first conductivity type cladding layer 32. That is, the etching stop layer 31 is formed in the first conductivity type cladding layers 30 and 32.

  Further, a first conductivity type cladding layer 30 and an etching stop layer 31 disposed on the first conductivity type cladding layer 30 are provided between the semiconductor substrate 2 and the second first conductivity type cladding layer 42. That is, the etching stop layer 31 is formed in the first conductivity type cladding layers 30 and 42.

  The semiconductor light emitting device according to the second embodiment can generate two-wavelength laser light.

  As the first first conductivity type cladding layer 32, the first active layer 33, and the first second conductivity type cladding layer 34, for example, an AlGaAs compound semiconductor for emitting 780 nm wavelength light, which is infrared light, can be applied. Yes, as the second first conductivity type cladding layer 42, the second active layer 43, and the second second conductivity type cladding layer 44, for example, an InGaAlP compound semiconductor for emitting 650 nm wavelength light which is red light is applicable. It is.

  As the semiconductor substrate 2 for laminating these semiconductor materials, a GaAs substrate is generally used, but other semiconductors are also applicable.

  Also, the conductivity type of the semiconductor substrate 2 is either n-type or p-type desired for the substrate side in relation to the set in which the LD is incorporated. The conductivity type of the semiconductor layer is also determined. In the following specific example, the semiconductor substrate 2 will be described as an n-type example.

  As shown in FIG. 12, the semiconductor light emitting device according to the second embodiment is disposed on the semiconductor substrate 2, the n-type cladding layer 30 disposed on the semiconductor substrate 2, and the n-type cladding layer 30. Etching stop layer 31, n-type cladding layer 32 disposed on etching stop layer 31, active layer 33 disposed on n-type cladding layer 32, and p-type cladding layer 34 disposed on active layer 33 A deposition layer 35a disposed on the p-type cladding layer 34, a plating electrode layer 36a disposed on the deposition layer 35a, an n-type cladding layer 42 disposed on the etching stop layer 31, and an n-type cladding. An active layer 43 disposed on the layer 42, a p-type cladding layer 44 disposed on the active layer 43, a vapor deposition layer 35b disposed on the p-type clad layer 44, and a vapor deposition layer 35b. Electroplating And a layer 36b.

  An n-side electrode 14 is formed on the back surface of the semiconductor substrate 2. Further, the p-side electrode 15 is formed by the vapor deposition layer 35a and the plating electrode layer 36a. Similarly, the p-side electrode 15 is also formed by the vapor deposition layer 35b and the plating electrode layer 36b.

The n-type cladding layers 30 and 32 are made of, for example, Al _x1 Ga _1-x1 As (0.3 ≦ x1 ≦ 0.7, for example, x1 = 0.5). The n-type cladding layers 30 and 32 are doped with, for example, about 2 × 10 ¹⁸ cm ^{−3 of} Si.

The etching stop layer 31 is made of n-type or non-doped, for example, In _0.49 Ga _0.51 P, and is formed to have a thickness of about 0.01 μm to 0.05 μm, for example.

  The total thickness of the n-type cladding layer 30, the etching stop layer 31, and the n-type cladding layer 32 is, for example, about 2 μm to 4 μm.

The active layer 33 has a bulk structure of Al _y1 Ga _{1 -y1} As (0.05 ≦ y1 ≦ 0.2, for example, y1 = 0.15) or Al _y2 Ga _{1 -y2} As (0.01 ≦ y2 ≦ 0). .1, for example, y2 = 0.05) and a barrier layer made of Al _y3 Ga _1-y3 As (0.2 ≦ y3 ≦ 0.5, y2 <y3, for example, y3 = 0.3) Single Quantum Well (SQW)
Alternatively, a multi quantum well (MQW) structure as a whole is formed, for example, to about 0.01 μm to 0.2 μm.

The p-type cladding layer 34 is made of, for example, Al _x2 Ga _1-x2 As (0.3 ≦ x2 ≦ 0.7, for example, x2 = 0.5), and is formed to have a thickness of about 0.5 μm to 4 μm, for example. The In the p-type cladding layer 34, a p-type or non-doped, eg, In _0.49 Ga _0.51 P etch stop layer may be formed to a thickness of about 0.01 μm to 0.05 μm, for example.

  A structure in which a light guide layer is provided between the active layer 33 and the n-type cladding layer 32, and between the active layer 33 and the p-type cladding layer 34, and a beam expansion between the active layer 33 and the n-type cladding layer 32. Other semiconductor layers such as a structure in which layers are provided may be interposed between any of the layers.

Further, for example, the n-type cladding layer 42 and the p-type cladding layer 44 are formed of In _0.49 (Ga _{1 -u} Al _u ) _0.51 P (0.45 ≦ u ≦ 0.8, for example, u = 0.7) layer. can be _{formed, In 0.49 (Ga 1-v1} Al v1) 0.51 P (0 ≦ v1 ≦ 0.25, for _{example, v1 = 0) / In 0.49} (Ga 1-v2 Al v2) 0.51 P (0.3 The active layer 43 is formed by an SQW structure or MQW structure according to ≦ v2 ≦ 0.7 (for example, v2 = 0.4).

The etching stop layer 31 is not limited to In _0.49 Ga _0.51 P. For example, In _0.49 (Ga _0.8 Al _0.2 ) _0.51 P can be used.

  When an AlGaAs-based compound semiconductor is applied as the n-type cladding layer 32, the active layer 33, and the p-type cladding layer 34, and an InGaAlP-based compound semiconductor is applied as the n-type cladding layer 42, the active layer 43, and the p-type cladding layer 44, The etching stop layer 31 made of InGaP has a larger band gap than the active layer 33 made of AlGaAs for infrared rays, and therefore the absorption and loss of infrared light by the etching stop layer 31 is small. On the other hand, since the n-type cladding layer 30 formed of AlGaAs has a larger band gap than the active layer 43 of red InGaAlP, red light is absorbed and lost by the n-type cladding layer 30 less.

  The semiconductor light emitting device according to the second embodiment can obtain two-wavelength laser light with high luminance.

  A planar pattern configuration example of the LD bar 100 of the semiconductor light emitting device according to the second embodiment is expressed as shown in FIG. 13A, and an enlarged view of FIG. 13A is shown in FIG. Represented as shown.

  Adjacent to each other, semiconductor light-emitting elements that generate two-wavelength laser light shown in FIG. 12 are formed.

  Also in the second embodiment, the manufacturing process is the same as that of the first embodiment except that an infrared AlGaAs compound semiconductor layer structure and a red InGaAlP semiconductor layer structure are separately formed.

  The process of forming the plated electrode layers 36a and 36b whose both end portions are thin is the same as that of the first embodiment.

  The mounting structure of the semiconductor light emitting device according to the second embodiment is also the same as that of the first embodiment.

  In the semiconductor light emitting device according to the second embodiment, in order to ensure heat dissipation and die bonding strength, the plating electrode layers 36a and 36b are applied at the opposite ends to be thinner than the central portion, thereby providing a gap between die bonding. Disappears. For this reason, it is excellent in wettability, the peel strength is enhanced, and the adhesion is improved. For this reason, the heat dissipation becomes good, and as a result, the operating temperature of the active layers 33 and 43 decreases and the operating current decreases, so that the life of the LD element tends to be extended.

  According to the second embodiment, when the LD element is die-bonded to the stem or the submount, by removing the end portion of the plated electrode layer that hinders die bonding, stable die bonding can be performed, and heat dissipation can be performed. It is possible to provide a two-wavelength semiconductor light emitting device and a method of manufacturing the same, which can improve the die bonding strength and the die bonding reliability and yield.

[Third embodiment]
(Element structure)
As shown in FIG. 14, the semiconductor light emitting device according to the third embodiment of the present invention includes a semiconductor substrate 2, a plurality of n-type cladding layers 32 disposed on the semiconductor substrate 2 and separated from each other, and a plurality of n-type cladding layers 32. And a plurality of active layers 33 separated from each other, and a plurality of p-type cladding layers 34 respectively disposed on the plurality of active layers 33 and separated from each other. The plurality of vapor deposition layers 35 disposed on the plurality of p-type cladding layers 34 and separated from each other, and the plurality of plating electrode layers 36a, 36b, 36c, 36d disposed on the plurality of vapor deposition layers 35 and separated from each other. With.

  Both end portions of the plurality of plated electrode layers 36a, 36b, 36c, and 36d are thinner than the central portion.

  As shown in FIG. 14, the semiconductor light emitting devices according to the third embodiment are separated from each other by an element separation unit 90.

  An n-type cladding layer 30 and an etching stop layer 31 disposed on the n-type cladding layer 30 are provided between the semiconductor substrate 2 and the plurality of n-type cladding layers 32. That is, the etching stop layer 31 is formed in the n-type cladding layer 30 and the plurality of n-type cladding layers 32.

  The semiconductor light emitting device according to the third embodiment can generate multi-beam laser light.

  A planar pattern configuration example of the LD bar 100 of the semiconductor light emitting device according to the third embodiment is represented as shown in FIG. 15A, and an enlarged view of FIG. 15A is shown in FIG. Represented as shown.

  Adjacent to each other, semiconductor light emitting elements for generating a quad beam laser beam shown in FIG. 14 are formed.

  In the semiconductor light emitting device according to the third embodiment, the number of LD devices arranged on the LD bar 100 can be further increased in this way to generate multi-beam laser light of quad beam or higher.

  Also in the semiconductor light emitting device according to the third embodiment, as in the first embodiment, the n-type cladding layer 32, the active layer 33, and the p-type cladding layer 34 are, for example, infrared light having a wavelength of 780 nm. For example, an AlGaAs compound semiconductor for light emission and an InGaAlP compound semiconductor for light emission at a wavelength of 650 nm, which is red light, are applicable.

  Also in the semiconductor light emitting device according to the third embodiment, the semiconductor substrate 2, the n-type cladding layer 30, the etching stop layer 31, the n-type cladding layer 32, the active layer 33, and the p-type cladding layer 34 are the first It can be formed with the same structure as the embodiment.

  In the semiconductor light emitting device according to the third embodiment, the process of forming the plated electrode layers 36a, 36b, 36c, 36d whose both end portions are made thin is the same as that in the first embodiment.

  Also, the mounting structure of the semiconductor light emitting device according to the third embodiment is the same as that of the first embodiment.

  In the semiconductor light emitting device according to the third embodiment, in order to ensure heat dissipation and die bonding strength, by applying the plated electrode layers 36a, 36b, 36c, 36d whose both end portions are thinner than the central portion, There is no gap in die bonding. For this reason, it is excellent in wettability, the peel strength is enhanced, and the adhesion is improved. For this reason, heat dissipation becomes good, and as a result, the operating temperature of the active layer 33 decreases and the operating current decreases, so that the life of the LD element tends to be extended.

  According to the third embodiment, when the LD element is die-bonded to the stem or the submount, by removing the end portion of the plating electrode layer that hinders die bonding, stable die bonding can be performed, and heat dissipation can be performed. It is possible to provide a multi-beam semiconductor light emitting device and a method for manufacturing the same, which can improve the die bonding strength and the die bonding reliability and yield.

[Fourth embodiment]
(Element structure)
As shown in FIG. 16, the semiconductor light emitting device according to the fourth embodiment of the present invention includes a semiconductor substrate 2, an n-type cladding layer 32 disposed on the semiconductor substrate 2, and an n-type cladding layer 32. The active layer 33 disposed, the p-type cladding layer 34 disposed on the active layer 33, the cap layer 4 disposed on the p-type cladding layer 34, and the side walls of the p-type cladding layer 34 and the cap layer 4 Current blocking layers 5, 6 disposed on the contact layer 1, the contact layer 1 disposed on the cap layer 4 and the current blocking layers 5, 6, the vapor deposition layer 35 disposed on the contact layer 1, and the vapor deposition layer 35 And a plated electrode layer 36 disposed thereon.

  As shown in FIG. 16, both end portions of the plated electrode layer 36 are thinner than the central portion.

The n-type cladding layers 30 and 32 are made of, for example, Al _x1 Ga _1-x1 As (0.3 ≦ x1 ≦ 0.7, for example, x1 = 0.5). The n-type cladding layers 30 and 32 are doped with, for example, about 2 × 10 ¹⁸ cm ^{−3 of} Si.

The etching stop layer 31 is made of n-type or non-doped, for example, In _0.49 Ga _0.51 P, and is formed to have a thickness of about 0.01 μm to 0.05 μm, for example.

  The total thickness of the n-type cladding layer 30, the etching stop layer 31, and the n-type cladding layer 32 is, for example, about 2 μm to 4 μm.

The active layer 33 has a bulk structure of Al _y1 Ga _{1 -y1} As (0.05 ≦ y1 ≦ 0.2, for example, y1 = 0.15) or Al _y2 Ga _{1 -y2} As (0.01 ≦ y2 ≦ 0). .1, for example, y2 = 0.05) and a barrier layer made of Al _y3 Ga _1-y3 As (0.2 ≦ y3 ≦ 0.5, y2 <y3, for example, y3 = 0.3) Single Quantum Well (SQW)
Alternatively, a multi quantum well (MQW) structure as a whole is formed, for example, to about 0.01 μm to 0.2 μm.

The p-type cladding layer 34 is made of, for example, Al _x2 Ga _1-x2 As (0.3 ≦ x2 ≦ 0.7, for example, x2 = 0.5), and is formed to have a thickness of about 0.5 μm to 4 μm, for example. The In the p-type cladding layer 34, a p-type or non-doped etch stop layer (not shown) made of, for example, In _0.49 Ga _0.51 P is formed to a thickness of about 0.01 μm to 0.05 μm, for example.

  A structure in which a light guide layer is provided between the active layer 33 and the n-type cladding layer 32, and between the active layer 33 and the p-type cladding layer 34, and a beam expansion between the active layer 33 and the n-type cladding layer 32. Other semiconductor layers such as a structure in which layers are provided may be interposed between any of the layers.

In the above-described example, the example is an AlGaAs-based compound semiconductor. However, in the case of an InGaAlP-based compound, for example, In _0.49 (Ga _{1 -u} Al _u ) _0.51 P (0.45 ≦ u ≦ 0.8). For example, the n-type cladding layer 32 and the p-type cladding layer 34 can be formed by u = 0.7) layers, and In _0.49 (Ga _{1 -v 1} Al _{v 1} ) _0.51 P (0 ≦ v 1 ≦ 0.25). For example, the active layer may have an SQW structure or an MQW structure based on v1 = 0) / In _0.49 (Ga _{1 -v2} Al _v2 ) _0.51 P (0.3 ≦ v2 ≦ 0.7, for example, v2 = 0.4). 33 can be formed.

The etching stop layer 31 is not limited to In _0.49 Ga _0.51 P. For example, In _0.49 (Ga _0.8 Al _0.2 ) _0.51 P can be used.

Etching for forming a ridge portion in the p-type cladding layer 34 is as follows. For example, a mask made of SiO ₂ or SiN _x or the like is formed by CVD or the like, and the cap layer 4 is selectively etched by dry etching or the like, for example, and then the p-type cladding layer is etched by an etchant such as HCl. By etching 34, as shown in FIG. 16, the ridge portion is formed in a stripe shape.

The cap layer 4 is made of, for example, p-type In _0.49 Ga _0.51 P, and has a thickness of about 0.01 μm to 0.05 μm, for example. The cap layer 4 is used to prevent the oxide layer or the like from being formed on the surface of the semiconductor stacked portion when the contact layer 1 is formed in a later step, thereby preventing contamination. It may be formed of other semiconductor layers such as GaAs. Further, as long as the surface can be prevented from being contaminated, it may be omitted.

  The contact layer 1 is formed on the cap layer 4 and the current blocking layers 5 and 6 by a p-type GaAs layer, for example, to a thickness of about 0.05 μm to 10 μm.

  As the current blocking layers 5 and 6, AlGaAs, GaAs, INAlP, or the like can be used.

  Also in the semiconductor light emitting device according to the fourth embodiment, similarly to FIG. 10, the number of LD devices arranged on the LD bar 100 is increased to generate a multi-beam laser beam of quad beam or higher. You can also.

  Also in the semiconductor light emitting device according to the fourth embodiment, as in the first embodiment, the n-type cladding layer 32, the active layer 33, and the p-type cladding layer 34 are, for example, infrared light having a wavelength of 780 nm. For example, an AlGaAs compound semiconductor for light emission and an InGaAlP compound semiconductor for light emission at a wavelength of 650 nm, which is red light, are applicable.

  In the semiconductor light emitting device according to the fourth embodiment, the step of forming the plated electrode layer 36 whose both ends are thinned is the same as that of the first embodiment.

  The mounting structure of the semiconductor light emitting element according to the fourth embodiment is also the same as that of the first embodiment.

  In the semiconductor light emitting device according to the fourth embodiment, in order to ensure heat dissipation and die bonding strength, the gap between the die bonding is eliminated by applying the plated electrode layer 36 whose both end portions are thinner than the central portion. . For this reason, it is excellent in wettability, the peel strength is enhanced, and the adhesion is improved. For this reason, heat dissipation becomes good, and as a result, the operating temperature of the active layer 33 decreases and the operating current decreases, so that the life of the LD element tends to be extended.

  According to the fourth embodiment, when the LD element is die-bonded to the stem or the submount, by removing the end portion of the plated electrode layer that hinders die bonding, stable die bonding can be performed, and heat dissipation Therefore, it is possible to provide a semiconductor light emitting device and a method for manufacturing the same which can improve the die bonding reliability and the yield.

[Other embodiments]
As described above, the present invention has been described according to the first to fourth embodiments. However, it should not be understood that the description and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art.

  As the semiconductor light emitting devices according to the first to fourth embodiments of the present invention, the stripe type LD has been mainly described as an example, but other examples include a distributed feedback (DFB) LD, a distributed Bragg reflection. A mold (DBR: Distributed Bragg Reflector) LD, a surface emitting LD, or the like may be configured.

  Moreover, you may comprise LED (Light Emitting Diode) as a semiconductor light-emitting device which concerns on the 1st-4th embodiment of this invention.

  In the description of the embodiment already described, the active layer has an MQW structure having a plurality of well layers sandwiched between barrier layers. However, the active layer has a structure having one well layer. May be.

  As described above, the present invention includes various embodiments not described herein.

  The semiconductor light emitting device of the present invention can be applied to all semiconductor light emitting devices such as a two-wavelength laser, a quad beam laser, and a multi-beam laser, and is used for picking up a CD, a DVD, a DVD-ROM, a data writable CD-RW, etc. The present invention can be applied as an LD element, an LD element for a printer, and an LD element for optical communication.

1 is a schematic bird's-eye view structure diagram of a semiconductor light emitting device according to a first embodiment of the present invention. FIG. 3 is a schematic cross-sectional structure diagram for explaining one step of the method for manufacturing the semiconductor light emitting element according to the first embodiment of the present invention. FIG. 3 is a schematic cross-sectional structure diagram for explaining one step of the method for manufacturing the semiconductor light emitting element according to the first embodiment of the present invention. FIG. 3 is a schematic cross-sectional structure diagram for explaining one step of the method for manufacturing the semiconductor light emitting element according to the first embodiment of the present invention. FIG. 3 is a schematic cross-sectional structure diagram for explaining one step of the method for manufacturing the semiconductor light emitting element according to the first embodiment of the present invention. FIG. 3 is a schematic cross-sectional structure diagram for explaining one step of the method for manufacturing the semiconductor light emitting element according to the first embodiment of the present invention. FIG. 4 is an SEM photo example of the left end portion of the ridge structure, illustrating one step of the method for manufacturing the semiconductor light emitting device according to the first embodiment of the present invention. The SEM photograph example of the right end part of the ridge structure explaining 1 process of the manufacturing method of the semiconductor light-emitting device based on the 1st Embodiment of this invention. 4 is an arrangement configuration example of an LD bar on a semiconductor wafer of the semiconductor light emitting device according to the first embodiment of the present invention. (A) The plane pattern structural example of LD bar | burr of the semiconductor light-emitting device concerning the 1st Embodiment of this invention, (b) The enlarged view of (a). 1 is a schematic cross-sectional structure diagram of a mounting structure of a semiconductor light emitting element according to a first embodiment of the present invention. The typical cross-section figure of the semiconductor light-emitting device which concerns on the 2nd Embodiment of this invention. (A) The plane pattern structural example of LD bar | burr of the semiconductor light-emitting device concerning the 2nd Embodiment of this invention, (b) The enlarged view of (a). The typical cross-section figure of the semiconductor light-emitting device which concerns on the 3rd Embodiment of this invention. (A) The plane pattern structural example of LD bar | burr of the semiconductor light-emitting device concerning the 3rd Embodiment of this invention, (b) The enlarged view of (a). The typical bird's-eye view structure figure of the semiconductor light-emitting device concerning a 4th embodiment of the present invention. The typical cross-section figure explaining the mounting process of the conventional semiconductor light-emitting device. The typical cross-section figure of the mounting structure of the conventional semiconductor light-emitting device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Contact layer 2 ... Semiconductor substrate 4 ... Cap layer 5, 6 ... Embedded layer 14 ... N side electrode 15 ... P side electrode 31 ... Etching stop layer 32, 42 ... 1st conductivity type (n type) clad layer 33, 43 ... active layers 34, 44 ... second conductivity type (p-type) cladding layers 35, 35a, 35b ... vapor deposition layers 36, 36a, 36b, 36c, 36d ... plating electrode layers 38, 40 ... resist layer 50 ... semiconductor laser diode part 52 ... Au-Sn layer 54 ... submount part 56 ... cavity part 80 ... laser resonator 90 ... element isolation part 100 ... LD bar 100a, 100b ... cleavage surface

Claims (6)

A semiconductor substrate;
A first conductivity type cladding layer disposed on the semiconductor substrate;
An active layer disposed on the first conductivity type cladding layer;
A second conductivity type cladding layer disposed on the active layer;
A vapor deposition layer disposed on the second conductivity type cladding layer;
And a plating electrode layer disposed on the vapor deposition layer, wherein both end portions of the plating electrode layer are thinner than a central portion of the plating electrode layer. A semiconductor substrate;
A first first conductivity type cladding layer disposed on the semiconductor substrate;
A first active layer disposed on the first first conductivity type cladding layer;
A first second conductivity type cladding layer disposed on the first active layer;
A first vapor deposition layer disposed on the first second conductivity type cladding layer;
A first plating electrode layer disposed on the first vapor deposition layer;
A second first conductivity type cladding layer disposed on the semiconductor substrate;
A second active layer disposed on the second first conductivity type cladding layer;
A second second conductivity type cladding layer disposed on the second active layer;
A second vapor deposition layer disposed on the second second conductivity type cladding layer;
A second plating electrode layer disposed on the second vapor deposition layer;
The both end portions of the first plating electrode layer are thinner than the center portion of the first plating electrode layer, and the both end portions of the second plating electrode layer are compared with the center portion of the second plating electrode layer. A semiconductor light emitting device characterized by being thin.   The semiconductor light emitting element according to claim 2, wherein the semiconductor element generates a two-wavelength laser beam. A semiconductor substrate;
A plurality of first conductivity type cladding layers disposed on the semiconductor substrate and separated from each other;
A plurality of active layers disposed on the plurality of first conductivity type cladding layers separated from each other and separated from each other;
A plurality of second conductivity type cladding layers disposed on the plurality of active layers and separated from each other;
A plurality of vapor deposition layers disposed on the plurality of second conductivity type cladding layers and separated from each other;
A plurality of plating electrode layers disposed on the plurality of vapor deposition layers and separated from each other, and an end portion of the plurality of plating electrode layers is thinner than a central portion of the plurality of plating electrode layers. Semiconductor light emitting device.   The semiconductor light emitting device according to claim 4, wherein the semiconductor device generates a multi-beam laser beam. Forming a first conductivity type cladding layer on a semiconductor substrate;
Forming an active layer on the first conductivity type cladding layer;
Forming a second conductivity type cladding layer on the active layer;
Etching the second conductivity type cladding layer, the active layer and the first conductivity type cladding layer;
Forming a vapor deposition layer on the entire surface of the semiconductor substrate and the second conductivity type cladding layer;
Forming a plating electrode layer on the vapor deposition layer on the second conductivity type cladding layer;
And a step of thinning both ends of the plating electrode layer by etching and removing the vapor deposition layer.