JP2010136454A - Decoding method, decoding apparatus, program therefor and recording medium - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To appropriately decode a result obtained by encoding non-zero coefficient number data of a transform coefficient obtained by orthogonally transforming image block data in a second block size, that is twice or more the size of a block, on the basis of corresponding relation data suitable for the block size. <P>SOLUTION: An encoded code is acquired which corresponds to a value of final continuous number data indicating the number of transform coefficients, of each of which the absolute value is 1, continued to the end of the transform coefficient obtained by orthogonally transforming image data in an orthogonal transform size. corresponding relation data are selected which indicate a corresponding relation between the value of the final continuous number data indicating the number of transform coefficients, whose absolute value is 1, continued to the end of the transform coefficient obtained by orthogonally transforming the image data in a sub block size smaller than an orthogonal transform size for orthogonally transforming the image data, and the selected corresponding relation data are used to decode the encoded code, thereby producing the final continuous number data. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a decoding method, a decoding apparatus, a program thereof, and a recording medium for decoding results obtained by encoding orthogonal transform coefficients.

  In recent years, MPEG (Moving), which is handled as digital image data, is compressed by orthogonal transform such as discrete cosine transform and motion compensation using the redundancy unique to image information for the purpose of efficient transmission and storage of information. A device conforming to a scheme such as Picture Experts Group) is becoming popular in both information distribution in broadcasting stations and information reception in general households.

Following the MPEG2, 4 system, an encoding system called MPEG4 / AVC (Advanced Video Coding) has been proposed.
In the MPEG4 / AVC encoding apparatus, for example, image data to be encoded is orthogonally converted with block data having a block size of 4 × 4 as a unit, and non-zero conversion coefficients among the conversion coefficients of the block data obtained thereby. variable-length non-zero coefficient quantity data on the basis of the 4 ^two non-zero coefficient quantity data values and a plurality of correspondence data (VLC table), each defining a correspondence between the encoded code indicating the number of Encode.
Here, the plurality of correspondence data are different from each other in the bit length of the non-zero coefficient number data indicating 0, and the code used in the correspondence data as the bit length of the non-zero coefficient number data indicating 0 becomes shorter The maximum bit length of the encoding code is specified to be long.
Then, the encoding apparatus indicates 0 as the number of change coefficients other than 0 and 1 among the transform coefficients of the block data around the 4 × 4 block data to be encoded increases in order to increase the encoding efficiency. The correspondence data in which an encoded code having a long bit length is assigned to the non-zero coefficient count data is selected.

By the way, in the encoding apparatus described above, orthogonal transform may be performed in units of block data having a block size of 8 × 8 (8 × 8 block data).
However, the above-described conventional correspondence data only corresponds to the value of 4 ² non-zero coefficient number data, and the code of 8 ² non-zero coefficient number data obtained by orthogonal transformation of 8 × 8 block data. I can't get the code.
Therefore, it is desired to perform a suitable encoding process and decode the result.

  The present invention has been made in view of such circumstances, and non-zero coefficient number data of transform coefficients obtained by orthogonal transform of image block data having a second block size that is a multiple of the first block size, It is an object of the present invention to provide a decoding method, a decoding apparatus, a program thereof, and a recording medium for suitably decoding a result of encoding based on the correspondence data suitable for the first block size.

  The present invention obtains an encoding code corresponding to the value of the last consecutive number data indicating the number of transform coefficients having an absolute value of 1 which is continuous at the end of transform coefficients obtained by orthogonal transform of image data with an orthogonal transform size, and image data Correspondence between the value of the last consecutive number data indicating the number of transform coefficients of absolute value 1 that are consecutive at the end of transform coefficients orthogonally transformed with a sub-block size smaller than the orthogonal transform size when orthogonal transform is performed and the encoding code Is selected, and the encoded code is decoded using the selected correspondence data to generate the last consecutive number data.

  According to the present invention, in a decoding device that decodes encoded image data obtained by encoding image data, an absolute value that continues from the encoded image data to the end of a transform coefficient obtained by orthogonally transforming the image data with an orthogonal transform size. Acquisition means for acquiring an encoding code corresponding to the value of the last consecutive number data indicating the number of transform coefficients of value 1, and orthogonal transform with a sub-block size smaller than the orthogonal transform size when orthogonally transforming the image data A selection means for selecting correspondence data indicating a correspondence relation between the value of the last consecutive number data indicating the number of conversion coefficients having an absolute value of 1 continuous at the end of the conversion coefficient and the encoded code; and selected by the selection means Generating means for decoding the encoded code acquired by the acquisition means using the correspondence data and generating the last consecutive number data; A decoding device is provided.

Preferably, the decoding apparatus further includes decoding means for decoding the encoded image data using the last continuous number data generated by the generating means.
Preferably, the correspondence relationship data is defined such that the bit length of the encoded code becomes longer as the bit length of the last consecutive number data becomes longer.

Preferably, the selection means selects the correspondence data according to the value of the index data calculated using the number of transform coefficients included in the sub-block of the sub-block.
Preferably, the selection unit selects the correspondence data according to the value of the index data calculated according to the position of the sub-block.
Preferably, the index data includes a block size of an upper block adjacent to the block to be processed and a block of a left block adjacent to the left of the block to be processed for a sub-block in the block to be processed. When the sizes are the same, calculation is performed using index data for sub-blocks at the same position in the upper block and the left block.
Preferably, the index data includes a block size of an upper block adjacent to the processing target block and a left block adjacent to the left of the processing target block for a sub-block in the processing target block. When the block size is different, calculation is performed using index data for sub-blocks at the same position in the block having a large block size.

Preferably, the index data (nC) of the processing target block is calculated by the following formula.
nC = (nA + nB + 1) >> 1
However, nA is the index data of the sub-block in the left block,
nB is index data of a sub-block in the upper block.

  According to the present invention, in a decoding method for decoding encoded image data obtained by encoding image data, an absolute value that is continuous from the encoded image data at the end of transform coefficients obtained by orthogonally transforming the image data with an orthogonal transform size. An acquisition step of acquiring an encoding code corresponding to the value of the last consecutive number data indicating the number of transform coefficients of value 1, and orthogonal transform with a sub-block size smaller than the orthogonal transform size when orthogonally transforming the image data A selection step of selecting correspondence data indicating a correspondence relationship between the value of the last consecutive number data indicating the number of conversion coefficients having an absolute value of 1 continuous at the end of the conversion coefficient and the encoded code, and selected by the selection step A decoding step comprising: decoding the encoded code acquired by the acquisition step using the correspondence data and generating the last consecutive number data. A method is provided.

  According to the present invention, in a decoding program for causing a computer to execute a procedure for decoding encoded image data obtained by encoding image data, the image data is orthogonally transformed from the encoded image data. An acquisition procedure for acquiring an encoding code corresponding to the value of the last consecutive number data indicating the number of transform coefficients of absolute value 1 that are continuous at the end of the transform coefficient that has been orthogonally transformed in step, and when the image data is orthogonally transformed Correspondence data indicating the correspondence between the value of the last consecutive number data indicating the number of transform coefficients of absolute value 1 continuous at the end of the transform coefficient orthogonally transformed with a sub-block size smaller than the orthogonal transform size and the encoded code. Acquired by executing the acquisition procedure using the selection procedure to be selected and the correspondence data selected by executing the selection procedure. The by decoding the encoded code, and a generation step of generating the last continuous number data, decoding program to be executed by the computer is provided.

  According to the present invention, in a recording medium recorded with a routine for decoding encoded image data obtained by encoding image data, which is executed by a computer, the image data is orthogonally transformed with an orthogonal transformation size from the encoded image data. An acquisition routine for acquiring an encoding code corresponding to the value of the last consecutive number data indicating the number of transform coefficients having an absolute value of 1 consecutive at the end of the transformed transform coefficients, and an orthogonal transform size when orthogonally transforming the image data Selection for selecting correspondence data indicating the correspondence between the value of the last consecutive number data indicating the number of transform coefficients of absolute value 1 continuous at the end of the transform coefficient orthogonally transformed with a smaller sub-block size and the encoded code Acquired by executing the acquisition routine using the routine and the correspondence data selected by executing the selection routine. It decodes the No. code, and generating routine for generating the last continuous number data, and recorded recording medium is provided.

  ADVANTAGE OF THE INVENTION According to this invention, the decoding method, decoding apparatus, its program, and recording medium which decode suitably the encoding code obtained by encoding based on correspondence data can be provided.

FIG. 1 is a configuration diagram of a communication system according to a first embodiment of this invention. FIG. 2 is a functional block diagram of the encoding apparatus shown in FIG. FIG. 3 is a block diagram of the lossless encoding circuit shown in FIG. FIG. 4 is a diagram for explaining the order in which the scan circuit shown in FIG. 3 scans orthogonal transformation of 4 × 4 block data. FIG. 5 is a diagram for explaining the order in which the scan circuit shown in FIG. 3 scans orthogonal transformation of 8 × 8 block data. FIG. 6 is a diagram for explaining a method in which the run level calculation circuit shown in FIG. 3 generates the non-zero coefficient number data TotalCoeff and the last continuous number data TrailingOne of 4 × 4 block data. FIG. 7 is a diagram for explaining a method in which the two-dimensional lossless encoding circuit shown in FIG. 3 encodes non-zero coefficient number data TotalCoeff and last continuous number data TrailingOne of 4 × 4 block data. FIG. 8 is a diagram for explaining a method in which the two-dimensional lossless encoding circuit shown in FIG. 3 encodes the non-zero coefficient number data TotalCoeff and the last consecutive number data TrailingOne of 8 × 8 block data. FIG. 9 is a diagram for explaining a method in which the two-dimensional lossless encoding circuit shown in FIG. 3 encodes the non-zero coefficient number data TotalCoeff and the last consecutive number data TrailingOne of 8 × 8 block data. FIG. 10 is a diagram for explaining an operation example of the lossless encoding circuit shown in FIG. FIG. 11 is a block diagram of the decoding apparatus shown in FIG. FIG. 12 is a block diagram of the lossless decoding circuit shown in FIG.

Hereinafter, an encoding apparatus according to an embodiment of the present invention will be described.
First, the relationship between the component of this embodiment and the component of this invention is demonstrated.
The 4 × 4 block size of this embodiment corresponds to the first block size of the present invention, and the 8 × 8 block size corresponds to the second block size of the present invention.
Further, the non-zero coefficient number data TotalCoeff of the present embodiment corresponds to the non-zero coefficient number data of the present invention.
The numbers on the right side shown in Table 1 correspond to the encoded codes of the present invention.
The conversion table data TRNa1, 2, 3, 4 shown in Table 1 corresponds to the correspondence data of the present invention.
Further, the sub-block data SB1, SB2, SB3, and SB4 shown in FIG. 8 correspond to the sub-block data of the present invention.

Steps ST17 and ST18 shown in FIG. 10 correspond to the first step of the first aspect of the invention, step ST19 corresponds to the second step, and steps ST21 and ST22 correspond to the third step.
Further, step ST13 shown in FIG. 10 corresponds to the fourth process of the first aspect of the invention, steps ST14 and ST15 correspond to the fifth process, and step ST16 corresponds to the sixth process.
Further, the scan conversion circuit 51 and the sub-block generation circuit 52 shown in FIG. 3 correspond to the assigning means of the invention according to the second aspect.
The run level calculation circuit 53 shown in FIG. 3 corresponds to the generation means of the invention of the second aspect, and the two-dimensional lossless encoding circuit 54 corresponds to the encoding means of the invention of the second aspect. .

  The two-dimensional lossless decoding circuit 111 shown in FIG. 12 corresponds to the determining means of the fifth aspect of the invention, the transform coefficient restoring circuit 114 corresponds to the generating means of the fifth aspect of the invention, and the block restoring circuit 115 is the fifth. This corresponds to the acquisition means of the invention of this aspect.

Hereinafter, the communication system 1 of the present embodiment will be described.
First, the correspondence between the components of the embodiment of the present invention and the components of the present invention will be described.
FIG. 1 is a conceptual diagram of a communication system 1 according to the present embodiment.
As shown in FIG. 1, the communication system 1 includes an encoding device 2 provided on the transmission side and a decoding device 3 provided on the reception side.
The encoding device 2 corresponds to the data processing device and the encoding device of the present invention.
In the communication system 1, the encoding device 2 on the transmission side generates frame image data (bit stream) compressed by orthogonal transformation such as discrete cosine transformation and Karhunen-Labe transformation and motion compensation, and modulates the frame image data. Later, it is transmitted via a transmission medium such as a satellite broadcast wave, a cable TV network, a telephone line network, or a mobile phone line network.
On the receiving side, after the image signal received by the decoding device 3 is demodulated, frame image data expanded by inverse transformation of orthogonal transformation and motion compensation at the time of the modulation is generated and used.
The transmission medium may be a recording medium such as an optical disk, a magnetic disk, and a semiconductor memory.

<Encoder 2>
Hereinafter, the encoding device 2 shown in FIG. 1 will be described.
FIG. 2 is an overall configuration diagram of the encoding device 2 shown in FIG.
As shown in FIG. 2, the encoding device 2 includes, for example, an A / D conversion circuit 22, a screen rearrangement circuit 23, an arithmetic circuit 24, an orthogonal transformation circuit 25, a quantization circuit 26, a lossless encoding circuit 27, and a buffer memory. 28, an inverse quantization circuit 29, an inverse orthogonal transform circuit 30, a frame memory 31, a rate control circuit 32, an adder circuit 33, an intra prediction circuit 41, a motion prediction / compensation circuit 42, and an orthogonal transform size determination circuit 45.

Hereinafter, components of the encoding device 2 will be described.
[A / D conversion circuit 22]
The A / D conversion circuit 22 converts the original image signal S10 composed of the input analog luminance signal Y and color difference signals Pb and Pr into digital picture data S22, and outputs this to the screen rearrangement circuit 23. .

[Screen rearrangement circuit 23]
The screen rearrangement circuit 23 converts the frame data in the picture data S22 input from the A / D conversion circuit 22 into a GOP (Group Of Pictures) composed of the picture types I, P, and B.
The original image data S23 rearranged in the encoding order according to the structure is output to the arithmetic circuit 24, motion prediction / compensation circuit 42 and intra prediction circuit 41.

[Arithmetic circuit 24]
The arithmetic circuit 24 generates image data S24 indicating a difference between the original image data S23 and the predicted image data input from the intra prediction circuit 41 or the motion prediction / compensation circuit 42, and outputs this to the orthogonal transform circuit 25.

[Orthogonal transformation circuit 25]
The orthogonal transformation circuit 25 performs orthogonal transformation such as Discrete Cosine Transform (DCT) or Karhunen-Loeve transformation on the image data S24 to generate image data (for example, DCT coefficient) S25 indicating a transformation coefficient. The result is output to the quantization circuit 26.
The orthogonal transform circuit 25 performs the orthogonal transform on the image data S24 input from the arithmetic circuit 24 with the orthogonal transform size specified by the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45, and indicates the transform coefficient. S25 is generated.
In the present embodiment, a block size of 4 × 4 and 8 × 8 is used as the orthogonal transform size.

[Quantization circuit 26]
Based on the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 and the quantization scale QS input from the rate control circuit 32, the quantization circuit 26 obtains image data S25 (transform coefficient before quantization). The image data S26 indicating the quantized transform coefficient is generated by quantization and output to the lossless encoding circuit 27 and the inverse quantization circuit 29.
For example, when one of 4x4 and 8x8 is selected in the orthogonal transformation circuit 25 and the orthogonal transformation with integer precision is performed, appropriate coefficients used for normalization processing in the quantization circuit 26 are different between 4x4 and 8x8. . Therefore, the quantization circuit 26 corrects the quantization scale QS input from the rate control circuit 32 according to the orthogonal transform size indicated by the orthogonal transform size signal TRSIZE, and uses the corrected quantization scale to generate image data S25. Quantize

[Reversible encoding circuit 27]
The lossless encoding circuit 27 stores the image data obtained by variable-length encoding the image data S26 in the buffer memory 28.
At this time, the lossless encoding circuit 27 uses the motion vector MV input from the motion prediction / compensation circuit 42 or its differential motion vector, identification data of reference image data, and the intra prediction mode input from the intra prediction circuit 41 as header data or the like. To store.
The lossless encoding circuit 27 performs lossless encoding processing corresponding to each of orthogonal transformations of 4 × 4 and 8 × 8 block sizes.
The encoding process of the lossless encoding circuit 27 will be described in detail later.

[Buffer memory 28]
The image data stored in the buffer memory 28 is modulated or the like and then transmitted as the image data S2.
The image data S2 is decoded by the decoding device 3 as will be described later.
[Inverse quantization circuit 29]
The inverse quantization circuit 29 performs an inverse quantization process corresponding to the quantization of the quantization circuit 26 on the image data S 26, generates data obtained thereby, and outputs this to the inverse orthogonal transform circuit 30.
[Inverse orthogonal transform circuit 30]
The inverse orthogonal transform circuit 30 outputs image data generated by performing inverse transform of the orthogonal transform in the orthogonal transform circuit 25 to the data input from the inverse quantization circuit 29 to the adder circuit 33.
[Addition circuit 33]
The adder circuit 33 adds the (decoded) image data input from the inverse orthogonal transform circuit 30 and the predicted image data PI input from the selection circuit 44 to generate reference (reconstructed) picture data R_PIC. Is written into the frame memory 31.
A deblocking filter may be provided between the adder circuit 33 and the frame memory 31. The deblocking filter writes the image data from which the block distortion of the reconstructed image data input from the addition circuit 33 is removed, into the frame memory 31 as reference picture data R_PIC.

[Rate control circuit 32]
For example, the rate control circuit 32 generates a quantization scale QS based on the image data read from the buffer memory 28, and outputs this to the quantization circuit 26.

[Intra prediction circuit 41]
The intra prediction circuit 41 determines the intra prediction mode and the block size of the prediction block that minimize the residual in the macroblock to be intra-coded.
The intra prediction circuit 41 uses 4 × 4 and 16 × 16 pixels as the block size.
The intra prediction circuit 41 outputs predicted image data based on intra prediction to the arithmetic circuit 24 when intra prediction is selected.

[Motion prediction / compensation circuit 42]
The motion prediction / compensation circuit 42 performs motion prediction from an image that has already been encoded, locally decoded, and recorded in the frame memory 31, and determines a motion vector that minimizes the residual and a block size for motion compensation. .
The motion prediction / compensation circuit 42 uses 16 × 16, 16 × 8, 8 × 16, 8 × 8, 8 × 4, 4 × 8, and 4 × 4 pixels as block sizes.
When the inter prediction is selected, the motion prediction / compensation circuit 42 outputs predicted image data based on the inter prediction to the arithmetic circuit 24.

[Orthogonal transform size determination circuit 45]
The orthogonal transform size determination circuit 45 determines the orthogonal transform size based on the block size finally determined (selected) in the circuit in which the predicted image data is selected from the intra prediction circuit 41 and the motion prediction / compensation circuit 42, An orthogonal transform size signal TRSIZE indicating this is output to the orthogonal transform circuit 25, the quantization circuit 26, and the lossless encoding circuit 27.
Specifically, the orthogonal transform size determination circuit 45 generates an orthogonal transform size signal TRSIZE indicating 8 × 8 pixels when the intra prediction circuit 41 finally selects the block size of 8 × 8 pixels, and the intra prediction circuit 41. When a block size other than 8 × 8 pixels is finally selected, an orthogonal transform size signal TRSIZE indicating 4 × 4 pixels is generated.
Further, when a block size of 8 × 8 pixels or more is finally selected by the motion prediction / compensation circuit 42, the orthogonal transform size determination circuit 45 generates an orthogonal transform size signal TRSIZE indicating 8 × 8 pixels, and performs motion prediction / When a block size smaller than 8 × 8 pixels by the compensation circuit 42 is finally selected, an orthogonal transform size signal TRSIZE indicating 4 × 4 pixels is generated.
In the present embodiment, the orthogonal transform size determination circuit 45 generates an orthogonal transform size signal TRSIZE indicating a block size of either 4x4 or 8x8.

Hereinafter, variable length encoding of the image data S25 in the lossless encoding circuit 27 will be described in detail.
FIG. 3 is a block diagram of the lossless encoding circuit 27 shown in FIG.
As shown in FIG. 3, the lossless encoding circuit 27 has, for example, a scan conversion circuit 51, a sub-block generation circuit 52, a run level calculation circuit 53, and a two-dimensional lossless code as a configuration that performs variable length encoding on the image data S 25. An encoding circuit 54, a level encoding circuit 55, a run encoding circuit 56, and a multiplexing circuit 57.

When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 4 × 4, the scan conversion circuit 51 uses the numerical order shown in FIG. 4A for frame encoding and FIG. 4B for field encoding. The 16 transform coefficients in the 4 × 4 block data constituting the image data S26 are scanned in the order shown in FIG.
On the other hand, when the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 8 × 8, the scan conversion circuit 51 includes 64 pieces of 64 × 8 block data constituting the image data S26 in the numerical order shown in FIG. The conversion coefficient data is scanned and output to the sub-block generation circuit 52 in the scan order.
In FIG. 5, the upper left indicates a DC component, and the lower right corresponds to a high frequency component.
Further, the horizontal direction in the figure indicates the horizontal frequency component, and the vertical direction in the figure indicates the vertical frequency component.

When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 4 × 4, the sub-block generation circuit 52 sequentially executes the 16 transform coefficients constituting the 4 × 4 block data sequentially input from the scan transform circuit 51. Output to level calculation circuit 53.
Further, the sub-block generation circuit 52, when the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 8 × 8, out of the 64 transform coefficients constituting the 8 × 8 block data input from the scan conversion circuit 51 The first to 16th input transform coefficients are used as components of 4 × 4 sub-block data SB1, and the 17th to 32nd input transform coefficients are used as components of 4 × 4 sub-block data SB2. The transform coefficient is used as a component of 4 × 4 sub-block data SB3, the 49th to 64th input transform coefficients are used as components of 4 × 4 sub-block data SB4, and these are output to the run level calculation circuit 53.

  The run level calculation circuit 53, when the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 4 × 4, the level data level of 16 transform coefficient sequences input in order from the sub-block generation circuit 52, run Data run_before, run total number data total_zero, non-zero coefficient number data TotalCoeff, last continuous number data TrailingOnes, and code data trailing_ones_sing_flag are generated.

Here, the level data level indicates the values of individual transform coefficients (transform coefficients other than 0 and 1) in the 4 × 4 block data. In the case of FIG. 6, “−3”, “+8”, “+11”. , “−4”, “+23”.
Run data run_before indicates the number of consecutive 0 coefficients (conversion coefficients having a value of 0) before non-zero coefficients in the 4 × 4 block data. In the case of FIG. 6, “1”, “2”, “0” ”,“ 2 ”,“ 0 ”,“ 0 ”.
The run total number data total_zero indicates the number of zero coefficients before the last non-zero coefficient in the 4 × 4 block data. In the case of FIG. 6, it is “5”.
The non-zero coefficient number data TotalCoeff indicates the number of non-zero coefficients in the 4 × 4 block data. In the case of FIG. 6, it is “7”.
The last continuous number data TrailingOnes indicates the number of transform coefficients having an absolute value of 1 that is continuous last in the 4 × 4 block data. In the case of FIG. 6, it is “2”.
The code data trailing_ones_sing_flag indicates the sign of the transform coefficient having the absolute value 1 that is continuous last in the 4 × 4 block data. In the case of FIG. 6, “−” and “+”.

The run level calculation circuit 53 outputs the run data run_before and the run total number data total_zero to the run encoding circuit 56.
The run level calculation circuit 53 outputs the level data level to the level encoding circuit 55.
The run level calculation circuit 53 outputs the non-zero coefficient number data TotalCoeff, the last consecutive number data TrailingOnes, and the code data trailing_ones_sing_flag to the two-dimensional lossless encoding circuit 54.

  When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 8 × 8, the run level calculation circuit 53 outputs the 4 × 4 sub-block data SB1, SB2, SB3, and SB4 input from the sub-block generation circuit 52. For each, the same processing as in the case of 4 × 4 described above is performed, and level data level, run data run_before, run total number data total_zero, non-zero coefficient number data TotalCoeff, last continuous number data TrailingOnes, and code data trailing_ones_sing_flag are generated.

The two-dimensional lossless encoding circuit 54 performs variable-length encoding on the non-zero coefficient number data TotalCoeff, the last continuous number data TrailingOnes, and the code data trailing_ones_sing_flag.
Hereinafter, a method of encoding the non-zero coefficient number data TotalCoeff and the last continuous number data TrailingOne by the two-dimensional lossless encoding circuit 54 will be described.
First, a case where the orthogonal transform size signal TRSIZE indicates 4 × 4 will be described.
When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 4 × 4, the two-dimensional lossless encoding circuit 54 outputs 0 of the transform coefficients of the 4 × 4 block data around the 4 × 4 block data to be processed. , 1 (or 0) based on the number of transform coefficients, based on the following total conversion table data TRNa, generate encoded codes of non-zero coefficient number data TotalCoeff and last consecutive number data TrailingOnes of the block data ( get.

The total conversion table data TRNa shown in Table 1 defines five conversion table data TRNa1, 2, 3, 4, and 5.
The conversion table data TRNa1, 2, 3, 4 has the following characteristics.
Each of the conversion table data TRNa1, 2, 3, 4 defines an encoding code for a set of the non-zero coefficient number data TotalCoeff and the last consecutive number data TrailingOne.
Here, the conversion table data TRNa1, 2, 3, and 4 have different bit lengths for the non-zero coefficient number data TotalCoeff indicating 0, and the code length increases as the bit length of the non-zero coefficient number data TotalCoeff indicating 0 decreases. The maximum bit length of the encoding code is specified to be long.
By the way, the non-zero coefficient number data TotalCoeff has a characteristic that, when 4 × 4 block data is located in a complex image region, there is almost no possibility of becoming 0, and the value is dispersed in a wide range of 0 to 15. .
Further, the non-zero coefficient number data TotalCoeff has a characteristic that when the 4 × 4 block data is located in a flat image region with little change, the non-zero coefficient number data TotalCoeff is likely to be 0 and hardly shows a high value.
Therefore, by defining the conversion table data TRNa1, 2, 3, and 4 as described above, the bit length of the encoding code assigned to the non-zero coefficient number data TotalCoeff indicating 0 for 4 × 4 block data in a complex image region Although the conversion table data having a long maximum bit length of the encoded code is selected, the overall encoding efficiency is improved.
On the other hand, for 4 × 4 block data in a flat image area, the overall coding efficiency is selected by selecting conversion table data having a long maximum bit length but a short encoding code assigned to the non-zero coefficient number data TotalCoeff indicating 0. To increase.

  Further, for a plurality of sets having different last consecutive number data TrailingOne and the same non-zero coefficient number data TotalCoeff, it is specified that the bit length of the encoded code becomes the same or longer as the last continuous number data TrailingOne increases. Yes.

As shown in FIG. 7, the two-dimensional lossless encoding circuit 54 converts the 4 × 4 block data C to be processed other than 0, 1 (or 0) of the 4 × 4 block data A whose display position is adjacent to the left. The number of coefficients is nA, and the number of transform coefficients other than 0, 1 (or 0) of 4x4 block data A whose display position is adjacent to the 4x4 block data C to be processed is nB.
Then, the two-dimensional lossless encoding circuit 54 generates index data nC by “nC = (nA + nB + 1) >> 1”.
“>> 1” means “1” right shift.
The two-dimensional lossless encoding circuit 54 selects one of the four conversion table data TRNa1, 2, 3, 4, 5 defined by the total conversion table data TRNa shown in Table 1 based on the index data nC. For example, when nA = 2 and nB = 3, the two-dimensional lossless encoding circuit 54 selects nC = (2 + 3 + 1) >> 1 = 3 and selects the conversion table data TRNa2.
The two-dimensional lossless encoding circuit 54 uses conversion table data TRNa5 for encoding the DC value of the color difference signal.
Then, the two-dimensional lossless encoding circuit 54 converts the encoding codes of the non-zero coefficient number data TotalCoeff and the last consecutive number data TrailingOnes of the 4 × 4 block data into the selected conversion table data TRNa1, 2, 3, 4, 5 Is obtained and output to the multiplexing circuit 57.

Next, a case where the orthogonal transform size signal TRSIZE indicates 8 × 8 will be described.
The four subblock data SB1, SB2, SB3, and SB4 generated by the subblock generation circuit 52 described above can be expressed as shown in FIG.
In FIG. 8, the upper left corner of the rectangle is the low frequency component, and the lower right corner is the high frequency component.
Therefore, there is a relatively high frequency of non-zero coefficients in the sub-block data SB1, and conversely, there is a high probability that most coefficients are zero in the sub-block data SB4.
Therefore, encoding efficiency is better when subcode data SB4 is assigned a code code having a shorter code length to value 0 (smaller value), and conversely, a subcode data SB1 is assigned a code code having a shorter code length than a larger value. .
Here, when the orthogonal transform size signal TRSIZE indicates 8 × 8, the index data nC is generated based on one of the following (Method 1) to (Method 4).
The method for generating the index data nC is the same in the decoding device 3.

(Method 1)
Assuming that the 8 × 8 block data C shown in FIG. 9 is a processing target, the two-dimensional lossless encoding circuit 54 has “8” as the index data nC of the sub-block data SB1, and the index data nC of the sub-block data SB2 and B3 is “ 4 ”, and the index data nC of the sub-block data SB4 is“ 0 ”.
Thus, the two-dimensional lossless encoding circuit 54 uses the conversion table data TRNa4 shown in Table 1 for encoding the sub-block data SB1, and uses the conversion table data TRNa3 for encoding the sub-block data SB2 and B3. Conversion table data TRNa1 is used for encoding data SB4.

(Method 2)
Assuming that the 8 × 8 block data C shown in FIG. 9 is a processing target, the two-dimensional lossless encoding circuit 54 has “8” as the index data nC of the sub-block data SB1, and the index data nC of the sub-block data SB2 and B3 is “ 2 ”, and the index data nC of the sub-block data SB4 is“ 0 ”.
Thus, the two-dimensional lossless encoding circuit 54 uses the conversion table data TRNa4 shown in Table 1 for encoding the sub-block data SB1, and uses the conversion table data TRNa2 for encoding the sub-block data SB2 and B3. Conversion table data TRNa1 is used for encoding data SB4.

(Method 3)
Assuming that the 8 × 8 block data C shown in FIG. 9 is a processing target, the two-dimensional lossless encoding circuit 54 has the index data nC of the sub-block data SB1 as “4” and the index data nC of the sub-block data SB2 and B3 as “ 2 ”, and the index data nC of the sub-block data SB4 is“ 0 ”.
Thus, the two-dimensional lossless encoding circuit 54 uses the conversion table data TRNa3 shown in Table 1 for encoding the sub-block data SB1, and uses the conversion table data TRNa2 for encoding the sub-block data SB2 and B3. Conversion table data TRNa1 is used for encoding data SB4.

(Method 4)
The two-dimensional lossless encoding circuit 54, when the block data A and B adjacent to the left and top of the processing target block data C are orthogonally transformed by 8 × 8 as shown in FIG. The index data nC of the sub-block data SB1, SB2, SB3, SB4 is generated using the nA, nB of the sub-block data SB1, SB2, SB3, SB4 at the same position of the block data A, B.
For example, the two-dimensional lossless encoding circuit 54 uses the nA of the sub-block data SB1 of the block data A and the nB of the sub-block data SB1 of the block data B by “nC = (nA + nB + 1) >> 1”. The index data nC of the sub-block data SB1 of the block data C is generated.
Further, when one of the block data A and B is an 8 × 8 orthogonal transform and the other is a 4 × 4 orthogonal transform, the two-dimensional lossless encoding circuit 54, for example, the sub-block data SB1, SB2, at the same position in the 8 × 8 orthogonal transform The number of coefficients other than 0, 1 (or 0) of SB3 and SB4 is set as index data nC.
For example, when the block data A is 8 × 8 and the block data B is 4 × 4, the two-dimensional lossless encoding circuit 54 determines that the number nA of coefficients other than 0, 1 (or 0) of the block data A is the sub-data of the block data C. The index data is nC of the block data SB1.
In addition, when the block data A and B are both 4 × 4, the two-dimensional lossless encoding circuit 54 uses the sub data of the block data A and B at the same position as the sub block data SB1, SB2, SB3, and SB4 of the block data C. Using the nA and nB of the block data SB1, SB2, SB3, and SB4, the index data nC of the sub-block data SB1, SB2, SB3, and SB4 of the block data C is generated by “nC = (nA + nB + 1) >> 1”. .
The above-described method for generating the index data nC is an example, and the sub-block data SB1, SB2, and the sub-block data SB1, SB2, and the sub-block data SB1, SB2, SB3, and SB4 of the block data A and B are used. There is no particular limitation as long as it generates index data nC for SB3 and SB4.
The two-dimensional lossless encoding circuit 54 converts the sub-block data SB1, B2, B3, B4 of the block data C using the conversion table data TRNa1-5 selected based on the corresponding index data nC.

  Note that the two-dimensional lossless encoding circuit 54 determines that each block data SB1, SB2, SB3, SB4 of the block data C is (method 1) when both the block data A and B are 4 × 4 in the method 4. The index data nC may be determined according to the position of the sub-block data SB1, SB2, SB3, SB4 as in any one of (Method 2) and (Method 3).

As described above, when the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 8 × 8, the two-dimensional lossless encoding circuit 54 generates the sub block generation circuit 52 from the 8 × 8 block data to be processed. The index data nC is determined or generated for each of the four sub-block data SB1, SB2, SB3, and SB4.
Then, the two-dimensional lossless encoding circuit 54 selects one of the conversion table data TRNa1 to 5 shown in Table 1 based on the index data nC determined or generated.
Then, the two-dimensional lossless encoding circuit 54 acquires the encoding codes of the non-zero coefficient number data TotalCoeff and the last consecutive number data TrailingOnes of the block data to be processed using the selected conversion table data TRNa1 to 5.

Hereinafter, an example of operation in which the lossless encoding circuit 27 shown in FIG. 3 determines the encoding codes of the non-zero coefficient number data TotalCoeff and the last consecutive number data TrailingOnes obtained from each block data of the image data S26 will be described.
FIG. 10 is a flowchart for explaining the operation example.
Hereinafter, each step shown in FIG. 10 will be described.
Step ST11:
If the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 shown in FIG. 2 indicates 4 × 4, the lossless encoding circuit 27 shown in FIG. 3 proceeds to step ST12, and then performs the processing of steps ST12 to ST16. I do.
On the other hand, when the orthogonal transform size signal TRSIZE indicates 4 × 4, the lossless encoding circuit 27 proceeds to step ST12, and thereafter performs the processes of steps ST12 to ST16.

Step ST12:
When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 4 × 4, the scan conversion circuit 51 uses the numerical order shown in FIG. 4A for frame encoding and FIG. 4B for field encoding. The 16 transform coefficients in the 4 × 4 block data constituting the image data S26 are scanned in the order shown in FIG.
The sub-block generation circuit 52 outputs the conversion coefficient input from the scan conversion circuit 51 to the run level calculation circuit 53 as it is.
Step ST13:
The run level calculation circuit 53, when the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 4 × 4, the level data level of 16 transform coefficient sequences input in order from the sub-block generation circuit 52, run Data run_before, run total number data total_zero, non-zero coefficient number data TotalCoeff, last continuous number data TrailingOnes, and code data trailing_ones_sing_flag are generated.
The run level calculation circuit 53 outputs the non-zero coefficient number data TotalCoeff and the last continuous number data TrailingOnes to the two-dimensional lossless encoding circuit 54.

Step ST14:
As shown in FIG. 7, the two-dimensional lossless encoding circuit 54 converts the 4 × 4 block data C to be processed other than 0, 1 (or 0) of the 4 × 4 block data A whose display position is adjacent to the left. The number of coefficients is nA, and the number of transform coefficients other than 0, 1 (or 0) of 4x4 block data A whose display position is adjacent to the 4x4 block data C to be processed is nB.
Then, the two-dimensional lossless encoding circuit 54 generates index data nC by “nC = (nA + nB + 1) >> 1”.
Step ST15:
The two-dimensional lossless encoding circuit 54 selects one of the conversion table data TRNa1 to 5 shown in Table 1 based on the index data nC generated in step ST14.
Step ST16:
The two-dimensional lossless encoding circuit 54 converts the encoding codes of the non-zero coefficient number data TotalCoeff and the last consecutive number data TrailingOnes of the 4 × 4 block data input in step ST13 into the conversion table data TRNa1, 2, 3, 4, and 5, and this is output to the multiplexing circuit 57.

Step ST17:
When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 8 × 8, the scan conversion circuit 51 includes 64 transform coefficients in the 8 × 8 block data constituting the image data S26 in the order of numbers shown in FIG. Data is scanned and output to the sub-block generation circuit 52 in the scan order.

Step ST18:
When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 4 × 4, the sub-block generation circuit 52 sequentially executes the 16 transform coefficients constituting the 4 × 4 block data sequentially input from the scan transform circuit 51. Output to level calculation circuit 53.
When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 8 × 8, the sub-block generation circuit 52 outputs 1 out of 64 transform coefficients constituting the 8 × 8 block data input from the scan conversion circuit 51. The 16th input transform coefficient is a component of 4 × 4 sub-block data SB1, the 17th to 32nd input transform coefficient is a component of 4 × 4 subblock data SB2, and the 33rd to 48th input conversion coefficient. Is the component of the 4 × 4 sub-block data SB3, the 49th to 64th input transform coefficients are the components of the 4 × 4 sub-block data SB4, and these are output to the run level calculation circuit 53.

Step ST19:
When the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45 indicates 8 × 8, the run level calculation circuit 53 outputs the 4 × 4 sub-block data SB1, SB2, SB3, and SB4 input from the sub-block generation circuit 52. For each, the same processing as in the case of 4 × 4 described above is performed to generate level data level, run data run_before, run total number data total_zero, non-zero coefficient number data TotalCoeff, last continuous number data TrailingOnes, and code data trailing_ones_sing_flag.
The run level calculation circuit 53 outputs the non-zero coefficient number data TotalCoeff and the last continuous number data TrailingOnes to the two-dimensional lossless encoding circuit 54.

Step ST20:
The two-dimensional lossless encoding circuit 54 applies the sub-block data SB1, SB2, SB3, and SB4 constituting the 8x8 block data to be encoded according to any one of (Method 1) to (Method 5) described above. The index data nC is determined or generated.
Step ST21:
The two-dimensional lossless encoding circuit 54 selects one of the conversion table data TRNa1 to 5 shown in Table 1 based on the index data nC determined or generated in step ST20.
Step ST22:
The two-dimensional lossless encoding circuit 54 converts the encoding codes of the non-zero coefficient number data TotalCoeff and the last continuous number data TrailingOnes of the sub-block data SB1, SB2, SB3, and SB4 input in step ST19, selected in step ST21. The table data TRNa 1, 2, 3, 4, 5 is obtained and output to the multiplexing circuit 57.

Hereinafter, the level encoding circuit 55 will be described.
The level encoding circuit 55 performs variable length encoding on the level data level input from the run level calculation circuit 53.
Specifically, the level encoding circuit 55 extracts parameters called level_prefix and level_subfix from the level data level.
Then, the level encoding circuit 55 performs variable length encoding on the parameter level_prefix based on the conversion table data TRNb shown in Table 2 below.

The parameter level_suffix is encoded as an unsigned integer with a bit length given by suffxLength.
Here, the relationship between the level data level and the parameters level_prefix and level_suffix is defined by the following equations (1) and (2).

[Equation 1]
levelCode = (level_prefix << suffixLength) + level_suffix
... (1)

[Equation 2]
If levelCode is even: level = (levelCode + 2) >> 1
If levelCode is not even: level = (-levelCode-1) >> 1
... (2)

  The level encoding circuit 55 outputs an encoded code obtained by variable length encoding the level data level to the multiplexing circuit 57.

Hereinafter, the run encoding circuit 56 will be described.
The run encoding circuit 56 performs variable length encoding on the run data run_before and the run total number data total_zero input from the run level calculation circuit 53 as shown below.
Then, the run encoding circuit 56 outputs the encoded code obtained by the variable length encoding to the multiplexing circuit 57.
Specifically, the run encoding circuit 56 is based on the conversion table data TRNc shown in Table 3 below when the orthogonal transform size signal TRSIZE indicates 4 × 4 and the non-zero coefficient number data TotalCoeff is 1 or more and 7 or less. Thus, the run total number data total_zero is variable-length encoded.

  Further, the run encoding circuit 56 performs the run based on the conversion table data TRNd shown in Table 4 below when the orthogonal transform size signal TRSIZE indicates 4 × 4 and the non-zero coefficient number data TotalCoeff is 8 or more and 15 or less. The total number data total_zero is variable-length encoded.

  Further, the run encoding circuit 56 performs variable length encoding on the total run number data total_zero based on the conversion table data TRNe shown in Table 5 below when the block data to be encoded is 2 × 2 color difference DC.

  The run encoding circuit 56 performs variable length encoding on the run data run_before based on the conversion table data TRNf shown in Table 6 below.

  The run encoding circuit 56 outputs an encoded code obtained by variable length encoding the run total number data total_zero and the run data run_before to the multiplexing circuit 57.

  The multiplexing circuit 57 generates image data S27 that is a bit stream obtained by multiplexing the encoded codes input from the two-dimensional lossless encoding circuit 54, the level encoding circuit 55, and the run encoding circuit 56, and stores the generated image data S27 in the buffer memory. Write to 28.

Hereinafter, the overall operation of the encoding apparatus 2 shown in FIG. 2 will be described.
The input image signal is first converted into a digital signal by the A / D conversion circuit 22.
Next, the frame image data is rearranged in the screen rearrangement circuit 23 in accordance with the GOP structure of the compressed image information to be output, and the original image data S23 obtained thereby is used as the arithmetic circuit 24, the motion prediction / compensation circuit. 42 and the intra prediction circuit 41.
Next, the arithmetic circuit 24 detects a difference between the original image data S23 from the screen rearrangement circuit 23 and the predicted image data PI from the selection circuit 44, and outputs image data S24 indicating the difference to the orthogonal transformation circuit 25. To do.

Next, based on the block size indicated by the orthogonal transform size signal TRSIZE input from the orthogonal transform size determining circuit 45, the orthogonal transform circuit 25 subjects the image data S24 to orthogonal transform such as discrete cosine transform or Karhunen-Labe transform. Image data (DCT coefficient) S25 is generated and output to the quantization circuit 26.
Next, the quantization circuit 26 quantizes the image data S25 based on the block size indicated by the orthogonal transform size signal TRSIZE input from the orthogonal transform size determination circuit 45, and the image data (quantized DCT coefficient) S26 is obtained. The result is output to the lossless encoding circuit 27 and the inverse quantization circuit 29.
Next, as described above, the lossless encoding circuit 27 performs variable-length encoding on the image data S26 to generate the image data S27, and stores this in the buffer memory 28.
Further, the rate control circuit 32 controls the quantization rate in the quantization circuit 26 based on the image data read from the buffer memory 28.

Further, the inverse quantization circuit 29 inversely quantizes the image data S <b> 26 input from the quantization circuit 26 and outputs it to the inverse orthogonal transform circuit 30.
Then, the inverse orthogonal transform circuit 30 outputs the image data generated by performing the inverse transform process of the orthogonal transform circuit 25 to the adder circuit 33.
In the addition circuit 33, the image data from the inverse orthogonal transform circuit 30 and the predicted image data PI from the selection circuit 44 are added to generate reference image data R_PIC, which is written into the frame memory 31.

Further, the intra prediction circuit 41 performs intra prediction encoding on the block data read from the frame memory 31 with the block sizes of 4 × 4 and 16 × 16, and generates the predicted image data.
In addition, the motion prediction / compensation circuit 42 performs inter prediction encoding on the block data read from the frame memory 31 with block sizes of 16 × 16, 16 × 8, 8 × 16, 8 × 8, 8 × 4, and 4 × 8, and generates predicted image data.
Then, prediction image data with the lowest coding cost is output to the arithmetic circuit 24 among the prediction image data of the intra prediction circuit 41 and the motion prediction / compensation circuit 42.

  The orthogonal transform size determination circuit 45 sends an orthogonal transform size signal TRSIZE indicating the block size used for generating the predicted image data output to the arithmetic circuit 24 to the orthogonal transform circuit 25, the quantization circuit 26, and the lossless encoding circuit 27. Output.

As described above, according to the encoding device 2, the total conversion table data TRNa shown in Table 1 used for encoding the transform coefficients orthogonally transformed by 4 × 4 in the lossless encoding circuit 27 shown in FIG. By using this, the non-zero coefficient number data TotalCoeff and the last continuous number data TrailingOne of the transform coefficients orthogonally transformed by 8 × 8 can be encoded.
Further, according to the encoding device 2, in the lossless encoding circuit 27, conversion table data TRNa1, a2, a3, a4 used for encoding the sub-block data SB1, SB2, SB3, SB4 is converted from (method 1) to Since the selection is made by (Method 4), high encoding efficiency can be realized.

<Decoding device 3>
Hereinafter, the decoding device 3 shown in FIG. 1 will be described.
FIG. 11 is a block diagram of the decoding device 3 shown in FIG.
As shown in FIG. 11, the decoding device 3 includes, for example, a buffer memory 81, a lossless decoding circuit 82, an inverse quantization circuit 83, an inverse orthogonal transform circuit 84, an addition circuit 85, a frame memory 86, an image rearrangement buffer 87, and a D / A conversion circuit 88, intra prediction circuit 89, and motion prediction / compensation circuit 90.

The buffer memory 81 stores image data S2 that is a bit stream received (input) from the encoding device 2.
The lossless decoding circuit 82 generates image data S82 by decoding the image data S2 read from the buffer memory 81 by a method corresponding to the lossless encoding by the lossless encoding circuit 27 shown in FIG.
The lossless decoding circuit 82 separates and decodes the orthogonal transform size signal TRSIZE multiplexed on the image data S2, and outputs the result to the inverse quantization circuit 83 and the inverse orthogonal transform circuit 84.
The lossless decoding circuit 82 will be described in detail later.

The inverse quantization circuit 83 corresponds to the quantization circuit 26 shown in FIG. 2 for the image data S82 after the lossless decoding input from the lossless decoding circuit 82 based on the orthogonal transform size signal TRSIZE input from the lossless decoding circuit 82. Image data S83 is generated by inverse quantization using the inverse quantization method, and is output to the inverse orthogonal transform circuit 84.
The inverse orthogonal transform circuit 84 corresponds to the orthogonal transform of the orthogonal transform circuit 25 shown in FIG. 2 on the image data S83 input from the inverse quantization circuit 83 based on the orthogonal transform size signal TRSIZE input from the lossless decoding circuit 82. An orthogonal inverse transform is performed to generate image data S84, which is output to the adder circuit 85.
The adder circuit 85 adds the predicted image input from the intra prediction circuit 89 or the motion prediction / compensation circuit 90 and the image data S84 input from the inverse orthogonal transform circuit 84 to generate image data S85, which is generated in the frame memory. 86 and the image rearrangement buffer 87.
The image rearrangement buffer 87 is used for rearranging the image data S85 input from the addition circuit 85 in the display order in units of pictures and reading them to the D / A conversion circuit 88.
The D / A conversion circuit 88 D / A converts the image data read from the image rearrangement buffer 87 to generate an analog image signal.

When the block data to be decoded in the image data S85 read from the frame memory 86 has been subjected to intra prediction encoding, the intra prediction circuit 89 generates predicted image data by decoding the block data using the intra method. This is output to the adder circuit 85.
When the block data to be decoded in the image data S85 read out from the frame memory 86 has been subjected to inter prediction encoding, the motion prediction / compensation circuit 90 decodes the block data by the inter method and predicts image data. Is output to the adder circuit 85.

Hereinafter, the lossless decoding circuit 82 shown in FIG. 11 will be described.
FIG. 12 is a configuration diagram of the lossless decoding circuit 82 shown in FIG.
As shown in FIG. 12, the lossless decoding circuit 82 includes, for example, a separation circuit 110, a two-dimensional lossless decoding circuit 111, a level decoding circuit 112, a run decoding circuit 113, a transform coefficient restoration circuit 114, a block restoration circuit 115, and scan conversion. A circuit 116 is included.
In the present embodiment, the processes of the dimension lossless decoding circuit 111, the level decoding circuit 112, the run decoding circuit 113, the transform coefficient restoration circuit 114, the block restoration circuit 115, and the scan conversion circuit 116 are orthogonal transformations separated from the separation circuit 110. This is performed using the size signal TRSIZE.

The separation circuit 110 separates (extracts) the encoded codes of the run data run_before and the run total number data total_zero from the encoded image data S 2, and outputs them to the run decoding circuit 113.
Further, the separation circuit 110 separates the encoded code of the level data level from the image data S2, and outputs this to the level decoding circuit 112.
Further, the separation circuit 110 separates the encoded codes of the non-zero coefficient number data TotalCoeff, the last continuous number data TrailingOnes, and the code data trailing_ones_sing_flag from the image data S 2, and outputs them to the two-dimensional lossless decoding circuit 111.
Further, the separation circuit 110 separates the orthogonal transform size signal TRSIZE from the image data S2, and these are separated into a two-dimensional lossless decoding circuit 111, a level decoding circuit 112, a run decoding circuit 113, a transform coefficient restoring circuit 114, a block shown in FIG. The data is output to the restoration circuit 115, the scan conversion circuit 116, and the inverse quantization circuit 83 and the inverse orthogonal transform circuit 84 shown in FIG.

The two-dimensional lossless decoding circuit 111 uses a method similar to the two-dimensional lossless encoding circuit 54 shown in FIG. 3 and uses the orthogonal transformation size signal TRSIZE and the like in the total conversion table data TRN shown in Table 1 above. One of the conversion table data TRNa1 to 5 is selected.
Then, the two-dimensional lossless decoding circuit 111 decodes the encoded code input from the separation circuit 110 using the selected conversion table data TRNa1 to 5, and obtains non-zero coefficient number data TotalCoeff and last consecutive number data TrailingOnes. This is output to the conversion coefficient restoration circuit 114.
In addition, the two-dimensional lossless decoding circuit 111 decodes the encoded code separated from the separation circuit 110, obtains code data trailing_ones_sing_flag, and outputs this to the transform coefficient restoration circuit 114.

  The level decoding circuit 112 performs decoding corresponding to the variable length coding of the level coding circuit 55 shown in FIG. 3 using the conversion table data TRNb shown in Table 2 described above, and converts the encoded code from the separation circuit 110 into the encoded code. The corresponding level data level is acquired and output to the conversion coefficient restoration circuit 114.

  The run decoding circuit 113 performs the decoding corresponding to the variable length coding of the run coding circuit 56 shown in FIG. 3, and the conversion table data TRNc, TRNd, TRNe, TRNf shown in Tables 3, 4, 5 and 6 described above. The run data run_before and the run total data total_zero corresponding to the encoded code are obtained from the separation circuit 110 and output to the transform coefficient restoration circuit 114.

  The transform coefficient restoration circuit 114 includes non-zero coefficient number data TotalCoeff input from the two-dimensional lossless decoding circuit 111, last continuous number data TrailingOnes and code data trailing_ones_sing_flag, level data level input from the level decoding circuit 112, and run decoding circuit 113. Based on the run data run_before and run total number data total_zero input from, a conversion coefficient is generated by a process reverse to the process of the run level calculation circuit 53 shown in FIG. 3 and is output to the block restoration circuit 115.

When the orthogonal transform size signal TRSIZE indicates 4 × 4, the block restoration circuit 115 stores the 4 × 4 transform coefficients input from the transform coefficient restoration circuit 114.
When the orthogonal transform size signal TRSIZE indicates 8 × 8, the block restoration circuit 115 stores the 8 × 8 transform coefficients input from the transform coefficient restoration circuit 114.

When the orthogonal transform size signal TRSIZE indicates 4 × 4, the scan transform circuit 116 dequantizes the 4 × 4 transform coefficients stored in the transform coefficient restoration circuit 114 by the inverse quantization circuit 83 illustrated in FIG. 11. The data is read out in an appropriate order and output to the inverse quantization circuit 83 as image data S82.
Further, when the orthogonal transform size signal TRSIZE indicates 8 × 8, the scan transform circuit 116 converts the 8 × 8 transform coefficients stored in the transform coefficient restoration circuit 114 into the scan order illustrated in FIG. 5 and the sub-block illustrated in FIG. 8. In consideration of the arrangement of the data SB1, SB2, SB3, and SB4, they are read out in an order suitable for inverse quantization by the inverse quantization circuit 83 shown in FIG. 11 and output to the inverse quantization circuit 83 as image data S82.

  According to the decoding device 3, the encoded codes of the non-zero coefficient number data TotalCoeff and the last continuous number data TrailingOne encoded by the encoding device 2 described above can be restored.

The present invention is not limited to the embodiment described above.
For example, in the above-described embodiment, the total conversion table data TRNa shown in Table 1 is exemplified as the correspondence data for encoding the non-zero coefficient number data TotalCoeff and the last consecutive number data TrailingOne, but the conversion table data TRNa1, 2, 3 and 4 are such that the bit lengths of the non-zero coefficient count data TotalCoeff indicating 0 are different from each other, and the maximum bit length of the encoded code becomes longer as the bit length of the non-zero coefficient count data TotalCoeff indicating 0 becomes shorter. Other conversion table data may be used.

In the encoding device 2 described above, the encoding process shown in FIG. 10 and the like is exemplified by the configuration circuit of the lossless encoding circuit 27 shown in FIG. 3, but all or part of these processes is performed. A CPU (Central Processing Unit) or the like may be executed according to the description of the program.
Further, in the decoding device 3 described above, the case where the decoding process is realized by the configuration circuit of the lossless decoding circuit 82 shown in FIG. 11 is exemplified, but the CPU or the like executes all or part of these processes according to the description of the program. May be.

  The present invention is applicable to an encoding system that encodes transform coefficients of orthogonal transform.

  DESCRIPTION OF SYMBOLS 1 ... Communication system, 2 ... Encoding apparatus, 3 ... Decoding apparatus, 22 ... A / D conversion circuit, 23 ... Screen rearrangement circuit, 24 ... Arithmetic circuit, 25 ... Orthogonal transformation circuit, 26 ... Quantization circuit, 27 ... Lossless encoding circuit, 28 ... buffer memory, 29 ... inverse quantization circuit, 30 ... inverse orthogonal transform circuit, 31 ... frame memory, 32 ... rate control circuit, 33 ... adder circuit, 41 ... intra prediction circuit, 42 ... motion prediction Compensation circuit 45 ... Orthogonal transform size determination circuit 51 ... Scan circuit 52 ... Sub-block generation circuit 53 ... Run level calculation circuit 54 ... Two-dimensional lossless encoding circuit 55 ... Level encoding circuit 56 ... Run encoding circuit 57... Multiplexing circuit 81. Buffer memory 82. Lossless decoding circuit 83. Inverse quantization circuit 84. Inverse orthogonal transformation circuit 85 85 Adder circuit 86. ... Image rearrangement buffer, 88 ... D / A conversion circuit, 110 ... separation circuit, 111 ... two-dimensional lossless decoding circuit, 112 ... level decoding circuit, 113 ... run decoding circuit, 114 ... transform coefficient restoration circuit, 115 ... block restoration Circuit 116 ... Scan conversion circuit

Claims (12)

In a decoding device that decodes encoded image data obtained by encoding image data,
From the encoded image data, an encoded code corresponding to the value of the last consecutive number data indicating the number of transform coefficients having an absolute value of 1 which is continuous at the end of the transform coefficient obtained by orthogonal transformation of the image data with an orthogonal transform size is obtained. Acquisition means to
The value of the last consecutive number data indicating the number of transform coefficients of absolute value 1 that are continuous at the end of the transform coefficients that are orthogonally transformed by sub-blocks smaller than the orthogonal transform size when the image data is orthogonally transformed, and the encoding code A selection means for selecting correspondence data indicating the correspondence;
Using the correspondence data selected by the selection means, decoding the encoded code acquired by the acquisition means, and generating the last consecutive number data;
A decoding device comprising: The decoding device according to claim 1, further comprising decoding means for decoding the encoded image data using the last consecutive number data generated by the generating means. The decoding device according to claim 1, wherein the selection unit selects the correspondence data according to a value of index data calculated using the number of transform coefficients included in the sub-block. The decoding device according to claim 1, wherein the selection unit selects the correspondence data according to a value of index data calculated according to a position of the sub-block. The index data includes a block size of an upper block adjacent to the processing target block and a block size of a left block adjacent to the left of the processing target block for a sub-block in the processing target block. The decoding device according to claim 3, wherein the decoding device is calculated using index data for sub-blocks at the same position in the upper block and the left block in the same case. The index data includes a block size of an upper block adjacent to the processing target block and a block size of a left block adjacent to the left of the processing target block for a sub-block in the processing target block. The decoding device according to claim 3, wherein the decoding device is calculated using index data for sub-blocks at the same position in a block having a large block size when they are different. The index data (nC) of the processing target block is calculated by the following equation:
nC = (nA + nB + 1) >> 1
However, nA is the index data of the sub-block in the left block,
nB is index data of a sub-block in the upper block,
The decoding device according to claim 6. The orthogonal transform size is 8 × 8,
The decoding device according to claim 1, wherein a size of the sub-block is 4 × 4. The correspondence data is defined such that the bit length of the encoded code increases as the bit length of the last consecutive number data increases.
The decoding device according to claim 1. In a decoding method for decoding encoded image data obtained by encoding image data,
From the encoded image data, an encoded code corresponding to the value of the last consecutive number data indicating the number of transform coefficients having an absolute value of 1 which is continuous at the end of the transform coefficient obtained by orthogonal transformation of the image data with an orthogonal transform size is obtained. An acquisition process to
A value of the last consecutive number data indicating the number of transform coefficients of absolute value 1 that are continuous at the end of transform coefficients orthogonally transformed with a sub-block size smaller than the orthogonal transform size when the image data is orthogonally transformed, and an encoding code; A selection step of selecting correspondence data indicating the correspondence of
Using the correspondence data selected in the selection step, decoding the encoded code acquired in the acquisition step, and generating the last continuous number data; and
A decoding method comprising: In a decoding program for causing a computer to execute a procedure for decoding encoded image data obtained by encoding image data, executed in a computer,
From the encoded image data, an encoded code corresponding to the value of the last consecutive number data indicating the number of transform coefficients having an absolute value of 1 which is continuous at the end of the transform coefficient obtained by orthogonal transformation of the image data with an orthogonal transform size is obtained. And the acquisition procedure to
A value of the last consecutive number data indicating the number of transform coefficients of absolute value 1 that are continuous at the end of transform coefficients orthogonally transformed with a sub-block size smaller than the orthogonal transform size when the image data is orthogonally transformed, and an encoding code; A selection procedure for selecting correspondence data indicating the correspondence of
Using the correspondence data selected by the execution of the selection procedure, the generation procedure for decoding the encoded code acquired by the execution of the acquisition procedure and generating the last consecutive number data,
Is a decryption program that causes a computer to execute. In a recording medium recorded with a routine for decoding encoded image data obtained by encoding image data, which is executed in a computer,
From the encoded image data, an encoded code corresponding to the value of the last consecutive number data indicating the number of transform coefficients having an absolute value of 1 which is continuous at the end of the transform coefficient obtained by orthogonal transformation of the image data with an orthogonal transform size is obtained. A get routine to
A value of the last consecutive number data indicating the number of transform coefficients of absolute value 1 that are continuous at the end of transform coefficients orthogonally transformed with a sub-block size smaller than the orthogonal transform size when the image data is orthogonally transformed, and an encoding code; A selection routine for selecting correspondence data indicating the correspondence of
A generation routine for decoding the encoded code acquired by the execution of the acquisition routine using the correspondence data selected by the execution of the selection routine to generate the last continuous number data;
Recording medium.

Images