JP2010135367A - Circuit device using multilayered substrate - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a circuit device reducing noise entering one circuit block from the other circuit block and further reducing noise entering sensitive wiring in one circuit block. <P>SOLUTION: Circuit components of a first circuit block are disposed on one surface of a multilayered substrate, while circuit components of a second circuit block are disposed on the other surface. The circuit components and wiring of the first circuit block and those of the second circuit block are arranged not to overlap with each other in the direction perpendicular to the surface of the multilayered substrate. Ground patterns of the first circuit block and those of the second circuit block are disposed not to overlap with each other similarly. At least a portion of the wiring of the first circuit block is arranged between the layers where the ground patterns of the first circuit block are arranged. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a circuit device using a multilayer substrate, and more particularly to a device having a plurality of circuit blocks.

  In recent wireless communication devices, etc., an analog circuit block (one circuit block) typified by a high frequency circuit and a digital circuit block (other circuit block) typified by a baseband circuit that performs modulation and demodulation. Are increasingly provided on the same multilayer substrate. According to such a configuration, it is easy to reduce the size of the circuit components as compared with the case where the analog circuit and the digital circuit are provided on separate substrates.

  However, when such a configuration is adopted, noise generated by the digital circuit may be mixed into the analog circuit and the performance of the analog circuit may be deteriorated. Therefore, a technique for preventing the noise generated by the digital circuit from entering the analog circuit as much as possible is required.

In this regard, for example, in Patent Document 1, the analog signal processing area and the digital signal processing area are arranged not to be mixed in the front surface layer, and the analog signal processing area is located below the digital signal processing area in the back surface layer. A technology that places the digital signal processing area below the analog signal processing area so that it is not located, and grounds all areas corresponding to the analog signal processing area and the vertical position in the inner layer with a ground pattern. It is disclosed.
JP-A-10-190167 Japanese Patent No. 3895501 JP-A-8-204344

  According to the technique disclosed in Patent Document 1, it is possible to prevent noise from flowing from the digital signal processing area to the analog signal processing area to some extent. However, in wireless communication devices, for example, with the miniaturization and thinning of products, the layers of the multilayer substrate used inside become very thin, and the wiring interval is also very small.

  Therefore, even if the analog signal processing area and the digital signal processing area are spatially separated, noise from the digital signal processing area may be mixed into the analog signal processing area due to wiring or inter-layer coupling. is there. In this case, in particular, among the wirings in the analog signal processing area, the noise is mixed into the wiring (sensitive wiring) that is easily affected by the noise from the digital signal processing area, and the appropriate processing of the analog signal is hindered. There is a fear.

  In addition, if the ground corresponding to the analog signal processing area and the ground corresponding to the digital signal processing area are electrically connected in the substrate, if there is a digital IC or the like with high power consumption in the digital signal processing area, the digital signal There is a risk that noise may enter the ground itself corresponding to the processing area. Therefore, there is a possibility that noise is mixed into the analog signal processing area via the ground pattern.

  In view of the above-described problems, the present invention provides a plurality of circuit blocks provided on the same multilayer substrate, reduces noise mixed from one circuit block to the other circuit block, and is sensitive wiring in one circuit block. It is an object of the present invention to provide a circuit device that can further suppress the noise from being mixed in. Another object is to provide a wireless communication device using the circuit device.

  To achieve the above object, a circuit device according to the present invention is a circuit device in which a first circuit block and a second circuit block are provided on the same multilayer substrate, and the circuit component of the first circuit block. Is disposed on at least one surface of the multilayer substrate, and circuit components of the second circuit block are disposed on at least the other surface of the multilayer substrate, and the circuit components and wiring of the first circuit block, and the second circuit block The circuit components and the wirings of the first circuit block and the second circuit block are arranged so as not to overlap each other when viewed in a direction perpendicular to the plane of the multilayer substrate. The first circuit block ground pattern is disposed in at least two layers of the multilayer substrate, and is disposed so as not to overlap each other when viewed in a direction perpendicular to the surface of the substrate. At least part of the wiring of the first circuit block (the "specific wiring") has a structure in which a ground pattern of the first circuit block is disposed between the layers to each other arranged.

  According to this configuration, in the relationship between the first circuit block and the second circuit block, the circuit components, the wiring, and the ground pattern are arranged so as not to overlap each other when viewed in the direction perpendicular to the surface of the multilayer substrate. Yes. Therefore, it is possible to reduce noise mixed from the second circuit block to the first circuit block as compared with those arranged so as to overlap each other.

  Further, the specific wiring is arranged between the layers where the ground pattern of the first circuit block is arranged. Therefore, the ground pattern of the first circuit block serves as an electromagnetic shield for the specific wiring, and it is possible to further suppress the noise generated in the second circuit block from being mixed into the specific wiring. . As a result, among the wirings in the first circuit block, if a wiring that is particularly susceptible to noise (sensitive wiring) is used as the specific wiring, it is possible to further suppress the mixing of noise into the sensitive wiring. It becomes possible.

  In the above configuration, the ground pattern of the first circuit block and the ground pattern of the second circuit block may not be connected to each other inside the multilayer substrate.

  According to this configuration, the ground pattern of the first circuit block and the ground pattern of the second circuit block are separated spatially and electrically inside the multilayer substrate. Therefore, it is possible to suppress the mixing of noise from the second circuit block to the first circuit block via the ground pattern as much as possible.

  More specifically, the first circuit block may be an analog circuit block that mainly handles analog signals, and the second circuit block may be a digital circuit block that mainly handles digital signals. Good.

  More specifically, the specific wiring may be a power supply line of the first circuit block, or may be a wiring that transmits a high-frequency signal.

  A wireless communication apparatus according to the present invention is a wireless communication apparatus that includes the circuit device having the above-described configuration and executes processing related to wireless communication using the circuit device, and the circuit device is mounted on a main board. The ground pattern of the first circuit and the ground pattern of the second circuit are connected on the main board.

  According to this configuration, the ground pattern of the first circuit and the ground pattern of the second circuit can be connected at a position away from the circuit device. Therefore, it is possible to suppress the mixing of noise from the second circuit block to the first circuit block via the ground pattern as much as possible.

  In the above configuration, the ground pattern of the first circuit and the ground pattern of the second circuit may be connected to each other via an inductor or a ferrite bead on the main substrate.

  According to this configuration, noise mixed from the second circuit block to the first circuit block is reduced by the inductor or the ferrite bead. Therefore, it is possible to further suppress the mixing of noise from the second circuit block to the first circuit block via the ground pattern.

  As described above, according to the circuit device according to the present invention, in the relationship between the first circuit block and the second circuit block, the circuit component and the wiring, and the ground pattern are viewed in the direction perpendicular to the plane of the multilayer substrate. They are arranged so as not to overlap each other. Therefore, it is possible to reduce noise mixed from the second circuit block to the first circuit block as compared with those arranged so as to overlap each other.

  Further, the specific wiring is arranged between the layers where the ground pattern of the first circuit block is arranged. Therefore, the ground pattern of the first circuit block serves as an electromagnetic shield for the specific wiring, and it is possible to further suppress the noise generated in the second circuit block from being mixed into the specific wiring. . As a result, among the wirings in the first circuit block, if a wiring that is particularly susceptible to noise (sensitive wiring) is used as the specific wiring, it is possible to further suppress the mixing of noise into the sensitive wiring. It becomes possible.

[Example 1]
An embodiment (Example 1) according to the present invention will be described below with reference to the circuit device having the configuration shown in FIG. FIG. 1 shows a schematic cross-sectional view of the circuit device. As shown in the figure, the circuit device 9 is formed by providing an analog circuit block 2 and a digital circuit block 3 on the same multilayer substrate 1. The analog circuit block 2 and the digital circuit block 3 are provided at different positions with respect to a boundary surface 4 that is a surface perpendicular to the surface of the multilayer substrate 1 (mounting surface for circuit components).

  The analog circuit block 2 is a circuit block that constitutes an analog circuit (a circuit that mainly handles analog signals) such as a high-frequency signal processing circuit in a wireless communication device, for example. The analog circuit block 2 includes an analog circuit component 21, analog ground patterns (22a, 22b), analog wiring patterns (23a-23f), and the like.

  The analog circuit component 21 is a mounting component for configuring an analog circuit. As shown in FIG. 1, the analog circuit component 21 is disposed on one surface (front surface) of the multilayer substrate 1.

  The analog ground patterns (22a, 22b) are ground patterns provided corresponding to the analog circuit block 2, and apply a reference potential (ground potential) to the analog circuit. The analog ground patterns (22a, 22b) are provided over two layers in the multilayer substrate 1, but three or more layers may be provided.

  The analog wiring patterns (23a to 23f) are wiring patterns provided corresponding to the analog circuit block 2, and play a role of wiring in the analog circuit. The analog wiring patterns (23 a to 23 f) are provided over a plurality of layers in the multilayer substrate 1.

  In particular, the analog wiring pattern 23b (hereinafter sometimes referred to as “specific wiring pattern 23b”) is between the layer in which the analog ground pattern 22a is disposed and the layer in which the analog ground pattern 22b is disposed. Arranged in layers. The specific wiring pattern 23b is arranged so as to be completely included in the analog ground pattern 22a and the analog ground pattern 22b when viewed in a direction perpendicular to the surface of the multilayer substrate 1.

  On the other hand, the digital circuit block 3 is a circuit block constituting a digital circuit (a circuit that mainly handles digital signals) such as a digital signal processing circuit in a wireless communication apparatus. The digital circuit block 3 is provided with a digital circuit component 31, a digital ground pattern 32, digital wiring patterns (33a to 33g), and the like.

  The digital circuit component 31 is a mounting component for configuring a digital circuit. As shown in FIG. 1, the digital circuit component 31 is disposed on the surface (back surface) of the multilayer substrate 1 on the side where the analog circuit component 21 is not disposed.

  The digital ground pattern 32 is a ground pattern provided corresponding to the digital circuit block 3 and applies a reference potential (ground potential) to the digital circuit.

  The digital wiring patterns (33a to 33g) are wiring patterns provided corresponding to the digital circuit block 3, and play a role of wiring in the digital circuit. The digital wiring patterns (33a to 33g) are provided over a plurality of layers in the multilayer substrate 1.

  The circuit device 9 has the configuration as described above, and can be applied as a circuit device for a wireless communication device, for example. Further, the circuit device 9 can reduce the noise mixed from the digital circuit to the analog circuit as much as possible for the following reason.

  First, the analog circuit component 21 and the digital circuit component 31 are arranged on different surfaces of the multilayer substrate 1. Therefore, compared with the case where the analog circuit component 21 and the digital circuit component 31 are arranged on the same surface of the multilayer substrate, both can be arranged far apart, and the digital circuit is mixed into the analog circuit. Noise can be reduced.

  The analog circuit component 21 and the analog wiring patterns (23a to 23f) and the digital circuit component 31 and the digital wiring patterns (33a to 33g) are not overlapped with each other when viewed in a direction perpendicular to the surface of the multilayer substrate 1. Is provided. Therefore, compared with the case where these are provided so as to overlap each other, it is possible to dispose them both more greatly, and it is possible to reduce noise mixed from the digital circuit to the analog circuit. .

  The analog ground pattern (22a, 22b) and the digital ground pattern 32 are provided so as not to overlap each other when viewed in the direction perpendicular to the surface of the multilayer substrate 1. Therefore, compared with the case where these are provided so as to overlap each other, it is possible to dispose them both more greatly, and it is possible to reduce noise mixed from the digital circuit to the analog circuit. .

  Further, the specific wiring pattern 23b is disposed between the layer where the analog ground pattern 22a is disposed and the layer where the analog ground pattern 22b is disposed. Therefore, these analog ground patterns (22a, 22b) serve as an electromagnetic shield for the specific wiring pattern 23b. Thereby, according to the circuit device 9, in particular, it is possible to prevent noise from being mixed into the specific wiring pattern 23b as much as possible.

  Therefore, the specific wiring pattern 23b is preferably used as a wiring pattern for wiring that is susceptible to noise from the digital circuit (wiring that is vulnerable to noise), that is, sensitive wiring, among wiring in the analog circuit. Thereby, it is possible to prevent the noise from the digital circuit or the like from being mixed into the sensitive wiring as much as possible.

  Specific examples of the sensitive wiring include wiring for transmitting a high-frequency signal, and a power supply line for the analog circuit block 2 (particularly, a main circuit that greatly affects the performance of the analog circuit). These wirings (lines) can be said to be wirings that are easily affected by the operation of related circuits even when relatively small noise is mixed. However, wiring that is susceptible to noise varies depending on the type of analog circuit, and therefore other wiring may be regarded as sensitive wiring.

  Further, in order to more sufficiently suppress the mixing of noise from the digital circuit into the specific wiring pattern 23 b, it is desirable that the specific wiring pattern 23 b is arranged as far as possible from the digital circuit block 3.

  Furthermore, as shown in FIG. 2, analog ground patterns (22c, 22d) may be disposed so as to surround the specific wiring pattern 23b in the layer where the specific wiring pattern 23b is disposed. As a result, the analog ground patterns (22c, 22d) serve as an electromagnetic shield for the specific wiring pattern 23b, and it is possible to more sufficiently suppress noise contamination from the digital circuit to the specific wiring pattern 23b.

[Example 2]
Next, another embodiment (Example 2) according to the present invention will be described below with reference to a wireless communication device to which the circuit device 9 according to Example 1 is applied.

  FIG. 3 shows a configuration diagram of the wireless communication device (excerpt of main parts). As shown in the figure, the wireless communication device 50 is configured by mounting a sub board 52 on a main board 51. The sub board 52 corresponds to the circuit device 9 in the first embodiment, and uses a multilayer board (corresponding to the multilayer board 1 in the first embodiment), and a tuner block 53 (corresponding to the analog circuit block 2). And a demodulation block 54 (corresponding to the digital circuit block 3).

  The tuner block 53 is a circuit block for extracting only a specific high-frequency signal from a plurality of digitally modulated high-frequency signals, and circuit components (such as an RF amplifier 61, a frequency converter 62, a filter 63, and an IF amplifier 64). (Corresponding to the analog circuit component 21 in the first embodiment).

  These circuit components are supplied with power from a predetermined analog power source, and are connected to each other via wiring patterns in the multilayer substrate (corresponding to analog wiring patterns 23a to 23f in the first embodiment). It is connected. These circuit components are connected to a ground pattern (corresponding to the analog ground patterns 22a and 22b in the first embodiment) provided in the tuner block 53 through a wiring pattern in the multilayer substrate.

  Note that the wiring pattern for sensitive wiring in the tuner block 53 (for example, a power supply line for supplying power from an analog power supply to circuit components, a wiring for transmitting a high-frequency signal, etc.) is the specific wiring in the first embodiment. Like the pattern 23b, it is arranged between the ground patterns.

  As a result, the ground pattern in the tuner block 53 serves as an electromagnetic shield for the wiring pattern of the sensitive wiring. As a result, it is possible to prevent noise from entering the wiring pattern from the demodulation block 54 or the like as much as possible.

  The RF amplifier 61 amplifies the high-frequency signal received through the antenna and outputs the amplified signal to the subsequent frequency conversion unit 62. Further, the frequency conversion unit 62 performs frequency conversion processing on the high-frequency signal transmitted from the RF amplifier 61 and outputs the result to the subsequent-stage filter 63.

  The filter 63 extracts a signal in a desired frequency band (for example, designated by the user) from the signal transmitted from the frequency converter 62 and outputs the signal to the IF amplifier 64 on the rear stage side. The IF amplifier 64 amplifies the signal transmitted from the filter 63 and outputs the amplified signal to the demodulation block 54 side.

  The demodulation block 54 is a circuit block that demodulates the signal transmitted from the tuner block 53, and includes an AD conversion unit 65, a digital signal processing unit 66 (corresponding to the digital circuit component 31 in the first embodiment), and the like. .

  These components are supplied with power from a predetermined digital power source, and are connected to each other via wiring patterns in the multilayer substrate (corresponding to the digital wiring patterns 33a to 33g in the first embodiment). It is connected. These circuit components are connected to a ground pattern (corresponding to the digital ground pattern 32 in the first embodiment) provided in the demodulation block 54 via a wiring pattern in the multilayer substrate.

  The AD conversion unit 65 converts the analog signal transmitted from the tuner block 53 (IF amplifier 64) into a digital signal and outputs the digital signal to the digital signal processing unit 66 on the subsequent stage side. The digital signal processing unit 66 demodulates the digital signal transmitted from the AD conversion unit 65 into a digital signal before modulation and outputs the digital signal to the outside.

  The signal (demodulated data signal) output to the outside is transmitted to, for example, a not-shown video display device or audio output device, and video display or audio output corresponding to the demodulated data signal is executed. As described above, the wireless communication device 50 uses the sub-board 52 to execute each process related to wireless communication.

  The ground pattern (analog ground pattern) provided in the tuner block 53 and the ground pattern (digital ground pattern) provided in the demodulation block 54 are not connected to each other in the multilayer substrate. However, these ground patterns are connected to each other via an inductor 55 at a position on the main board 51 away from the sub board 52.

  As a result, it is possible to prevent the high-frequency noise mixed in the digital ground pattern from being mixed into the analog ground pattern as much as possible. Further, these ground patterns may be connected to each other via ferrite beads on the main substrate 51. Even in this case, it is possible to prevent the high-frequency noise mixed in the digital ground pattern from being mixed into the analog ground pattern as much as possible.

  Note that in the present embodiment, each component constituting the tuner block 53 and the demodulation block 54 may be constituted by individual components. Alternatively, all or part of the tuner block 53 and the demodulation block 54 may be realized by a semiconductor integrated circuit in order to reduce the size of the sub-board 52.

  In the second embodiment, the receiving device is described as an example of the wireless communication device. However, the circuit device 9 according to the first embodiment can be applied to a transmitting device or a transmitting / receiving device. In addition to the wireless communication device, the circuit device 9 according to the first embodiment is applied to all electronic devices including a circuit block that is susceptible to noise and a circuit device having a circuit block that generates noise. Is possible.

[Summary]
As described above, in the circuit device 9 according to the embodiment of the present invention, the analog circuit block 2 (first circuit block) and the digital circuit block 3 (second circuit block) are provided on the same multilayer substrate 1. Is formed. An analog circuit component 21 (circuit component of the first circuit block) is arranged on one surface of the multilayer substrate 1, and a digital circuit component 31 (circuit component of the second circuit block) is disposed on the other surface of the multilayer substrate 1. Has been placed.

  The analog circuit component 21 and the analog wiring patterns 23a to 23f (circuit components and wiring of the first circuit block) and the digital circuit component 31 and the digital wiring patterns 33a to 33g (circuit components and wiring of the second circuit block) are: They are arranged so as not to overlap each other when viewed in a direction perpendicular to the surface of the multilayer substrate 1. Further, the analog ground patterns 22a and 22b (the ground pattern of the first circuit block) and the digital ground pattern 32 (the ground pattern of the second circuit block) do not overlap each other when viewed in the direction perpendicular to the surface of the multilayer substrate 1. Are arranged as follows.

  Further, the analog ground patterns 22 a and 22 b are arranged on two layers of the multilayer substrate 1. Further, the specific wiring pattern 23b (specific wiring) which is a part of the analog wiring patterns 23a to 23f is disposed between the layer where the analog ground pattern 22a is disposed and the layer where the analog ground pattern 22b is disposed. Yes.

  Therefore, in the relationship between the analog circuit block 2 and the digital circuit block 3, the digital circuit block 3 is connected to the analog circuit in comparison with the circuit component, the wiring pattern (wiring), and the ground pattern arranged so as to overlap each other. Noise mixed in the block 2 can be reduced.

  Further, the analog ground pattern (22a, 22b) serves as an electromagnetic shield for the specific wiring pattern 23b, and further suppresses the noise generated in the digital circuit block 3 from being mixed into the specific wiring pattern 23b. It is possible. As a result, among the wirings in the analog circuit block 2, wirings that are particularly susceptible to noise (sensitive wirings) are designated as the specific wiring pattern 23b, and it is possible to further suppress noise from being mixed into the sensitive wirings. It is possible.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to this content. The present invention can be implemented with various modifications without departing from the spirit of the present invention.

  The present invention can be used in the field of wireless communication devices and the like.

1 is a configuration diagram of a circuit device according to Embodiment 1 of the present invention. It is another block diagram of the circuit apparatus based on Example 1 of this invention. It is a block diagram of the radio | wireless communication apparatus which concerns on Example 2 of this invention.

Explanation of symbols

1 multilayer substrate 2 analog circuit block (first circuit block)
3 Digital circuit block (second circuit block)
DESCRIPTION OF SYMBOLS 4 Interface 9 Circuit apparatus 21 Analog circuit components 22a-22d Analog ground pattern 23a-23f Analog wiring pattern 31 Digital circuit components 32 Digital ground pattern 33a-33g Digital wiring pattern 50 Wireless communication apparatus 51 Main board 52 Sub board (circuit apparatus)
53 Tuner block (first circuit block)
54 Demodulation block (second circuit block)
55 Inductor 61 RF Amplifier 62 Frequency Conversion Unit 63 Filter 64 IF Amplifier 65 AD Conversion Unit 66 Digital Signal Processing Unit

Claims (7)

A circuit device in which the first circuit block and the second circuit block are provided on the same multilayer substrate,
Circuit components of the first circuit block are disposed on at least one surface of the multilayer substrate;
The circuit component of the second circuit block is disposed on at least the other surface of the multilayer substrate;
The circuit components and wiring of the first circuit block and the circuit components and wiring of the second circuit block are arranged so as not to overlap each other when viewed in the direction perpendicular to the surface of the multilayer substrate.
The ground pattern of the first circuit block and the ground pattern of the second circuit block are arranged so as not to overlap each other when viewed in a direction perpendicular to the surface of the multilayer substrate.
The ground pattern of the first circuit block is
Arranged in at least two layers of the multilayer substrate;
At least part of the wiring of the first circuit block (referred to as “specific wiring”)
A circuit device, wherein the circuit device is disposed between layers where the ground pattern of the first circuit block is disposed.   2. The circuit device according to claim 1, wherein the ground pattern of the first circuit block and the ground pattern of the second circuit block are not connected to each other inside the multilayer substrate. The first circuit block is an analog circuit block mainly handling analog signals,
The circuit device according to claim 1, wherein the second circuit block is a digital circuit block that mainly handles digital signals. The specific wiring is
The circuit device according to any one of claims 1 to 3, wherein the circuit device is a power supply line of the first circuit block. The specific wiring is
The circuit device according to claim 1, wherein the circuit device is a wiring that transmits a high-frequency signal. A wireless communication device comprising the circuit device according to any one of claims 1 to 5 and executing processing related to wireless communication using the circuit device,
The circuit device is mounted on a predetermined main board,
A wireless communication device, wherein the ground pattern of the first circuit and the ground pattern of the second circuit are connected on the main board.   The radio communication apparatus according to claim 6, wherein the ground pattern of the first circuit and the ground pattern of the second circuit are connected to each other via an inductor or a ferrite bead on the main substrate.

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