JP2010114762A - Serial communication device, communication control method, and communication control program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a serial communication device which has a serial communication function that takes advantage of characteristics of image data and does not deteriorate real-time property even if a receiving error occurs due to noise on a transmission path. <P>SOLUTION: The serial communication device includes a serializer circuit which converts parallel data into serial data and outputs it, and a deserializer circuit which converts the serial data output from the serializer circuit into parallel data and outputs it. The serializer circuit inserts additional information for detecting image data in the parallel data before and behind the image data in the parallel data, and the deserializer circuit detects the additional information inserted by the serializer circuit in the converted parallel data, and extracts the image data from the parallel data based upon the results of the detection. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a technique for high-speed serial communication in an image processing apparatus.

  Up to now, devices that transfer image data, such as copiers and scanners, have mainly used a parallel interface, and transmission and reception of image data are performed at a predetermined timing for each line via the interface. .

  However, with the trend toward higher speed and higher resolution of these devices, it has become necessary to greatly increase the transfer amount of image data. When data was transferred via a parallel interface as in the past, problems such as EMI (Electro Magnetic Interference) noise became a concern due to an increase in data signal lines and a faster transfer clock. .

Therefore, in recent years, high-speed serial transfer interfaces represented by LVDS (Low Voltage Differential Signaling) have been spotlighted as interfaces for the purpose of reducing EMI noise. In this high-speed serial transfer, the transmitter circuit serializes the data into a differential signal (Differential
Signals), and the receiver circuit differentially amplifies the differential signal to realize data transfer. By using this serial transfer between electronic devices, the number of physical signal lines of the interface is reduced, and EMI noise can be reduced.

However, if communication between the control devices of the devices that perform communication is also serial communication, communication between the control devices cannot be performed if serial communication fails. In order to solve the problem, Patent Document 1 and the like provide a signal transmission system that can transmit and receive control information between devices even when a serial line that transmits and receives data between the devices becomes incapable of communication. It is the actual situation.
JP-A-2005-303600

  Therefore, an object of the present invention is to provide a serial communication device, a communication control method, and a communication control program that take advantage of the characteristics of image data and do not impair real-time performance even when a reception error due to noise on the transmission path occurs.

  In one form of the disclosed serial communication device, a serializer circuit that converts parallel data including image data into serial data and outputs the serial data, and a deserializer circuit that converts the serial data output from the serializer circuit into parallel data and outputs the parallel data And the serializer circuit inserts additional information for detecting the image data in the parallel data before and after the image data in the parallel data, The deserializer circuit detects the additional information inserted by the serializer circuit in the converted parallel data, extracts the image data from the parallel data based on the detection result, and extracts the extracted image It is characterized by outputting data.

  In one form of the disclosed serial communication device, there are a plurality of additional information inserted before and after the image data, and the additional information is different, and the deserializer circuit includes the image data Detection results related to some of the additional information among the plurality of additional information inserted before the image, and detection results related to some of the additional information among the plurality of additional information inserted after the image data Based on the above, the image data in the parallel data is extracted.

  The disclosed serial communication device may further include a scanner that optically reads a document image and outputs the read result as image data, and the serializer circuit includes parallel data including image data output by the scanner. Is converted into serial data and output.

  Based on the above features, the disclosed serial communication device has a serial communication function that takes advantage of the characteristics of image data and does not impair real-time performance even when a reception error due to noise on the transmission path occurs.

  Provided is a serial communication device that takes advantage of the characteristics of image data and does not impair real-time performance even when a reception error occurs due to noise or the like on a transmission path.

The best mode for carrying out the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of serial communication apparatus 100 according to the present embodiment. The serial communication device 100 includes a serializer control circuit 260, a transmission data processing circuit 220, an 8b10b encoding circuit 230, a parallel / serial conversion circuit 240, a serializer circuit 210 including a driver 250, a receiver 320, and a CDR (Clock
Data Recovery) circuit 330, serial / parallel conversion circuit 340, elastic buffer circuit 350, 10B8B decoding circuit 360, received data processing circuit 370, and deserializer circuit 300 including deserializer control circuit 380.

  The serializer circuit 210 is incorporated in the external device 200 such as a scanner, serializes the image data, and transfers it to the deserializer circuit 310 of the image writing control device 300. Serial data transmission from the external device 200 to the image writing control device 300 is performed via a differential signal line (differential signal line pair), and the serializer circuit 210 and the deserializer circuit 310 are connected by a Serial ATA cable or the like.

  The deserializer circuit 310 is incorporated in the image writing control device 300, converts serial data transmitted from the serializer circuit 210 of the external device 200 into parallel data, and outputs the parallel data to an image writing control circuit (not shown).

  Note that the serial communication device 100 does not need to include all of the circuits shown in FIG. 1 and may be configured to omit or add some of them.

  Hereinafter, the operation of the serializer circuit 210 will be described. After the reset is released, the transmission data processing circuit 220 receives transmission data that is image data transmitted from a scanner or the like. As shown in FIG. 2, the transmission data includes invalid data and valid data. This valid data corresponds to, for example, data for one line in the horizontal direction of the image.

  In the transmission data, the serializer control circuit 260 determines whether the data is valid data based on the transmission control signal. Here, FIG. 2 shows invalid data when the transmission control signal is Low, and valid data when the transmission control signal is High.

  Then, additional information (hereinafter referred to as control code) of stp1-stp4 at the front of the valid data, end1-end4 at the rear of the valid data, and a control code com for invalid data in the invalid data part are generated in the control code generation circuit 224. The control code is inserted by switching the original transmission data generated by the data timing adjustment timing in the data timing adjustment circuit 222 with the selector 226 and output to the 8b10b encoding circuit 230 in the next stage. The selector 226 is switched by the serializer control circuit 260 (FIG. 3).

The 8b10b encoding circuit 230 encodes 8-bit data into 10 bits using the 8b10b encoding technique. This technology is Serial
Used in high-speed serial interface standards such as ATA and PCI Express. In this 8b10b encoding technique, data is assigned as 256 D codes in a 10-bit bit string, and the remaining code is assigned as a K code (character) for control.

  The 8b10b encoding circuit 230 converts the above-described stp1-stp4, end1-end4, and com into the K code, and converts the valid data into the D code and outputs it to the parallel / serial conversion circuit 240.

  FIG. 4 is a diagram showing an example of the K code used in the present embodiment. “Com” is used to indicate invalid data, “stp1,” “stp2,” “stp3,” and “stp4” are used to indicate the beginning of valid data, and “end1,” “end2,” “end3,” and “end4” are valid. Used to indicate the end of data.

  In FIG. 4, RD- / RD + is called running disparity (RD). If it is RD +, the next RD- is sent, and if it is RD-, the RD + code is sent next. It is a mechanism that can balance DC.

  The parallel / serial conversion circuit 240 serializes the encoded 10-bit data into 1 bit. Then, the driver 250 transmits the serialized data using a differential signal (Tx + / Tx−).

  Note that the valid data handled here is assumed to be image data handled by a printer or copier. Therefore, bit errors that are invisible to human eyes are not a problem, and all valid data for one line is lost. Alternatively, the case where the number of valid data is different is a problem.

  Hereinafter, the operation of the deserializer circuit 310 will be described. The receiver 320 receives the differential signal serial data transmitted from the serializer circuit 210 and binarizes it. The CDR circuit 330 outputs the serial data synchronized with the clock to the serial / parallel conversion circuit 340 by detecting the edge timing of the binarized serial data and adjusting the phase of the clock used internally.

  The serial / parallel conversion circuit 340 converts the serial data input from the CDR circuit 330 into 10-bit parallel data. Also, the K code com (K28.5) is detected and symbol lock is performed.

  The elastic buffer circuit 350 is a circuit for absorbing the frequency difference between the data frequency input from the serializer circuit 210 and the clock generated by the deserializer internal PLL.

  The 10b8b decoding circuit 360 is a circuit that decodes the data encoded into 10 bits by the serializer circuit 210 into the original 8-bit data.

  The reception data processing circuit 370 serves as an interface for outputting data to the next circuit after the deserializer circuit 310.

  The deserializer control circuit 380 controls the entire deserializer circuit 310 and detects the K code added by the serializer circuit 210 to identify valid data and invalid data.

  As shown in FIG. 5, in order to recognize valid data, control codes “stp1”, “stp2”, “stp3”, “stp4” are inserted before valid data in the serializer circuit 210, and control codes “end1” “ "end2", "end3" and "end4" are inserted.

  The control code “stp1” is a control code indicating that the data is valid data from the data after 4 cycles. Similarly, the control code “stp2” is a control code indicating that three cycles later, the control code “stp3” is two cycles later, and the control code “stp4” is valid data from the data of the next cycle.

  In addition, the control code “end1” is a control code indicating that the data up to the previous cycle is valid data. Similarly, “end2” is the second cycle, “end3” is the third cycle, “end4”. "Is a control code indicating that the data up to four cycles before is valid data. In the present embodiment, the number of control codes is described as four before and after valid data. However, the number of control codes inserted before and after valid data may be other than four. The number of insertions may be different before and after.

  FIG. 6 shows a block diagram of the serial / parallel conversion circuit 340. First, the serial / parallel conversion circuit 340 converts serial data input from the CDR circuit 330 into parallel data. When the serial / parallel conversion circuit 340 converts the serial data into parallel data, the symbol lock control for identifying the location of the serial data as a break is performed by recognizing the control code “com”.

  After the parallel data conversion, the serial / parallel conversion circuit 340 detects the control codes “stp1,” “stp2,” “stp3,” “stp4” and the control codes “end1,” “end2,” “end3,” “end4” by the control code detection circuit 344. To do. Since the parallel data at this time is data that has not been decoded yet, the detection of the control code needs to consider both RD− / RD + in FIG.

  The method of recognizing the start of valid data is not when all of the control codes “stp1,” “stp2,” “stp3,” “stp4” are detected, but four types of control codes “stp1,” “stp2,” “stp3,” “stp4”. The start point of valid data is recognized when a plurality of, for example, two of them are detected.

  For example, when the control codes “stp1” and “stp3” in FIG. 5 are received errors due to the influence of noise or the like and cannot be correctly recognized (for example, when recognized as a D code instead of a K code), the control code “ This is because if only “stp2” and “stp4” can be detected, it can be recognized as valid data from the next cycle of the control code “stp4”. If it is a method of recognizing valid data only when all four control codes are detected, if any one of the four control codes results in a reception error, the beginning of valid data cannot be recognized.

  Similarly, the method of recognizing the end of valid data is not when all of the control codes “end1”, “end2”, “end3” and “end4” are detected, but with the control codes “end1”, “end2”, “end3” and “end4”. When a plurality of, for example, two or more of the four types are detected, the end point of valid data is recognized.

  As described above, when valid data is enclosed by a plurality of control codes (a plurality of control codes are inserted before and after the valid data), and, for example, two of the four control codes are recognized. By recognizing the start or end of valid data, even when a reception error occurs in the control code due to the influence of noise or the like, the start point and end point of valid data can be accurately grasped.

(Summary)
The disclosed serial communication device makes use of the characteristics of image data and has a serial communication function that does not impair the real-time property even when a reception error due to noise or the like on the transmission path occurs.
Although the embodiment of the present invention has been described in detail above, the present invention is not limited to the specific embodiment, and various modifications are possible within the scope of the gist of the present invention described in the claims.・ Change is possible.

It is a block diagram showing the structure of the serial communication apparatus which concerns on this Embodiment. It is a figure which shows an example of the data handled in the serial communication apparatus which concerns on this Embodiment. It is a figure for demonstrating operation | movement of the transmission data processing circuit and serializer control circuit which concern on this Embodiment. It is a figure which shows an example of K code used in the serial communication apparatus which concerns on this Embodiment. It is a figure for demonstrating the method of recognizing the position of effective data using a control code in the serial communication apparatus which concerns on this Embodiment. It is a figure for demonstrating operation | movement of the serial / parallel conversion circuit which concerns on this Embodiment.

Explanation of symbols

100 Serial Communication Device 200 External Device 210 Serializer Circuit 220 Transmission Data Processing Circuit 222 Data Timing Adjustment Circuit 224 Control Code Generation Circuit 226 Selector 230 8b10b Coding Circuit 240 Parallel / Serial Conversion Circuit 250 Driver 260 Serializer Control Circuit 300 Image Write Control Device 310 Deserializer circuit 320 Receiver 330 CDR circuit 340 Serial / parallel conversion circuit 342 Serial / parallel conversion, symbol lock control 344 Control code detection circuit 350 Elastic buffer circuit 360 10b8b decoding circuit 370 Reception data processing circuit 380 Deserializer control circuit

Claims (7)

A serial communication device comprising: a serializer circuit that converts parallel data including image data into serial data and outputs the serial data; and a deserializer circuit that converts the serial data output from the serializer circuit into parallel data and outputs the parallel data. ,
The serializer circuit inserts additional information for detecting the image data in the parallel data before and after the image data in the parallel data,
The deserializer circuit detects the additional information inserted by the serializer circuit in the converted parallel data, extracts the image data from the parallel data based on the detection result, and extracts the extracted image A serial communication device that outputs data. There are a plurality of additional information inserted before and after the image data, and each additional information is different,
The deserializer circuit includes a detection result related to a part of the additional information among the plurality of additional information inserted before the image data, and a part of the plurality of additional information inserted after the image data. The serial communication device according to claim 1, wherein the image data in the parallel data is extracted based on a detection result relating to the additional information.   The serial communication device according to claim 1, wherein the serializer circuit converts parallel data including image data output by a scanner into serial data and outputs the serial data. Communication control of a serial communication device having a serializer circuit that converts parallel data including image data into serial data and outputs the serial data, and a deserializer circuit that converts the serial data output from the serializer circuit into parallel data and outputs the parallel data A method,
The serializer circuit inserting additional information for detecting the image data in the parallel data before and after the image data in the parallel data;
The deserializer circuit detects the additional information inserted by the serializer circuit in the converted parallel data, extracts the image data from the parallel data based on the detection result, and extracts the image A communication control method comprising a step of outputting data. There are a plurality of additional information inserted before and after the image data, and each additional information is different,
The deserializer circuit detects a part of the additional information inserted among the plurality of additional information inserted before the image data, and a part of the additional information inserted after the image data The communication control method according to claim 4, further comprising: extracting the image data in the parallel data based on a detection result relating to the additional information.   6. The communication control method according to claim 4, wherein the serializer circuit includes a step of converting parallel data including image data output by the scanner into serial data and outputting the serial data.   A communication control program for causing a computer to execute the communication control method according to any one of claims 4 to 6.

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