JP2010039279A - Display device and method for driving the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device which is high in display quality by suppressing occurrence of a horizontal streak caused by the fact that the data line of the output destination of a row driving circuit is switched in a unit horizontal line cycle. <P>SOLUTION: The display device includes a selection circuit 5 in which n pieces of a plurality of row driving circuits 1 are connected to n lines of a plurality of data lines 6. The selection circuit 5 includes a period in which n pieces of row driving circuits are connected to n data lines one-to-one and a period in which each of n data lines is connected to two of n row driving circuits. The selection circuit 5 includes the period in which n row driving circuits are connected to n data lines one-to-one and a period in which n data lines are not connected to any of n pieces of row driving circuits. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a display device in which electro-optic elements or pixel circuits are arranged in a matrix and a driving method thereof.

  In recent years, a display using an electro-optical element has attracted attention as a next-generation display. One of them is an organic EL display device using an organic electroluminescence (EL) element which is a current-controlled light emitting element.

  In an organic EL display device including a peripheral circuit, a thin film transistor (TFT) is used not only in the display region but also in the peripheral circuit. As an example in which a TFT is used in the display region and the peripheral circuit, the display device described in Patent Document 1 is described. Proposed.

  In Patent Document 1, a column driving circuit composed of TFTs is connected to the data line of each column of the display unit, and the column driving circuit converts an input video signal (voltage signal) into a data signal supplied to the pixel. To do.

  Since a TFT uses a non-single crystal semiconductor for an active layer, the variation between elements is larger than that of a transistor using a single crystal for an active layer, and the correlation cannot be guaranteed even in the vicinity. If the voltage / current conversion gain of the column drive circuit differs between elements due to variations in TFT thresholds, carrier mobility, etc., the current value supplied to the organic EL element varies between pixels. Then, the organic EL element cannot emit light with a desired luminance. As a result, luminance variations appear in the display area, and vertical stripes occur.

  Therefore, in order to visually average out the variation in the value of the current supplied to the pixel or the pixel circuit, in other words, to spatially disperse the data line as the output destination of the column drive circuit, a unit horizontal shorter than one vertical scanning period. There is a method of sequentially changing every scanning period. By doing so, it is possible to visually reduce the non-uniformity of the display image such as vertical stripes appearing on the screen.

  FIG. 6 is a schematic diagram for explaining the display device of Patent Document 1. In FIG. In FIG. 6, R, G, and B are input video signals corresponding to RGB colors, and Gm1 to Gm3 are three column driving circuits 1 corresponding to R, G, and B column pixel circuits constituting one column of pixels. Indicates. M11 to M13, M21 to M23, and M31 to M33 denote TFTs as switches that connect the output destinations of Gm1, Gm2, and Gm3 to the data line 6. The selection circuit 5 sequentially changes the data line 6 that is the output destination of the column drive circuit 1.

  L1 is a control signal for ON / OFF control connected to the gate terminals of M11, M21, and M31, L2 is connected to the gate terminals of M12, M22, and M32, and L3 is connected to the gate terminals of M13, M23, and M33. 14r, 14g, and 14b are connected to the R, G, and B column data lines 6 that are connected to the R, G, and B pixel circuits constituting one column of pixels. Show the line.

  In FIG. 6, the input terminals of Gm1, Gm2, and Gm3 are individually connected to the wiring of video signals of R, G, and B colors. Then, the type (color) of the video signal sampled by each column driving circuit is also changed according to the change of the output destination of the column driving circuit.

  The output terminals of Gm1 are connected to switches M11, M12, M13 and their connection wiring, and data lines 6 of R, G, B colors through common lines 14r, 14g, 14b. The output terminals of Gm2 are connected to switches M21, M22, M23 and their connection wiring, and data lines 6 of R, G, B colors through common lines 14r, 14g, 14b. The output terminals of Gm3 are connected to switches M31, M32, and M33, their connection wiring, and data lines 6 of R, G, and B colors through common lines 14r, 14g, and 14b.

  FIG. 7 is a timing chart of the control signals L1 to L3 input to the selection circuit 5 shown in FIG. T1 to T4 indicate preset unit horizontal scanning periods (unit horizontal line periods). When the control signal is at a high level, each switch is turned on. When the control signal is at a low level, each switch is turned off.

  As the unit horizontal scanning period is changed from T1 → T2 → T3 → T4 according to the control signal shown in FIG. 7, the output data line 6 of Gm1 is changed every unit horizontal scanning period as B column → G column → R column → B column. It is possible to switch to. Further, the output data line 6 of Gm2 is a unit horizontal scanning period such as R column → B column → G column → R column and the output data line 6 of Gm3 is G column → R column → B column → G column. It is possible to switch every time.

In this way, variations in the value of the current supplied to the pixel or pixel circuit can be averaged over time, in other words, spatially dispersed. Therefore, the nonuniformity of the display image such as vertical stripes appearing on the screen is visually reduced.
JP 2007-133351 A

  In the above display device, the switches M11 to M13, M21 to M23, and M31 to M33 are formed of TFTs, so that threshold values, carrier mobility, and the like vary. In addition, when a control circuit that outputs control signals L1 to L3 is formed on the same substrate as the display panel using TFTs, the rise time and fall time, which are the waveform characteristics of the control signals L1 to L3, vary.

  For this reason, the situation shown in FIGS. 8A and 8B occurs. That is, La, Lb, Lc, and Ld in FIG. 8 are control signals input to the switch, and indicate switching from the High level to the Low level and from the Low level to the High level. Although not shown in FIG. 8, in fact, as shown in FIG. 8, there is a rise time and a fall time for switching the control signal, and these times are different for each output of the control circuit to which the control signal is output. It varies.

  In FIG. 8, Vth indicates the threshold voltage of the switch. The switch is ON at a potential higher than Vth, and the switch is OFF at a low potential. Accordingly, in the period Ta shown in FIG. 8A, both switches to which the control signals La and Lb are input are OFF, and in the period Tb shown in FIG. 8B, both switches to which the control signals Lc and Ld are input. It becomes ON.

  For this reason, when the states of the control signals L1 to L3 in FIG. 6 are switched, a state occurs in which the outputs of the column drive circuits Gm1, Gm2, and Gm3 are not connected to any data line. Alternatively, a state in which the outputs of the column driving circuits Gm1, Gm2, and Gm3 and the data lines of the RGB columns are short-circuited occurs.

  Since the data signal output from the column driving circuit is input to the pixel circuit via the switch of the selection circuit, if the above phenomenon occurs, the data signal is affected, which affects the current for driving the EL element.

  When an open period occurs in which the data line is not connected to any column drive circuit, the data line potential rises during that period, and when the connection is restored and a signal current flows, the data line potential becomes a potential corresponding to the signal current. Change towards. If the period for supplying the signal current is sufficiently long, the data line potential reaches a steady value determined by the signal current, but the period for supplying the signal current, that is, the pixel selection period is limited. For this reason, the data line potential at the end of the selection period becomes higher than the correct voltage due to the influence of the rise in the data line potential during the open period. When a voltage higher than the voltage that gives the correct luminance is written, a current larger than the current determined from the signal flows through the EL element, and the luminance increases.

  On the other hand, when the data lines are simultaneously connected to the two column drive circuits, signal currents flow simultaneously from the two short-circuited column drive circuits, and the data line potential decreases. Thereafter, a signal current flows through the data line, and the data line potential becomes lower than the correct value. When a voltage lower than a voltage giving correct luminance is written, a current smaller than the current determined from the signal flows through the EL element, and the luminance is lowered.

  The timing at which Gm1, Gm2, and Gm3 are switched by Ta and Tb shown in FIG. 8 is three times during one period. And become mixed. This appears as a periodic horizontal stripe, which may reduce the display quality.

  An object of the present invention is to provide a display device with high display quality and a method for driving the same, which suppresses the occurrence of horizontal streaks caused by switching the output destination data line of a column drive circuit in a unit horizontal line cycle.

  A display device of the present invention includes a plurality of light emitting elements arranged in a row direction and a column direction, a pixel circuit provided for each of the plurality of light emitting elements, and supplying a driving current to the light emitting elements, and the pixel circuits arranged in a row. A plurality of row selection lines that are commonly connected to each other; a plurality of data lines that commonly connect the pixel circuits to each column; a plurality of column drive circuits that generate data signals to be supplied to the plurality of data lines; A selection circuit that connects n (n is an integer of 2 or more) of the plurality of column driving circuits to the n of the plurality of data lines, wherein the selection circuit includes: A period in which the n column driving circuits are connected to the n data lines on a one-to-one basis, and the selection circuit assigns each of the n data lines to two of the n column driving circuits. A connection period.

  The display device of the present invention includes a plurality of light emitting elements arranged in a row direction and a column direction, a pixel circuit provided for each of the plurality of light emitting elements, and supplying a driving current to the light emitting elements, and the pixel circuit. A plurality of row selection lines for commonly connecting each row, a plurality of data lines for commonly connecting the pixel circuits for each column, and a plurality of column driving circuits for generating data signals supplied to the plurality of data lines And a selection circuit that connects n (n is an integer greater than or equal to 2) of the plurality of column drive circuits to n of the plurality of data lines, wherein the selection device The circuit connects the n column drive circuits to the n data lines on a one-to-one basis, and the selection circuit does not connect the n data lines to any of the n column drive circuits. And a period.

  The display device driving method of the present invention includes a plurality of light emitting elements arranged in a row direction and a column direction, a pixel circuit provided for each of the plurality of light emitting elements, and supplying a driving current to the light emitting elements. A plurality of row selection lines for commonly connecting the pixel circuits for each row, a plurality of data lines for commonly connecting the pixel circuits for each column, and a plurality of data signals for generating data signals to be supplied to the plurality of data lines A display device driving method comprising: a column driving circuit; and a selection circuit that connects n (n is an integer of 2 or more) of the plurality of column driving circuits to n of the plurality of data lines. A period in which the selection circuit connects the n column driving circuits to the n data lines on a one-to-one basis, and the selection circuit connects each of the n data lines to the n columns. And a period for connecting to two of the driving circuits.

  The display device driving method of the present invention includes a plurality of light emitting elements arranged in a row direction and a column direction, a pixel circuit provided for each of the plurality of light emitting elements, and supplying a driving current to the light emitting elements. A plurality of row selection lines for commonly connecting the pixel circuits for each row, a plurality of data lines for commonly connecting the pixel circuits for each column, and a plurality of data signals for generating data signals to be supplied to the plurality of data lines A display device driving method comprising: a column driving circuit; and a selection circuit that connects n (n is an integer of 2 or more) of the plurality of column driving circuits to n of the plurality of data lines. A period in which the selection circuit connects the n column driving circuits to the n data lines on a one-to-one basis, and the selection circuit connects the n data lines to the n column driving circuits. And a period not connected to any of the above.

  According to the present invention, it is possible to reduce nonuniformity of a display image such as a horizontal stripe that appears on a screen due to an influence on a data signal and a pixel circuit which are generated when a data line as an output destination of a column driving circuit is sequentially changed. it can.

  Hereinafter, the best mode for carrying out a display device according to the present invention will be specifically described with reference to the drawings.

  Examples of the electro-optical element used in the present invention include an organic EL element, an inorganic EL element, a light-emitting element using an electron-emitting element, and a light-emitting diode. The pixel may be a passive matrix circuit made of an electro-optic element, or may constitute an active matrix circuit having at least one transistor. The light emitting elements as described above are arranged in the row direction and the column direction to form a display area. In addition, a pixel circuit that supplies a drive current is arranged for each of the plurality of light emitting elements.

  The column driving circuit used in the present invention is preferably a circuit that converts a video signal into a data signal. As the video signal, an analog voltage signal, a digital signal, or the like is preferably used. As the data signal, an analog current signal for determining the luminance of the pixel is preferably used.

  The column driving circuit is a circuit that generates a data signal to be supplied to the electro-optical element that forms the passive matrix circuit, or a circuit that generates a data signal to be supplied to the pixel circuit that forms the active matrix circuit.

  The present invention is effective for a circuit in which characteristic variation due to a manufacturing process easily occurs in a transistor constituting a column driving circuit, and is therefore suitable for a column driving circuit including a TFT using a non-single crystal semiconductor as an active layer. Used for. The non-single-crystal semiconductor is amorphous silicon, polycrystalline silicon, or microcrystalline silicon. Alternatively, the present invention can be applied to a transistor in which a single crystal semiconductor such as single crystal silicon is used for an active layer as long as the characteristic variation cannot be ignored.

  The data signal of the present invention is simultaneously supplied to pixels or pixel circuits in the same row that can be selected by the same row selection line among the pixels or pixel circuits of the matrix circuit. This row selection period corresponds to a horizontal scanning period, and the output of data signals in one frame scanning period is completed by sequentially selecting all the rows.

  In the present invention, the data line as the output destination of the column drive circuit is sequentially changed every unit horizontal scanning period. The unit horizontal scanning period may be a predetermined horizontal scanning period such as one horizontal scanning period or two to three horizontal scanning periods, but is preferably one horizontal scanning period.

  In the present invention, when rows are selected by interlaced scanning, the data lines are arranged so that the output from the same column driving circuit is not supplied to pixels in adjacent rows connected to the common data line within one frame scanning period. It is preferable to sequentially change every unit horizontal scanning period.

  The present invention is applied to a matrix type display device using an electro-optical element, but can also be preferably used for an active matrix device before forming an electro-optical element such as an EL element.

  The display device according to the present invention includes a display unit (active matrix unit) in which pixel circuits including electro-optic elements and TFTs are arranged in a matrix in the row direction and the column direction. A column driving circuit that outputs a data signal to the data line and a row driving circuit that outputs a scanning signal to the row selection line (scanning line) are provided.

  In addition, a terminal portion that inputs video signals and control signals and supplies power, and a common wiring connected to the electro-optical element of each pixel. The common wiring is disposed so as to surround the periphery of the display area, and is connected to a part of the terminal portion by drawing the wiring from the wiring lead portion.

  In the present invention, it is also preferable to have a correction circuit that detects output currents of a plurality of column drive circuits as necessary, evaluates them, and corrects video signals input to the plurality of column drive circuits. It is.

  In the present invention, since the output destination of the column driving circuit is changed every unit horizontal scanning period, the video signal input to the column driving circuit is sampled in consideration of the change or the video signal is supplied. It is necessary to rearrange the order by column. Specifically, input sampling to the column drive circuit may be controlled, or control for rearranging the supply order in units of columns may be performed on the circuit (correction circuit) side that supplies the video signal.

  According to the present invention, when supplying the output to the pixel or the pixel circuit while sequentially changing the output destination data line of the column driving circuit, the output destination of the column driving circuit is electrically connected to the data line to be connected next. After securely connecting, the connected data line is electrically disconnected. That is, the selection circuit connects n (n is an integer of 2 or more) of the plurality of column driving circuits to n of the plurality of data lines. At that time, the selection circuit controls to include a period in which each of the n data lines is simultaneously connected to two of the n column drive circuits (n = 3 in the following embodiments). Thereafter, the connected data line is electrically disconnected.

  Further, according to the present invention, when supplying the output to the pixel or the pixel circuit while sequentially changing the output destination data line of the column driving circuit, the connected data line is electrically disconnected after being surely disconnected. Electrical connection to the data line connected to

  In other words, the selection circuit controls to include a period in which each of the n data lines is not connected to any of the n column driving circuits. By doing so, it becomes possible to reduce non-uniformity of the display image such as horizontal stripes that appears on the screen due to the influence on the data signal that occurs when the data line of the output destination of the column drive circuit is sequentially changed.

(First embodiment)
FIG. 1 is a timing chart for explaining a driving method of a display device according to the first embodiment of the present invention. FIG. 2 is a block diagram showing the configuration of the display device according to the first embodiment of the present invention. Similar to the description of FIG. 6, as the unit horizontal scanning period is changed from T1 to T2 to T3 to T4 by the control signals L1 to L3 shown in FIG. It is switched every unit horizontal scanning period such as column → B column. Further, the output data line of Gm2 is R column → B column → G column → R column, and the output data line of Gm3 is G column → R column → B column → G column. Can be switched.

  In the display device shown in FIG. 2, EL elements having the number of RGB primary colors and a pixel circuit 2 composed of TFTs for controlling currents input to the EL elements are arranged in a matrix in the row and column directions. An image display unit and a peripheral circuit are arranged. The peripheral circuit includes a column driving circuit 1, a selection circuit 5, a control circuit 3, and a row driving circuit 4.

  Although not shown in FIG. 2, the video signal voltage Video is input to the column driving circuit 1. The column driving circuit 1 generates a data signal to be supplied to the data line 6. Then, a data signal is supplied from the column driving circuit 1 to the pixel circuit via the selection circuit 5 and the data line 6. In addition, a plurality of row selection lines 7 commonly connected to each row of the pixel circuits and a plurality of data lines 6 commonly connected to each column of the pixel circuits are provided.

  Among the above-described configurations, the configuration of FIG. 6 described in the background art can be applied to the selection circuit 5. In the following description, the selection circuit 5 of FIG. 6 is used. The circuit configuration disclosed in the prior art document of Patent Document 1 described above can also be applied to the column drive circuit 1 and the pixel circuit 2.

  The control signals L1 to L3 shown in FIG. 1 are generated by the control circuit 3 of FIG. The operation of the selection circuit 5 will be described with reference to FIGS. The timing chart of FIG. 1 shows the potentials of the signals L1 to L3 input to the gate terminal of the switch formed by the transistors of the selection circuit 5. T1 to T4 indicate preset unit horizontal scanning periods (unit horizontal line periods).

  T1 includes periods T1 'and Tx1, and the period Tx1 is set after the period T1'. T2 includes periods T2 'and Tx2, and the period Tx2 is set after the period T2'. T3 includes periods T3 'and Tx3, and the period Tx3 is set after the period T3'. T4 includes periods T4 'and Tx4, and the period Tx4 is set after the period T4'.

  As shown in FIG. 1, in the period T1 ', a high level signal is input to L1. Low level signals are input to L2 and L3. At this time, the switches M11, M21, and M31 of the selection circuit 5 shown in FIG. 6 are turned on, and the other switches are turned off. In this state, Gm1 is connected to the B column data line, Gm2 is connected to the R column data line, and Gm3 is connected to the G column data line. That is, during this period, the three data lines of the R column, the G column, and the B column are connected to the three column driving circuits Gm1 to Gm3 on a one-to-one basis. The column drive circuit Gm1 outputs a data signal to the B column data line via the transistor M11 and the common line 14b, Gm2 outputs a data signal to the R column via M21 and the common line 14r, and Gm3 is common to M31. The data signal is output to the G column via the line 14g.

  Next, in a period Tx1, a high level signal is input to L2. At this time, in the selection circuit 5, in addition to the switches M11, M21, and M31 that are turned on, M12, M22, and M32 are turned on.

  At this time, the B column data lines are simultaneously connected to the column drive circuits Gm1 and Gm2, the G column data lines are simultaneously connected to Gm1 and Gm3, and the R column data lines are simultaneously connected to Gm2 and Gm3. That is, in the selection circuit 5, each of the three data lines 6 of the R column, the G column, and the B column is simultaneously connected to two of the three column driving circuits 1 of Gm1, Gm2, and Gm3.

  In this way, after the output destination of the column drive circuit is connected to the data line to be connected next, the data line connected so far is cut off. When viewed from the data line, one data line is simultaneously connected to two column driving circuits. Since all of the data lines have a period in which they are connected to the two column driving circuits in this way, image nonuniformity due to a change in potential due to some of the data lines being opened is eliminated.

  After period T2 ', the state of M11-M33 is different, but the same is repeated. In the period T2 ', a low level signal is input to L1. At this time, the switches M11, M21, and M31 of the selection circuit 5 are turned off, and only the switches M12, M22, and M32 are turned on. During this period, the three data lines of the R column, the G column, and the B column are connected to the three column driving circuits Gm1 to Gm3 on a one-to-one basis. In this state, the data signal is output from the Gm1 to the G column via the common lines 14b, 14r, and 14g, the data signal is output from the Gm2 to the B column, and the data signal is output from the Gm3 to the R column.

  Next, during the period Tx2, a high level signal is input to L3. At this time, in the selection circuit 5, in addition to the switches M12, M22, and M32 that are turned on, M13, M23, and M33 are turned on. During this period, each of the three data lines 6 is simultaneously connected to two of the three column drive circuits.

  Next, in a period T <b> 3 ′, a low level signal is input to L <b> 2. At this time, the switches M12, M22, and M32 of the selection circuit 5 are turned off, and only M13, M23, and M33 are turned on. In this state, the data signal is output from the Gm1 to the R column via the common lines 14b, 14r, and 14g, the data signal is output from the Gm2 to the G column, and the data signal is output from the Gm3 to the B column.

  Next, during the period Tx3, a high level signal is input to L1, and at this time, in the selection circuit 5, in addition to the switches M13, M23, and M33 that are turned on, M11, M21, and M31 are turned on. In this case as well, control is performed so as to include a period in which each of the three data lines 6 is simultaneously connected to two of the three column driving circuits.

  Next, in a period T4 ', a low-level signal is input to L3. At this time, the switches M13, M23, and M33 of the selection circuit 5 are OFF, and only M11, M21, and M31 are ON. This is the same operation as in the period T1 ', and thereafter, the same operation as described above is repeatedly executed.

  As described above, when the output destination of the column driving circuit 1 is sequentially changed, the output destination of the column driving circuit is electrically connected to the data line to be connected next, and after a predetermined period Tx1, Tx2, Tx3 has elapsed. Then, the connected data line is electrically disconnected.

  The above description uses three columns of RGB as an example, but in general, n (n is an integer of 2 or more) column driving circuits, a selection circuit including n × n transistor switches, and n data The present invention can be applied to the case where the connection is switched between lines.

  The selection circuit 5 connects n (n is an integer of 2 or more) of the plurality of column driving circuits 1 to n of the plurality of data lines 6. At that time, each of the n data lines 6 includes a period in which the n data lines 6 are connected to the n column driving circuits on a one-to-one basis and a period in which the n data lines 6 are simultaneously connected to two of the n column driving circuits. The selection circuit 5 is controlled. When data is supplied from the column drive circuit to the data line during the one-to-one connection period and the connection is switched to another one-to-one connection, a period of simultaneous connection to the two column drive circuits is inserted.

  In this embodiment, when the output destination data lines of the column drive circuit 1 are sequentially changed, each output of the column drive circuit is not connected to any data line, or each output of the column drive circuit and the RGB column It is possible to prevent one of the shorted states of each data line from occurring indefinitely. Therefore, the nonuniformity of the display image such as horizontal stripes appearing on the screen due to the influence on the data signal and the pixel circuit generated when the data line of the output destination of the column driving circuit is sequentially changed as described above can be reduced. Can be improved.

  Hereinafter, improvement of image quality will be described. FIG. 3A shows a display state to which the driving method of this embodiment is applied. FIG. 3B shows a display state by a conventional driving method. In all cases, gray display is performed on the entire surface, and the output destination of the column driving circuit is sequentially changed every horizontal scanning period.

  In FIG. 3B, when the output destination of the column drive circuit is sequentially changed, a state in which the output is not connected to any data line occurs once every three times. Therefore, no current flows when the data line is not connected, the row corresponding to the timing is dark, and periodic horizontal stripes are generated every three rows. This periodic horizontal stripe greatly reduces the image quality. On the other hand, in FIG. 3A to which the driving method of the present embodiment is applied, the occurrence of periodic horizontal stripes every three rows is suppressed, and uniform and good image quality can be obtained.

  Note that although the transistor of the selection circuit 5 in the drawing has been described as an N-channel transistor, the present invention is not limited thereto. Further, although the pixel configuration is a set of three RGB colors, the present invention is not limited to this.

(Second Embodiment)
FIG. 4 is a timing chart for explaining a driving method of the display device according to the second embodiment of the present invention. Since the configuration of the display device is the same as that of FIG. The control signals L1 to L3 shown in FIG. 4 are generated by the control circuit 3 of FIG. The operation of the selection circuit 5 will be described with reference to FIGS. As in the first embodiment, the selection circuit 5 uses the configuration shown in FIG. 6, and the column drive circuit 1 and the pixel circuit 2 also use the circuit configuration of Patent Document 1.

  The timing chart of FIG. 4 shows the potentials of the signals L1 to L3 input to the gate terminal of the switch constituted by the transistors of the selection circuit 5 as in FIG. T1 to T4 indicate preset unit horizontal scanning periods (unit horizontal line periods).

  T1 includes periods T1 ″ and Ty1, and the period Ty1 is set after the period T1 ″. T2 includes periods T2 ″ and Ty2, and the period Ty2 is set after the period T2 ″. T3 includes periods T3 ″ and Ty3, and the period Ty3 is set after the period T3 ″. T4 includes periods T4 ″ and Ty4, and the period Ty4 is set after the period T4 ″.

  As shown in FIG. 4, in the period T1 ″, a high level signal is inputted to L1. A low level signal is inputted to L2 and L3. At this time, the switch M11 of the selection circuit 5 shown in FIG. , M21 and M31 are turned ON, and the other switches are OFF, in which Gm1 is connected to the B column data line, Gm2 is connected to the R column data line, and Gm3 is connected to the G column data line. That is, during this period, the three data lines of the R column, the G column, and the B column are connected to the three column driving circuits Gm1 to Gm3 on a one-to-one basis, and the column driving circuit Gm1 is common to the transistor M11. The data signal is output to the B-column data line via the line 14b, the Gm2 outputs the data signal to the R-column via the M21 and the common line 14r, and the Gm3 outputs the data signal G via the M31 and the common line 14g. Appear in line To.

  Next, in the period Ty1, a low level signal is input to L1, and at this time, in the selection circuit 5, all the switches including the switches M11, M21, and M31 are turned OFF. This period is an open period in which no data line is connected to the column drive circuit. During this period, the connected data line is surely electrically disconnected. The same applies to a period Ty2 and a period Ty3 described later.

  Next, in a period T2 ″, a high level signal is input to L2. At this time, the switches M12, M22, and M32 of the selection circuit 5 are turned on. In this state, the common lines 14b, 14r, and 14g are used. The data signal is output from the Gm1 to the G column, the data signal is output from the Gm2 to the B column, and the data signal is output from the Gm3 to the R column.

  Next, in the period Ty2, a low level signal is input to L2. At this time, in the selection circuit 5, the switches M12, M22, and M32 are turned off, and all the switches are turned off.

  Next, in a period T3 ″, a high level signal is input to L3. At this time, the switches M12, M22, and M32 of the selection circuit 5 are turned on. In this state, the common lines 14b, 14r, and 14g are connected. The data signal is output from the Gm1 to the R column, the data signal is output from the Gm2 to the G column, and the data signal is output from the Gm3 to the B column.

  Next, in the period Ty3, a low level signal is input to L3. At this time, in the selection circuit 5, the switches M13, M23, and M33 are turned off, and all the switches are turned off.

  Next, in a period T4 ″, a high level signal is input to L1. At this time, the switches M11, M21, and M31 of the selection circuit 5 are turned on. This is the same operation as in the period T1 ″. Thereafter, the same operation as described above is repeatedly executed.

  As described above, when the output destination of the column drive circuit 1 is sequentially changed, the output of the column drive circuit is electrically disconnected from the data line, and then connected after a predetermined period Ty1, Ty2, Ty3 has elapsed. Electrically connect to the data line. That is, the selection circuit 5 controls to include periods Ty1, Ty2, and Ty3 in which each of the n data lines is not connected to any of the n column drive circuits (n = 3 in this example). .

  In the present embodiment, there are a period in which each output of the column driving circuit 1 is transmitted to the data line on a one-to-one basis and a period in which each output of the column driving circuit 1 is not connected to any data line. When the one-to-one connection is switched to another one-to-one, an open period in which each output of the column drive circuit is not connected to any data line is inserted.

  As a result, the output of the column driving circuit and the data line are not connected at a certain point and are not opened at a certain point, and non-uniformity of a display image such as a horizontal stripe can be reduced.

  Hereinafter, improvement of image quality will be described with reference to FIGS. In all cases, gray display is performed on the entire surface, and the output destination of the column driving circuit is sequentially changed every horizontal scanning period. In FIG. 3B, when the output destination of the column driving circuit is sequentially changed, there is a state where the output is not connected to any data line only once every three times.

  Therefore, no current flows when the data line is not connected, the row corresponding to the timing becomes dark, and periodic horizontal stripes occur every three rows. This periodic horizontal stripe greatly reduces the image quality. On the other hand, in FIG. 3A to which the driving method of this embodiment in which a state in which the data line is not connected is inserted every time the output destination of the column driving circuit is sequentially changed, the periodicity every three rows is applied. Generation of horizontal stripes is suppressed, and uniform and good image quality can be obtained.

  Note that although the transistor of the selection circuit 5 in the figure has been described as an N-channel transistor, the present invention is not limited thereto. Further, although the pixel configuration is a set of three RGB colors, the present invention is not limited to this.

(Third embodiment)
The display device according to the present invention as described above can be applied to various electronic devices. FIG. 5 is a block diagram showing an embodiment when the display device according to the present invention is used as an electronic apparatus in, for example, a digital still camera system. In the figure, 50 is a digital still camera system, 51 is a photographing unit, 52 is a video signal processing circuit, 53 is a display panel to which the display device of the present invention is applied, 54 is a memory, 55 is a CPU, and 56 is an operation unit.

  A video image captured by the imaging unit 51 or a video image recorded in the memory 54 can be signal-processed by the video signal processing circuit 52 and viewed on the display panel 53. The CPU 55 controls the photographing unit 51, the memory 54, the video signal processing circuit 52, and the like by input from the operation unit 56, and performs photographing, recording, reproduction, and display suitable for the situation. In addition, the display panel 53 can be used as a display unit of various electronic devices.

  The display device of the present invention can be used for electronic devices such as a mobile phone, a mobile computer, a still camera, or a video camera. Or it can use for the electronic device which has multiple functions of those functions.

  The electronic device as described above includes an information input unit. For example, in the case of a cellular phone, the information input unit includes an antenna. In the case of a PDA or a portable PC, the information input unit includes an interface unit for the network. In the case of a still camera or a movie camera, the information input unit includes an optical sensor unit such as a CCD or CMOS.

3 is a timing chart for explaining a method of driving the display device according to the first embodiment of the present invention. It is the schematic which shows the structure of the display apparatus which concerns on the 1st Embodiment of this invention. It is a figure which shows the display state by which the drive method of 1st Embodiment is applied, and the display state by the drive method of a prior art example. 6 is a timing chart for explaining a driving method of a display device according to a second embodiment of the present invention. It is a block diagram which shows one Embodiment of the digital still camera system using the display apparatus which concerns on this invention. It is the schematic explaining the display apparatus of a prior art example. It is a timing chart for demonstrating operation | movement of the display apparatus of a prior art example. It is a figure for demonstrating the problem in the display apparatus of a prior art example.

Explanation of symbols

1 column drive circuit 2 pixel circuit 3 control circuit 4 row drive circuit 5 selection circuit 6 data line 7 row selection line 50 digital still camera system 51 photographing unit 52 video signal processing circuit 53 display panel 54 memory 55 CPU
56 Operation unit

Claims (5)

A plurality of light emitting elements arranged in a row direction and a column direction;
A pixel circuit that is provided for each of the plurality of light emitting elements and supplies a driving current to the light emitting elements;
A plurality of row selection lines for commonly connecting the pixel circuits for each row;
A plurality of data lines commonly connecting the pixel circuits for each column;
A plurality of column driving circuits for generating data signals to be supplied to the plurality of data lines;
A selection circuit that connects n (n is an integer of 2 or more) of the plurality of column driving circuits to n of the plurality of data lines;
A display device comprising:
A period in which the selection circuit connects the n column driving circuits to the n data lines on a one-to-one basis; and the selection circuit connects each of the n data lines to the n column driving circuits. A display device characterized by having a period of connection to the two. A plurality of light emitting elements arranged in a row direction and a column direction;
A pixel circuit that is provided for each of the plurality of light emitting elements and supplies a driving current to the light emitting elements;
A plurality of row selection lines for commonly connecting the pixel circuits for each row;
A plurality of data lines commonly connecting the pixel circuits for each column;
A plurality of column driving circuits for generating data signals to be supplied to the plurality of data lines;
A selection circuit that connects n (n is an integer of 2 or more) of the plurality of column driving circuits to n of the plurality of data lines;
A display device comprising:
The selection circuit connects the n column drive circuits to the n data lines on a one-to-one basis, and the selection circuit connects the n data lines to any of the n column drive circuits. A display device having a period of no connection. An electronic apparatus comprising the display device according to claim 1. A plurality of light emitting elements arranged in a row direction and a column direction;
A pixel circuit that is provided for each of the plurality of light emitting elements and supplies a driving current to the light emitting elements;
A plurality of row selection lines for commonly connecting the pixel circuits for each row;
A plurality of data lines commonly connecting the pixel circuits for each column;
A plurality of column driving circuits for generating data signals to be supplied to the plurality of data lines;
A selection circuit that connects n (n is an integer of 2 or more) of the plurality of column driving circuits to n of the plurality of data lines;
A method for driving a display device comprising:
A period in which the selection circuit connects the n column driving circuits to the n data lines on a one-to-one basis; and the selection circuit connects each of the n data lines to the n column driving circuits. And a period for connecting to the two. A plurality of light emitting elements arranged in a row direction and a column direction;
A pixel circuit that is provided for each of the plurality of light emitting elements and supplies a driving current to the light emitting elements;
A plurality of row selection lines for commonly connecting the pixel circuits for each row;
A plurality of data lines commonly connecting the pixel circuits for each column;
A plurality of column driving circuits for generating data signals to be supplied to the plurality of data lines;
A selection circuit that connects n (n is an integer of 2 or more) of the plurality of column driving circuits to n of the plurality of data lines;
A method for driving a display device comprising:
The selection circuit connects the n column drive circuits to the n data lines on a one-to-one basis, and the selection circuit connects the n data lines to any of the n column drive circuits. A method for driving a display device, characterized by having a period of no connection.

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