JP2010019915A - Display device, driving method therefor, and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a display device, a driving method therefor, and an electronic apparatus, preventing a wrong determination due to influence of external light, and precisely detecting approach or contact of an object to a display screen while inhibiting influence on image quality without performing high-level image processing. <P>SOLUTION: This imaging apparatus includes: a display part 1 including a plurality of display elements including a light emitting element where a light emission period for acquiring coordinates is formed and a plurality of photo detecting elements; a first control part 13 for controlling the display elements; a second control part 12 for selectively controlling the drive of the plurality of photo detecting elements; and a signal processing part 8 for processing a detection signal obtained by detecting the emitted light of the light emitting element by the photo detecting element to acquire coordinate information, wherein the first control part 13 causes the light emitting element of the display element to emit light separately between an image display period and a coordinate information light emission period. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a display device including an optical sensor element in a display region, a driving method thereof, and an electronic device.

  In recent years, development of a flat display device having a photosensor element in a display element region has progressed (see, for example, Patent Documents 1 to 5).

  These display devices are arranged in a matrix and each pixel is provided with a display element and a thin film transistor (hereinafter abbreviated as “TFT”) functioning as a photoelectric conversion element for each pixel, and while displaying an image, to the photoelectric conversion element The information can be input using the incident light.

  In the image display, when the display element is a liquid crystal display element, a backlight or a front light serving as a light source is provided in order to utilize the fact that light is transmitted through the liquid crystal display element.

  According to the display device configured as described above, it is possible to perform image display and information input in the same screen area, and therefore, it is expected to be used as an information input / output device in place of a touch panel or the like.

For example, a display unit of a mobile phone, a digital camera, a video camera, or the like includes a combination of a liquid crystal display device and a touch panel.
In these devices, the user is viewing and judging the image displayed on the liquid crystal display device, but since there is a touch panel directly above the display device, the display image is directly operated via the touch panel. It is possible.

However, since the image on the display device is viewed through the touch panel, it becomes an element of image quality deterioration such as a reduction in resolution and a reduction in luminance.
In particular, in a small portable device, thickness and weight are important factors of portability.
Therefore, by using the display device having the above-described configuration, it is possible to directly manipulate a display image, and it is possible to reduce the weight and thickness without impairing the image quality.

By the way, in the display device having the above-described configuration, for example, as shown in FIGS. 1A and 1B, when a user holds a finger near a desired position on the image display screen, reflected light from the finger is desired. Detection is performed by a photoelectric conversion element arranged corresponding to the position.
By adopting such a configuration, a usage form in which the user can input desired information can be considered.
However, in that case, in order to improve the accuracy and sensitivity of information input, it is necessary to prevent the detection result of the reflected light from the photoelectric conversion element from being affected by the magnitude of external light. is there.
JP 2004-318819 A JP 2004-45785 A JP 7-325319 A Patent No. 4055722 registered JP 2002-268615 A JP 2007-304451 A

As in the examples of Patent Documents 1 to 6, when coordinate information is obtained from the luminance distribution by image processing, a misjudgment that external light affects as described above can be considered.
For example, in Patent Document 6 in which measures against external light are taken, luminance information is obtained by removing external light from the luminance difference between reflected light when the backlight is on and when the backlight is off.

However, with this configuration, sufficient detection is impossible during black display.
Moreover, when acquiring coordinate information from a luminance distribution, advanced image processing is required.

On the other hand, it is well known that modulation is applied as a means of searching for its own light emission.
In the case of a liquid crystal display element, it is possible to perform a modulation operation on the backlight, and in the case of a self-light-emitting element (organic EL or the like), the self-light-emitting element itself can be modulated, but there is a possibility that the image quality may be affected.
In addition, it is effective against natural light, but it is assumed that detection is difficult under inverter type illumination.
Further, in order to perform the modulation operation of the backlight or the self-light emitting element, the display image is updated every frame, but it is necessary to change the display image faster than the update of one frame.

  The present invention can prevent misjudgment due to the influence of external light, accurately detect that an object is close to or touches the display screen while suppressing the influence on image quality without performing advanced image processing. An object is to provide a display device capable of driving the same, a driving method thereof, and an electronic apparatus.

  A display device according to a first aspect of the present invention includes a display unit including a light emitting element in which a light emission period for coordinate acquisition is formed, a display unit including a plurality of light detection elements, and a first control for controlling the display element. A second control unit that selectively controls driving of the plurality of light detection elements, and a detection signal obtained by detecting the light emitted from the light emitting element by the light detection element to process coordinate information. A signal processing unit for obtaining the light-emitting element, and the first control unit causes the light-emitting element of the display element to emit light in an image display period and a coordinate information light-emitting period.

  Preferably, the signal processing unit, and a clock generation unit that provides a basic frequency to the first and second control units, the first control unit includes the light emitting element and the coordinate information. During the light emission period, light is emitted including a signal light emission period and a stop period, and during the signal light emission period, light is emitted by superimposing a fundamental frequency on a signal as coordinate information.

  Preferably, it has a third control unit for controlling the luminance of the light emitting element of the display element in which the light emission period for obtaining the coordinate information is formed, and the third control unit The luminance of the light emitting element of the display element is controlled to the light emitting luminance that can be detected by the light detecting element.

  Preferably, the display element includes a superimposing element that superimposes a signal as coordinate information and a fundamental frequency in the coordinate information light emitting period.

  Preferably, the fundamental frequency is a frequency that avoids a frequency generated by an inverter-type lighting fixture.

  Preferably, the coordinate information is formed as information excluding information in which the full bit is 0 and the full bit is 1.

  Preferably, the second control unit selects the light detection element in synchronization with coordinate information included in a signal emitted from the light emitting element of the light emitting unit.

  Preferably, the signal processing unit performs a process of extracting a fundamental frequency from the detection signal and a process of removing the fundamental frequency and acquiring coordinate information.

  Preferably, the second control unit performs a selection operation by providing a gap period so that signals of the light detection elements do not overlap each other when the light detection elements are selected.

  Preferably, the second control unit generates coordinate information at a cycle that is at least twice as long as a sum of one cycle of the fundamental frequency and the cap period.

  Preferably, the light detection element is arranged in a black matrix portion of the display portion, and the coordinate information is formed as information that indicates that the reflected light from the black matrix is detected when the reflected light from the black matrix is detected. .

  Preferably, the light-emitting unit for obtaining coordinate information includes a light projection type light, and the first control unit that controls the light-emitting element of the light-emitting unit causes the light-emitting element to emit light at a fundamental frequency, and a plurality of lights. The second control unit that selectively controls the driving of the detection element is synchronized with the coordinate information included in the signal emitted from the light emitting element, and includes the signal detection period and the stop period. The driving is selected, and the operation is performed in synchronization with a signal which is coordinate information.

  Preferably, the display unit has a backlight that irradiates display light to the display unit, uses a plurality of basic frequencies, has a plurality of signal processing units respectively corresponding to the basic frequencies, and reflects from the backlight. It recognizes whether it is light or transmitted light from the floodlight and operates in a mode corresponding to each.

  Preferably, a control function capable of stopping the light emitting unit for acquiring coordinate information when coordinate information acquisition operation is unnecessary is included.

  According to a second aspect of the present invention, there is provided a display device driving method including: a display element including a light emitting element in which a light emission period for coordinate acquisition is formed; and a light emitting element of the display element in a display unit including a plurality of light detection elements. Light is emitted separately in an image display period and a coordinate information light emission period, light emitted from the light emitting element in the coordinate information light emission period is detected by the light detection element, and detection signals obtained by the detection are processed to obtain coordinate information. To do.

  An electronic apparatus according to a third aspect of the present invention includes a display device, and the display device includes a display element including a light emitting element in which a light emission period for coordinate acquisition is formed, and a display unit including a plurality of light detection elements. A first control unit for controlling the display element, a second control unit for selectively controlling driving of the plurality of light detection elements, and detecting light emitted from the light emitting elements by the light detection elements. A signal processing unit for processing the obtained detection signal and acquiring coordinate information, and the first control unit divides the light emitting element of the display element into an image display period and a coordinate information light emitting period. To emit light.

According to the present invention, the first control unit emits light by dividing the light emitting element into the image display period and the coordinate information light emitting period.
In this coordinate information light emission period, the light emitted from the light emitting element is detected by the light detecting element.
Then, in the signal processing unit, the detection signal obtained by detection with the light detection element is processed to obtain coordinate information.

  According to the present invention, it is possible to prevent erroneous determination due to the influence of light, and to accurately detect that an object is close to or touches the display screen while suppressing the influence on image quality without performing advanced image processing. Is possible.

  Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

<First Embodiment>
FIG. 2 is a block diagram showing a configuration example of an image display apparatus according to the second embodiment of the present invention.

  The image display device D includes an image display unit 1, a signal line drive unit 2, a scanning line drive unit 3, an X-axis light detection pixel drive unit 4, a Y-axis light detection pixel drive unit 5, a light emission drive unit 6, and a control unit 7. A signal processing unit 8 and a clock generation unit 10.

  In the image display unit 1, display pixels 120 and light detection pixels 140 are arranged in a matrix.

3 and 4 are diagrams illustrating a configuration example of the image display unit 1 according to the present embodiment.
3 and 4 are the same in basic configuration, and the constituent elements of the light detection element are different.

<Configuration of Display Pixel 120>
As shown in FIGS. 3 and 4, the display pixel 120 includes a video signal sampling transistor 121, a storage capacitor 122, and an organic electroluminescence (EL) element 123 that is a self-luminous element. Further, the display pixel 120 includes a driving transistor 127 of the organic EL element 123, a light emission control transistor 128, and a light emission luminance setting transistor 131.
A signal line 124, a scanning line 125, a power supply line 129, a light emission control signal line 130, and a light emission luminance set line 132 are connected to the display pixel 120.
The signal line 124, the power supply line 129, and the light emission luminance set line 132 are connected to the signal line drive unit 2, the scan line 125 is connected to the scan line drive unit 3, and the light emission control signal line 130 is connected to the light emission drive unit 6. ing.

The display pixel 120 is formed at or near each intersection of the signal line 124 and the scanning line 125 arranged in rows and columns.
The organic EL element 123 has a cathode connected to the common signal line 126, and the common signal line 126 is connected to, for example, the ground potential GND.

The video signal sampling transistor 121 is formed of, for example, an N-channel transistor, and has a gate connected to the scanning line 125 and a source connected to the signal line 124.
The driving transistor 127 of the organic EL element 123 is formed of, for example, a P-channel transistor, and has a gate connected to the drain of the transistor 121 and a source connected to the power supply line 129.
The power supply line 129 is a positive power supply, for example.

The light emission control transistor 128 is formed of, for example, an N-channel transistor, and has a drain connected to the drain of the transistor 127, a gate connected to the light emission control signal line 130, and a source connected to the anode of the organic EL element 123.
The storage capacitor 122 is connected between the gate and source of the transistor 127.

  The light emission luminance setting transistor 131 is formed of, for example, an N-channel transistor, and has a drain connected to the gate of the transistor 127, a source connected to the common signal line 126, and a gate connected to the light emission luminance set line 132.

  In addition, although the said transistor assumes the thin film transistor (TFT), it is not necessary to specifically limit to TFT.

The display pixel 120 having such a configuration performs a display operation while appropriately repeating an image display period for displaying an image and a coordinate information emission period for emitting coordinate information.
For example, in one frame, the coordinate information light emission period is shortened as much as possible, and the remaining period is set as an image display period, which is performed every frame.
Here, the period as short as possible of the coordinate information emission period is a time during which necessary coordinate information can be sent and is not recognized by human eyes.

<Operation of Image Display Period of Display Pixel 120>
In the display pixel 120 having the above-described configuration, the transistor 121 has the video signal Sig supplied from the signal line driving unit 2 through the signal line 124 when the write scanning pulse WS is applied to the gate from the scanning line driving unit 3 through the scanning line 125. Is sampled.
The video signal Sig sampled by the transistor 121 is supplied to the gate of the transistor 127 and is held by the holding capacitor 122 for the image display period.
The transistor 127 supplies a drive current corresponding to the signal level of the video signal Sig given to the gate to the organic EL element 123 via the transistor 128, and the organic EL element 123 emits light with luminance corresponding to the signal level of the video signal Sig. By doing so, image display is performed.

<Operation of coordinate information emission period of display pixel 120>
The transistor 128 performs an on / off operation according to a light emission control signal applied to the gate through the light emission control signal line 130, thereby modulating the output light of the organic EL element 123 to emit coordinate information.
The transistor 131 is turned on through the light emission luminance set line 132 to maximize the signal level applied to the gate of the transistor 127. The signal level is held by the holding capacitor 122 over the coordinate information issuing period.

<Operation of image display period and coordinate information emission period>
FIG. 5 is a timing chart in light emission of the display pixel 120.

5, in the image display period, the following processing is performed while the image display signal line 1410 generated by the main control unit 14 of the control unit 7 is at the low level (L).
Write scanning pulses WS (first row), WS (second row),... That are sequentially generated by scanning by the scanning line driving unit 3 correspond to the scanning lines 125 (1), 125 (2),. Are supplied to the gates of the transistors 121 of the display pixels 120 in each row.
As a result, a video signal for one frame, that is, a video signal for n rows is sampled by sampling by the transistor 121 and is held in the storage capacitor 122 of each display pixel 120.
Based on the image display signal line 1410, the light emission control signal line 130 performs control for stopping the light emission of the organic EL element 123 until the image charge for one frame is held in the storage capacitors 122 of all display pixels. The signal is propagated.
Conversely, when the image display period is set to the high level (H) by the image display signal, the light emission control signal 130 is also in the high level (H) state, and at the same time the scanning pulse WS becomes the high level (H), the organic The light level of the EL element 23 is changed to the captured image level.
FIG. 5 shows an example of the former.

In the image display period, when the light emission control signal line 130 is controlled and the light emission period and the non-light emission period are provided, the ratio between the two is set so that the white balance at the time of image display is not lost. The display pixels are set to be equal.
In the subsequent coordinate information emission period, the emission luminance set line 132 is set to a high level (H) to turn on the transistor 131 and set the gate of the transistor 127 to the same potential as the common signal line 126. Since the common signal line 126 is, for example, a ground potential, charges corresponding to the maximum luminance are stored in the storage capacitor 122.
Thereafter, the light emission luminance set line 132 is turned to the low level (L) and turned off, whereby the storage capacitor 122 holds the charge corresponding to the maximum luminance.
That is, the transistor 127 is in a state in which a current having the maximum luminance level can flow through the organic EL element 123.
A signal generated according to the signals Light_En 1350, Light_Sig 1340, and the clock SysClk 1020 based on the coordinate acquisition period signal generated by the main control unit 14 is given to the gate of the transistor 128 of each display pixel 120 by the light emission control signal line 130.
Thus, the transistor 128 causes the organic EL element 123 to emit light with the coordinate information on the output light.

In the above-described example, the low level (L) period of the light emission luminance set line 132 is set to the maximum luminance level, but there is no particular limitation, and the low level (L) period is set to an arbitrary luminance level. You may combine them.
In the above-described example, the coordinate information light emission period is provided after the image display period. However, the coordinate information light emission period is not particularly limited and may be preceded.

<Configuration of Photodetection Pixel 140>
As shown in FIGS. 3 and 4, the light detection pixel 140 includes a light detection element 141 and an X-axis output selection transistor 142.
The photodetecting element 141 is configured by a photodiode 141A as shown in FIG. 3, for example, or is formed by a phototransistor 141B as shown in FIG.
The X-axis output selection transistor 142 selectively outputs the output of the light detection element 141 to the light detection pixel X-axis output signal line 143.
One end of the light detection element 141 is connected to the light detection pixel power supply line 144.

FIG. 3 shows an example in which a photodiode 141 </ b> A is used as the light detection element 141.
Similarly, FIG. 4 illustrates an example in which a phototransistor 141B is used as the light detection element 141.

In the light detection pixel 140, a light detection pixel X-axis output signal line 143 and a light detection pixel power supply line 144 are wired in the horizontal direction, and an X-axis light detection pixel control line 145 is wired in the vertical direction.
One end of the photodetection pixel X-axis output signal line 143 and one end of the photodetection pixel power supply line 144 are connected to the Y-axis photodetection pixel drive unit 5.
The X-axis light detection pixel control line 145 is connected to the gate of the X-axis output selection transistor 142, and one end thereof is connected to the X-axis light detection pixel driver 4.

<Arrangement of Photodetection Pixel 140>
The light detection pixels 140 are not necessarily arranged one-on-one with the display pixels 120, and may be arranged independently of the number of display pixels.
As described in the second embodiment, the light detection pixels may be arranged under a black mask outside the display pixels.

  The signal line driver 2 includes a digital / analog (D / A) conversion process for converting input digital pixel data into an analog voltage suitable for driving the display element.

  The scanning line driving unit 3 sequentially selects the scanning lines 125 and performs an operation of writing video data to the display pixels 120 in synchronization with the signal line driving unit 2.

  The X-axis light detection pixel driving unit 4 drives the X-axis light detection pixel control line 145 under the control of the control unit 7 and outputs the detection result of the light detection element 141 in the light detection pixel 140 as the light detection pixel X-axis output. Read out to the signal line 143.

As shown in FIGS. 3 and 4, the Y-axis light detection pixel driving unit 5 includes a Y-axis output selection transistor 146.
One end of the Y-axis output selection transistor 146 is connected to the photodetection pixel X-axis output signal line 143, the other end is connected to the photodetection pixel output signal line 148, and the gate is connected to the Y-axis photodetection pixel control line 147. ing.

  The Y-axis light detection pixel drive unit 5 sends the detection result of the light detection element 141 read to the light detection pixel X-axis output signal line 143 via the light detection pixel output signal line 148 under the control of the control unit 7. To the signal processing unit 8.

Under the control of the control unit 7, the light emission driving unit 6 causes the light emitting element to emit light with a signal light emission period and a stop period, and emits light by superimposing a fundamental frequency on the signal in the signal light emission period.
The fundamental frequency is a frequency that avoids the frequency generated by, for example, an inverter type lighting fixture.

The control unit 7 controls the signal line driving unit 2 and the scanning line driving unit 3 to control the display pixels 120 and controls the X-axis light detection pixel driving unit 4 and the Y-axis light detection pixel driving unit 5. Drive control of the photodetection pixel 140 is performed.
In addition, the control unit 7 performs light emission control of the light emission driving unit 6.

The signal processing unit 8 receives an output from the Y-axis light detection pixel driving unit 5 and outputs a signal processing result as an output signal.
In the present embodiment, the signal is coordinate information, and a full bit of 0 and a full bit of 1 are not used as coordinate information.

  The clock generation unit 10 provides the SysClk 1020 and the 4SysClk 1040 to each block.

  In addition, although a power supply unit is not illustrated, driving power is supplied to each block by the power supply unit.

  Hereinafter, specific configurations and functions of the control unit 7, the light detection drive units 4 and 5, the light emission drive unit 6, the clock generation unit 10, and the signal processing unit 8 in the present embodiment will be described, and then a predetermined operation will be described. To do.

  As shown in FIG. 2, the control unit 7 includes an image display control unit 11, a photodetection pixel drive control unit 12 as a second control unit, a light emission control unit 13 as first and third control units, And a main control unit 14.

The image display control unit 11 of the control unit 7 drives and controls the signal line driving unit 2 and the scanning line driving unit 3 using pixel data lines and control signal lines.
The light detection pixel drive control unit 12 of the control unit 7 controls the X-axis light detection pixel drive unit 4 and the Y-axis light detection pixel drive unit 5.
The light emission control unit 13 of the control unit 7 performs light emission control of the light emission drive unit 6.
The main control unit 14 of the control unit 7 transmits an image display period signal and a coordinate information light emission period signal to the image display control unit 11, the light detection pixel drive control unit 12, and the light emission control unit 13, respectively. To do.

  FIG. 6 is a diagram illustrating a configuration example of the light detection pixel drive control unit 12 and the light emission control unit 13 of the control unit 7 according to the present embodiment.

  As shown in FIG. 6, the light detection pixel drive control unit 12 includes a coordinate bit number generation unit 1210, an X coordinate generation unit 1220, and a Y coordinate generation unit 1230.

  The coordinate bit number generation unit 1210 includes a coordinate bit number register 1210 that sets the bit number of one pixel, a j-ary counter 1212 that counts up to j, where the set coordinate bit number is j, and an AND element 1213. .

Although not shown, the coordinate bit number register 1211 is set by a microcomputer (hereinafter referred to as a microcomputer) or a switch.
The AND element 1213 receives the clock 4 SysClk 1040 generated by the clock generation unit 10 and the coordinate acquisition period signal propagated through the coordinate acquisition period signal line 1420 generated by the main control unit 14, and outputs an output signal as a j-ary counter. 1212 is supplied to a clock terminal.
The j-adic counter 1212 counts the output signal generated by the AND element 1213 as an input, and outputs the carrier signal bCa1240 to the X-axis and Y-axis photodetection pixel driving units 4 and 5.

The X coordinate generation unit 1220 includes a horizontal light detection pixel register 1221 that sets the number of horizontal light detection pixels, and an n-ary counter 1222 that counts up to n when the number of horizontal light detection pixels to be set is n.
Although not shown, the horizontal light detection pixel number register 1221 is set by a microcomputer or a switch.

The n-ary counter 1222 is supplied with the output signal generated by the AND element 1213 to the clock terminal, counts the carrier signal bCa1240 from the j-ary counter 1212 as an input, and counts the X-axis coordinate information 1250 and the carrier signal. 1223 is output.
The n-ary counter 1222 outputs the X-axis coordinate information 1250 to the X-axis light detection pixel driving unit 4.

  The Y coordinate generation unit 1230 includes a vertical light detection pixel register 1231 that sets the number of vertical light detection pixels, and an m-ary counter 1232 that counts up to m when the number of vertical light detection pixels to be set is m.

Although not shown, the vertical light detection pixel number register 1231 is set by a microcomputer or a switch.
The m-ary counter 1232 counts the output signal generated by the AND element 1213 supplied to the clock terminal, receives the carrier signal 1223 from the n-ary counter 1222, and counts the Y-axis coordinate information 1260 and the carrier signal. 1233 is output.
The m-ary counter 1232 outputs the Y-axis coordinate information 1260 to the Y-axis light detection pixel driving unit 5.
The carrier signal 1233 is generated by the carrier signal bCa1240 and the carrier signal in the n-ary counter.

  Although the generation method of these information has been described by taking the counter as an example, it is not particularly limited, and other methods such as generation by a microcomputer may be used.

  As illustrated in FIG. 6, the light emission control unit 13 includes an AND element 1301, a coordinate information conversion unit 1310, a shift register unit 1320, and an intermittent signal generation unit 1330.

  The AND element 1301 receives the clock 4 SysClk 1040 generated by the clock generation unit 10 and the coordinate acquisition period signal propagated through the coordinate acquisition period signal line 1420 generated by the main control unit 14 and generates an output signal.

The coordinate information conversion unit 1310 includes 1 addition processing units 1311 and 1312.
The 1-addition processing unit 1311 includes a D flip-flop FF1 therein, and receives the X-axis coordinate information 1250 generated by the photodetection pixel drive control unit 12, and performs 1-addition processing.
The 1 addition processing unit 1311 holds the result of the 1 addition processing in synchronization with the output signal generated by the AND element 1301.
The 1 addition processing unit 1311 outputs the held value to the shift register unit 1320 as the X value 1313.

The 1-addition processing unit 1312 includes a D flip-flop FF2 therein, and receives the Y-axis coordinate information 1260 generated by the photodetection pixel drive control unit 12 as input, and performs 1-addition processing.
The 1 addition processing unit 1312 holds the result of the 1 addition processing in synchronization with the output signal generated by the AND element 1301.
The 1 addition processing unit 1312 outputs the held value to the shift register unit 1320 as the Y value 1314.

The generation method of the X value 1313 and the Y value 1314 is not particularly limited. In this example, 1 addition processing is performed. However, a conversion method using a look-up table may be used, or the generation may be performed by a microcomputer. May be.
The value should not be 0 or a value with a full bit of 1 is used.
The value 0 is a case where coordinate information is not detected, and the value where the full bit is 1 is because the inverter type lighting apparatus is used.

The shift register unit 1320 includes a shift register 1321.
The shift register 1321 is composed of the number of bits of the sum of the horizontal and vertical photodetection pixel numbers n and m to be set.

The shift register 1321 receives the carrier signal bCa1240 generated by the photodetection pixel drive control unit 12 as a latch input, and inputs the X value 1313 and the Y value 1314 as inputs to the register by a latch operation.
The shift register 1321 uses an output signal generated by the AND element 1301 as a clock used for sending out latch data, and obtains a signal LED_Sig 1340 as an output.

The arrangement of the data at the time of capturing is not particularly defined as long as it is indicated by the touch signal output from the signal processing unit 8.
In FIG. 6, the X value is the lower bit and the Y value is the upper bit, and the X value is sent in order from the first bit.

  The intermittent signal generation unit 1330 includes an intermittent number register 1331 that sets the number of intermittent intervals, a k-adic counter 1332 that counts up to k when the set number of intermittent intervals is k, and a D that matches the output of the shift register 1321. And a flip-flop 1333.

  Although not shown, the intermittent interval number register 1331 is set by a microcomputer or a switch.

  The k-adic counter 1332 is supplied to the output signal clock terminal generated by the AND element 1301, counts the carrier signal 1233 from the m-adic counter 1232 of the photodetection pixel drive control unit 12 as an input, and outputs the carrier signal 1333. Output.

  Since the D flip-flop 1333 operates in synchronization with the shift register 1321 as a clock input, the D flip-flop 1333 receives the carrier signal bCa1240, receives the carrier signal 1333 that is the output of the k-adic counter 1332, and inputs the signal LED_En1350 to the light emission driving unit 6. Output.

The signal LED_En1350 is intended to reduce the power consumption of the organic EL light emitting element 123 of the image display unit 1 in the coordinate information light emission period. For this reason, the generation method of the signal LED_En1350 has been described by taking the counter as an example, but there is no particular limitation, and other methods such as generation by a microcomputer may be used.
Furthermore, although the operation is performed once for k times, the operation may be performed a plurality of times for k times as necessary.

<Configuration of Photodetection Pixel Driver>
FIG. 7 is a diagram illustrating a configuration example of the X-axis light detection pixel driving unit 4 and the Y-axis light detection pixel driving unit 5 according to the present embodiment.

  As shown in FIG. 7, the X-axis light detection pixel drive unit 4 includes an AND element 401, a decode unit 410, a latch unit 420, an X-axis light detection pixel drive signal generation unit 430, and a light detection pixel drive gap generation unit 440. Consists of.

  The AND element 401 receives the clock 4 SysClk 1040 generated by the clock generation unit 10 and the coordinate acquisition period signal propagated through the coordinate acquisition period signal line 1420 generated by the main control unit 14 and generates an output signal.

  The decoding unit 410 includes a decoder 411 and a D flip-flop 412.

  The decoder 411 uses the X-axis coordinate information 1250 of the photodetection pixel drive control unit 12 as an input signal, and outputs the decoding results Decode_x0 to Decode_xn to the D flip-flop 412.

The D flip-flop 412 is composed of n D flip-flops.
Each D flip-flop uses the output signal generated by the AND element 401 as a clock input.
Each D flip-flop outputs the output signals D_x0 to D_xn to the latch unit 420 by synchronizing the outputs Decode_x0 to Decode_xn of the decoder 411 with the output signal generated by the AND element 401.

The latch unit 420 includes a D flip-flop unit 421.
The D flip-flop unit 421 includes n D flip-flops.
Since each D flip-flop operates in synchronization with the shift register 1321 of the light emission control unit 13, the carrier signal bCa1240 of the photodetection pixel drive control unit 12 is used as a clock input.
Each D flip-flop receives the outputs D_x0 to D_xn of the D flip-flop 412, and outputs the signals L_D_x0 to L_D_xn to the X-axis light detection pixel drive signal generation unit 430 in synchronization with the carrier signal bCa1240.

The X-axis light detection pixel drive signal generation unit 430 includes a plurality of NOT elements 431 and a plurality of AND elements 432.
The NOT element 431 and the AND element 432 are composed of n sets each including the NOT element and the AND element.

The NOT element 431 is supplied with the gap signal 444 of the light detection pixel driving gap generating section 440 as an input and connected to one input of the AND element 432.
The other input of the AND element 432 is connected to outputs L_D_x0 to L_D_xn of the D flip-flop 421.
The outputs of the n AND elements 432 are output to n X-axis light detection pixel control lines 450, respectively.

  The gap between light detection pixel driving units 440 includes a D flip-flop 441, a NOT element 442, and AND elements 443 and 444.

The AND element 444 receives the clock SysClk 1020 generated by the clock generation unit 10 and the coordinate acquisition period signal propagated through the coordinate acquisition period signal line 1420 generated by the main control unit 14 and generates an output signal.
The D flip-flop 441 receives the output signal generated by the AND element 401 as a synchronization signal as a clock input, receives the carrier signal bCa1240 of the photodetection pixel driving control unit 12 as an input, and outputs the input to one input of the AND element 443. It is connected.
The NOT element 442 has the carrier signal bCa1240 as an input and an output connected to the other input of the AND element 443.
The AND element 443 performs an AND process on the output of the D flip-flop 441 and the output of the NOT element 442 to generate a gap signal 444.
The AND element 443 supplies the generated gap signal 444 to the plurality of NOT elements 431 of the X-axis light detection pixel drive signal generation unit 430.
The gap signal 444 is also supplied to the Y-axis light detection pixel driving unit 5.

  As shown in FIG. 7, the Y-axis light detection pixel driving unit 5 includes a decoding unit 510, a latch unit 520, a Y-axis light detection pixel drive signal generation unit 530, and a light detection pixel X-axis output signal line selection unit 540. Is done.

  The decoding unit 510 includes a decoder 511 and a D flip-flop 512.

The decoder 511 uses the Y-axis coordinate information 1260 of the photodetection pixel drive control unit 12 as an input signal, and outputs the decoding results Decode_y0 to Decode_ym to the D flip-flop 512.
The D flip-flop 512 includes m D flip-flops.
Each D flip-flop uses the output signal generated by the AND element 401 as a clock input.
Each D flip-flop 512 outputs signals D_y0 to D_ym to the latch unit 520 by synchronizing the outputs Decode_y0 to Decode_ym of the decoder 511 with the clock 4SysClk 1040.

The latch unit 520 includes a D flip-flop unit 521.
The D flip-flop unit 521 includes n D flip-flops.
Since each D flip-flop operates in synchronization with the shift register 1321 of the light emission control unit 13, the carrier signal bCa1240 of the photodetection pixel drive control unit 12 is used as a clock input.
Each D flip-flop receives the outputs D_y0 to D_ym of the D flip-flop 512 and outputs the signals L_D_y0 to L_D_ym to the Y-axis light detection pixel drive signal generation unit 530 in synchronization with the carrier signal bCa1240.

The Y-axis light detection pixel drive signal generation unit 530 includes a plurality of NOT elements 531 and a plurality of AND elements 532.
The NOT element 531 and the AND element 532 are composed of m sets, each including the NOT element and the AND element.

The NOT element 531 is supplied with the gap signal 444 of the gap detection section 440 between photodetection pixel drives, and the output is connected to one input of the AND element 532.
The other input of the AND element 532 is supplied with outputs L_D_y0 to L_D_ym of the D flip-flop 521.
The output of the AND element 532 is output as m Y-axis light detection pixel control lines 147.

The light detection pixel X-axis output signal line selection unit 540 includes m switching elements 146.
A gate of the switching element 146 is connected to each of m Y-axis light detection pixel control lines 147-1 to 147-m.
One end of the switching element 146 is connected to each of the m photodetection pixel X-axis output signal lines 143-1 to 143-m of the image display unit 1 in FIGS.
The other end of the switching element 146 is connected to the light detection pixel output signal line 148 of the image display unit 1.

<Configuration of light emission drive unit>
FIG. 8 is a diagram illustrating a configuration example of the light emission driving unit 6 according to the present embodiment.

As shown in FIG. 8, the light emission drive unit 6 includes a SysClk superimposing unit 610, a signal superimposing unit 620, and a light emission control output unit 630.
In FIG. 8, an example of the N-type FET of the transistors of the SysClk superimposing unit 610, the signal superimposing unit 620, and the light emission control output unit 630 is shown, but a method for realizing the same function is shown here. There is no need to limit.

In the SysClk superimposing unit 610, the transistor 611 is configured as a source follower, the SysClk 1020 of the clock generating unit 10 is input to the gate of the transistor 611, and the source is connected to the ground potential GND through the resistor 612.
The drain of the transistor 611 is connected to the source of the transistor 621 of the signal superimposing unit 620.

The signal superimposing unit 620 includes a transistor 621 and an AND element 622.
The output of the AND element 622 is input to the base of the transistor 621, and the drain is connected to the power supply.
The input of the AND element 622 is connected to a signal LED_En 1350 and a signal LED_Sig 1340 supply line of the light emission control unit 13 and a coordinate acquisition period signal line 1420 that propagates a coordinate acquisition period signal generated by the main control unit 14. .

The light emission control output unit 630 includes an OR element 631.
The input of the OR element 631 is connected to the source follower output of the transistor 611 and the image display signal line 1410 that propagates the coordinate acquisition period signal generated by the main control unit 14, and the output is connected to the light emission control signal line 130. ing.

<Configuration of clock generator>
FIG. 9 is a diagram illustrating a configuration example of the clock generation unit 10 according to the present embodiment.
FIG. 10 is a timing chart of the clock generation unit of FIG.

As shown in FIG. 8, the clock generation unit 10 includes a Q frequency division unit 1010 that performs Q frequency division on the system clock SysClk 1020.
Since the system clock SysClk 1020 also serves as a carry signal, a frequency higher than the frequency generated by the inverter type lighting fixture, for example, about 100 to 200 kHz is used.

In FIG. 9 and FIG. 10, divide by 4 is used as an example.
The period of the system clock SysClk 1020 and a period equal to or more than twice the total of one pulse width of the gap signal 444 generated by the gap detection unit driving gap generation unit 440 of the X-axis light detection pixel driving unit 4 is the clock. It is because it needs to be used as.
Specifically, a cycle that is at least twice the sum of one cycle of the system clock SysClk 1020 and one pulse width of the gap signal 444 is used as the clock for the coordinate bit number generation unit 1210 of the photodetection pixel drive control unit 12. This is because it needs to be used.

This is because the touch signal generated by the signal processing unit 8 can be restored in the same manner as the signal LED_Sig 1340 generated by the light emission control unit 13 by satisfying this condition.
In this example, one pulse of the gap signal 444 is generated for one cycle of the system clock SysClk.
Therefore, a clock 4 SysClk 104 is generated in which the total of one cycle of the system clock SysClk is a clock SysClk that is twice, and the cycle of the system clock SysClk is four times the cycle of the clock SysClk.

  The divide-by-4 unit 1040 includes a D flip-flop 1011 and a D flip-flop 1012.

The D flip-flop 1011 uses the clock SysClk 1020 as an input clock, and generates a clock 2 SysClk 1030 having a cycle twice that of the clock SysClk. The inverted output of the clock 2 SysClk 1030 is supplied to the input of the D flip-flop 1011.
The D flip-flop 1012 uses the clock 2 SysClk 1030 as an input clock, and generates a clock 4 SysClk 1040 having a cycle twice that of the clock 2 SysClk (= a cycle four times that of SysClk). The inverted output of the clock 4 SysClk 1040 is supplied to the input of the D flip-flop 1012.

  In the present example, a frequency divider using a D flip-flop is shown. However, if a period more than double the total of one period of the clock SysClk 1020 and one pulse width of the gap signal 444 can be generated, it is particularly limited. I do not.

<Configuration of signal processing unit>
FIG. 11 is a diagram illustrating a configuration example of the signal processing unit 8 according to the present embodiment.

  The signal processing unit 8 includes an AND element 801, a preamplifier (PreAmp) unit 810, a SysClk signal extraction unit 820, a SysClk signal amplification unit 830, a SysClk signal removal unit 840, a coordinate signal shaping unit 850, and a coordinate enable signal shaping unit 860. Is done.

  The AND element 801 receives the clock 4 SysClk 1040 generated by the clock generation unit 10 and the coordinate acquisition period signal propagated through the coordinate acquisition period signal line 1420 generated by the main control unit 14, and generates an output signal.

The PreAmp unit 810 amplifies the signal from the light detection pixel output signal line 148 by current-voltage conversion.
FIG. 11 shows an example in which current / voltage conversion and amplification are performed by an npn transistor 811 as the PreAmp unit 810.

  The transistor 811 is grounded via a resistor 813. A bias resistor 812 is connected to the base, converts the current from the light detection pixel output signal line 148 into a voltage, and outputs the voltage to the collector. The collector of the transistor 811 is connected to the power source.

  The SysClk signal extraction unit 820 includes a band-pass filter (BPF) 821 that passes only the SysClk signal in order to extract the clock SysClk signal using the output voltage signal from the collector of the transistor 811 as an input.

  The SysClk signal amplifying unit 830 includes an amplifier (Amp) 831, and amplifies the output from the BPF 821 to a level recognizable by the coordinate signal shaping unit 850.

  The SysClk signal removal unit 840 includes a low-pass filter (LPF) 841, receives the output from the Amp 831, removes the frequency component of the SysClk signal, and passes the coordinate signal.

The coordinate signal shaping unit 850 includes a D flip-flop 851.
The coordinate signal shaping unit 850 receives the output of the LPF 841 as an input, outputs the touch signal 880 in synchronization with the output signal generated by the AND element 801 using the output signal generated by the AND element 801 as an input clock. .

The coordinate enable signal shaping unit 860 includes a D flip-flop 861.
The coordinate enable signal shaping unit 860 uses the output signal LED_En1350 of the light emission control unit 13 as an input signal and an output signal generated by the AND element 801 as an input clock.
The coordinate enable signal shaping unit 860 outputs an enable signal Enable 870 in synchronization with the output signal generated by the AND element 801.
An output signal generated by the AND element 801 is used as a synchronization clock SClk 890 for the touch signal 880 and the enable signal Enable 870.

  In the above description, a general configuration example is illustrated and described. However, the current signal from the light detection pixel is converted into a voltage, the system clock SysClk signal is extracted from the signal, and the system clock SysClk signal is removed. The process of taking out the coordinate signal is important.

The specific configuration and function of each unit has been described above.
Hereinafter, an operation for generating a light emission control signal, an operation of the light detection pixel driving unit, an operation until the signal processing unit 8 outputs the touch signal 880 will be described.

<LED_Sig Generation Operation>
Next, the generation operation of the signal LED_Sig in the light emission control unit 13 will be described.

  FIG. 12 is a timing chart of LED_Sig generation in the light emission control unit 13.

6 and 12, the j-adic counter 1212 of the coordinate bit number generation unit 1210 counts up to j by using the output signal of the AND element 1213 as an input.
The j-adic counter 1212 generates a carrier signal bCa1240 when counting up to j. In FIG. 12, a pulse having a pulse width corresponding to one cycle of the clock 4 SysClk is generated from the low level (L) to the high level (H).
The n-ary counter 1222 of the X coordinate generation unit 1220 counts up using the output signal of the AND element 1213 as a synchronous clock and the carrier signal bCa1240 from the j-ary counter as an input, and generates X-axis coordinate information 1260 and a carrier signal 1223. .
The carrier signal 1223 is a pulse signal having a pulse width corresponding to one cycle of the clock 4 SysClk.

The m-coordinate counter 1232 of the Y coordinate generation unit 1230 counts up using the output signal of the AND element 1213 as a synchronous clock and the carrier signal bCa1240 from the j-ary counter and the carrier signal 1223 from the m-ary counter as inputs.
Then, the Y coordinate generation unit 1230 generates Y axis coordinate information 1250 and a carrier signal 1233.
The carrier signal 1233 is a pulse signal having a pulse width corresponding to one cycle of the clock 4 SysClk.
The coordinate information conversion unit 1310 of the light emission control unit 13 adds 1 to the X-axis coordinate information 1250 and the Y-axis coordinate information, operates in synchronization with the output signal of the AND element 1213, and sets the X value 1313 and the Y value 1314. Generate.

The shift register unit 1320 captures the X value 1313 into the lower bits and the Y value 1314 into the upper bits in synchronization with the falling edge of the carrier signal bCa1240.
Then, in the shift register unit 1320, in synchronization with the output signal of the AND element 1301, the X value and the Y value are sequentially sent out as the signal LED_Sig 1340 from the 0th bit of the X value.
In the shift register unit 1320, when the X value and the Y value are completely sent out, the next X value and Y value are sent out.

  In FIG. 12, X value: 1 and Y value: 1 are sent out from the shift register, and after completion, X value: 2 and Y value: 1 are sent out. Y value: 1 and so on.

<LED_En generation operation>
Next, the operation of LED_En in the light emission control unit 13 will be described.

  FIG. 13 is a timing chart of LED_En generation in the light emission control unit 13.

6 and 13, the k-ary counter 1332 of the intermittent signal generator 1330 counts up using the output signal of the AND element 1301 as a synchronous clock and the carrier signal 1233 from the m-ary counter as an input, and generates a carrier signal 1333. To do.
The carrier signal 1333 is a signal that maintains a high level (H) for the k-th count.
The carrier signal 1333 is captured by the D flip-flop 1333 using the carrier signal bCa1240 as a synchronous clock, and a signal LED_En1350 is generated.

Next, the detection operation until the touched part is detected will be described.
Here, as illustrated in FIG. 14, an example in which fingers of four pixels touch the photodetection pixels 140 of the image display unit 1 will be described.

  First, the operation of the light detection pixel driving unit will be described with reference to FIG.

  FIG. 15 is a timing chart of the 0th bit of the X axis of the photodetection pixel driving unit.

7, 14, and 15, when the X coordinate information 1250 outputs the value 00, the decoder 411 of the decoding unit 410 sets the 0-bit signal line Decode_x0 to the high level (H ) To generate.
Thereafter, since the D flip-flop 412 operates in synchronization with the output signal of the AND element 401, the D flip-flop 412 generates a signal D_x0 synchronized with the output signal of the AND element 401.
The signal D_x0 is latched by the latch unit 420 in synchronization with the carrier signal bCa1240, and a signal L_D_x0 is generated.

The gap detection unit 440 between photodetection pixels drives generates a gap signal 444 having a pulse width corresponding to one cycle of the system clock SysClk from the carrier signal bCa1240.
The X-axis light detection pixel drive signal generation unit 430 combines the signal L_D_X0 and the gap signal 444 to generate a signal to the X-axis light detection pixel control line (1).
The same operation is performed for the other bits of the X axis and the Y axis, and signals to the X axis light detection pixel control line and the Y axis light detection pixel control line are generated.

Next, the operation until the touch signal 880 is output by the signal processing unit 8 will be described with reference to FIG.
FIG. 16 is a timing chart until the touch signal 880 is output by the signal processing unit 8.

11, 14, and 16, the signal LED_Sig 1340 is output by the organic EL element 123 through the light emission control signal generated by the light emission driving unit 6 only when the signal LED_En 1350 is at a high level (H).
At that time, the organic EL element 123 emits light by superimposing the system clock SysClk 1020.

On the other hand, as shown in FIG. 14, the photodetection pixels 140 in the (X, Y) coordinates (1, 1), (2, 1), (1, 2), (2, 2) are covered with a finger. If it has been broken, the light emitted from the organic EL element 123 is reflected and taken in from each light detection pixel 140.
The light captured by the light detection pixel 140 is converted into a current or voltage value.
The converted current or voltage value is obtained when the X-axis light detection pixel control line 145 is set to the high level (H) at the corresponding timing in the X-axis light detection pixel driving unit 4 so that the X-axis output selection transistor 142 Turned on and transferred to the photodetection pixel X-axis output signal line 143.

  When the Y-axis photodetection pixel control line 147 also becomes high level (H) at the corresponding timing, the Y-axis output selection transistor 146 is turned on, and the signal current or signal voltage of the photodetection pixel X-axis output signal line 143 is It is transferred to the photodetection pixel output signal line 148.

For example, at the timing when the signal (0101) of (1, 1) is emitted, the X-axis light detection pixel control line 145-1 becomes high level (H) and the Y-axis light detection pixel control line 147-1 becomes high. It becomes level (H).
The organic EL element 123 emits light with the system clock SysClk superimposed on (0101), and the emitted light is reflected by a finger or the like, so that a signal at that time appears on the light detection pixel output signal line 148.
Similarly, at the timing when the signal (1001) of (2, 1) is emitted, the X-axis light detection pixel control line 145-2 is at a high level (H), and the Y-axis light detection pixel control line 147-1 is turned on. High level (H).
The organic EL element 123 emits light with the system clock SysClk superimposed on (1001), and the emitted light is reflected by a finger or the like, so that a signal at that time appears on the light detection pixel output signal line 148.
The signal of the photodetection pixel output signal line 148 performs current-voltage conversion in the case of a current in the PreAmp unit 810 of the signal processing unit 8, and amplifies and outputs the signal.
In the output signal of the PreAmp unit 810, the system clock SysClk is extracted by the BPF 821 in order to detect the system clock SysClk.

The signal of the system clock SysClk extracted by the BPF 821 is amplified by the Amp 831 to a level that can be detected by the coordinate shaping unit 850.
In order to remove SysClk from the output signal of Amp 831, LPF 841 is passed.
By removing the system clock SysClk by the LPF 841, signals of (0101) and (1001) as coordinate information can be extracted.
The coordinate signal shaping unit 850 generates the touch signal 880 by holding the signal from the LPF 841 in synchronization with the clock 4 SysClk 1040.

[Second Embodiment]
Next, an image display apparatus according to a second embodiment of the present invention will be described.
FIG. 17 is a diagram showing an image display apparatus according to the second embodiment of the present invention.
FIG. 18 is a diagram illustrating an example of a touch signal detected in the second embodiment.

  In the second embodiment, photodetection pixels 140a (start portion) and 140b (end portion) are added to the black matrix portion 101 at the peripheral portion of the pixel display portion 1 with respect to the first embodiment described above. Yes.

  By adding the start light detection pixel and the end light detection pixel to the Y-axis direction, it is possible to reliably confirm the signals of each Y-axis.

The display pixel 120a (start portion), the display pixel 120b (end portion), the light detection pixel (start portion) 140a, and the (end portion) 140b are arranged immediately below the black matrix portion 101.
For this reason, the emitted light of the organic EL element 123a of the display pixel (start portion) 120a and the display pixel (the organic EL element 123b of the end portion 120b) is always reflected.
Therefore, the coordinate information conversion unit 1310 of the light emission control unit 13 gives eigenvalue 1 and eigenvalue 2 to the light detection pixel (start unit) 140a and (end unit) 140b as signals to be put on the X value 1313.
Then, the n-ary counter 1222 is used as an (n + 2) -ary counter, and the 1-addition processing unit 1311 passes through the 1-addition process, which can be realized.

  In FIG. 17, since the finger touches the coordinate (2, 2), the touch signal in FIG. 18 has a value of (2, 2) in addition to the signals at the start and end of each Y axis.

FIG. 19 is a diagram illustrating a pattern of values to be put on a general light emission signal LED_Sig and values to be output as a touch signal.
FIG. 20 is a diagram illustrating specific examples of values and touch signals to be placed on the light emission signal LED_Sig. FIG. 20 shows an example in which the number of X-axis light detection pixels is 640 and the number of Y-axis light detection pixels is 480.

Eigenvalue 1 is 965 and eigenvalue 2 is 969.
As the number of coordinate bits, the X-axis coordinate is represented by 10 bits and the Y-axis coordinate is represented by 9 bits.
The eigenvalue 1 and eigenvalue 2 are binary values, eigenvalue 1 = 965 = [1111000101] b and eigenvalue 2 = 969 = [1111001001] b, respectively.
By configuring the lower 4 bits with [0101] b or [1010] b, signal processing based on the pulse width ratio is also possible.

Further, by using a bit arrangement that is not symmetrical between the start part and the end part, the start part and the end part can be reliably identified.
The eigenvalue 1 is used as the X-axis coordinate data of the start part, the eigenvalue 2 is used as the X-axis coordinate data of the end part, and the Y value is used as it is for the Y-axis coordinate data. Part and end part are output.

If the coordinates (1, 1) are touched now, [1, 1] is emitted from the light emitting element portion 630 by the light emission signal LED_Sig.
For this reason, the serial data of [1, 1] or [0000000001, 000000001] b as the touch signal can be detected between the start part and the end part.

[Third Embodiment]
An image display apparatus according to a third embodiment of the present invention will be described.
FIG. 21 is a diagram illustrating a configuration example of the X-axis light detection pixel driving unit 4A and the Y-axis light detection pixel driving unit 5 in the image display apparatus according to the third embodiment.

  In FIG. 21, the configuration of the X-axis light detection pixel drive signal generation unit 430A of the X-axis light detection pixel drive unit 4A is different from the configuration of the X-axis light detection pixel drive signal generation unit 430 of FIG.

In FIG. 21, a light emission signal LED_Sig 1340 and a light emission enable signal LED_En 1350 are input to the 3-input AND element 433 of the X-axis light detection pixel drive signal generation unit 430A of the X-axis light detection pixel drive unit 4A.
The remaining input of the AND element 433 is connected to the output of the AND element 432, and the output of the AND element 433 is connected to the X-axis light detection pixel control line 143.

FIG. 22 is a diagram illustrating a configuration example of the light emission drive unit 6B according to the third embodiment.
In the third embodiment, the light emission drive unit 6B is a light pen different from the backlight.
Therefore, the light emission drive unit 6B of FIG. 22 has a configuration in which the signal superimposing unit 620 of the light emission drive unit 6 of FIG. 7 is deleted. And the light emitting element part 640 is added.
The light emitting element portion 640 includes an LED 641, a transistor 642, and a resistor 633.
The anode of the LED 641 is connected to the power source, and the cathode is connected to the drain of the transistor 642.
The base of the transistor 642 is connected to the source follower output of the transistor 611, and the source is connected to the ground potential GND via the source resistor 633.
The light emitting element portion 640 and the LEDs 641 do not have to be one set or one, and are configured by a plurality or a plurality as necessary.
The light emitting element unit 640 may be a self light emitting element itself in a self light emitting element such as an organic EL.

  FIG. 23 is a timing chart in the case where the area touched by the finger in FIG.

In FIG. 23, since a signal output to the X-axis light detection pixel control line 450 is obtained by a logical product of the signal LED_Sig and the signal LED_En, the high level (H) is not continuously maintained for one pixel. It operates like the X-axis light detection pixel control line (1) inside.
Therefore, the X-axis output selection transistor 142 is normally kept on during the period selected, but performs the on / off operation according to the signal LED_Sig and the signal LED_En.
The on / off operation of the X-axis output selection transistor 142 causes the current or voltage of the light detection element 141 to be transmitted or not transmitted to the signal processing unit 8, so that a signal as shown in FIG. Is transmitted.

  However, in the signal processing unit 8, the SysClk signal extraction unit 820 performs processing for extracting only the system clock SysClk 1020. Therefore, the subsequent waveforms are the same as those in FIG. 18, and a coordinate signal can be acquired as a touch signal.

[Fourth Embodiment]
An image display apparatus according to a fourth embodiment of the present invention will be described.
In the fourth embodiment, the X-axis light detection pixel driving unit 4A uses the same circuit as that in FIG.
FIG. 24 is a diagram illustrating a configuration example of a light emission driving unit 6C according to the fourth embodiment.

  Further, the light emission drive unit 6C inputs the light of the light pen that is the light emission drive unit 6B in FIG. 22 and the clock SysClka 1020a having a frequency different from the clock SysClk 1020 to the base of the transistor 611 as shown in FIG.

  FIG. 25 is a diagram illustrating a configuration example of a clock generation unit 10C that generates a clock used in the light emission drive unit 6C according to the fourth embodiment.

  The clock generation unit 10C basically has the same configuration as that of the clock generation unit 10 of FIG. 9 and generates a signal 4SysClka 1040a obtained by dividing the frequency SysClka 1020a different from the SysClk 1020 by 4.

  FIG. 26 is a diagram illustrating a configuration example of a signal processing unit 8C according to the fourth embodiment.

  The signal processing unit 8C in FIG. 26 is configured as a system that operates with two types of clocks SysClk 1020 and a clock SysClka 1020a.

After the light detection pixel output signal line 148 is converted into current and voltage by the PreAmp unit 810 and amplified, it is passed through the respective SysClk signal extraction unit 820 and SysClk signal extraction unit 820a, whereby the SysClk 1020 and the SysClka 1020a can be taken out.
Coordinate signal information can be obtained by removing the clocks SysClk 1020 and SysClka 1020a in the subsequent SysClk signal removing unit 840 and the SysClk signal removing unit 840a, respectively.
The D flip-flops 861 and 851 and the D flip-flops 861a and 851a in the subsequent stage are synchronized with the output signal generated by each AND element 801 and the output signal generated by the AND element 801a.
The AND element 801 receives the clock 4 SysClk 1040 generated by the clock generation unit 10 and the coordinate acquisition period signal propagated through the coordinate acquisition period signal line 1420 generated by the main control unit 14 and generates an output signal. .
The AND element 801a receives the clock 4 SysClka 1040a generated by the clock generation unit 10C and the coordinate acquisition period signal propagated through the coordinate acquisition period signal line 1420 generated by the main control unit 14, and generates an output signal. .
By doing in this way, the coordinate input with a light pen and the coordinate input of a finger can be obtained simultaneously.

  In FIG. 25, the SysClk signal extraction unit 820a is formed by the BPF 821a, and the SysClk signal removal unit 840a is formed by the LPF 841a.

[Fifth Embodiment]
Next, a digital camera to which the image display devices according to the first to fourth embodiments of the present invention can be applied will be described as a fifth embodiment.

  FIG. 27 is a block diagram illustrating a configuration example of a digital camera according to the fifth embodiment of the present invention.

A digital camera 10000 in FIG. 27 includes a lens 10100, an imager 10200, a camera signal processing unit 10300, a camera drive control unit 10400, a signal processing unit 10500, an external terminal 10600, an EVF 10700, and the present display device 10800.
The digital camera 10000 includes a recording medium 10900, an encoding / decoding processing unit 11000, a recording media control unit 11100, a mechanical drive control unit 11200, a microphone 11300, an audio signal processing unit 11400, and a speaker 11500.
The digital camera 10000 further includes various operation keys 11600, a microcomputer 11700, an EEPROM 11800, a flash memory 11900, an SDRAM 12000, a power supply circuit 12100, a battery 12200, and an AC plug 12300.

Video captured through the lens 10100 and the imager 10200 is generated as appropriate image data by the camera signal processing unit 10300 while adjusting the camera drive control unit 10400.
The generated image data is displayed on the external monitor from the external terminal 10600 through the signal processing unit 10500, or is displayed on the EVF 10700 and the display device 10800 which is the apparatus of the present invention.

Further, the image data from the signal processing unit 10500 is stored in the recording medium 10900 via the encoding / decoding processing unit 11000 and the recording medium control unit 11100.
When the recording medium 10900 is, for example, a DVD, it is operated and stored together with the mechanical drive control unit 11200, the encoding / decoding processing unit 11000, and the recording medium control unit 11100.
Audio is superimposed on the image data from the built-in microphone 11300 through the audio signal processing unit 11400, and is output from the external terminal 10600 to a speaker attached to the external monitor. The image data is stored in the recording medium 10900 via the encoding / decoding processing unit 11000 and the recording medium control unit 11100.

The signal is also output from the built-in speaker 11500 via the audio signal processing unit 11400 from the signal processing unit 10500.
Data stored in the recording medium 10900 is extracted as image data via the recording medium control unit 11100 and the encoding / decoding processing unit 11000.
Data stored in the recording medium 10900 can be displayed on the external monitor from the display device 10800, the EVF 10700, or the external terminal 10600 from the signal processing unit 10500.

Audio can be output from the external terminal 10600 to a speaker attached to the external monitor, or can be output from the built-in speaker 11500 via the audio signal processing unit 11400.
While viewing the monitor screen via the display device 10800, the EVF 10700, or the external terminal 10600, the captured image is controlled, the data stored in the recording medium 10900 is controlled, and the date of the camera is controlled. Is also possible.
These operations can be performed from the various keys 11600 and the display device 10800. Signals from the various keys 11600 and the display device 10800 are processed by the microcomputer 11700, and instructions are distributed to the respective blocks to perform various operations and displays.

The EEPROM 11800 stores setting values necessary for the digital camera.
The FLASH 11900 stores a program necessary for the operation of the microcomputer 11700 or is used as a built-in memory.
The SDRAM 12000 is used as a buffer memory.
As a power supply unit, a power supply circuit 12100, a battery 12200, and an AC plug 12300 are provided.

In this display device, the light detection pixel drive control unit 12, the light emission control unit 13, and the clock generation unit 10 can be formed by the microcomputer 11700.
When an image being photographed or a photographed image is displayed as in a digital camera, there are few opportunities to acquire coordinate information, and the organic EL in the display device 10800 from the microcomputer 11700 is prevented from malfunctioning. The light emitting element portion 630 in the coordinate information acquisition period of the element 123 is stopped.
Since the light emission control unit 13 is in the microcomputer 117000, it can be realized by setting the coordinate acquisition period signal transmitted to the light emission drive unit 6 to a low level (L).
Further, if only limited to the occasion of acquiring coordinate information, there is a case where it is not always necessary to pay attention to image quality, for example, a menu screen is displayed.
Therefore, in that case, it is also possible to simultaneously perform image display and coordinate information light emission without dividing the image display period and the coordinate information light emission period.
In a display device with a slow response speed such as a liquid crystal display element, it is an effective means, the image is composed of bright contents, and the backlight emission operation is divided into an image display period and a coordinate information emission period. Operation may be performed. It can also be realized by simultaneously performing the image display period and the coordinate information emission.

As described above, according to the embodiment of the present invention, without providing a special light emitting element for acquiring coordinate information, the image display period and the coordinate information light emitting period are separated, and the coordinate information is displayed during the coordinate information light emitting period. Coordinate information can be acquired by adding a sending mechanism and signal processing.
In obtaining coordinate information, it is not affected by external light including inverter-type lighting fixtures, and signal processing can be realized by a simpler method than signal processing using general luminance signals. At the time of acquisition light emission, since it is in a lighting state in intermittent operation, a display device with reduced power consumption can be realized.
Furthermore, it is possible to contribute to extending the life of the light emitting element itself.

Further, it is possible to detect whether the light is from the penlight or the reflected light from the display device, and to output the respective coordinate information.
In addition, in the apparatus using the present invention, compared with an existing apparatus that uses a touch panel in combination, a reduction in image quality can be suppressed, and a reduction in thickness and weight can be achieved. Furthermore, when coordinate information is unnecessary, by providing a function of stopping light emission during the coordinate information acquisition period, power consumption by the display device can be suppressed and erroneous operations can be suppressed.

Furthermore, in consideration of the situation of the apparatus using the present invention, it may not always be necessary to prioritize image quality when acquiring coordinate information. In that case, the image display period and the coordinate information emission period are not divided, and the image is displayed. It is also possible to perform display and coordinate information emission simultaneously.
In a display device with a slow response speed such as a liquid crystal display element, it is an effective means, the image is composed of bright contents, and the backlight emission operation is divided into an image display period and a coordinate information emission period. Operation may be performed.
It can also be realized by performing the image display period and coordinate information emission simultaneously, and when coordinate information is acquired, it can be expected to contribute to power consumption because it is in a lighting state from a constant lighting to an intermittent operation. Contributes to longer life.

The display device according to the present embodiment includes various electronic devices shown in FIGS. 28 to 32, for example, digital cameras, notebook personal computers, mobile terminal devices such as mobile phones (mobile devices), desktop personal computers, and video cameras. It is applicable to.
The present display device can be applied to display devices for electronic devices in various fields that display a video signal input to the electronic device or a video signal generated in the electronic device as an image or a video.
Below, an example of the electronic device to which this embodiment is applied is demonstrated.

FIG. 28 is a perspective view showing a television to which the present embodiment is applied.
A television 10500 according to this application example includes a video display screen unit 10510 including a front panel 10520, a filter glass 10530, and the like.
The video display screen unit 10510 is manufactured by using the display device according to this embodiment.

  FIG. 29 is a perspective view showing a digital camera to which the present embodiment is applied. FIG. 29A is a perspective view seen from the front side, and FIG. 29B is a perspective view seen from the back side.

A digital camera 10500A according to this application example includes a flash 10511, a display unit 10512, a menu switch 10513, a shutter button 10514, and the like.
The display unit 10512 is manufactured by using the display device according to this embodiment.

  FIG. 30 is a perspective view showing a notebook personal computer to which the present embodiment is applied.

A notebook personal computer 10500B according to this application example includes a main body 10521 including a keyboard 10522 operated when inputting characters and the like, a display unit 10523 for displaying images, and the like.
The display unit 10523 is manufactured by using the display device according to this embodiment.

  FIG. 31 is a perspective view showing a video camera to which the present embodiment is applied.

A video camera 10500C according to this application example includes a main body portion 10531, a lens 10532 for photographing a subject on a side facing forward, a start / stop switch 10533 during photographing, a display portion 10534, and the like.
The display unit 10534 is manufactured by using the display device according to this embodiment.

FIG. 32 is a diagram illustrating a mobile terminal device to which the present embodiment is applied, for example, a mobile phone.
32A is a front view in an open state, FIG. 32B is a side view thereof, FIG. 32C is a front view in a closed state, FIG. 32D is a left side view, and FIG. (E) is a right side view, FIG. 32 (F) is a top view, and FIG. 32 (G) is a bottom view.

A cellular phone 10500D according to this application example includes an upper housing 10541, a lower housing 10542, a connecting portion (here, a hinge portion) 10543, a display 10544, a sub-display 10545, a picture light 10546, a camera 10547, and the like.
The display 10544 and the sub-display 10545 are manufactured by using the display device according to this embodiment.

It is a figure for demonstrating the detection process of the display apparatus provided with the optical sensor element in the display element area | region. It is a block diagram which shows the structural example of the image display apparatus which concerns on the 2nd Embodiment of this invention. It is FIG. 1 which shows the structural example of the image display part which concerns on this embodiment. It is FIG. 2 which shows the structural example of the image display part which concerns on this embodiment. 3 is a timing chart in light emission of a display pixel according to the present embodiment. It is a figure which shows the structural example of the control part for light detection pixel drive of the control part which concerns on this embodiment, and the control part for light emission. It is a figure which shows the structural example of the X-axis light detection pixel drive part which concerns on this embodiment, and a Y-axis light detection pixel drive part. It is a figure which shows the structural example of the light emission drive part which concerns on this embodiment. It is a figure which shows the structural example of the clock generation part which concerns on this embodiment. 10 is a timing chart of the clock generation unit in FIG. 9. It is a figure which shows the structural example of the signal processing part which concerns on this embodiment. It is a timing chart of LED_Sig generation in the control part for light emission. It is a timing chart of LED_En generation in the control part for light emission. It is a figure which shows the example in case the finger for 4 pixels is touching the photon detection pixel of an image display part. It is a timing chart of the 0th bit of the X axis of a photodetection pixel drive part. It is a timing chart until a touch signal is output in a signal generation part. It is a figure which shows the image display apparatus which concerns on the 2nd Embodiment of this invention. It is a figure which shows the example of the touch signal detected in the 2nd embodiment. It is a figure which shows the pattern of the value output by the value put on general light emission signal LED_Sig, and a touch signal. It is a figure which shows the specific example of the value put on light emission signal LED_Sig, and a touch signal. It is a figure which shows the structural example of the X-axis light detection pixel drive part in the image display apparatus which concerns on 3rd Embodiment, and a Y-axis light detection pixel drive part. It is a figure which shows the structural example of the light emission drive part which concerns on 3rd Embodiment. FIG. 14 is a timing chart in a case where a light pen is hit instead of an area touched by a finger in FIG. 13. It is a figure which shows the structural example of the light emission part which concerns on 4th Embodiment. It is a figure which shows the structural example of the clock generation part which produces | generates the clock used with the light emission part which concerns on 4th Embodiment. It is a figure which shows the structural example of the signal processing part which concerns on 4th Embodiment. It is a block diagram which shows the structural example of the digital camera which concerns on the 5th Embodiment of this invention. It is a perspective view which shows the television with which this embodiment is applied. It is a perspective view which shows the digital camera to which this embodiment is applied. It is a perspective view which shows the notebook type personal computer to which this embodiment is applied. It is a perspective view which shows the video camera to which this embodiment is applied. It is a figure which shows the portable terminal device to which this embodiment is applied, for example, a mobile telephone.

Explanation of symbols

  DSP ... image display device, 1 ... image display unit, 2 ... signal line drive unit, 3 ... scanning line drive unit, 4 ... X-axis light detection pixel drive unit, 5 ... Y-axis light detection pixel drive unit, 6 ... light emission drive unit, 7 ... control unit, 8 ... signal processing unit, 10 ... clock generation unit, 120 ... display pixel, 140 ... Photodetection pixel, 141... Photodetection element.

Claims (16)

A display unit including a light-emitting element in which a light-emitting period for coordinate acquisition is formed and a display unit including a plurality of light detection elements;
A first control unit for controlling the display element;
A second control unit that selectively controls driving of the plurality of light detection elements;
A signal processing unit for processing a detection signal obtained by detecting the light emitted from the light emitting element by the light detecting element and obtaining coordinate information;
The first controller is
A display device that causes the light emitting element of the display element to emit light in an image display period and a coordinate information light emission period. A clock generation unit for providing a basic frequency to the signal processing unit and the first and second control units,
The first controller is
The light emitting element emits light including a signal light emitting period and a stop period during the coordinate information light emitting period,
The display device according to claim 1, wherein a light is emitted by superimposing a fundamental frequency on a signal as coordinate information during a signal light emission period. A third control unit for controlling the luminance of the light emitting element of the display element in which the light emission period for obtaining the coordinate information is formed;
The third control unit is
3. The display device according to claim 1, wherein in the coordinate information light emission period, the luminance of the light emitting element of the display element is controlled to light emission luminance that can be detected by a light detection element. The display element is
The display device according to claim 2, further comprising a superimposing element that superimposes a signal as coordinate information and a fundamental frequency in the coordinate information light emitting period. The display device according to claim 2, wherein the basic frequency is a frequency that avoids a frequency generated by an inverter-type lighting fixture. The display device according to any one of claims 1 to 5, wherein the coordinate information is formed as information excluding information in which a full bit is 0 and a full bit is 1. The second controller is
The display device according to claim 1, wherein the light detection element is selected in synchronization with coordinate information included in a signal emitted from the light emitting element of the light emitting unit. The signal processor is
Processing to extract the fundamental frequency from the detection signal;
The display device according to any one of claims 1 to 7, wherein a process of acquiring coordinate information by removing a fundamental frequency is performed. The second controller is
9. The display device according to claim 1, wherein when selecting each of the light detection elements, a selection operation is performed with a gap period provided so that signals between the light detection elements do not overlap. The second controller is
The display device according to claim 9, wherein the coordinate information is generated with a period that is at least twice as long as a sum of one period of the fundamental frequency and the gap period. The light detection element is disposed in a black matrix portion of the display portion,
The above coordinate information is
The display device according to claim 1, wherein the display device is formed as information indicating that the reflected light from the black matrix is detected when the reflected light from the black matrix portion is detected. The light emitting unit for obtaining coordinate information is
Including floodlights,
The first control unit that controls the light emitting element of the light emitting unit causes the light emitting element to emit light at a fundamental frequency,
The second control unit that selectively controls driving of the plurality of light detection elements includes:
Select the driving of the light detection element including the signal detection period and the stop period,
The display device according to claim 1, wherein the display device operates in synchronization with a signal that is coordinate information. A backlight for irradiating the display unit with display light;
Use multiple basic frequencies,
It has a plurality of signal processing units corresponding to the basic frequencies,
Recognizing whether the reflected light from the backlight or transmitted light from the floodlight,
The display device according to claim 12, which operates in a mode corresponding to each. 14. The display device according to claim 1, further comprising a control function capable of stopping the light emitting unit for acquiring coordinate information when coordinate information acquisition operation is unnecessary. A display element including a light emitting element in which a light emission period for coordinate acquisition is formed and a light emitting element of the display element in a display unit including a plurality of light detection elements are divided into an image display period and a coordinate information light emission period, and light is emitted.
The light detection element detects light emitted from the light emitting element in the coordinate information light emission period,
A method for driving a display device, which processes a detection signal obtained by detection to acquire coordinate information. Having a display device;
The display device
A display unit including a light-emitting element in which a light-emitting period for coordinate acquisition is formed and a display unit including a plurality of light detection elements;
A first control unit for controlling the display element;
A second control unit that selectively controls driving of the plurality of light detection elements;
A signal processing unit for processing a detection signal obtained by detecting the light emitted from the light emitting element by the light detecting element and obtaining coordinate information;
The first controller is
An electronic device that causes the light emitting element of the display element to emit light in an image display period and a coordinate information light emission period.

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