JP2009503743A - Managing memory blocks that store data files directly - Google Patents

Abstract

  Without using the intermediate logical address or virtual address space of the memory, using the unique identification name of each file and the offset of the data in the file, the flash memory system of the large-capacity erase block is directly connected to the data file of the host system. Write. Directory information about where the file is stored in the memory is held in the memory system by the controller of the memory system, not by the host. A memory block type is selected to receive additional file data depending on the type of block for which file data has already been written. By selecting a block so as to start with the least amount of valid data, the block containing the data is selected, and the unused capacity is released therefrom.

Description

  The present invention relates to the operation of a reprogrammable non-volatile memory system, such as a semiconductor flash memory, and more particularly to managing an interface between a host device and a memory.

  There are mainly two techniques for addressing data transmitted via external interfaces of host systems, memory systems, and other electronic systems. One of them is to map the address of the data file generated or received by the system to a separate range of contiguous logical address spaces set up for that system. Usually, the address space is wide enough to cover the entire address that the system can handle. As an example, a drive of a magnetic disk storage device communicates with a computer or other host system via such a logical address space. This address space is large enough to address the entire data storage capacity of the disk drive. The second of the two techniques uniquely identifies the data files that are generated or received by the electronic system, and theoretically addresses those data by offset within the file. This form of addressing method is used between a computer or other host system and a removable memory card known as a “smart card”. Usually, a customer uses a smart card to perform customer identification, banking, point-of-sales purchase, ATM access, and the like.

  In early generation commercial flash memory systems, a rectangular array of memory cells was divided into multiple groups of cells. Each storage data amount was a standard disk drive sector, that is, 512 bytes. Typically, each group further includes an additional amount of data, such as 16 bytes, and other possible data related to error correction codes (ECC) and memory cell groups that store user data and / or associated user data. Overhead data can be stored. The memory cells in each such group are the minimum number of memory cells that can be erased simultaneously. That is, the erase unit is the number of memory cells that are efficient for storing one data sector and any overhead data contained therein. Examples of this type of memory system are described in US Pat. Nos. 5,602,987 (Patent Document 1) and 6,426,893 (Patent Document 2). It is a feature of flash memory to erase memory cells before reprogramming with data.

  Flash memory systems are most commonly offered in the form of memory cards or flash drives that are removably connected to various hosts such as personal computers, cameras, etc., but are embedded in such host systems. In some cases. When writing data to memory, the host typically assigns unique logical addresses to sectors, clusters or other data units within the contiguous virtual address space of the memory system. Like a disk operating system (DOS), the host writes data to and reads data from addresses in the logical address space of the memory system. A controller in the memory system converts the logical address received from the host into a physical address in the memory array. In fact, the data is stored here, and then these address translations are always known. The data storage capacity of the memory system is at least as large as the amount of data that can be addressed for all logical address spaces defined for the memory system.

  In next generation flash memory systems, the size of the erase unit has increased to enough memory cell blocks to store a large number of data sectors. Even if the host system to which the memory system is connected performs data programming or reading in a small minimum unit such as a sector, a large number of sectors are stored in one erase unit of the flash memory. When a host updates or replaces a logical data sector, usually some data sectors in the block may not be used. Since all blocks must be erased before overwriting any data stored in the block, the new data is usually placed in another block that was previously erased but still has data storage capacity. Alternatively, update data is stored. This process frees up the original blocks with obsolete data that occupies valuable space inside the memory. However, if valid data remains inside, the block cannot be erased.

  Therefore, in order to make better use of the memory capacity of the memory, these pieces of fragmented data are made into erased blocks so that the blocks from which valid fragmented data is copied can be erased and their full storage capacity can be reused. It is common practice to consolidate or collect useful fragmentary data by copying. It is also desirable to copy the data to group the data sectors within the block in logical address order because this improves the data read speed and the speed at which the read data is sent to the host. If such data copying is performed quite frequently, the operating performance of the memory system is degraded. This is a typical case that affects the operation of the memory system, especially when the storage capacity of the memory is slightly above the amount of data that the host can address through the system's logical address space. In this case, data integration or collection may be required before the host executes the programmed command. As a result, the time for programming increases.

  In order to increase the number of bits of data stored in an arbitrary semiconductor region, the block size has increased with the generation of memory systems. Blocks that store more than 256 data sectors are common. Furthermore, in order to increase the degree of parallel processing when programming and reading data, two or four or more arrays or subarrays with different numbers of blocks are theoretically connected to form a metablock. It is often done to do. Thus, it is a problem to efficiently operate both operation units having a large capacity.

A common host interface for such a memory system is a logical address interface similar to that commonly used with disk drives. A file generated by the host to which the memory is connected is assigned a unique address in the logical address space of the interface. The memory system then typically maps data between the logical address space and the physical blocks or metablocks of the memory. Although the memory system always knows how to map the logical address space to physical memory, the host does not need to know this. The host always knows the address of its data file in the logical address space, but the operation of the memory system does not need to know about this mapping.
US Pat. No. 5,602,987 US Pat. No. 6,426,893 US patent application Ser. No. 10 / 915,039 US Pat. No. 5,570,315 US Pat. No. 5,774,397 US Pat. No. 6,046,935 US Pat. No. 6,373,746 US Pat. No. 6,456,528 US Pat. No. 6,522,580 US Pat. No. 6,771,536 US Pat. No. 6,781,877 US Published Patent Application No. 2003/0147278 US Published Patent Application No. 2003/0109093 US Pat. No. 6,763,424 US patent application Ser. No. 10 / 749,831 US patent application Ser. No. 10 / 750,155 US patent application Ser. No. 10 / 917,888 US patent application Ser. No. 10 / 917,867 US patent application Ser. No. 10 / 917,889 US patent application Ser. No. 10 / 917,725 US patent application Ser. No. 11 / 192,220 US patent application Ser. No. 11 / 192,386 US patent application Ser. No. 11 / 191,686 US patent application Ser. No. 10 / 749,189 US patent application Ser. No. 10 / 841,118 US patent application Ser. No. 11 / 016,271 US patent application Ser. No. 10 / 897,049 US Patent Application No. 11 / 022,369 US patent application Ser. No. 11 / 196,869 US patent application Ser. No. 11 / 316,577 US Patent Application No. 11 / 259,423 US patent application Ser. No. 11 / 312,985

  Many techniques have been developed to overcome problems that occur reliably in various degrees when efficiently operating such large scale erase blocks in a flash memory system. In contrast, the present invention is based on a fundamental change, that is, a change in the interface for transferring data between the memory and the host system. By using the logical address in the virtual address space, the data file is identified by the file name assigned by the host, and the address in the file is offset, instead of performing data communication between the memory and the host system. To access it. The memory system then knows which host file each sector or other unit of data belongs to. The file unit described here is a data set ordered by a continuous offset address or the like, which is a data set generated and uniquely identified by an application program operating in the host computing system.

  This is not currently used in many of the commercially available memory systems because the host does not currently identify the file, but identifies the data to the memory systems in all files with a common set of logical addresses. It is because it is doing. Instead of using logical addresses, memory system controllers can store data so as to reduce the need for frequent data integration and garbage collection by identifying host data by file objects. Accordingly, the frequency of data copy operations and the amount of copy data are greatly reduced, thereby improving the data programming and reading performance of the memory system. Further, the controller of the memory system holds the directory and index table information of the memory block that stores the host file. This eliminates the need for the host to hold a file allocation table (FAT) currently required for managing the logical address interface.

  According to one aspect of the present invention, a memory block is selected and file data is written by a method for controlling the degree of file fragmentation across different blocks of memory. This reduces the number and degree of overhead operations required to consolidate the file data into a smaller number of blocks in order to secure completely erased blocks and receive new data. Therefore, in order to utilize the full capacity of memory in an efficient manner, the performance of the memory system is selected by selecting the block to which the file data is written first and not moving much data between the blocks later. Will improve.

  In a specific embodiment, one type of active block is selected based on the type of block in which file data is already stored, and the file data received from the host or another block is written. One of a number of allowed states is assigned to each file stored in the system. Each state is defined by a combination of one or more types of blocks containing data from two or more files and / or blocks containing erased capacity. The type of block selected as the active block to which the file data is written is based on the current state of the file.

  Other aspects, advantages, features, and details of the invention are included in the following illustrative description, which is described with reference to the accompanying drawings.

  All patents, patent applications, papers, other publications, documents and matters referred to herein are effectively incorporated by reference herein in their entirety. Any discrepancies or inconsistencies in terms between publications, documents or matters that are defined or incorporated by reference and this application will become apparent from the terms used in this application.

Overview of Flash Memory System A typical flash memory system and a typical operation of a host device will be described with reference to FIGS. This is a system that implements various aspects of the invention. The host system 1 in FIG. 1 stores data in the flash memory 2 and retrieves data from the flash memory 2. Although it is possible to embed flash memory in the host, the memory 2 is a card of a more widespread form and can be removed from the host via connection parts 3 and 4 which are mechanical and electrical connectors. It is illustrated as being connected to. Currently, many different flash memory cards are commercially available. For example, compact flash (CF), multimedia card (MMC), secure digital (SD), mini SD, micro SD, memory stick, smart media and transformer. It is sold under the trademark Flash. Although these cards have unique mechanical and / or electrical interfaces due to their standardized specifications, the flash memory contained in each card is very similar. All of these cards are available from SanDisk Corporation, the assignee of the present application. SanDisk Corporation also sells a series of flash drives under the trademark Cruiser. This is a small package handheld memory system with a universal serial bus (USB) plug that connects to the host by connecting to the host's USB outlet. Each of these memory cards and flash drives includes a controller that interfaces with the host and controls the operation of the internal flash memory.

  The number of host systems using such memory cards and flash drives is large and varied. These include personal computers (PCs), laptops and other portable computers, mobile phones, personal digital assistants (PDAs), digital still cameras, digital video cameras and portable audio players. Hosts typically include one or more types of memory cards or built-in outlets for flash drives, although some require an adapter to connect the memory cards. A memory system typically has its own memory controller and driver, but some memory systems only accept control of software executed by a host to which the memory is connected. Of the memory systems provided with a controller, those embedded in a host often have a memory, a controller and a driver configured on one integrated circuit chip.

  The host system 1 of FIG. 1 can be regarded as being composed of a combination of circuits and software, which are two main parts, as long as the memory 2 is connected. These are the application 5 and the driver portion 6 that interfaces with the memory 2. In a personal computer, for example, the application 5 can include a processor that executes document creation, graphics, control, or other popular application software. For cameras, mobile phones or other host systems that primarily perform a set of functions, the application 5 can be operated so that the camera captures and stores images, the mobile phone makes calls, It also includes software that operates to receive.

  The memory system 2 of FIG. 1 includes a flash memory 7 and a circuit 8 that controls the memory 7 by exchanging data through an interface between the host connected to the card and the flash memory. The controller 8 typically converts between the logical address of the data used by the host 1 and the physical address of the memory 7 during data programming and reading.

  With reference to FIG. 2, a circuit of a typical flash memory system used as the nonvolatile memory 2 of FIG. 1 will be described. Typically, the system controller is implemented on one integrated circuit chip 11 connected in parallel with one or more integrated circuit memory chips via a system bus 13. One such memory chip 15 is shown in FIG. The particular bus 13 shown includes a separate set of conductors 17 for sending data, a set 19 for memory addresses, and a set 21 for control and status signals. Alternatively, one set of conductors may perform these three functions in a time division manner. Further, US patent application Ser. No. 10 / 915,039, filed Aug. 9, 2004, published patent application No. 2006/0031593, “ring bus structure and its use in flash memory systems (Ring It is also possible to use a system bus having another configuration such as a ring bus described in “Bus Structure and It's Use in Flash Memory Systems”.

  A typical controller chip 11 has its own internal bus 23 that interfaces with the system bus 13 via an interface circuit 25. Typically, the main functions connected to the bus are: a processor 27 (such as a microprocessor or microcontroller), a read only memory (ROM) 29 containing code that initializes ("boots") the system, a memory A random access memory (RAM) 31 used mainly for buffering transmission data between the host and the host, and an error correction code (ECC) for data exchanged between the memory and the host via the controller And a circuit 33 for calculating and verifying. The controller bus 23 interfaces with the host system via a circuit 35. This is done via the card's external contacts 37 that are part of the connector 4 in the case of the system of FIG. Each other component of the controller 11 connects to and uses the clock 39.

  Along with other components connected to the system bus 13, the memory chip 15 typically includes a memory cell array configured as a number of subarrays or planes. For simplicity of illustration, two such planes 41 and 43 are shown, but four or eight such planes may be used. Alternatively, the memory cell array of the chip 15 may not be divided into planes. However, when divided, each plane usually has column control circuits 45 and 47 that can operate independently of each other. Circuits 45 and 47 receive their respective memory cell array addresses from the address section 19 of the system bus 13, decode these addresses, and address specific one or more individual bit lines 49 and 51. I do. The word line 53 is addressed via the row control circuit 55 in accordance with the address received on the address bus 19. Source voltage control circuits 57 and 59 are also connected to their respective planes, like P well voltage control circuits 61 and 63. If the memory chip 15 has one memory cell array and there are more than two such chips in the system, each array of chips operates in the same way as the planes or sub-arrays in the multiplane chip described above. Will do.

  Data is exchanged with the planes 41 and 43 via data input / output circuits 65 and 67 connected to the data portion 17 of the system bus 13, respectively. Circuits 65 and 67 supply data for programming the memory cells and data to be read from the memory cells of each plane through lines 69 and 71 connected to the planes through column control circuits 45 and 47, respectively.

  The controller 11 controls the operation of the memory chip 15 and performs data programming, data reading, erasing, and various setups. Each memory chip also executes commands from the controller 11 to perform such functions. Includes some control circuits to do. The interface circuit 73 is connected to the control / state portion 21 of the system bus 13. Commands from the controller are supplied to the state machine 75, which then performs certain control of other circuits in order to execute these commands. As shown in FIG. 2, control lines 77-81 connect the state machine 75 to these other circuits. The state information from the state machine 75 is communicated to the interface 73 via the line 83 and transmitted to the controller 11 via the bus unit 21.

  Other architectures such as NOR may be used instead, but the NAND architecture of memory cell arrays 41 and 43 is currently preferred. An example NAND flash memory and their operation as part of a memory system are described in US Pat. Nos. 5,570,315, 5,774,397, 046,935 (patent document 6), 6,373,746 (patent document 7), 6,456,528 (patent document 8), 6,522,580 (patent document 9), Reference may be made to US Pat. Nos. 6,771,536 (Patent Document 10) and 6,781,877 (Patent Document 11) and US Published Patent Application 2003/0147278 (Patent Document 12).

  FIG. 3 is a circuit diagram showing an example NAND array. This is a part of the memory cell array 41 of the memory system of FIG. A number of global bit lines are formed, but only four such lines 91-94 are shown in FIG. 3 for the sake of simplicity. A large number of series-connected memory cell strings 97 to 104 are connected between one of these bit lines and the reference potential. When the memory cell string 99 is used as a representative example, a plurality of charge storage memory cells 107 to 110 are connected in series with selection transistors 111 and 112 at either end of the string. When the selection transistor of one string is conductive, the string is connected between the bit line and the reference potential. Next, programming or reading is performed for each memory cell in the string.

  The word lines 115-118 of FIG. 3 individually extend for each charge storage element in each memory cell of multiple strings of memory cells, and gates 119 and 120 are connected to the select transistor at each end of the string. Control the state. A block 123 of memory cells to be erased at one time is constituted by a memory cell string sharing the common word line and the control gate lines 115 to 120. This cell block includes the minimum number of cells that can be physically erased at one time. Programming is performed once for one row of memory cells along one of the word lines 115-118. Typically, the NAND array rows are programmed in a predetermined order. In this case, we start with the row along the word line 118 closest to the end of the string connected to ground or another common potential. Programming is performed on the row of memory cells along the word line 117 and this is repeated one after another for the entire block 123. Finally, programming is performed on the row along the word line 115.

  The same applies to the second block 125. The memory cell string is connected to the same global bit line as the string of the first block 123, but the set of word lines and control gate lines is different. The row control circuit 55 drives the word line and the control gate gate line with these appropriate operating voltages. If there is more than one plane or sub-array in the system, such as planes 1 and 2 in FIG. 2, one memory architecture uses a common word line that extends between them. Alternatively, there may be more than two planes or subarrays that share a common word line. In other memory architectures, individual planes or sub-array word lines are driven separately.

  The memory system operates to store three or more detectable levels of charge in each charge storage element or region, as described in some of the previously incorporated NAND patents and published patent applications. As a result, two or more bits of data are stored. The charge storage element of a memory cell is generally a conductive floating gate, but is also a non-conductive dielectric charge supplemental material as described in US Published Patent Application No. 2003/0109093. It can also be.

  FIG. 4 is a conceptual diagram showing a configuration of a flash memory cell array 7 (FIG. 1) used as an example. This will be further described below. Four planes of memory cells or subarrays 131-134 may be placed on one integrated memory cell chip, on two chips (two planes on each chip), or on four separate chips. Good. In the following description, the particular arrangement is not important. Of course, there can be other numbers of planes in the system, such as 1, 2, 8, 16 or more. Like the blocks 137, 138, 139 and 140 on the respective planes 131 to 134, the planes are individually divided into rectangular memory cell blocks shown in FIG. Each plane can be divided into tens or hundreds of blocks. As described above, the memory cell block is an erase unit of the minimum number of memory cells that can be physically erased at one time. However, since parallel processing is increasing, block operations are performed in large metablock units. One block from each plane is logically linked together to form a metablock. The four blocks 137 to 140 shown in the figure form one metablock 141. Typically, all cells in the metablock are erased together. As can be seen from the second metablock 143 formed from blocks 145 to 148, the blocks used to form the metablock need not be in the same relative position within each plane. Usually, it is preferable to extend metablocks to all of the planes, but to increase system performance, dynamically form metablocks from one, two, or three blocks of different planes, or all The memory system can be operated by the function. This makes it possible to closely match the size of the metablock with the amount of data that can be stored in one programming operation.

  As shown in FIG. 5, the individual blocks are sequentially divided into pages of memory cells for operation. For example, the memory cells of the blocks 131 to 134 are divided into eight pages P0 to P7. Alternatively, each block may be divided into pages of 16, 32 or more memory cells. A page is a unit for programming and reading data in a block, and includes a minimum amount of data to be programmed at a time. In the NAND architecture of FIG. 3, the page is formed from memory cells along the word lines in the block. However, such pages in two or more blocks may be logically linked to a metapage to improve parallel processing of memory system operations. FIG. 5 shows the metapage 151. This is composed of one physical page in each of the four blocks 131-134. For example, the metapage 151 includes the page P2 in each of the four blocks, but the pages of the metapage are not necessarily in the same relative position in each block.

  It is preferable to program and read the maximum amount of data in parallel on all four planes, but for higher system performance, either one, two or three pages in separate blocks on different planes or The memory system can also be operated to form all metapages. This allows programming and read operations to be adaptively matched with the amount of data that can be conveniently processed in parallel, reducing the possibility of remaining metapages that are not subject to data programming. .

  As shown in FIG. 5, the metapage constituting the physical pages of the plurality of planes includes memory cells along the rows of the word lines of the plurality of planes. Rather than programming all of the cells in a single word line row at the same time, more generally, the programming is done alternately in two or more alternating groups. Each group stores one page of data (in one block) or one metapage (across multiple blocks). By programming the memory cells alternately once at a time, it is not necessary to arrange one unit of peripheral circuit including the data register and the sense amplifier for each bit line, but rather in a time-sharing manner between adjacent bit lines. Process. This saves the amount of substrate space required for the peripheral circuitry and allows memory cells to be integrated at high density along the row. Alternatively, it is preferable to program each cell along a row simultaneously to maximize the parallelism possible with any memory system.

  Referring to FIG. 3, by placing two rows of select transistors (not shown) along at least one end of the NAND string, rather than placing one row as shown. Most conveniently, data programming is performed simultaneously for every other memory cell along the row. Then, in response to one control signal, one row of select transistors is connected to each other bit line for every other string in the block, and in response to another control signal, the other The select transistors in one row are connected to the respective bit lines so that every other string is sandwiched. Thus, two pages of data are written to each row of memory cells.

  Typically, the data amount of each logical page is one or more data sectors that are integers, and conventionally each sector contains 512 bytes of data. FIG. 6 shows two sectors 153 and 155 of a logical data page of data of one page or one metapage. Each sector typically includes a stored portion of 512 bytes of user or system data 157, and separate overhead data for either the portion 157 data, or the physical page, or the block storing it. It is included as a number of bytes 159. Typically, the number of bytes of overhead data is 16 bytes, for a total of 528 bytes for each sector 153 and 155. The overhead portion 159 includes the ECC calculated from the data portion 157 during programming, its logical address, the actual number of times the block was erased and reprogrammed, one or more control flags, the operating voltage level, etc. In addition, the ECC calculated from the overhead data 159 may be included. Alternatively, overhead data 159 or a portion thereof may be stored on a different page in another block.

  As memory parallel processing increases, the data storage capacity of metablocks increases and the size of data pages and metapages increases as a result. The data page includes three or more data sectors. There are two sectors per data page and two data pages per metapage, and there are four sectors per metapage. Therefore, each metapage stores 2,048 bytes of data. This is a high degree of parallel processing, and the degree becomes even higher as the number of memory cells in a row increases. For this reason, the width of the flash memory is increased in order to increase the data amount of one page and one metapage.

  The previously identified, physically small, reprogrammable non-volatile memory cards and flash drives are commercially available with 512 megabyte (MB), 1 gigabyte (GB), 2 GB and 4 GB data storage capacities, making the capacity even larger ing. FIG. 7 shows the most common interface between a host and such a mass memory system. The host processes data files generated or used by application software or firmware programs executed by the host. An example is a data file for document processing, and another example is a drawing file of computer aided design (CAD) software, which is often found in general computer hosts such as PCs and laptop computers. A document in the pdf format is also such a file. The still digital video camera generates a data file for each image stored in the memory card. The cellular phone uses data from a file on an internal memory card such as a telephone directory. The PDA stores and uses several different files such as an address file and a calendar file. In any such application, the memory card contains software that runs the host.

  A typical logical interface between the host system and the memory system is shown in FIG. The continuous logical address space 161 is large enough to constitute an address of all data stored in the memory system. Typically, the host address space is divided in units of data clusters. Each cluster may be designed such that any host system includes multiple data sectors, typically between 4 and 64 sectors. A standard sector contains 512 bytes of data.

  In the example of FIG. 7, three files 1, 2, and 3 are generated. Each file is generated as an ordered data set by an application program running on the host system and identified by a unique name or other criteria. The host assigns a fully available logical address space for file 1 that has not yet been assigned to another file. The file 1 shown in the figure is assigned to a continuous range of available logical addresses. Address ranges are generally assigned for a specific purpose, such as a specific range of software that operates the host, so these addresses are not used when the host assigns logical addresses to data However, the data cannot be stored.

  If the host later generates file 2, the host similarly allocates two different ranges of consecutive addresses in the logical address space 161, as shown in FIG. There is no need to assign files to consecutive logical addresses, but addresses may be fragmented between address ranges already assigned to other files. Next, for this example, it can be seen from the fact that another file 3 further generated by the host is assigned to other parts of the host address space not previously assigned to files 1, 2 and other data.

  By holding a file allocation table (FAT), the host keeps track of the memory logical address space. This holds the logical addresses assigned by the host to various host files after performing the conversion 160. The host frequently updates the FAT table when a new file is stored, another file is deleted, or a file is changed. The FAT table is typically stored in the host memory along with a copy stored in non-volatile memory that is updated from time to time. For copying, typically, the non-volatile memory is accessed through a logical address space like other data files. When deleting a host file, the host then deallocates the logical address previously assigned to the deleted file and updates the FAT table to indicate that it can be used with other data files.

  The host is irrelevant as to the physical location where the memory system controller selects and stores the file. A typical host knows only about its logical address space and logical addresses assigned to its various files. On the other hand, the memory system knows only through the typical host / card interface about a portion of the logical address space that wrote the data, but the logical address assigned to a particular host file, or host file. I don't know about the number. The controller of the memory system converts the logical address provided by the host for data storage or retrieval into a unique physical address in the flash memory cell array in which the host data is stored. Block 163 represents a work table for these logical-to-physical address translations, which is maintained by the memory system controller.

  The memory system controller is programmed to store data files in the blocks and metablocks of the memory array 165 in a manner that maintains system performance at a high level. In this figure, four planes or subarrays are used. Preferably, data programming and reading are performed with the maximum degree of parallelism that the system can execute across all metablocks comprised of blocks in each plane. Normally, at least one metablock 167 is allocated as a reserved block for storing operation firmware and data used by the memory controller. Another metablock 169, or multiple metablocks, may be assigned to store software running the host, host FAT table, etc. Most physical storage space is left for storing data files. However, the memory controller does not know how the host has allocated the received data between the various file objects. Typically, all that the memory controller knows by interacting with the host is that the corresponding physical address that the controller's logical-to-physical address table 163 holds the data that the host wrote to a particular logical address. It is to remember.

  In a typical memory system, the storage capacity of an extra block is provided in excess of the amount of data required to be stored in the address space 161. One or more of these extra blocks may be provided as redundant blocks to replace other blocks that fail during the lifetime of the memory. Logical grouping of blocks included in individual metablocks is usually performed for various reasons, such as replacing a defective block and a redundant block originally assigned to a metablock. Typically, one or more additional blocks such as metablock 171 are kept in the erase block pool. When the host writes data to the memory system, the controller translates the logical address assigned by the host to a physical address in the metablock of the erase block pool. Next, other metablocks that are not used to store data in the logical address space 161 are erased and designated as erase pool blocks that are used during the next data write operation. In a preferred form, the logical address space is divided into logical groups each containing the same amount of data as the storage capacity of the physical memory metablock, allowing one-to-one mapping of logical groups to metablocks.

  When the originally stored data is no longer used, the data stored at a specific host logical address is frequently overwritten with new data. Correspondingly, the memory system controller has written new data to the erase block and then modified the logical-to-physical address table for those logical addresses to store the data for those logical addresses. Identify new physical blocks. The block containing the original data at those logical addresses is then erased and made available for storing new data. If the storage capacity of a previously erased block from the erase block pool at the start of writing is not sufficient, it is necessary to frequently perform such erase before the current data write operation is completed. This will adversely affect system data programming speed. Typically, the memory controller learns that the host no longer uses data at any logical address only when the host writes new data to their same logical address. Therefore, many blocks of the memory store such invalid data for a certain period.

  In order to efficiently use the area of the integrated circuit memory chip, the size of the block and the metablock is increased. For this reason, a significant portion of the individual data write will store a smaller amount of data than the metablock storage capacity, often less than the block storage capacity. Typically, the memory system controller directs new data to the erase pool metablock, which prevents writing to a portion of the metablock. If the new data is an update of data stored in another metablock, preferably the remaining valid metapage data from other metablocks with logical addresses adjacent to those new data metapages Are copied to a new metablock in the order of logical addresses. Old metablocks may be kept on other valid data metapages. This will invalidate the data on a particular metapage in an individual metablock over time, replacing this data with new data at the same logical address written to a different metablock. .

  In order to maintain sufficient physical memory space for data storage across the entire logical address space 161, such data is periodically compressed or consolidated (garbage collection is performed). It is also desirable to keep the data sectors in the metablock in the same order as their logical addresses so that they can be as practical as possible. This is because it makes reading of continuous logical address data more efficient. Thus, data compression and garbage collection are typically performed for this additional purpose. Some aspects of memory management and use of metablocks when receiving partial block data updates are described in US Pat. No. 6,763,424 (Patent Document 14).

  Typically, data compression ignores metapages with invalid data in the process and reads all valid data metapages from the metablock and writes them to the new metablock. It is also preferable to arrange metapages with valid data in a physical address order that matches the logical address order of the stored data. The number of metapages that occupy the new metablock is less than the number that occupied the old metablock. This is because the metapage containing invalid data has not been copied to the new metablock. The old block is then erased and made available for storing new data. Next, the capacity of the added metapage obtained by the integration can be used for storing other data.

  During garbage collection, valid data metapages with contiguous or nearly contiguous logical addresses are collected from two or more metablocks and rewritten to another metablock. Usually there is one for the erase block pool. If all valid data metapages are copied from the original two or more metablocks, they are erased and used later.

  In particular, if data integration or garbage collection needs to be performed before commands from the host can be executed, data integration and garbage collection can be time consuming and affect the performance of the memory system. Typically, such operations are scheduled by the memory system controller and run in the background as much as possible, but these operations must be performed, so the controller must host until such operations are complete. Will have to send a busy signal. One example where host command execution can be delayed is that there is not enough previously erased metablocks in the erase block pool to store all the data that the host wants to write to memory, and data consolidation or garbage collection is required. Examples include clearing valid data in one or more metablocks first and then erasing. Therefore, it is noted that memory control is managed to minimize such confusion. Many such technologies are described in US patent application Ser. No. 10 / 749,831, filed Dec. 30, 2003, published patent application No. 2005/0144358, now published as “Nonvolatile with Mass Erase Block”. Management of Non-Volatile Memory Systems Having Large Erase Blocks "(patent document 15), US patent application Ser. No. 10 / 750,155 filed Dec. 30, 2003,“ Using a block management system. Non-Volatile Memory and Method with Block Management System "(Patent Document 16), US patent application Ser. No. 10 / 917,888, filed Aug. 13, 2004, currently published patent. No. 2005/0141313 “Non-Volatile Memory and Method wit Using Memory Plane Array” h Memory Planes Alignment) ”(Patent Document 17), US Patent Application No. 10 / 917,867 (Patent Document 18) filed Aug. 13, 2004, currently published patent application No. 2005/0141312. US patent application Ser. No. 10 / 917,889, filed Aug. 13, 2004, published patent application No. 2005/0166087, “Non-volatile memory and method using phase program fault handling (Non- Volatile Memory and Method with Phased Program Failure Handling ”(Patent Document 19), US patent application Ser. No. 10 / 917,725 filed Aug. 13, 2004, published patent application No. 2005/0144365 currently published. “Non-Volatile Memory and Method with Control Data Management” (Patent Document 20), US patent application Ser. No. 11 / 192,220, filed Jul. 27, 005 “Non-Volatile Memory and Method with Multi-Stream Update Tracking” (Patent Document 21) No. 11 / 192,386, filed Jul. 27, 2005, Non-Volatile Memory and Method with Improved, with improved indexing for scratchpads and update blocks. Indexing for Scratch Pads and Update Blocks) "(Patent Document 22), US Patent Application No. 11 / 191,686, filed July 27, 2005" Non-Volatile Memory and Method Using Multi-Stream Update " and Method with Multi-Stream Updating) ”(Patent Document 23).

  One challenge to efficiently control the operation of a memory array with a large erase block is to match the number of data sectors being stored during any write operation with the capacity and boundaries of the memory block. And adjust. One approach is to use less than the maximum number of metablocks to store new data from the host if you need to store less data than fills all metablocks. Is to configure. The use of adaptive metablocks is described in US patent application Ser. No. 10 / 749,189, filed Dec. 30, 2003, published patent application No. 2005/0144357, “Adaptive Metablocks”. (Patent Document 24). For fitting the boundaries between the data blocks and the physical boundaries between the metablocks, see US patent application Ser. No. 10 / 841,118 filed May 7, 2004 of the currently published published patent application No. 2005/0144363. Patent Document 25), US Patent Application No. 11 / 016,271, filed December 16, 2004, and published patent application No. 2005/0144367, “Data Run Programming” ( Patent Document 26).

  The memory controller also uses data from the FAT table. This is what the host stores in the non-volatile memory, and makes the operation of the memory system more efficient. One such use is to learn when data identified by the host is no longer used and the logical addresses are deallocated. Knowing this, the memory controller usually schedules the block containing such invalid data to be erased before the host learns by writing new data to be written to those logical addresses. Is possible. This is described in US patent application Ser. No. 10 / 897,049 filed Jul. 21, 2004, published patent application No. 2006/0020744, “Methods of Retaining Data on Nonvolatile Memory Systems. And “Method and Apparatus for Maintaining Data on Non-Volatile Memory Systems” (Patent Document 27). Other techniques allow a host to write new data to memory in order to infer whether any write operation is performed on a single file, i.e., whether there are boundaries between multiple files. Includes performing pattern monitoring. US Patent Application No. 11 / 022,369 filed December 23, 2004, published patent application 2006/0020745, “FAT Analysis for Optimized Sequential Cluster Management”. (Sequential Cluster Management) "(Patent Document 28) describes the use of this type of technology.

  In order to efficiently operate the memory system, it is desirable for the controller to know as much as possible about the logical addresses assigned by the host to the data of individual files. Second, if the file boundaries are not known, the controller can store the data file in one metablock or metablock group rather than being distributed among multiple metablocks. As a result, the number and complexity of data integration and garbage collection operations are reduced. As a result, the performance of the memory system is improved. However, as described above, if the host / memory interface includes the logical address space 161 (FIG. 7), it is difficult for the memory controller to know much about the host data file structure.

  Referring to FIG. 8, the exemplary logical address host / memory interface already shown in FIG. 7 is shown in another manner. The host assigns a data file generated by the host to a logical address. Next, the memory system recognizes these logical addresses and performs mapping to the physical addresses of the memory cell blocks that actually store data.

Different types of interfaces between the file-based memory interface and the operating host and the memory system storing large amounts of data eliminate the need for logical address space. Instead, the host logically addresses each file with a unique file ID (or other unique reference) and an offset address of a data unit (such as bytes) within the file. This file address is passed directly to the controller of the memory system and stored in its own table where each host file's data is physically stored. This new interface can be implemented in the same memory system described above in connection with FIGS. The main difference from the above is the communication method performed by the memory system with the host system.

  This file-based interface to be compared with the logical address interface of FIG. 7 is shown in FIG. The identification names of the files 1, 2 and 3 and the data offset in the file of FIG. 9 are directly passed to the memory controller. Next, the memory controller function 173 converts the logical address information into a metablock physical address and a memory 165 metapage. The file directory always keeps track of the host file to which each stored sector, page or other unit file data belongs.

  A file-based interface to be compared with the logical address interface of FIG. 8 is also shown in FIG. The logical address space and host held in the FAT table of FIG. 8 are not shown in FIG. Rather, the data file generated by the host is identified to the memory system by the file number and the data offset in the file. Next, the controller of the memory system directly maps the file to the physical block of the memory cell array, and holds the file directory and index table information of the memory block storing the host file. The host does not need to maintain a file allocation table (FAT) currently required for managing the logical address interface.

  FIG. 11 is a block diagram outlining the main functions of the direct data file system executed by the firmware of the memory system executed by the processor and other circuits of the controller. This is an overall framework that assumes specific memory operations described below. A file-based interface 601 layer exchanges commands and data between the memory system and an external host system or a host application executing on the same memory card or flash drive. The host application performs three main functions of the memory system: writing a file, deleting a file, and reading a file. Data is stored in the flash memory array 603.

  The file block management function 605 organizes the storage of data in the flash memory based on the file in which the data is identified, and minimizes that the block storing the data becomes two or more files. A physical memory cell block of the memory 603 is a basic unit of data management.

  The function 607 organizes the data into metapages and writes them to the memory 603 so that the individual metapages include data in a logical offset address range that is continuous within a specific file. A function 609 controls access to the memory 603 and reads data stored therein. When a command is received from the host, the function 611 is made to update the file indexing information held by the function 613 and the block list in the function 615 by erasing the file data.

  The file data indexing 613 indexes individual files stored in the memory 603 based on the unique file identifier and the offset address of the data in the file. The data of each file is stored as a data set group having continuous logical offset addresses. The file directory identifies the position of the file index table (FIT) of the data group entry set for each individual file. The block list function 615 holds an ID of a block that has been erased, a block in which file data has been partially programmed, or a block that includes file data together with data that is no longer used.

  The main purpose of the garbage collection and data integration functions described above is to free up unused memory space for storing additional data. In garbage collection, valid data in a source block is copied from a block that also contains obsolete data to one or more destination blocks that have at least some space that has been erased. This consolidates valid data into a smaller number of blocks, so once the original source block is erased, the capacity occupied by the unused data is released. Data integration combines valid data from one partially filled block with valid data from another partially filled block, including erased but unused space . Most commonly, a partially filled block results from writing to a new file that is partially partially filled and closed with the last erased block. Once the data is merged, the source block containing the newly copied data, which becomes the duplicate data, is then erased and made available for storing new data.

  Both garbage collection and data integration operations are treated together here as block release. Function 617 releases the block by controlling the copying of valid file data from one physical block with an unprogrammed metapage or one that contains obsolete data to another block. This erases the original block, frees up unused space in the block, and makes this space available for storing new file data. The function 619 controls the number and period of block release operations to be adaptive based on the releasable capacity and the number of erase blocks. Blocks are released at a speed that is optimal for the speed at which new file data is written, in a manner that maintains good overall memory system performance.

  In the functional diagram of FIG. 11, the conversion layer 621 and the interface layer 623 are positioned above the file interface 601 and interface with the flash memory back-end system to control its operation. In this example, the interface layer 623 has a function of communicating data outside the memory system with a host or other device by one of three different protocols. The file interface 625 is the center of the description here, and identifies individual file data based on a unique file identifier and a logical offset address in the file. The object interface 627 is mainly used for exchanging data files between electronic devices, and the size of the file is usually known. Existing protocols for interface 627 include Microsoft Corporation's Media Transfer Protocol (MTP) and Picture Transfer Protocol (PTP). In this example, a backward compatible logic (LBA) interface 629 is also included. Data is sent via the interface 629 according to the protocol currently used by the flash memory card, similar to that of the magnetic disk drive system, and the host addresses the data to the logical address space of the defined memory system. Specify.

  The conversion layer 621 includes protocol adapters 631, 633 and 635. The functions of these adapters convert each of the interface protocols 625, 627, and 629 into a common protocol with the file interface 601. The conversion layer converts commands, data formats, etc. between different protocols. The LBA protocol adapter 635 further divides the logical address space of the memory system into static files. The file interface 601 then treats these files as separate files that communicate via interfaces 625 and 627 in the same manner. Details of the functions of the LBA protocol adapter 635 can be found in A. See US patent application Ser. No. 11 / 196,869, filed Aug. 3, 2005, by S. A. Gorobets. Information about the conversion layer 621 and the interface layer 623 can be further obtained from US patent application Ser. No. 11 / 316,577 filed Dec. 21, 2005 by inventor Alan Sinclair.

  When programming a new data file and loading it into memory, the data is written into the erased memory cell block. Starting from the first physical location within the block, the writing proceeds sequentially through the location of the block. Regardless of the offset order of the data in the file, the data is programmed in the order received from the host. Continue programming until all file data is written to memory. If the amount of data in the file exceeds the capacity of one memory block, programming continues to the second erase block when the first block is full. In the same manner as the first block, the second memory block is programmed sequentially from the first location until all the data in the file is stored or until the second block is full. The remaining data in the file may be programmed for the third block or the additional additional block. A plurality of blocks or metablocks storing data of one file need not be physically or logically contiguous. For simplicity, unless otherwise specified, the term “block” as used herein refers to an erase block unit or a plurality of blocks, depending on whether the metablock is used in a particular system. Is something to say about either.

  The state diagram of FIG. 12 shows the overall function of the memory operation shown in FIG. Considering an individual memory block, it can be in one of three states. These include erase block 641 and block 643 where valid file data is stored with no releasable capacity, erased pages that are not programmed and / or stored but no longer used (invalid And block 645 containing valid file data having a releasable capacity from the data. Function 647 writes data to the erased memory block, resulting in a category 643 or 645 block based on whether the resulting programmed block has releasable capacity. As indicated by function 649, when erasing a file, the block 643 containing the file data is converted to a block 645 having a releasable capacity. By releasing the unused storage capacity of the block 645, the function 651 returns these blocks to the state of the erase block 641 where new data is written.

  Referring to FIG. 13A, data file writing to the memory system is shown. In this example, the data file 181 is larger than the storage capacity of one block or metablock 183 of the memory system. This extends between the vertical solid lines. Accordingly, the portion 184 of the data file 181 is written to the second block 185. Although these memory cell blocks are shown physically contiguous, they need not necessarily be contiguous. Data from the file 181 is written as reception streaming from the host until all the file data is written to the memory. In the example of FIG. 13A, the data 181 is initial file data.

  A preferred way for the memory system to manage stored data and keep track of the state is to use variable-size data groups. That is, the file data is stored as a plurality of groups of data connected in a predefined order that forms a complete file. Preferably, however, by using a file index table (FIT), the controller of the memory system maintains the order of the data groups in the file. While writing as a data stream from the host, if there is a discontinuity in the logical offset address of the file data or the physical space for storing the data, a new data group always starts. An example of such a physical discontinuity is when the file data is full in one block and writing to another block begins. This is illustrated in FIG. 13A. The first data group becomes full in the first block 183 and the remaining portion 184 of the file as the second data group is stored in the second block 185. The first data group is indicated by (F0, D0). F0 is a logical offset when the data file starts, and D0 is a physical location inside the memory where the file starts. The second data group is indicated by (F1, D1). F1 is the logical file offset of the data stored when the second block 185 begins, and D1 is the physical location where the data is stored.

  The amount of data transferred through the host-memory interface may be described by a large number of bytes of data, a large number of data sectors, or other granularity. When communicating with a large memory system via the current logical address interface, the host often defines the file data with byte granularity, but then groups the bytes into 512-byte sectors. Or grouping into clusters for many sectors. This is usually done to simplify the operation of the memory system. Although the file-based host-memory interface described herein may use other units of data, the byte granularity of the original host file is generally preferred. That is, preferably, data offset, length, and the like are expressed not in sectors, clusters, etc., in bytes, but in the smallest reasonable unit of data. As a result, the capacity of the flash memory storage device according to the technique described here can be used more efficiently.

  Next, the new file written in the memory in the manner shown in FIG. 13A is represented by FIT in this order as an index entry (F0, D0), (F1, D1) sequence of the data group. That is, whenever the host system wants to access a particular file, the host sends the file ID or other identifier to the memory system, and then accesses the FIT to identify the data groups that make up the file. Identify. For convenience of operation of the memory system, these individual entries may also be included in the length <length> of the individual data group. When used, the memory controller calculates and stores the length of the data group.

  Preferably, as long as the host holds the file of FIG. 13A in an open state, the physical write pointer P is also held so that a position for further receiving data from the host and writing to the file can be defined. . Regardless of the logical position of the new data in the file, the new data in the file is written at the end of the file in the physical memory. The memory system allows a plurality of files, such as four or five files, to remain open at one time, and holds a write pointer P for each. Different file write pointers point to locations in different memory blocks. If the memory system has a limit on the number of open files that already exist, and the host system wants to open a new file, it closes one of the open files first and then opens the new file. open.

  FIG. 13B shows that the host adds data to the end of the file that was written before FIG. 13A but is still an open file. This indicates that the host system is adding data 187 to the end of the file. This is the end of the data of the file, and the second block 185 is being written. Since the additional data becomes a part of the data group (F1, D1), it further includes data. This is because there is no logical or physical address discontinuity between the existing data group 184 and the additional data 189. Therefore, the full file is still represented as a sequence of FIT index entries (F0, D0) and (F1, D1). The address of the pointer P is also changed to the end address of the stored additional data.

  FIG. 13C shows an example of the insertion of the data block 191 into the file written before FIG. 13A. The host has inserted the data 191 into the file, but the memory system is adding the inserted data to the end position 193 of the previously written file data. Although the host may close the file and later in the background, there is no need to rewrite the data in the logical order while inserting data into the open file. . This is because when one new group (F1, D3) is formed, all the inserted data is stored in the second memory block 185. However, by performing this insertion, it becomes the previous data group (F0, D0) of FIG. 13A, and is divided into two groups, a group before insertion (F0, D0) and a group after insertion (F2, D1). Divided. This is because a new data group must be formed whenever there is a logical discontinuity of data as occurs at the insertion start point F1 and the insertion end point F2. The group (F3, D2) is a result of the physical address D2 that is the start point of the second block 185. Even if stored in the same memory block, groups (F1, D3) and (F3, D2) are held separately. That is, the stored data offset is discontinuous. Next, the original file of insertion is represented in the memory system FIT in the order of data group index entries (F0, D0), (F1, D3), (F2, D1), (F3, D2). Note that it can be seen from the examples of FIGS. 13A, 13B, and 13C that all of the data in the memory can be used to write new files or new data for existing files.

  Instead of inserting data into the existing file shown in FIG. 13C, whenever data is inserted, the host may rewrite the file in the memory as a separate file. The memory system may then treat this separate file as a new file. The host then deletes the old file and the memory system can respond to the release of the space storing the old file whose data is no longer used.

  FIG. 13D shows another example of updating a portion of the data originally written in the manner shown in FIG. 13A. The data file portion 195 is an updated portion. Rather than updating and rewriting all the files in the memory system, an updated portion 197 of the file is added to the previously written data. The previously written data portion 199 is no longer used. After updating, the files are represented in the memory system FIT in the order of data group index entries (F0, D0), (F1, D3), (F2, D1), (F3, D2). One data group (F0, D0) in FIG. 13A is divided again into the portions shown in FIG. 13D. The group before the update part, the update part, and the group after the update part. Although it is desirable to free space 199 occupied by data that is no longer used, it is preferably done later, not as part of writing file data to memory. Typically, by performing such a release, the number of data groups of data of a specific file stored is reduced.

  Preferably, the offset of the data in each file is continuously maintained in the correct logical order after the file is created or modified as described above. Therefore, as part of the operation of inserting data into the file, for example, the offset of the inserted data performed by the host is continuous from the offset immediately before the insertion, and the data already in the file after insertion is inserted. Increment by the amount of data. Most commonly, updating an existing file results in data in any address range of the existing file that has been replaced with a similar amount of update data, so it is usually necessary to replace the data offset in the other file There is no.

  Note that all of the data allocation and indexing functions described above in connection with FIG. 13 are performed by the controller of the memory system. With the appropriate command, the host simply needs to communicate to send the file ID and the offset of the data in the file to the memory system. The rest is done by the memory system.

  The advantage of writing file data from the host directly into the flash memory in the manner described above is that the granularity or decomposition of the data stored in this way can be retained in the same way as the host data. When the host application writes file data with 1-byte granularity, for example, the data is also written into the flash memory with 1-byte granularity. Next, the data amount and position in the individual data group are measured by the number of bytes. That is, the same offset unit of data that can be addressed separately within the host application file can still be addressed separately within that file when stored in the flash memory. Next, any boundaries between data groups of the same file in the block are specified in the index table for the nearest byte or other host offset unit. Similarly, the boundaries between data groups of different files within a block are defined in host offset units.

  The term “sector” is used herein for a large block of memory and represents a unit of stored data associated with an ECC. A sector is also a minimum unit of data transfer to and from the flash memory. A “page” is used to represent a unit of memory cells in a block and is the smallest unit of programming. “Metapage” is used to represent a page that performs complete parallel processing of metablocks. A metapage is the largest unit of programming.

File Block Management An example of the file-to-block mapping function 605 in FIG. 11 will be described below. When writing data to the memory system from either an external host or host internal process, or copying from another location in memory as part of a data release operation, the data is stored based on a specific process Select the destination block to be used. In this processing, the type of a specific block is recognized based on the stored file data structure. Next, annotate each file stored in the memory system as one of a number of states. Each file state is defined by the number and type of blocks storing file data. When writing data to a file, it controls the current state and the transitions that are allowed from one state to another state, and the specific file that contains data from one or more other files Limit the number of blocks that contain data. This facilitates efficient use of the memory blocks and reduces the frequency of subsequent release operations required to hold enough erase blocks in the entire memory to accept new or copied data.

The types of blocks including file data recognized in this example are as follows.
A “file block” is completely programmed and contains valid data from one file. May contain some data that is no longer used.
A “program block” is partially programmed and contains valid data in only one file. Some erased capacity remains in the block. May contain some data that is no longer used.
A “shared block” is partially programmed and contains valid data in two or more files. Some erased capacity remains. May contain some data that is no longer used.
A “full shared block” is fully programmed and contains valid data in two or more files. May contain some data that is no longer used.
A “full program block” is a temporary designation for a program block that is full when it includes data that was most recently written to the file and data that is no longer used. One block can be accommodated. If the next data to be written to the file exceeds the range of offset addresses that one block can accommodate, the full program block is then designated as a file block. A complete program block corresponds to a complete Chaotic block in an existing logical block address (LBA) system. This is because once valid data is specified and data that is no longer used is specified at least once, the specific logical offset of the file is written to this block multiple times. .

  Another type of block is an “erase block”, which allows data to be received without programming the full capacity of the block. When memory is full or close to the total amount of data, a specified minimum number is typically achieved by continuously releasing unused capacity in the used blocks. Maintain a pool of erase blocks.

  “Fractal block” is an overall term that refers to a program block, shared block, or full shared block. The fractal block of a file contains valid file data, along with either unprogrammed memory capacity, valid data from other files, or both. The main purpose of the technique described here is to minimize the number of fractal blocks in the memory system by managing the type of active block that is designated to receive file data. This reduces the cause of garbage collection and data consolidation (block release operations) required to hold a specified minimum number of erase blocks. And since it takes no time to perform an internal copy of the data and free up unused pieces of the previously programmed block, the speed at which the data is written to the memory is increased.

Here, terms used for other types of blocks will be described together.
A “partial block” includes a non-programming capacity and valid data of one or more files, and may include data that is no longer used. A program block and a shared block are examples of partial blocks.
A “block that is no longer used” is a file block or a full shared block that contains data that is no longer used. Blocks that are no longer used do not include erased capacity, but include both valid and unused data.
An “invalid block” is one that does not contain any valid data. An invalid block contains at least data that is no longer used and may contain erased capacity that does not contain valid data.

  14A-14E show several examples using blocks of the type previously described. In FIG. 14A, the data of file A is embedded in blocks 661 and 663 and partially embedded in the third block 665. Data is written in each block in this example from left to right. First, the block 661 is filled, then the block 663 is filled, and then a part of the block 665 is written. The remaining portion of block 665 is an erased capacity that can store additional data without programming. Blocks 661 and 663 are file blocks according to the previous definition, and block 665 is a program block. If there is new data, write to block 665 and start from program pointer P. When writing data to a block, the pointer P moves from left to right and always indicates the next available storage location after the block. For individual blocks that hold erased capacity without programming, such pointers hold whether they are currently active, so that the physical address of other data that writes to the block is always known. .

  As an example, FIG. 14B shows file A stored in file block 662 and full program block 667. By the previous definition for the full program block, block 667 contains the most recently written data of file A and the data that is no longer used, and there is no unused capacity. Further, according to the previous definition, the total data amount of the file A stored in the two blocks 662 and 667 is equal to the storage capacity of one block. The last data of the file A is written at the end of the block 667 indicated by the program pointer P. Further, when data of file A is received, programming is performed for another block. That block becomes another block in which data of file A in block 667 is collected. This is because it frees up space occupied by data that is no longer used. Alternatively, additional data can be written into a completely erased block. In either case, the pointer P moves to a new block at the start position of the data of the added file A. Next, block 667 becomes a file block. Therefore, block 667 is transient because it exists only as shown in FIG. 14B. The program block immediately before being completely filled with the data of file A is a program block. As soon as new data of file A is written, it becomes a file block.

  The example of FIG. 14C includes a block 669 that is a shared block. This is because the data of the current file A and the capacity not to be programmed are included together with the data of another file B. At the end of file A, new data is written to block 669, starting from where program pointer P indicates. Block 669 is the active block of file A. When additional data of file A or B is written at program pointer P, it may be an active block of file B. Alternatively, the individual block (not shown) may be the active block of file B.

  In order to make good use of the capacity without this form of programming, the file data may be written directly into the erased capacity of the partial block that already contains the data of another file instead of the erase block. This is particularly beneficial when writing file data where the amount of file data is known to be less than the capacity of a full block. An existing partial block is searched to detect the amount of erased capacity that matches the data for which the amount of data to be written is known. The number of pages of data (or metapages if using metablocks) is compared to the number of erased pages without programming in the partial block. In this way, when programming is performed on the space where the program block is not used, it is converted to a shared block.

  In FIG. 14D, the file A is stored in the file block 661, a part of the block 671, and a part of the block 673. Block 671 is a full shared block because it is full of data from two files A and B. Block 673 is a program block similar to block 665 of FIG. 14A. A block 673 is an active block of the file, and the pointer P points to an unused capacity position in the block 673, and writing of additional data is started.

  In the example of FIG. 14E, the file A is written to a part of the full shared block 671 and the shared block 675. Block 675 contains data for third file C. The pointer P points to the first position of the unused portion of the active block 675 and is where additional data is written.

  In the example of FIGS. 14A to 14E, in order to explain several different types of blocks, the data of the file is stored in a plurality of blocks. However, in many cases, the file is stored. A smaller number of blocks is sufficient, and a single block is sufficient. The technique described here can be applied to such a small file. In addition, a large file occupies a page of four or more blocks.

  Note that blocks 665, 667, 669, 671, 673 and 675 are fractal blocks. It is desirable to minimize the number of fractal blocks occupied by any one file data. This is because the presence of these blocks adversely affects the performance of the system because it increases the need to free up unused capacity. Unused erased capacity is in partial blocks 665, 669, 673, and 675, but the amount of data that has not been written to the file is known, and the known amount is the amount of these blocks. If it does not coincide with one unused capacity, it is not possible to efficiently write new data directly from this host to this space. Most commonly, the amount of data from the host for a particular file is not known, so the capacity of these bits cannot be filled immediately. Therefore, in order to efficiently use the memory capacity, it may be necessary to move data from another block to an unused space during the release operation. Blocks 669, 671, and 675 contain data for more than one file, which means that if one of the files is deleted or the data stored in the shared block is no longer used, This means that there is a possibility of releasing the capacity of the block occupied by data that is no longer used.

  Therefore, in order to reduce the time required for the data release operation, only one, two, or other number of fractal blocks can store data of a particular file at a time. In the specific example described here, data of one arbitrary file is stored only in two or less fractal blocks. Consider a process of specifying a new active block and storing file data. One of the set of allowed file states is assigned to each file defined with the type of block in which the file data is stored. If a new active block needs to be allocated to receive data for a particular file, such as when an existing block is full, the file type specifies the block type in this way. Other factors are possible.

  Define 10 allowed file states 0-9 for the types and combinations of fractal blocks and full program blocks that store file data in the specific embodiment of the memory operation concept described here. It is shown in the table of FIG. Each allowed file state allows data to be stored in only two fractal blocks or one full program block. There is no limit to the number of file blocks associated with a file. In two cases, the case where the memory receives the data from the host and the case where the data is rearranged in the memory during the release operation, an active block for storing the file data is selected using these file states. . The status of all files stored in the memory system is monitored and recorded together with other information in a file index table (FIT) 613 (FIG. 11) such as the header of the FIT record of the file. Whenever a state transition occurs, the FIT entry is updated and recorded in a new file state.

  The main transitions obtained between the file states 0 to 9 defined in FIG. 15 are shown in the state diagram of FIG. From these three figures, the details of the operation of the preferred memory system are known and considered sufficient to perform this operation. However, some aspects of this operation are further described.

  As shown in the table of FIG. 15, since there is no data in the fractal block, the file is designated as state 0. Since the only other type of block is a file block, the file data is either written to only one or more file blocks, or the file data is not stored in any block. The former is most likely a temporary condition due to the required accuracy between data volume and block capacity. This latter condition occurs when the memory system has received information about a new file but has not yet written data for that file. In either case, it is necessary to specify that the active block receives data. When data whose length is unknown is received from the host, the erase block is designated as the active block. Once data has been written to the erase block, this block has become an active program block, so the file transitions from state 0 to state 2 (see FIG. 16).

  However, if the file status is 0 and the length of the new file data received from the host is known to be less than the storage capacity of the block, the erased capacity is sufficient to store the known amount of data. If possible, designate the partial block as the active block. Next, the file transitions from state 0 to state 3 (see FIG. 16). Such a partial block is a program block or a shared block. The best possible fit is between the data of known length and the remaining storage capacity of the available partial blocks. If there is no partial block having a sufficient capacity for the data whose amount is known, the file transitions from the state 0 to the state 2 by writing data in the erase block.

  A characteristic of the file in state 2 is that the program block is assigned to receive additional data of the file. However, if the file is large enough, the block eventually becomes full and then another active block needs to be specified. The full block, which is now a file block, does not contain data that is no longer used, and the file returns to state 0. Here, it is not designated as an active block. Next, as described above, depending on the amount of additional data to be stored, the erase block or partial block is designated as a new active block. However, if data that is no longer used is included in a full block and the maximum offset of the file is smaller than the range of offset addresses that can be accommodated by one block, it becomes a full program block according to the previous definition. Next, the block is preferably compressed by copying the valid data to the erase block, and the original block is erased. Since the obtained block includes this valid data and the erased capacity, it becomes a partial block. This new partial block then becomes the active program block. The state of the file transitions from state 2 to state 1 and returns to state 2 (see FIG. 16). However, when the file data is received in the state 1 and the offset address exceeds the address range that one block can accommodate, the full program block becomes a file block. The file then transitions to state 0.

  As a partial block, during the release operation, the active program block that exists when the file is in state 2 is selected as the destination block for the data for which the amount of another file from the source block is known. The ID of the program block is kept in a list of partial blocks containing the erased capacity available in each block of the list. The amount of data copied from the source block matches the erased capacity of the partial blocks in the list. If the program block of the current file is selected as the destination block for the data of another file during the release operation, after copying the data of the other file to its erased capacity, the program block Become an active shared block. The file then transitions from state 2 to state 3 (see FIGS. 15 and 16).

  Further, as part of the operation of releasing the program block while the file is in state 2, the data written in the program block of the file is copied to another block that is a partial block in which data of another file is stored. there is a possibility. In this situation, the destination block for the release operation becomes the active shared block. The file transitions from state 2 to state 4. Thus, another data of the file is written to the shared block, and the file becomes an active block.

  When the active shared block of the file in state 2 becomes full, it is designated as a full shared block. The file then goes to the limit of two fractal blocks, a full shared block and a program block. Since another fractal block is not assigned to receive the file data, the file data is copied from the program block to the erase block and this new block is designated as the active program block of the file. As part of the file state transition, such a copy of the file data is identified herein as a “data transition” and is noted as such in FIGS. The file then transitions from state 4 to state 8.

  All data transitions are completed as one operation before the state transition is considered complete. This means that if the file requires an active block for writing data, the memory cannot perform other operations until the data copy portion of the data transition is complete. Thus, typically, this data copy cannot alternate with other memory operations over time.

  The transition from the file state 4 to the state 3 occurs when the program block is designated as a block to be released. As part of the release operation, the file data in the program block is moved to the shared block. Thereafter, the shared block becomes the active block of the file. Further, once the active shared block of the file in state 4 is full, the file is stored in two fractal blocks. Until one of the fractal blocks is deleted, another block cannot be assigned as the active block. Therefore, as part of the transition from state 4 to state 7, the data in the program block is moved to the erased capacity of the partial block (data transition), thereby deleting the fractal program block. The obtained shared block becomes the active block of the file.

  In state 3, file data is written to the active shared block. If the file data is moved from the active shared block to the erased capacity of the partial block during the release operation, the destination partial block becomes the active shared block to which another data of the file is written. The file then transitions from state 3 to state 6. However, if the amount of data moved from the source program block does not fit well with the capacity of the partial block on the partial block list, the file data in the shared block is moved from that block to the erase block, so that the erase block Becomes the active program block for the file. The file then transitions from state 3 to state 2. If the active block assignment includes a data transition from the original shared block to the new erase block in the middle of this state transition, then it becomes the active program block of the file.

  Another possibility when the file is in state 3 is that the active shared block into which the file's data is written is full. Next, there is no active block for writing other data in the file, and a transition is made to state 5. This state is the same as the operation in the file state 0 and there is no active block of the file. However, when the file is in the state 5, the data of the file is included in the full shared block. . When in state 0, there is no fractal block containing file data. Normally, the two states 0 and 5 are temporary states, and from this state, the transition starts immediately when additional data of the file is written.

  When in state 5, the possible transitions to other file states are the transitions when the file is in state 0 except that the file data is stored in the shared block when in state 5 and not in state 0. It is the same. If the amount of data is not known, an erase block is assigned to additional data in the file, so an active program block is generated and the file transitions to state 8. If the amount of data is known, write to the remaining capacity of the partial block, and if the size fits well, this makes the partial block an active shared block and the file transitions from state 5 to state 7 To do. File state 8 is the same as state 2 except that file data is stored in the full shared block in state 8 and no such block exists in file state 2. File state 7 is similar to file state 3.

  If the active shared block is filled with data in file state 6, the file is stored in the full shared block and shared block. Since this is the limit of two fractal blocks in this embodiment, another block cannot be assigned as a program block or other fractal block. Therefore, data transition must occur. If there is no suitable match between the data and the erased capacity of the partial block, the file data from one of the shared blocks is moved to the partial block (file transition to state 7) and the file is actively shared Block or move to erase block (file transition to state 8).

  When in file state 7, the active shared block is not full. The file is stored in two full shared blocks, and a transition to state 9 occurs.

  When the file is in state 7, since the shared block is designated as the block to be released, it is necessary to rearrange the file data. Then, data transition occurs. If the file data is moved from the shared block to the erase block and then becomes the active program block, a transition to the file state 8 has occurred. Instead, if the file data is moved to a partial block, the partial block becomes a shared block and the file state remains at 7.

  While writing additional data to the file, the file remains in two full shared blocks, so file state 9 is stable. However, there is no active block specified when the file is in that state. Since there is a limit of two fractal blocks, a data transition must occur before additional data can be written to the file. As an example, if all the data of one of the two full shared blocks is moved to the erase block, this block becomes the active program block for writing new data of the file. The file then transitions from state 9 to state 8. However, if the amount of data in one of the two full shared blocks and the total amount of additional data in the file are less than the capacity of the block, a sufficiently erased space in the partial block is searched. If detected, moving the file data from one of the full shared blocks to a partial block becomes an active shared block for writing additional data of the file. This is a transition from state 9 to state 7.

  In the file state 8, file data is written to the active program block, but data of other files is still stored in the full shared block. When a program block becomes full, it becomes a file block and there are no more active blocks in the file. Then, the state transitions to state 5. Further, when the file transitions, as described above, an erase block or a partial block is allocated as a new active block.

  However, when the active program block of the file is selected as the destination block for the release operation in the state 8, the file state directly transitions to the state 7 in the first case. This creates an active shared block that receives new data for the file. Alternatively, when the active program block of the file is designated as the source block of the release operation in the state 8, when the file data is moved to the partial block, it becomes an active shared block for writing additional data to the file. In the second case, the file state also transitions from state 8 to state 7.

  In addition to the main file state transitions shown in FIGS. 16 and 17, there is a set of second file transitions that occur. These are shown in FIGS. These second transitions of the current file of interest occur when all of the data of one file stored in the fractal block containing the data of the current file is no longer used. The data that is no longer used may be from the current file or from another file. Data is no longer used as a result of the host deleting the file, as a result of updating data previously written to the file by the host, or as a result of rearranging file data during the release operation. In the middle of updating a file, for example, when all data is updated by writing new data to another block, all data of the file stored in the shared block is not used. In one example of the release operation, when data of a file in a shared block that is not the file of interest is copied to another block, the data of the other file in the shared block is not used.

  By not using data in these situations, the type of block storing data that is no longer used is changed, and the state of the file changes. If a new active block is needed for the file data, it is selected in the manner described in connection with FIGS. 16 and 17 based on the new file status.

  The transition of FIG. 18 and the identification name of FIG. 19 of the particular transition that occurs are all these descriptions. Note that these transitions simplify the file state because they tend to reduce the number of fractal blocks that contain file data. These transitions facilitate the transition of the file state to state 0 where there is no fractal block.

  When data is programmed for a file, but there are no active blocks in the current file, the file status information is used to determine the type of block assigned as the active block of the file. The right column of the table of FIG. 20 summarizes the allocation of active blocks to files in any one of states 0-9 under the conditions described in the middle column. The types of blocks are in the order shown in the figure. “Best-fit sub-block” means a sub-block with an erased capacity of an amount that can efficiently utilize data of known amount. If there is no suitable partial block, the erase block is most commonly selected. However, if in either state 2 or 3, the best-fit partial block of the file cannot be identified, the “maximum partial block” is assigned. This is a block having no erased capacity that can sufficiently process the total amount of data to be written, but is a block capable of processing the maximum amount of data. Next, the state of the file is changed, and the selection of the block is controlled in the new state, and the remaining data amount that does not conform to the maximum partial block is accepted. However, if the data is divided into three or more blocks even if the maximum partial block is used due to the amount of data and the available capacity in the partial block, the erase block is assigned as an active block.

  The above-described operation may be executed by the processor 27 of the controller 11 that executes firmware stored in the memory system of the example illustrated in FIG.

Releasing Block Capacity As described above, part of block management includes releasing unused capacity in a block and storing new data. If the amount of data stored in the memory system is much less than its capacity, this is not particularly a problem, but preferably the memory system is designed to operate as if it is full of data. This includes blocks that contain only data that is no longer used, or other blocks that contain valid data, but that are no longer used and / or have erased pages that have not been written. It means that it can be processed to free up the capacity that is not known. The purpose is to utilize the storage capacity of the memory system as much as possible, while at the same time minimizing adverse effects on system performance. The release of the block is indicated as 617 in the overall system operation diagram of FIG.

  When the release operation is performed, valid data in a designated block (source block) is copied to one or more blocks (destination block) having an erased capacity sufficient to store valid data. A destination block is selected according to the block management technique described above. The data of each file stored in the source block is copied to the type of block selected based on the file status and other factors, as described above. An example of data copy between different types of files as part of the release operation is shown in FIGS. 21A to 21D.

  In FIG. 21A, the releasing operation of the two partial blocks 681 and 683 is shown as an example. A block 681 is a program block that stores valid data of the file A, but also includes an erased capacity that does not store data. One possible release operation is to copy the file A data in block 681 to the available erased capacity of another partial block 685 that already contains data from a different file B based on the state of file A. And a shared block. Next, the FIT no longer refers to the data group in block 681, and is annotated that this block is no longer used. When storage is performed in block 681, file A is in one of states 2, 4 or 8 (see FIG. 15) containing program blocks. The data will then be moved to another fractal block, but the file remains written up to the upper limit of two fractal blocks. After copying to block 685, file A transitions to one of states 3, 4, 6 or 7. This includes file data that is stored in the shared block based on the type of block in which other file data is stored.

  Block 683 in FIG. 21A is a shared block released by copying the data stored in the data of files C and D to the erased capacity of program block 687 containing the data of file E, And it becomes a shared block. As with the block itself, files C and D in block 683 are not used. Since the data is moved from one shared block to another shared block, the states of the files C and D do not change. However, the state of file E has changed from either 2 to 3 or 8 to 7. Alternatively, the data of the files C and D can be moved to different blocks, and it is not always necessary to copy them to the available space of the shared block. And the state of the file will probably transition to another state.

  FIG. 21B illustrates the release operation of example blocks 689 and 691. Each of these blocks is an obsolete block because it is full of valid and obsolete data. Block 689 is a file block containing data of file F, where a part is not used and the rest is valid. This occurs, for example, while the file F is updated, in which new data is physically written at the end of the file. This file has the same logical offset as the data of the existing file, and the existing data is not used. In this example, the file F data is copied to the erased capacity of the program block 693 containing the file G data, and the type of the block 693 is changed to a shared block. Alternatively, when valid data of file F is written to the erase block, this block becomes a program block.

  Block 691 in FIG. 21B is a full shared block containing invalid data for file H and valid data for file I. In this example, valid data in file I is copied from block 691 to erase block 695. The block 695 becomes a program block. Alternatively, if there is a good fit, the file I data may be written to a partial block containing another file data. The destination block depends on the state of the file I when the release operation is performed.

  As a result of each of the four specific example release operations shown in FIG. 21A and FIG. 21B, the data stored in the two partial blocks are combined into one so that they are used for the other two blocks. Only the lost data will remain. These become invalid blocks. Next, as shown in FIG. 21C, the entire spaces of the original blocks 681, 683, 689 and 691 are released by erasing the blocks. An erase block is the result of releasing an invalid block.

  FIG. 21D shows an example file block 697 in which data of file J is stored. If the host deletes file J, the data of file J in block 697 and possibly other blocks are also not used. Block 697 is then invalid. Releases invalid blocks to create erase blocks for the system's erase block pool.

  Generally, when a file is erased from the memory, data of the file in one or more fractal blocks such as a shared block or a full shared block is not used. Since the remaining valid data of another file is smaller than the storage capacity of the block and becomes a small amount, the release operation is performed on the block.

  The general release operation is shown in the flowchart of FIG. As shown in step 701, according to a specific embodiment, one or more lists are maintained for partial blocks, obsolete blocks, and invalid blocks. The list may be maintained as part of the block list 615 (FIG. 11). According to one memory operation technique, this block list is formed at the start of the memory system, such as when power is first turned on. This list may contain other information about the blocks that can select the free block one at a time, such as the amount of valid data in each block and the amount of erase memory in each block. Typically, these quantities are measured by the number of pages in the block, or the number of metapages when using metablocks. Another preferred technique is to keep these lists in non-volatile memory and add or update entries in the blocks of the list whenever their state changes. This technique eliminates the need to scan blocks to form a list when initializing the memory system. Instead of keeping all the partial blocks in the list, the blocks that are no longer used, and the invalid blocks, one of the features of selecting a free block is that there is little or no valid data that needs to be copied Since it is a block, only blocks having a small amount of valid data below the set threshold amount are included. What is required for many very time-consuming release operations is to copy data from one block to another, so it is usually done first for blocks with less data to copy.

  When data is written, updated, moved, deleted, etc., such a block list always changes. The list held in step 701 in FIG. 22 changes depending on the change in type from a partial block, a block that is no longer used, or an invalid block to a changed block. Annotation is also made in the block list 615 (FIG. 11) about the change in the effective data amount individually stored in such a block and the change in the amount of erased capacity.

  In step 703, one released block is preferably identified as the next updated block list for release. If it is a partial block or a block that is no longer used, it is the source that copies valid data to another block called the destination block. Some specific techniques used for source block selection are described below.

  In the next step 705, in response to the command from the host, it is determined whether it is appropriate to perform the release operation in consideration of the necessity of performing the memory operation. If the host sends an idle command or something similar to the memory system that indicates that the host has time to perform a specific operation, the memory system will perform an overhead operation including a release operation. Run freely in the foreground. Even if the memory system is busy writing data to the memory or busy reading data from the memory in response to a host command, the release operation, especially its data copy, is written to and read from It can be performed alternately with the operation. Such an interleaving method is described in US Patent Application No. 11 / 259,423 (Patent Document 31) filed on October 25, 2005 by Alan Sinclair, and December 19, 2005 filed by Alan Bennet et al. It is described in US patent application Ser. No. 11 / 312,985 (patent document 32).

  If it is determined in step 705 that the release operation is to be executed, the process differs depending on whether the identified release block contains valid data, and in this case, the process depends on whether it contains valid data of two or more files. Is different. In the case of a partial block or a block that is no longer used, it contains valid data by definition, and in the case of a shared block or full shared block, it contains valid data in more than one file. In step 707, it is determined whether there is valid data in the release block. If there is valid data that needs to be moved, the data of one file is identified, and in the next step 709, it is identified as the destination block that receives the data. Through the process described above, the destination block is identified in relation to FIGS. 15-17 to store (in this example) all the data of the file to which valid data belongs in less than two fractal blocks. To do. As shown in step 711, it begins copying valid data from one file from the source release block to the destination block. After copying these data, the process returns to step 707 to determine whether data from another file remains. If it remains, the processes in steps 709 and 711 are repeated for the additional data. Select the destination block separately from the one previously selected for the data of the different file. When erasing the source block every time step 713 is executed, this is repeated until it is determined in step 707 that there is no data to be moved in the source block. The block is then moved to the erase block pool and used to store new data.

  Returning to step 707, in the case of an invalid block, if the source block does not contain valid data, there is no valid data to move. You just need to erase the source block. Accordingly, the processing in that case bypasses steps 709 and 711 as shown in FIG.

  In the first embodiment of the process of FIG. 22, in step 701, one list of partial blocks, blocks that are no longer used, and invalid blocks is maintained. The amount of valid data in the block is contained in a separate entry in the list. In step 703, the block selected as the release block from the list has the least valid data. If there is one invalid block in the list, there is no valid data, so that block is selected first. If there are many invalid blocks in the list, select the block with the longest data. If there are no invalid blocks in the list, the block with the least amount of valid data is selected as the release block. By selecting the block having the smallest effective data amount from all the blocks in the list, the time required for the release operation is shortened as compared with the case where there is more effective data to be copied from one block to another block. As a result, other memory system operations such as writing and reading data to and from the memory are maintained at a high speed. New erase blocks can be obtained at lower cost for memory performance.

  The advantage of the first embodiment of the process of FIG. 22 that selects a source block based on the amount of valid data in one list of fractal blocks is that it is relatively simple to perform. However, this process can be further improved by considering the values of the partial blocks. The partial block has an erased capacity for writing data, but neither the unused block nor the invalid block contains the erased capacity. Before using obsolete blocks for storing new data, valid data must be moved from one block to another so that they can be erased and used to store new data. To. However, the partial block has an erased capacity for writing data that does not require the overhead of the release operation. For example, when a large amount of erased capacity for writing data is included, it is not beneficial to release the partial block only because the effective data amount is the smallest.

  Therefore, in another embodiment of the process of FIG. 22, the partial block is selected as a candidate to release the source block based on both the effective amount of data and the amount of erased capacity present in the partial block. The components of data in the partial block are shown in FIG. A block (which may be a metablock) has a number of one or more pages (which may be metapages) that contain valid data and an erased one or more other pages where data is written. is doing. As an example, as shown in FIG. 23, a partial block may also contain one or more other pages with data that is no longer used.

  In these other embodiments of the process of FIG. 22, preferably, in step 701, the partial blocks are kept in a list separate from the list of unused blocks and invalid blocks. If there is almost no erased capacity and this means less useful data in their current state, the partial block is free for the release operation. Move to the top of those lists. Such blocks mainly contain data that is no longer used. Conversely, a partial block that has a large amount of erased capacity (meaning that it may be useful for data storage in some cases) and has a large amount of effective data to move is least likely to be identified as a candidate for a released block. The same amount of storage capacity is not added to the memory system by releasing partial blocks with erased capacity, as is done by releasing blocks that are no longer used. Obviously, invalid blocks are the most attractive blocks to free because there is no useful erased capacity and no need to copy valid data.

  In the second embodiment of the release block identification step 703 of FIG. 22, in step 701, three separate lists are maintained, one for each of the partial block, the unused block and the invalid block. ing. If there are invalid blocks, select a free block from the invalid block list until there are no more blocks in the list. There is no particular order in which invalid blocks are listed, except for first-in first-out (FIFO), so that the longest invalid block is selected first. Next, when there is no invalid block, a block having the smallest valid data amount is selected from the block list that is no longer used among all the blocks in the list.

If there is no block in either the invalid list or the list that is no longer used, in step 703, a block in the partial block list is selected as a release block. Although partial blocks can be selected as having the least amount of valid data, it is preferable to rank the partial blocks so that the benefits of their erased capacity can be seen. For this purpose, the “release gain” can be calculated for each partial block as follows.
Release gain = (S−kE) / V (1)

  S is the size of the block as the total number of pages storing data, E is the number of pages of erased capacity to which data is written, and V is an effective value that needs to be moved to another block The number of pages that contain irrelevant data. A constant k is included to weight the possible influence of the erased capacity of the block, but can be set to 1. As the value of kE increases, the resulting release gain decreases. As the value of V increases, the release gain also decreases. In step 703, the partial block having the highest release gain value is selected as the release block. Alternately use other mathematical expressions to define the release gain in terms of E and V that balances system operation with valid data and the barrier to the benefits of having erased capacity Can do. The release gain may be calculated every time the block is changed, such as each time data is written to the erased capacity, each time it is stored as part of information held in the file directory or FIT.

  This second embodiment is shown in FIG. A method (step 703 in FIG. 22) for selecting a release block from a separate partial block list, a block list that is no longer used, and an invalid block list (as retained in step 701 in FIG. 22) is shown. Yes. In step 721, it is first determined whether there is a block in the invalid block list. When there are a plurality of such blocks, in step 723, the longest block on the list is selected as a release block. If there is no block in the invalid block list, it is determined in step 725 whether there is an entry in the block list that is no longer used. If two or more blocks are in the block list that is no longer used, if there is, in step 727, the block with the smallest effective data amount is selected as the release block. If it is determined in step 725 that there is no entry in the block list that is no longer used, in step 729, the partial block list is examined. If there are two or more blocks in the partial block list, the block with the highest release gain is selected as the release block. The release gain takes into account the effective amount of data in the block and the erased capacity, such as using equation (1) above. If there is nothing in the partial block list, the process returns to step 721 and the process is repeated until a block appears in one of the lists. After selecting the release block, the process proceeds to step 705 in FIG.

  The third embodiment is shown in the flowchart of FIG. The execution of step 703 of FIG. 22 is also started by step 741 of searching for an entry in the invalid block list held in step 701 of FIG. If there are two or more entries in the invalid block list, the oldest one is selected as a released block in step 743 of FIG. If there is no entry in the invalid block list, it is determined in the next step 745 whether there is an entry in the block list that is no longer used. If so, the next step is different from the embodiment of FIG. If there is at least one entry in the partial block list, it is determined whether it is best to select a free block from a block or list of partial blocks that are no longer used.

  In step 747, the block having the smallest effective data amount is identified from the block list that is no longer used. Next, in step 749, it is determined whether there is at least one block in the partial block list. If there is, in step 751, a block having the smallest effective data amount is identified. In the next step 753, a selection is made between one block identified from the block list that is no longer used and one block identified from the partial block list. For this purpose, in step 751, the quantity (V + kE) is calculated for the blocks identified from the partial block list. V, E and k are the same as described above. This quantity is compared with the effective data amount V in the block identified from the block list that is no longer used in step 747. If the partial block quantity (V + kE) is larger than the unused block quantity V, in step 755, the unused block is selected as a released block. However, if the number V of unused blocks is larger than the number of identified partial blocks (V + kE), in step 757, the partial block is selected as a release block.

  Before comparing with only the valid data V of the identified unused block, the erased capacity quantity kE of the identified partial block is added to the valid data V to select the unused block. So that the process is biased. Since the erased capacity still has the possibility of being used to store data, it retains the identified partial block having the same effective data amount as the identified unused block. In fact, a partial block having an effective data amount smaller than the block that is no longer used by the quantity kE is retained.

  Returning to step 745 of FIG. 25, if there is no entry in the block list that is no longer used, it is determined in step 759 whether a block is described in the partial block list. If not, the process returns to step 741 and is repeated until the block is listed in one of the three lists. If a plurality of partial blocks are described, in step 761, a block having the smallest effective data amount is selected as a release block. Alternatively, as described in connection with step 731 (FIG. 24) of the second embodiment, a partial block may be selected using a release gain.

  On the other hand, in the third embodiment, only two lists may be used. The first list is a block list that is no longer used, including block entries that contain data that is no longer used and the memory capacity that is not erased. As shown in FIG. 25, instead of using individual invalid block lists, both invalid blocks and blocks that are no longer used are listed in one “no longer used” block list. Optionally, the block may contain valid data. Each entry in the list has a field that contains a value that defines the amount of valid data in the associated block. The list entries are ordered based on the values of these fields. Therefore, there are data that are no longer used, and blocks that have no valid data (invalid blocks) are grouped together at the top of this first list.

  The second list, which is another form of the third embodiment, is a partial block list including entries of blocks including the memory capacity that has been erased. Optionally, the block may contain valid data. Each entry in the list has a field containing a value that defines the amount of valid data in the associated block. The list entries are ordered based on the values of these fields. A block may be selected from the head of either the first list or the second list by the method in step 753 of FIG. 25 (block with the least amount of invalid data).

  The table of FIG. 26 describes details of the types of blocks described in the partial block list for release operation and the block list that is no longer used according to this modification of the third embodiment. To be listed in the partial block list, the block contains both valid data and erased capacity. There may or may not be any unused data in the block. To be listed in the block list that is no longer used, the block contains data that is no longer used and either valid data or erased capacity.

  The processing described above in connection with FIGS. 22, 24 and 25 may be performed by the processor 27 of the controller 11 executing firmware stored in the example memory system shown in FIG.

Summary While various aspects of the invention have been described with reference to illustrative embodiments, it will be understood that the invention is entitled to protection within the full scope of the appended claims.

1 schematically illustrates a non-volatile memory system connected to a host as currently implemented. FIG. 2 is a block diagram of an example flash memory system used as the nonvolatile memory of FIG. 1. FIG. 3 is a typical circuit diagram of a memory cell array used in the system of FIG. 3 shows a physical memory configuration of an example of the system of FIG. It is the elements on larger scale of the physical memory of FIG. FIG. 6 is another partial enlarged view of the physical memory of FIGS. 4 and 5. 1 illustrates a typical prior art logical address interface between a host and a reprogrammable memory system. FIG. 8 illustrates a typical prior art logical address interface between a host and a reprogrammable memory system that differs in manner from that shown in FIG. Fig. 3 shows a direct file storage interface between a host and a reprogrammable memory system according to the invention. FIG. 10 illustrates a direct file storage interface between a host and a reprogrammable memory system according to the present invention in a manner different from that shown in FIG. FIG. 2 is a functional block diagram of a memory system that cooperates with a direct data file storage interface. Indicates the operation cycle of the direct data file memory. An example of writing file data directly to memory is shown. Another example of directly writing file data to memory will be described. Another example of directly writing file data to memory will be described. Another example of directly writing file data to memory will be described. An example is shown in which a data file is stored in a block of a type that allows various combinations. An example is shown in which a data file is stored in a block of a type that allows various combinations. An example is shown in which a data file is stored in a block of a type that allows various combinations. An example is shown in which a data file is stored in a block of a type that allows various combinations. An example is shown in which a data file is stored in a block of a type that allows various combinations. It is a list of file states that are permitted by the type of block that stores the data of individual files. FIG. 16 is a state diagram showing the main transitions allowed between the file states of the list shown in FIG. It is a table | surface explaining the main file state transition shown in the state diagram of FIG. FIG. 16 is a state diagram showing a second transition obtained between the file states of the list shown in FIG. 15. It is a table | surface explaining the 2nd file state transition shown in the state diagram of FIG. FIG. 21 is a list of types of blocks allocated as active blocks under the conditions of FIGS. 15 to 20. FIG. An example block release operation is shown. An example block release operation is shown. An example block release operation is shown. An example block release operation is shown. It is a flowchart which shows general release operation | movement. The type of data stored in a typical partial memory cell block is shown. FIG. 23 shows details of a specific embodiment for performing one of the steps of the flowchart of FIG. FIG. 23 shows details of another embodiment that performs the same steps of the flowchart of FIG. It is a table | surface which defines the kind of block described in the two block lists of another embodiment.

Claims (26)

A method of storing data in a reprogrammable nonvolatile memory block as a uniquely identified file,
Maintaining a record of a separately stored file of one of a plurality of file states based on how to distribute the file data among one or more types of blocks; and
Writing any additional data of any file into a block of a type selected based on the recording status of the arbitrary file;
Including methods. The method of claim 1, wherein
The method wherein the record of an individual file includes the identification of any kind of block in which the data of the file is stored, along with data from another file. The method of claim 1, wherein
The step of writing the additional data further includes a step of transitioning the state of the arbitrary file from the first state to the second state, wherein the first file state and the second file state are at least 1 A method based on storing the data of the arbitrary file in two different types of blocks. The method of claim 1, wherein
The step of writing the additional data includes a step of restricting the number of blocks of the arbitrary file including the data of the file in the memory and limiting the number of blocks including the data of another file that is less than a predetermined number. Transitioning the state of the arbitrary file to write additional data. The method of claim 1, wherein
The step of writing the additional data includes the step of writing data received from outside the memory. The method of claim 1, wherein
The step of writing the additional data includes the step of copying data from another location in the memory. A method of operating a non-volatile memory system having storage cells grouped into memory cell blocks that are erased before reprogramming with uniquely identified file data comprising:
Designating a set of multiple data block types for the structure of the file data stored in the specified individual block;
Designating a set of multiple allowed file states for a combination of one or more block types that store designated individual file data; and
Maintaining a record of the file status of individual data files stored in the memory system;
Writing individual file data to a block of a type selected based on the current state of the file of the record;
Including methods. The method of claim 7, wherein
The types of the plurality of designated data blocks are a first plurality of types in which data of only one file is stored in one block, and a second plurality of types in which data of two or more files are stored in one block. And the allowed file state limits the maximum number of blocks of the second plurality of types to which data of one of the files is written. The method of claim 8, wherein
The method wherein the maximum number is two. The method of claim 7, wherein
A method in which the memory storage cells are batch erasable. The method of claim 10, wherein
The memory storage cell includes a charge storage element individually. The method of claim 10, wherein
In order to store two or more bits of data, the charge storage elements are individually operated to store a plurality of levels of charges. A method of operating a non-volatile memory system having memory storage cells grouped into memory cell blocks that simultaneously erase before reprogramming and store data as a plurality of separately identified data files, comprising:
One of a plurality of types of blocks including a first type of block containing valid data in two or more files and a second type of block containing data from only one file To identify the block storing the data of the individual file,
Designating one of a plurality of allowed states for individual files stored in one or more blocks of the memory system, for one or more types of allowed blocks; ,
Maintain a set of multiple permitted transitions between file states that limit the number of blocks of the first type that can store data of one file in preference to the second type of blocks Steps,
In response to the need to write additional data to the existing file stored in the memory, one of the blocks in which the data of the existing file was most recently written is identified. If the block does not accept additional data for the file, the state of the file is transitioned to the next allowed state in the set of allowed file state transitions, and the next allowed state is allowed. Identifying additional blocks having types;
Then writing the additional data to the type of block identified as such;
Including methods. 14. The method of claim 13, wherein
The method wherein the set of allowed transitions between file states limits the number of the first type of blocks that can store data for one file to two. 14. The method of claim 13, wherein
The step of writing the additional data includes the step of writing data received from a host system to which the memory is connected. 14. The method of claim 13, wherein
The step of writing the additional data includes the step of copying data from another location in the memory. 14. The method of claim 13, wherein
A method of executing the method in a portable memory card or drive. A method of programming a separately identified data file into a block of non-volatile memory cells characterized by being erased before reprogramming,
Selecting one or more blocks in which a data file is programmed that retains the number of blocks that partially contain the data of the file to be below a preset limit;
Programming the data of the file into the selected one or more blocks;
Including methods. A reprogrammable non-volatile memory system comprising:
A block of non-volatile memory cells characterized in that erasure is performed before rewriting data;
One or more selected to operably connect with the memory cell block and to hold a number of blocks that partially contain the data of any one file so as to fall below a preset limit A controller for writing data of individual files to the memory cell block of
A memory system comprising: The memory system of claim 19, wherein
The controller is further operative to assign one of a plurality of specified states to the individual file based on the number of memory cell blocks partially filled with data of the file. The memory system of claim 19, wherein
The controller further assigns one state to each file storing data in the memory cell block, and further selects a block storing data of an arbitrary file based on the state of the arbitrary file. A working Mori system. The memory system of claim 21, wherein
The memory system further operates to assign a state to each file storing data in the memory cell block based on the number of blocks partially filled with data of the file. The memory system of claim 22,
The controller stores data in the memory cell block based further on the number of blocks that are partially filled with data of the file, including the erased capacity where data is written. A memory system that further operates to assign one state to each file. The memory system of claim 22,
The controller stores data in the memory cell block based on the number of blocks that are partially filled with data of the file and that also includes data of one or more other files. A memory system that further operates to assign one state to each file. A reprogrammable non-volatile memory system comprising:
A non-volatile memory cell array configured in simultaneously erasable memory cell blocks;
One or more blocks that are operatively connected to the memory array and used to select a block for storing data of an arbitrary file, wherein one or more partially filled blocks also include data of another file And one or more blocks partially filled with data of the file, such as whether or not one or more partially filled blocks contain erased capacity to which additional data is written. A controller for assigning each state to the file, the state including the state depending on the number of blocks,
A memory system comprising: 26. The memory system of claim 25.
The controller holds a number of blocks partially containing the data of the arbitrary file so as to fall below a preset limit, and the block to which the arbitrary file data is written is stored. A memory system that further operates to select.

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