JP2009303084A - Receiving apparatus - Google Patents

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JP2009303084A
JP2009303084A JP2008157295A JP2008157295A JP2009303084A JP 2009303084 A JP2009303084 A JP 2009303084A JP 2008157295 A JP2008157295 A JP 2008157295A JP 2008157295 A JP2008157295 A JP 2008157295A JP 2009303084 A JP2009303084 A JP 2009303084A
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circuit
amplifier
signal
pulse
receiving device
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Minoru Fujishima
実 藤島
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Univ Of Tokyo
国立大学法人 東京大学
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Abstract

<P>PROBLEM TO BE SOLVED: To accomplish a wireless circuit which consumes further low power and can be compact, and to accomplish a pulse receiving circuit which consumes further low power, particularly in millimeter wave bands. <P>SOLUTION: In order to accomplish a pulse receiving circuit of low power consumption, pulse communication that does not use any pulse as information is appropriate and further, the pulse receiving circuit is constituted of a nonlinear amplifier circuit for millimeter wave pulse detection and a limit amplifier circuit (restrictive amplifier circuit). When the nonlinear amplifier circuit is constituted of an NMOSFET, in particular, the circuit can be created through standard CMOS processes and it is not necessary to use any special process. A further compact pulse receiving circuit is made, therefore, without employing any complicated process. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a technique for receiving a high-frequency signal. In particular, the present invention relates to a pulse receiving circuit that is ultrafast and has low power consumption.

  In recent years, high-definition broadcasting has become widespread. Furthermore, wireless devices have spread to homes, and so-called wireless mechanisms and technologies for connecting various signals are becoming popular in homes.

  Now, in order to communicate wirelessly without compressing this high-definition image, a communication speed exceeding 1 Gbps is required. In order to realize this communication speed, it is preferable to use a frequency in the 60 GHz band allocated as specific low power communication in Japan.

  Conventionally, as a wireless communication circuit using this frequency band, a circuit using a compound semiconductor and a circuit using a CMOS are known.

  However, these types of circuits consume a large amount of power and tend to be too large for use as a wireless communication system, which tends to increase costs.


Examples of Prior Patent Documents For example, Patent Document 1 below shows an ID card transmission / reception circuit in a millimeter wave band with low power consumption and high sensitivity. In particular, a single detection / amplification modulation circuit employs a configuration that combines reception data extraction and transmission data amplification modulation.

  Patent Document 2 listed below discloses a millimeter-wave wireless device with low power consumption. In particular, time division duplex control is performed.

  Patent Document 3 below describes that a frequency multiplier with low power consumption is realized in the microwave band. In particular, the present invention is characterized by providing a fundamental wave, a second harmonic wave, and a third harmonic wave suppression circuit by nonlinearly converting a microwave input signal.

  Non-Patent Documents 1-20 below disclose various techniques related to a conventional millimeter-wave band receiver.

JP-A-5-276099 Japanese Patent Laid-Open No. 10-271032 JP 2001-274629 A Mitomoto, et al., VLSI Circuits, pp.172-173, 2007 Razavi, ISSCC, pp.188-189, 2007 Narasimha, et al., ISSCC, pp.42-43, 2007 Le, et al., ISSCC, pp.474-540, 2004 Rockwell, et al., RFIC, pp. 171-174, 2007 Sankaran, et al., IEEE EDL, pp. 492-494, 2005 Yeh, et al., MTT-S, pp. 53-56, 2005 Palermo, et al., ISSCC, pp. 44-45, 2007 Swoboda and Zimmermam, ISSCC, pp. 904-911, 2006 Chen and Gan, VLSI Circuits, pp. 120-121, 2006 Krishnapura, et al., ISSCC, pp. 60-61, 2005 Werker, et al., ISSCC, pp. 172-173, 2004 Seidl, et al., ISSCC, pp. 570-571, 2004 Radovanovic et al., ISSCC, pp. 472-473, 2004 Afshar, Wang, and Niknejad, ISSCC 2008 (in press) Scheir, et al., ISSCC 2008 (in press) Parsa and Razavi, ISSCC 2008 (in press) IEEE 802.15 WPAN Millimeter Wave Alternative PHY Task Group 3c (TG3c), http://ieee802.org/15/pub/TG3c_contributions.html K.Ohara, K.Murahashi, J.Masua, M.Ito, W.Domon and S.Yamazaki, "A 500MBPS 60GHZ-B and Transceover for IEEE 1394 Wireless Home Works, Proceedings of European Microwave Conference, pp.1-4 , Oct, 2000. D.Pozer, "Microwave Engineering 3rd Ed.," John Wiley & Sons, Inc., pp. 620-624, 2005

  As an interface for communicating high-definition images, HDMI (High Definition Multimedia Interface) has been established as a standard and is widely used. If this interface can be made wireless, it is desirable because the handling of the wire becomes much easier.

  However, since the conventional radio circuit has the above-described problems (power consumption is large and it is difficult to reduce the size), no practical example is known.

  The present invention has been made in view of the above problems, and an object thereof is to realize a wireless circuit that can be reduced in size with lower power consumption. In particular, an object is to realize a pulse receiving circuit with lower power consumption.

  For this reason, the inventor of the present application has conducted extensive research for the purpose of realizing a wireless circuit with extremely low power consumption and realizing the above-described wireless communication of the HDMI interface. As a result, a wireless circuit with low power consumption and a pulse receiving circuit that can be used in the 60 GHz band are realized by a novel circuit configuration described below.

  The present inventor considered that pulse communication that does not use the phase as information is suitable for realizing low power consumption wireless communication. Then, the invented pulse receiving circuit of the present invention is composed of a nonlinear amplifier circuit for millimeter wave pulse detection and a limit amplifier circuit (limit amplifier circuit).

  Specifically, the following means are adopted.

(1) In order to solve the above-described problems, the present invention provides a receiving apparatus that detects a received signal and outputs an original signal, a nonlinear amplifier that nonlinearly amplifies the received signal, and a limited amplification of the output signal of the nonlinear amplifier And a limiting amplifier that outputs the original signal.

(2) Furthermore, in order to solve the above-described problem, the present invention provides a receiving device that detects a received signal and outputs an original signal, and includes a nonlinear amplifier that nonlinearly amplifies the received signal, and an output signal of the nonlinear amplifier. And a filter means for removing a frequency component twice the carrier wave of the received signal.

(3) Further, the present invention includes a filter unit that removes a frequency component twice the carrier wave of the received signal from the output signal of the nonlinear amplifier in the receiving apparatus according to (1), wherein the filter unit Output signal is supplied to the limiting amplifier.

(4) Further, according to the present invention, in the receiving device according to any one of (1) and (3), the nonlinear amplifier is an amplifier circuit composed of a transistor, and performs an amplification operation in a nonlinear region. The receiving device is an amplifier circuit in which a bias is set.

(5) Further, the present invention is the receiving device according to the above (4), wherein the nonlinear amplifier is an NMOSFET common-source amplifier circuit.

(6) Further, in the receiver according to the above (5), the nonlinear amplifier is configured such that the bias voltage of the gate of the NMOSFET is set lower than when the NMOSFET performs amplification in a linear region. A receiving apparatus that performs amplification in a non-linear portion of an operation curve.

(7) Further, the present invention is the receiving apparatus according to (6), wherein the bias voltage is set to a point where the curvature of the operation curve is maximized.

(8) In the receiver according to (6), the bias voltage is set to a point at which a second-order differential value of the operation curve is maximized. It is.

(9) Further, the present invention is the receiving device according to any one of (1), (3) to (8), and further includes means for canceling a DC offset of the output signal of the limiting amplifier. It is the receiver characterized by these.

(10) Further, the present invention is the receiving apparatus according to the above (2), further comprising means for canceling a DC offset of the output signal of the filter means.

  As described above, according to the present invention, since the detector is configured with a nonlinear amplifier, a receiver circuit / receiver with lower power consumption can be configured.

  In particular, if a non-linear amplifier is configured using NMOSFETs, a non-linear amplifier can be easily configured using a CMOS process known as a circuit with low power consumption. Can be created.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the invention will be described with reference to the drawings.

First Embodiment Principle of pulse receiving circuit
2. Description of the Related Art As described above, in Japan, the 60 GHz band is attracting attention as being suitable for wireless communication at a bit rate exceeding 1 Gbps.

  As a front end of a receiver in the 60 GHz band, an example constituted by a short channel CMOS process is known (Non-Patent Document 1, Non-Patent Document 2).

  A general configuration block diagram of such a receiver is shown in FIG. The received signal is mixed with the local oscillation frequency signal transmitted from the local oscillator 12 in the mixer 10. As a result, the received signal is converted into an intermediate frequency signal. These circuits consume about several tens of mW of power.

  As shown in FIG. 1A, this intermediate frequency signal is converted by the ADC 14 from an analog signal to a digital signal. The converted digital signal is decoded by a DMOD (demodulator) 16 based on a predetermined decoding rule and converted into high-speed digital data.

  As shown in FIG. 1A, if a high-speed ADC (Analog-to-Digital Converter) 14 or a high-speed DMOD (Demodulator) 16 is used, the power consumption can be further increased.

Specific Configuration of the First Embodiment In the first embodiment, it is proposed to configure a low power consumption pulse receiver by a CMOS process without using the local oscillator 12, the ADC 14, and the DMOD 16. An example of a block diagram of such a pulse receiver is shown in FIG.

  This pulse receiver employs a method of representing data by the presence or absence of a pulse. For example, data communication is performed so as to represent “1” when a pulse group exists and “0” when a pulse group does not exist.

  As shown in FIG. 1B, in the pulse receiver proposed in the present embodiment, a pulse receiving circuit can be configured without using the local oscillator LO12, the ADC 14, or the like. Can be configured. As shown in FIG. 1B, in this embodiment, a pulse receiver is configured using a detector 20 and an LA (Limiting Amplifier) 22 in place of the local oscillator 12 and the ADC 14. Yes. Note that LA is also called a limiting amplifier.

Details of the Detector and LA FIG. 2B shows a detailed configuration diagram of the pulse receiver 30 in which the detector 20 and the LA (Limiting Amplifier) 22 are described in detail.

  FIG. 2 (a) shows an example of a circuit (prior art) for detecting an optical signal. In optical communication, data is generally represented by the presence or absence of light, and the phase is not seen. Although light is an electromagnetic wave similar to a radio wave, its wavelength is extremely short, so it is difficult to see the phase and the like, and data communication is generally performed with or without a wave (with or without amplitude).

  The method proposed in the present embodiment also performs transmission / reception by representing data only by amplitude. Data restoration, etc. is performed in principle by a method similar to the method of representing data by the “amplitude” of optical communication. As a result of earnest research, the inventors of the present application have considered.

  As a result of the research, a configuration of a pulse receiver that can be used in a so-called millimeter wave band of 60 GHz band has been invented, and a block diagram of the configuration is shown in FIG.

  Although FIG. 1B shows an example using an LNA (Low Noise Amplifier), in principle, as shown in FIG. 2B, a received signal is directly transmitted without going through this LNA. Are input to a pulse receiver composed of a detector 20 and an LA 22.

  The detector 20 is configured using NLA as shown in FIG. This NLA is a non-linear amplifier and is called a non-linear amplifier in the claims. A characteristic of this embodiment is that detection is performed using a non-linear amplifier. In particular, in this embodiment, amplification is performed using a non-linear region in an NMOSFET operating curve as will be described later. The example to perform is adopted.

  The LA 22 employs a configuration in which five-stage amplifiers are connected in cascade, and is an amplifier circuit configured to swing an output signal with a substantially maximum amplitude. As a result, the output signal swings at the maximum amplitude, forming a so-called baseband signal.

  In the present embodiment, an example of five stages is shown, but the circuit is not limited to “5”, and any circuit may be used as long as it can be shaken with almost the maximum amplitude.

  Further, as shown in FIG. 2B, the pulse receiver 30 includes a DC offset canceller 24 and a buffer 26. The DC offset canceller 24 is a circuit that cancels the DC offset included in the received signal, and plays an important role in this method that represents data by the presence or absence (amplitude) of a pulse. The buffer 26 is a buffer circuit for outputting data to the outside.

Millimeter wave detection Conventionally, for detection of millimeter wave radio waves such as the 60 GHz band, MIIM diodes (Metal-Insulator-Insulator-Metal) (Non-Patent Document 5) and Schottky diodes (Non-Patent Document 6) are used. Was used.

  However, in order to construct the MIIM diode, a special CMOS process is required, which may increase the cost of the receiver. The MIIM diode uses a so-called compound semiconductor and is difficult to use as it is in a standard CMOS process. In order to realize low power consumption, it is desirable that a CMOS process, which is a typical low power consumption process, can be used as it is.

  In addition, it is difficult to configure a Schottky diode by a general integrated circuit semiconductor process.

Square detection In order to solve such a problem and configure a pulse receiver by a general CMOS process that can be expected to have low power consumption, an NMOSFET is used in the present embodiment. In this NMOSFET grounded source amplifier circuit, square detection is performed by utilizing a square law relationship with respect to the input gate voltage.

  A common source circuit that performs such square detection is a suitable example of the NLA 20.

In the NLA 20 configured as described above, the applied gate voltage Vg is:
The offset voltage is appropriately set so that the millimeter wave pulse group can be detected efficiently. As the output signal of the NLA 20, a so-called baseband signal of a digital signal is obtained. This is shown in FIG.

  FIG. 3 shows an example in which an NMOSFET transistor is used in a source grounded circuit, and a graph of an input voltage Vin (horizontal axis) and an output voltage Vout (vertical axis) in this circuit example is shown. This graph shows a so-called operation curve (operation curve).

  As shown in FIG. 3, the relationship (graph) between the input voltage Vin (horizontal axis) and the output voltage Vout (vertical axis) is saturated and the output voltage Vout approaches the upper and lower limits. And an area that exists.

  What is characteristic in the present embodiment is that a so-called operating point is set near the boundary between the linear (proportional) region and the saturated region. In other words, an offset of the gate potential is set at a portion where the curvature is greatest at the boundary between the saturated region and the linear region.

  As a result, so-called square detection can be performed substantially, and a so-called baseband signal of a digital signal can be obtained directly by providing a predetermined capacitor on the output voltage Vout (vertical axis). This situation is schematically shown in FIG.

  In this way, by setting the operating point at a portion where the curvature of the operating curve is large, an NLA (Nonlinear Amplifier) 22 can be easily configured.

  In particular, since an NMOSFET of a CMOS process can be used, it is possible to receive millimeter wave radio waves while using a general CMOS process that can be expected to have low power consumption. As a result, a pulse receiving circuit with lower power consumption can be obtained. In addition, since the circuit configuration is simplified, a smaller receiving circuit can be provided.

  In addition, the example which sets the point with a large curvature as what is called a bias point was shown. However, in practice, it is often convenient to actually obtain the value of the second derivative of the operating curve and set the point where the value is the maximum as the bias point when actually constructing the receiving apparatus. In other words, this is the point where the second-order nonlinearity is maximized, and is the same in principle as the point having a large curvature.

  In FIG. 3, the gate bias voltage is lowered as compared with the case of performing general linear amplification, and the operating point is moved to the bottom of the operation curve to generate nonlinearity. Even if it is increased, it is theoretically possible to shift the operating point from the linear amplification region to the nonlinear amplification region. However, if the gate bias voltage is increased, the drain current increases and the power consumption increases, which is contrary to the gist of the present invention to construct a low power consumption receiver. Therefore, in practice, it is preferable to lower the gate bias voltage, shift the operating point, and place the operating point in the non-linear region.

  Now, as shown in FIG. 3, if square detection is performed in the non-linear region, the baseband signal of the digital signal that is the original signal, the frequency component twice the carrier wave, and the DC component (close baseband signal) are obtained. Since it appears in the output, a desired baseband signal can be obtained by removing twice the frequency component with a filter or the like. Of course, it is preferable to use a capacitor or the like for this filter, but it is also preferable to use an input capacitor at the gate of the next stage FET. Examples of the next stage include a limiting amplifier (LA) described later. The inventors of the present application constructed and created a pulse receiving circuit that uses the input capacitor in the next stage, measured its performance, and obtained good results. Specific results will be described in the following examples and the second embodiment.

  The inventor of the present application configured a pulse receiving circuit based on the above-described principle by using a general CMOS process of the 90 nm rule. The photomicrograph is shown in FIG.

  A 60 GHz continuous signal (constant-wave) was modulated with a predetermined signal (switched) and input to the configured pulse receiving circuit. As described above, in the present embodiment, since data is represented by the presence / absence (amplitude) of the pulse group, the modulation is an operation of switching (ON / OFF) based on predetermined data.

  A digital baseband signal can be obtained by removing the 60 GHz fundamental wave and the 120 GHz second harmonic by filtering from the output obtained by inputting the pulse train of 60 GHz obtained by this switching to the NLA 20. In the explanatory diagram of FIG. 3, this filtering is described as a capacitor connected to the drain which is the output terminal, and this capacitor performs the filtering operation.

  In the embodiment of FIG. 4, a subsequent amplification stage is further provided at the drain end of the NLA 20, and the input capacitor of this amplification stage performs the operation (filtering) of the filter to obtain a baseband signal. Yes.

  In this embodiment, the power is measured with a millimeter wave wattmeter before the pulse group is input to the pulse receiving circuit. The 60 GHz pulse group and demodulated digital data are shown in the graph of FIG. In FIG. 5, the digital data has a bit rate of 2 Gbps.

  In FIG. 5, the 60 GHz pulse group is a pulse group applied to Vin in FIGS. 2, 3, and 4. The output signal of the receiving circuit is a signal obtained from the VM terminal of FIGS. 2, 3, and 4, but is an inverted output for the convenience of the circuit. The output signal expressed as binary data “1” and “0” is displayed superimposed on the graph.

Furthermore, in the present embodiment, a so-called eye diagram and a bit error rate are obtained for 2 31 −1 bit pseudorandom data. The eye diagram is shown in FIG. 6A is an eye diagram in the case of 1 Gbps, and FIG. 6B is a diagram in the case of 2 Gbps. In each case, the “eyes” were clearly opened and the output signal was observed to be 313 mV peak-to-peak.

  In addition, the relationship between the average pulse power and the error bit rate was measured. The result is shown in the graph of FIG. In this graph, examples of 1 Gbps and 2 Gbps are shown. The vertical axis of this graph is the bit error rate (BER), and the horizontal axis is the average pulse power (60 GHz) (dBm). In this graph, it will be understood that the theoretical BER curve (curve in the graph) when square detection is used and the actual measured value agree very well. Note that the measured value of 1 Gbps is indicated by ● in FIG. 7, and the measured value of 2 Gbps is indicated by ■ in FIG.

  According to the square detection method employed in the present embodiment, the BER of the pulse receiving circuit decreases more rapidly as the input power increases. This is particularly the case with linear detection.

  It should be noted that the signal-to-noise ratio of the output signal of the NLA 20 is twice that of the input signal of the LNA 20 due to the square detection, so that the request for the noise figure of the LNA 20 of 60 GHz is relaxed.

Examination of power consumption The total power consumption in this example including the power consumption of the buffer 26 was 19.2 mW. In order to compare the performance with other optical receivers, a performance index (fOM) is defined as G · DR / PDC. Here, G is a power gain, DR is a data rate, and PDC is power consumption. FIG. 8 shows a graph in which the product of G and DR is plotted against PDC. Here, FOM is represented by the slope of the graph. As shown in this graph, the FOM of the pulse receiver of the present example gave better results than other optical receivers. In FIG. 8, □ indicates the value of the pulse receiver of this embodiment, and the other ■ indicates the values of various optical receivers reported so far. In FIG. 8, [3] [4] [6] [7] [8] [9] [10] [11] [12] and the like represent Non-Patent Documents 3 to 12, respectively.

  FIG. 9 shows the result of comparing the pulse receiving circuit of this embodiment with various receiving circuits reported so far. FIG. 9 shows a comparison table between the pulse receiving circuit of this embodiment and various improved receiving circuits announced in recent years. Here, as an improved example, the circuits described in Non-Patent Literature 1, Non-Patent Literature 2, Non-Patent Literature 15, Non-Patent Literature 16, and Non-Patent Literature 17 are taken up and described in this embodiment. Compare with pulse receiver. In this table, the respective power consumption and functional blocks omitted in comparison with the conventional circuit (not improved) (FIG. 1A) are shown. As described above, the pulse receiving circuit of the present embodiment has significantly reduced power consumption as compared with various improved receiving circuits reported so far, and the power consumption is only 19.2 mW. Final digital data “0” and “1” are obtained.

Summary As described above, the first embodiment has described the low power consumption pulse receiver. This pulse receiver can perform communication exceeding 1 Gbps with respect to a radio wave band of 60 GHz band. In particular, it has been proposed that the pulse receiver described in the present embodiment uses a nonlinear amplifier using an NMOSFET. Since this NMOSFET can use the NMOSFET included in the CMOS process, a receiver can be configured using a CMOS process with low power consumption, and lower power consumption can be realized.

  In particular, in the above embodiment, a pulse receiver was actually created using a 90 nm CMOS process, its performance was measured, and it was confirmed that the power consumption was low. For example, it was confirmed that the power consumption was 19.2 mW at a data rate of 2 Gbps. This value is smaller than the various optical receivers reported so far.

  The pulse receiver described in this embodiment has a very important meaning that suggests a new possibility of performing wireless communication at a data rate exceeding 1 Gbps with lower power consumption in the 60 GHz band.

Second Embodiment Detailed Examination of NLA Operation In this second embodiment, the results of a more detailed examination of the above-described NLA 20 will be described.

  As described above, in the first embodiment, detection is performed using a source-grounded NMOSFET circuit and using a relationship that results in square detection between the gate voltage and the drain current of the circuit. explained. That is, as a result, the non-linear amplifier (NLA) can be configured using the CMOS process (using the NMOSFET therein).

  Hereinafter, this NLA will be described in detail.

60 GHz band As described above, the 60 GHz band has attracted attention as a band for performing high-speed data communication exceeding 1 Gbps in a short distance (Non-patent Document 18). In this patent, it is shown in Embodiment 1 that communication can be performed with low power consumption, and the circuit diagram is as shown in FIG. The state of input / output signals when 2 Gbps data is received by a pulse receiver configured by a CMOS process for the 60 GHz band is as shown in FIG.

A 60 GHz signal modulated by ON-OFF modulation (OOK), amplitude modulation (ASK), or the like is received by an antenna, amplified by an LNA (FIG. 1B), and then input by the detector 20. The envelope (envelope) of the detected signal is detected. LA (Limiting Amplifier)
22 converts (shapes) the detected signal into a digital signal, and drives the subsequent CMOS circuit (see FIG. 1B). The LNA itself may be omitted. In FIG. 2, the received signal is directly supplied to the detector 20 (NLA 20).

Detector (NLA)
In the pulse reception circuit described so far, one of the most important functional blocks is the detector 20 (NLA 20).

  FIG. 3 shows circuit examples of various detectors that have been proposed in the world.

  FIG. 10A shows a circuit example using a single-ended MESFET 50. The circuit example using the MESFET is a circuit that has been widely used in millimeter wave detection (Non-Patent Document 19). However, it is difficult to integrate this circuit on a common silicon substrate with a receiving circuit that is a digital circuit composed of a CMOS circuit. That is, a process different from the CMOS process is required, and it cannot be configured with one chip, resulting in a complicated manufacturing process. Under such circumstances, a complete receiving circuit using MESFET needs a large area.

  Recently, a detection circuit using a diode has been used instead of the circuit using this MESFET. A detection circuit using this diode 60 is shown in FIG.

  As shown in FIG. 10B, capacitors 62 a and 62 b for blocking the DC component are provided across the circuit of the diode 60, and envelope detection is performed by passing through the low-pass filter 64. Can be done. Such a technique is described in Non-Patent Document 20, for example.

  Recently, a MIIM (Metal-Insulator-Insulator-Metal) diode (Non-Patent Document 5) and a Schottky diode are formed on a silicon substrate while using a general-purpose CMOS process as a basis (Non-Patent Document 6). It has been proposed to detect signals in the 60 GHz band. MIIM diodes are formed using a special process, while Schottky diodes are formed by a process that is not available under general design rules.

  Therefore, in order to solve this problem, the fact that there is a square detection relationship between the gate voltage and the drain current of the NMOSFET, and the use of the NMOSFET source grounded amplifier circuit as a detection circuit, Invented by the present inventor. This is as already described in the first embodiment. This circuit diagram is shown in FIG.

  In the second embodiment, the possibility of using a non-linear amplifier (NLA) composed of this common-source circuit as a millimeter wave detector will be discussed.

Principle of Operation as Nonlinear Amplifier The circuit diagram of the NLA (nonlinear amplifier) proposed in the second embodiment is almost the same as that of a normal source grounding circuit and is shown in FIG. In common source circuits, nonlinearity is often not a desirable property. Therefore, in a general application, a (gate) bias is set in an amplifier of a common source circuit so that the amplification characteristic exhibits linearity. This is shown in FIG. 11 (a).

In order to realize a large non-linearity, it is necessary to lower the gate bias voltage Vbias bias so that the operating point is in the non-linear region as shown in FIG. In such a bias state, the envelope of the pulse is detected.

  Because of this non-linearity, as shown in FIG. 11B, a DC-like shift of the drain current occurs, and the baseband signal of the digital data can be restored (square detection).

  The shift amount of the drain current is expressed as a second-order differential term in the amplification factor expression for a small signal. In the case of a common source amplifier, the relational expression between the small signal input voltage and the output current is expressed by the following expression.

Where i D is the drain current and g m
Transconductance
It is. G m2
Is the second derivative of the drain current with respect to the gate voltage
Is defined as

Input signal
Assuming that the sine signal has an amplitude A and an angular frequency ω 0 expressed by the following equation, the drain current id is composed of three terms. The three terms are a baseband signal, a fundamental frequency signal, and a second harmonic signal. Specifically, it is expressed as the following equation.

Among these, in particular, the baseband term represents the detection characteristic of an NLA (nonlinear amplifier). This characteristic is related to the product of the mutual conductance g m2 and the square of the amplitude A of the input signal.

That is, due to the presence of the output capacitance, the harmonic component of the fundamental frequency of 60 GHz, the double harmonic component term of 120 GHz, and the like are removed by filtering. Therefore, only the shift Δi D of the drain current that is the baseband signal appears in the output signal of the NLA 20. as a result,
Is obtained.

Baseband signal voltage V out of the output, the drain current shift .DELTA.i D dove, because it is the product of the output impedance R D, is expressed by the following equation.

Measurement results and study In order to better understand the non-linear characteristics of the NMOSFET, an NLA (non-linear amplifier) was actually designed and created by a general CMOS process of the 90 nm rule. The core size of the produced NLA is 8 μm × 30 μm. The performance of the prepared NLA was measured.

  In the measurement, first, a SPST (single pole single throw) CMOS switch of 80 GHz from DC was created by a traveling wave technique, and a pulse transmitter was created (Non-patent Document 7). Using this transmitter, a 60 GHz signal modulated (ON / OFF) with a predetermined pattern was created and supplied to the pulse receiver.

  An overall view of the measurement is shown in FIG. A 60 GHz continuous wave signal was input to the CMOS switch 70 and modulated (ON / OFF) with a pattern output by the pattern generator 72 to create an input pulse train. The 60 GHz power distributor 74 is used to observe the input signal and supply the input signal to the pulse receiving circuit. The input signal was observed using an input monitor device 76 equipped with a digital oscilloscope or the like. By using a digital oscilloscope or the like, it is possible to observe the transient response of the output signal. Similarly, the output signal is observed using an output monitor device 82 equipped with a digital oscilloscope or the like. In FIG. 12, the input monitor device 76 and the output monitor device 82 are configured separately, but it is also preferable to use one measurement system as both monitor devices.

  Bias at the input and output was performed using bias T circuits 78a and 78b outside the chip. Therefore, the DC characteristic is measured in the presence of the millimeter wave signal.

Measurement of static characteristics First, the static characteristics of NLA80 were measured. The measurement of static characteristics is done in two steps.

First, the 60 GHz signal source is initially turned off (FIG. 13A), and the drain current ID0 is measured in this state. Next, the 60 GHz signal source is turned on (FIG. 13B), and the drain current ID is measured again in the presence of the 60 GHz signal. Note that the input signal is a 60 GHz constant wave signal.

The drain current shift amount ΔI D (this value represents static performance) can be obtained by subtracting the drain current I D0 from the drain current ID described above. Actually plotting the shift amount [Delta] I D of measured drain current, graph showing by broken lines shown in FIG. 14. In this graph, the input power is -19.2 dBm.

With (3) of the "Number 7", calculated by simulating the [Delta] I D, superimposed with dashed lines shown in FIG. 14 (measured value), displaying the simulation value in the "solid line". In this simulation, gm 2 used a device model provided by a manufacturing factory. The amplitude A of the input signal was obtained by fitting.

  The maximum response was observed in the middle portion (center portion) in the inverting amplification area of the NMOSFET. This was the same for both actual measurement values and simulation values (see FIG. 14).

Measurement of dynamic characteristics Next, the 60 GHz pulse response of NLA80 was measured. In this measurement, a signal obtained by modulating a continuous wave signal of 60 GHz based on a predetermined pattern signal generated by the pattern generator was used.

  The state of this measurement is shown in FIG. As shown in this figure, the input 60 GHz pulse train and the output digital baseband signal are simultaneously observed by the input monitor device 76 and the output monitor device 82, respectively. An example of the observation result is shown in FIG. FIG. 16A shows a so-called oscilloscope screen of the input signal. The vertical scale (voltage) is 20 mV / div, and the horizontal scale (time) is 0.5 μs / div. As shown in FIG. 16A, in the input signal, pulses of 1 μs width and no-signal portions of 1 μs appear alternately to form a pulse train having a period of 2 μs. The peak-to-peak voltage of this pulse train was approximately 90 mV (see FIG. 16A).

  On the other hand, as shown in FIG. 16B, the output signal is a rectangular wave having a period of 2 μs with a duty ratio of about 50%, and a so-called baseband signal of a digital signal is observed. In FIG. 16B, the vertical scale (voltage) is 5 mV / div, and the horizontal scale (time) is 0.5 μs / div. The peak-to-peak voltage of this output signal (baseband signal) was approximately 12.8 mV (see FIG. 16B).

  Now, the gate bias voltage is selected so that the NLA 80 operates in a region that exhibits a maximum current response. After selecting the gate bias voltage in this way, the magnitude of the final output voltage with respect to the input RF power was measured. The result is shown in FIG. In the graph of FIG. 17, the horizontal axis represents the value of 60 GHz input RF power (μW), and the vertical axis represents the final output voltage (mV) in FIG.

  As shown in FIG. 17, the output voltage is proportional to the supplied 60 GHz peak pulse power, and the output voltage increases linearly with an increase in 60 GHz peak pulse power.

  The voltage response is defined as the ratio of the output voltage to the input millimeter wave peak pulse power. In this example, this voltage response was measured as 1110 mV / mW. This value was compared with MIIM diodes (Non-patent Document 20) and MESFETs (Non-patent Document 19) formed by a CMOS process. The result is shown in FIG. FIG. 18 shows a table for comparing these values.

  The voltage response in the 60 GHz band of the NLA 80 proposed in the present embodiment is about 20% to 39% higher than the detection response of the above-described MIIM diode (Non-Patent Document 20) or MESFET (Non-Patent Document 19). (See FIG. 18).

  To investigate the optimal gate bias, current and voltage responses as a function of gate bias were measured and compared. At this time, the input peak pulse power is -19.2 mW. The measurement / comparison results are shown in FIG. In FIG. 19, the horizontal axis represents the gate bias voltage VGS. The vertical axis represents voltage response (mV / mW) and current response (mA / mW). In FIG. 19, the points plotted with ▪ are voltage responses, and the points plotted with ▲ are current responses. As shown in this figure, the gate bias voltage indicating the maximum voltage response is slightly lower than the gate bias voltage indicating the maximum current and the like. This is because the output impedance in the saturation region of the NMOSFET increases as the gate bias voltage decreases. In order to obtain the maximum voltage response, it has been found that the gate bias voltage is preferably a little lower than the bias point at which gm2 is maximum.

Summary As described above, it has been proposed to use an NLA (Non-linear Amplifier) composed of an NMOSFET in a millimeter wave band of 60 GHz band, and the detection characteristics thereof have been described.

  The inventors of the present application designed and manufactured an NLA using a standard 90 nm CMOS process with a core size of 8 μm × 30 μm and a power consumption of 840 μW.

  As described above, the proposed NLA showed a voltage response of 1110 mV / mW in the 60 GHz band. These values are 20% and 39% higher than the conventionally proposed MIIM diode and MESFET detection circuits, respectively.

Thus, the NLA described in this patent is a promising device that satisfies the following conditions. That is,
-Communication at a data rate exceeding 1 Gbps can be performed.

・ Inexpensive.
Can be perfectly compatible with CMOS process.
・ Compact 60GHz band reception system can be constructed.
Other Modifications As described above, in this embodiment, a pulse receiver that performs detection using a nonlinear amplifier has been described. Although an example in which the nonlinear amplifier is configured using NMOSFETs has been shown, it is of course preferable to configure the nonlinear amplifier using other elements. For example, other types of transistors may be used.

  In particular, when an NMOSFET is used, it can be applied to a manufacturing process using a CMOS process as it is, so that the manufacturing process is not complicated and a pulse receiving apparatus can be configured at a low cost. In particular, the CMOS process is a process for constructing a typical low-power-consumption CMOS circuit, and an even lower-power-consumption pulse receiver can be constructed.

As described above, the present embodiment describes and proposes a pulse receiving circuit having a new configuration. A pulse receiving device including this circuit configuration is naturally included in the technical scope of the present invention.

  Therefore, in the claims, both the receiving circuit and the receiving device are collectively referred to as “receiving device”. That is, the “reception device” in the claims is a term representing both the reception circuit described in this patent and the entire reception device including the reception circuit.

It is the general block diagram of the conventional receiver, and the block diagram of the receiver proposed by this Embodiment. It is the detailed block diagram of the pulse receiver which described the example of the circuit which detects the conventional optical signal, and the detector and LA (Limiting Amplifier) in detail. It is explanatory drawing which shows a mode that the output signal of NLA turns into what is called a baseband signal of a digital signal. It is a microscope picture at the time of comprising the pulse receiving circuit by the principle of this invention using the general CMOS process of a 90 nm rule. It is a graph showing the pulse group of 60 GHz which is an input signal, and the demodulated digital data. It is the eye diagram calculated | required with respect to 2 31 -1 bit pseudorandom data, Comprising: It is a diagram which shows the case (a) of 1 Gbps, and the case (b) of 2 Gbps. It is a graph showing the relationship between average pulse power and error bit rate. It is a graph which shows the performance parameter | index (figure of merit: FOM) of a pulse receiving circuit. It is the table | surface which compared the pulse receiving circuit of a present Example with the various improved receiving circuits announced in recent years. This is a conventional millimeter wave detection circuit using a single-ended MESFET 50. It is explanatory drawing explaining that the amplification characteristic of a common source circuit will show nonlinearity instead of linearity by the setting of a gate bias. It is a measurement circuit diagram for measuring the performance of the created NLA (nonlinear amplifier). It is explanatory drawing which shows a mode that a switch is turned ON and OFF in order to measure the static characteristic of the produced NLA (nonlinear amplifier). Plot the shift amount [Delta] I D of the measured drain current is a graph showing in broken lines. In order to measure the pulse response (dynamic characteristics) of NLA 60 GHz, a signal obtained by modulating a 60 GHz continuous wave signal based on a signal of a predetermined pattern generated by the pattern generator is applied to the pulse receiving circuit and measured. It is explanatory drawing which shows a mode to do. It is explanatory drawing which shows the screen of the oscilloscope showing the measurement result of the dynamic characteristic of NLA. It is a graph showing the result of having measured the magnitude | size of the final output voltage with respect to the input RF power. It is a table | surface showing the result of having compared the voltage response of the pulse receiving circuit created in this Embodiment with the circuit of the MIIM diode (nonpatent literature 20) formed by the CMOS process, and MESFET (nonpatent literature 19). It is a graph showing the result of having measured the current response and voltage response as a function of gate bias.

Explanation of symbols

10 Mixer 12 Local transmitter 14 ADC
16 DMOD
20 Detector (NLA)
22 LA (Limiting Amplifier)
24 DC offset canceller 26 Buffer 30 Pulse receiver 60 Diode 62a, 62b Capacitor 64 Low pass filter 70 CMOS switch 72 Pattern generator 74 Power distributor 76 Input monitor device 80 NLA
82 Output monitor device

Claims (10)

  1. In the receiving device that detects the received signal and outputs the original signal,
    A nonlinear amplifier for nonlinearly amplifying the received signal;
    A limiting amplifier for limiting and amplifying the output signal of the nonlinear amplifier;
    And the limiting amplifier outputs the original signal.
  2. In the receiving device that detects the received signal and outputs the original signal,
    A nonlinear amplifier for nonlinearly amplifying the received signal;
    Filter means for removing a frequency component twice the carrier wave of the received signal from the output signal of the nonlinear amplifier;
    A receiving apparatus comprising:
  3. The receiving device according to claim 1,
    Filter means for removing a frequency component twice the carrier wave of the received signal from the output signal of the nonlinear amplifier;
    And the output signal of the filter means is supplied to the limiting amplifier.
  4. In the receiving device according to claim 1 or 3,
    The non-linear amplifier is an amplifying circuit composed of transistors, and is an amplifying circuit in which a bias is set so as to perform an amplifying operation in a non-linear region.
  5. The receiving device according to claim 4,
    The non-linear amplifier is an NMOSFET common-source amplifier circuit.
  6. The receiving device according to claim 5,
    In the non-linear amplifier, the bias voltage of the gate of the NMOSFET is set lower than when the NMOSFET performs amplification in a linear region, and amplification is performed in the non-linear portion of the operation curve of the NMOSFET.
  7. The receiving device according to claim 6,
    The receiving apparatus according to claim 1, wherein the bias voltage is set at a point where the curvature of the operation curve becomes maximum.
  8. The receiving device according to claim 6,
    The receiving apparatus according to claim 1, wherein the bias voltage is set to a point at which a second-order differential value of the operation curve is maximized.
  9. In the receiving device according to any one of claims 1 and 3 to 8,
    Means for canceling the DC offset of the output signal of the limiting amplifier;
    A receiving apparatus comprising:
  10. The receiving device according to claim 2,
    Means for canceling the DC offset of the output signal of the filter means;
    A receiving apparatus comprising:
JP2008157295A 2008-06-16 2008-06-16 Receiving apparatus Pending JP2009303084A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011199614A (en) * 2010-03-19 2011-10-06 Hiroshima Univ Wireless transmission system, and wireless transmitter, wireless receiver, wireless transmission method, wireless reception method and wireless communication method used for the same

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011199614A (en) * 2010-03-19 2011-10-06 Hiroshima Univ Wireless transmission system, and wireless transmitter, wireless receiver, wireless transmission method, wireless reception method and wireless communication method used for the same
US8976846B2 (en) 2010-03-19 2015-03-10 Silicon Library Inc. Wireless transmission system and wireless transmitter, wireless receiver, wireless transmission method, wireless reception method and wireless communication method used with same

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