JP2009284181A - Solid-state imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide image data having a wide dynamic range as a whole, by preventing the decline of the upper limit value of a dynamic range due to the arrangement of an amplifier to an ADC preceding stage while increasing sensitivity in a low illuminance area by the amplifier in the ADC preceding stage, in a solid-state imaging apparatus utilizing the technique of a plurality of exposures. <P>SOLUTION: In the solid-state imaging apparatus, a variable gain amplification part 25 is arranged in the preceding stage of a column ADC part 30; the gain of the variable gain amplification part 25 is turned to the gain α larger than 1 when supplying analog pixel signals obtained by long-time exposure via the variable gain amplifying part 25 to the column ADC part 30; and the gain of the variable gain amplifying part 25 is returned to 1, when the analog pixel signals obtained by short-time exposure is supplied via the variable gain amplification part 25 to the column ADC part 30. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device that extracts and outputs an electrical signal corresponding to the amount of received light from a plurality of pixels arranged in a matrix, and particularly has a function of synthesizing image data having a wide dynamic range by a plurality of exposures. The present invention relates to a solid-state imaging device including

  As is well known, in a solid-state imaging device such as a CMOS solid-state imaging device, each pixel forming a matrix is sequentially driven, and a pixel signal is read from each pixel. In the most basic configuration, the operation of reading out the analog pixel signal from all the pixels is repeated every frame (vertical scanning period) having a fixed time length. In such a configuration, focusing on one pixel, one frame, which is a period from the previous reading of the analog pixel signal to the reading of the current analog pixel signal, is the exposure time, and the signal value of the analog pixel signal read this time is This reflects the amount of light received by the pixel within the exposure period.

  FIG. 6 shows a signal transmission system for one pixel in the solid-state imaging device. As shown in FIG. 6, an analog pixel signal read from one pixel 201 is converted into a digital pixel signal P by an ADC (Analog Digital Converter) 202. Then, in the image processing unit, image data for one screen is formed using the digital pixel signal P for all pixels obtained from the ADC 202, and this image data is recorded on a recording medium or displayed on a display device. .

  Image data obtained by imaging is data representing illuminance I of each part of an imaging surface (surface formed by a pixel matrix) that receives light from a subject in a solid-state imaging device. The illuminance range that can be expressed by the image data, that is, the dynamic range is affected by quantization noise of the ADC 202, exposure time at the time of imaging, and the like.

  First, the analog pixel signal obtained from the pixel 201 itself includes pixel noise Np such as light shot noise. When this analog pixel signal is A / D converted by the ADC 202, quantization noise Nad is generated. For this reason, the digital pixel signal P obtained from the ADC 202 includes noise Np + Nad. Hereinafter, for convenience, the level of the noise Np + Nad is referred to as a noise floor. In order for the digital pixel signal P to be able to express the height of the imaging surface illuminance I, it is necessary to at least exceed this noise floor. Therefore, the imaging surface illuminance I when the digital pixel signal value P is a value corresponding to the noise floor is the lower limit value of the dynamic range of the image data.

  FIG. 7 shows the relationship between the imaging surface illuminance I and the digital pixel signal value P. As shown in FIG. 7, the analog pixel signal value obtained from the pixel 201 becomes larger depending on the imaging surface illuminance I, but this analog pixel signal value reaches the maximum value of the analog voltage that can be A / D converted. Then, the digital pixel signal value P obtained from the ADC 202 reaches a certain saturation value Psat. Even if the imaging surface illuminance I becomes higher than that and the analog pixel signal value increases, the digital pixel signal value P no longer changes, and the increase in the imaging surface illuminance I cannot be expressed. The imaging surface illuminance I when the digital pixel signal value P reaches the saturation value Psat is the upper limit value of the dynamic range of the image data.

  Here, the gradient of the digital pixel signal value P with respect to the imaging surface illuminance I depends on the exposure time, as shown in FIG. 8, the horizontal axis is replaced from the true number I to the logarithmic log (I) in FIG. 7, and the vertical axis is replaced from the true number P to the logarithmic log (P) in FIG. The relationship to I is shown. When both the horizontal axis and the vertical axis are logarithmic axes, the gradient of Log (P) with respect to Log (I) is always 45 degrees regardless of the exposure time. The change in the gradient of the digital pixel signal value P with respect to the imaging surface illuminance I in FIG. 7 is the horizontal axis of the straight line (Log (I) axis) indicating the relationship between Log (I) and Log (P) in FIG. Appears as a translation of direction.

  When the exposure time is shortened, the gradient of the digital pixel signal value P with respect to the imaging surface illuminance I decreases in FIG. 7, and in FIG. 8, the straight line indicating the relationship between Log (I) and Log (P) is Log (I). Move to the high-illuminance side along the axial direction. For this reason, the upper limit value and the lower limit value of the dynamic range of the image data are shifted to the high illuminance side in conjunction with each other. On the other hand, when the exposure time is increased, the gradient of the digital pixel signal value P with respect to the imaging surface illuminance I increases in FIG. 7, and in FIG. 8, the straight line indicating the relationship between Log (I) and Log (P) is Log ( I) Move to the low illuminance side along the axial direction. For this reason, the upper limit value and the lower limit value of the dynamic range of the image data are shifted to the low illuminance side in conjunction with each other.

In order to clearly capture an image of a low illuminance region, it is necessary to increase the sensitivity of the low illuminance region by lowering the lower limit value of the dynamic range by increasing the exposure time. However, it may be difficult to make the exposure time long enough to meet this requirement. Thus, as a means for enabling adjustment of the dynamic range regardless of adjustment of exposure time, a configuration in which a preamplifier 203 is disposed in front of the ADC 202 as shown in FIG. In this configuration, in the low illuminance region, the analog pixel signal that is the imaging result is a weak level signal, but this weak analog pixel signal is amplified by the preamplifier 203 to an analog pixel signal that exceeds the floor level and applied to the ADC 202. It is done. Therefore, the lower limit value of the dynamic range is lowered, and the sensitivity in the low illuminance region is improved.
JP 2002-27328 A

  The adjustment of the exposure time and the addition of the preamplifier described above have the effect of shifting the position of the dynamic range on the illuminance axis. Therefore, when taking an image, these technologies are used, and when the subject is dark, the dynamic range is positioned on the low illuminance side, and when the subject is bright, the dynamic range is positioned on the high illuminance side. It is possible to obtain. However, these techniques do not extend the dynamic range. Therefore, even if these technologies are used, image data with a wide dynamic range, that is, the brightness of the subject as a whole, and the subtle changes in brightness in the relatively dark area of the subject are accurately expressed. Image data cannot be obtained.

  As a technology that enables expansion of the dynamic range, a technology that performs multiple exposures with different exposure times and synthesizes image data with a wide dynamic range using a plurality of types of pixel signals obtained by each exposure (hereinafter, referred to as a “dynamic range”). For the sake of convenience, multiple exposures) have been proposed (see, for example, Patent Document 1).

  When configuring a solid-state imaging device using this multiple exposure technique, if it is difficult to set the longest exposure time among the multiple exposure times to a sufficient length, a preamplifier is placed in front of the ADC as a countermeasure. It is conceivable to adopt the configuration described above. However, when this configuration is employed, there is a problem that the arrangement of the preamplifier in the previous stage of the ADC reduces the effect of expanding the dynamic range of the image data.

  Hereinafter, this problem will be described with reference to FIGS. 10A to 10C, the horizontal axis represents the logarithmic value Log (I) of the imaging surface illuminance I, and the vertical axis represents the logarithmic value Log (P) of the digital pixel signal value P. The straight line p1 represents the relationship between Log (I) and Log (P) when imaged by long exposure, and the straight line p2 represents Log (I) and Log (P) when imaged by short exposure. ). N (1) represents the noise floor when the gain of the preamplifier 203 in the previous stage of the ADC 202 is 1, and N (α) represents the noise floor when the gain of the preamplifier is α (> 1). Yes.

  In the example shown in FIG. 10A, the gain of the preamplifier 203 is 1. In this example, when the imaging surface illuminance I becomes the threshold value Ith, the digital pixel signal value P obtained by the long exposure reaches the saturation value Psat. Therefore, in a low illuminance region where the imaging surface illuminance I is lower than the threshold value Ith and the digital pixel signal value P obtained by the long exposure is less than the saturation value Psat when each exposure is performed for a long time and a short time. The digital pixel signal value P (P on the straight line p1) obtained by the time exposure is used for the image data of the composite image. Also, in a high illuminance region where the imaging surface illuminance I is equal to or greater than the threshold value Ith and the digital pixel signal value P obtained by the long exposure reaches the saturation value Psat, the digital pixel signal value P (straight line) obtained by the short exposure. P) on p2 is used for the image data of the composite image. That is, in the double exposure shown in this example, the digital pixel signal value P of the thick line portion of the straight line p1 and the thick line portion of the straight line p2 is used for the image data of the composite image.

  In this example, the range from the noise floor N (1) to the saturation value Psat is the effective range d1 of the digital pixel signal value P. Further, the intersection of the straight line p1 and the noise floor N (1) is the lower limit value of the dynamic range due to long exposure, and the intersection of the straight line p2 and the saturation value Psat becomes the upper limit value of the dynamic range due to short exposure. A section from the lower limit value of the dynamic range by the long exposure to the upper limit value of the dynamic range by the short exposure becomes the dynamic range d2 of the image data of the composite image obtained by the long exposure and the short exposure.

In order to widen the dynamic range d2 of the image data of the composite image, it is desirable to increase the difference in height between the straight line p2 and the straight line p1 by shortening the exposure time for short exposure as much as possible. However, if this height difference is increased, the imaging surface illuminance I exceeds the threshold value Ith, and when the digital pixel signal value P used for the synthesis of the image data is switched from the one on the straight line p1 to the one on the straight line p2, the digital pixel signal value Since P is greatly reduced, the S / N ratio of the digital pixel signal P is greatly reduced. When the S / N ratio is significantly reduced, noise that gives a rough impression appears in the composite image. Therefore, in the vicinity where the imaging surface illuminance I exceeds the threshold value Ith, the S / N ratio snp2 of at least about 30 dB is ensured between the digital pixel signal value P and the noise floor N (1) for the short time exposure. The exposure time of exposure is determined. When the exposure time for the short exposure is determined in this way, the dynamic range d2 of the image data of the composite image obtained by the long exposure and the short exposure is expressed by the following equation.
d2 = 2 · d1-snp2 (1)

  Although it is required to increase the sensitivity in the low illuminance region, when it is difficult to increase the exposure time of the long exposure, the gain of the preamplifier 203 is set to α larger than 1 to cope with it. FIG. 10B shows the relationship between the imaging surface illuminance I and the digital pixel signal value P when only the gain of the preamplifier 203 is increased from 1 to α under the same conditions as in FIG. In this case, the straight line p1 (long-time exposure) and the straight line p2 (short-time exposure) indicating the relationship between Log (I) and Log (P) are the same as the Log (I) axis. In the direction, each is translated by Log (α) toward the low illuminance side.

However, as the gain of the preamplifier 203 increases from 1 to α, the noise floor increases from N (1) = Np + Nad to N (α) shown in the following equation.
N (α) = α · Np + Nad (2)
Due to the increase in the noise floor, the effective range of the digital pixel signal value P decreases from d1 shown in FIG. 10A to d1 ′ shown in FIG. 10B.

An increase in the noise floor affects the dynamic range. First, when the noise floor rises as the gain of the preamplifier 203 increases, the shift amount ΔI of the lower limit value of the dynamic range to the low illuminance side does not become Log (α). This is an amount reduced from (α) by an increase in the noise floor Log (N (α)) − Log (N (1)).
ΔI
= Log (α) − {Log (N (α)) − Log (N (1))} (3)

Here, the noise floor increase amount Log (N (α)) − Log (N (1)) is smaller than Log (α) as shown in the following equation, and therefore the shift amount ΔI of the above equation (3). Becomes a positive value. Therefore, the object of improving the sensitivity in the low illuminance region by shifting the lower limit value of the dynamic range to the low illuminance side can be achieved.
Log (N (α))-Log (N (1))
= Log (N (α) / N (1))
= Log ((α · Np + Nad) / (Np + Nad))
<Log ((α · Np + α · Nad) / (Np + Nad)) = Log (α) (4)

However, when the noise floor increases from N (1) to N (α), as shown in FIG. 10B, the short-time exposure digital pixel signal value P and the noise floor N (α) in the vicinity of the threshold value Ith The S / N ratio snp2 ′ during the period is a value that is smaller than the S / N ratio snp2 shown in FIG. For this reason, if no countermeasures are taken, there arises a problem that noise of rough impression appears in the composite image. In order to prevent such a problem from occurring, the exposure time of the short exposure is increased and the digital pixel signal value P and the noise floor N of the short exposure in the vicinity of the threshold value Ith as shown in FIG. It is necessary to ensure a sufficient S / N ratio snp2 of about 30 dB between (α). For this reason, the upper limit value of the dynamic range is further shifted from the one shown in FIG. Eventually, the dynamic range d2 when the gain of the preamplifier 203 is 1 is reduced to the dynamic range d2 ′ shown by the following equation when the gain of the preamplifier 203 is α.
d2 '
= 2 · d1′−snp2
= 2 {d1- (Log (N (α))-Log (N (1)))}-snp2
= 2 · d1-snp2-2 (Log (N (α))-Log (N (1)))
= D2-2 (Log (N (α)) − Log (N (1))) (5)

  As described above, in the solid-state imaging device using the multiple exposure technique, when the preamplifier is arranged in the front stage of the ADC, there is a problem that the arrangement of the preamplifier reduces the effect of expanding the dynamic range of the image data by the multiple exposure. It is.

  The present invention has been made in view of the circumstances described above, and in a solid-state imaging device using a technique of multiple exposure, the sensitivity in a low illuminance region is increased by the preamplifier in front of the ADC, and is caused by the arrangement of the preamplifier. An object of the present invention is to provide a solid-state imaging device capable of preventing the lowering of the upper limit value of the dynamic range and obtaining image data having a wide dynamic range as a whole.

  According to the present invention, a pixel matrix portion formed by arranging a plurality of pixels in a matrix, and each pixel of the pixel matrix portion is sequentially exposed at a plurality of types of exposure times, and an analog pixel signal as a result of each exposure Drive control means for performing reading, variable gain amplification means for amplifying an analog pixel signal read from the pixel matrix section, and A / A for converting the analog pixel signal amplified by the variable gain amplification means into a digital pixel signal. D conversion means, image processing means for synthesizing image data having a wide dynamic range from each digital pixel signal obtained from each analog pixel signal as a result of exposure at the plurality of types of exposure times, and the pixel matrix Means for adjusting the gain of the variable gain amplifying means in response to switching of the exposure time of a part, wherein the longest exposure time among the plurality of types of exposure time The gain when amplifying the analog pixel signal obtained by exposure at 1 is set to a first gain larger than 1, and the gain when amplifying the analog pixel signal obtained by exposure other than the longest exposure time is set to the first gain. Provided is a solid-state imaging device comprising gain adjusting means for setting a second gain smaller than the gain.

  According to this invention, the analog pixel signal obtained by exposure with the longest exposure time is amplified with the first gain larger than 1 and converted into a digital pixel signal. As the analog pixel signal is amplified by the first gain, the noise floor of the digital pixel signal increases, but the lower limit value of the dynamic range, which is the point where the digital pixel signal value exceeds the noise floor, decreases. On the other hand, an analog pixel signal obtained by exposure with an exposure time other than the longest is amplified with a second gain smaller than the first gain and converted into a digital pixel signal. Therefore, the noise floor of the digital pixel signal that is the exposure result with the non-longest exposure time is lower than the noise floor of the digital pixel signal that is the exposure result with the longest exposure time. Then, the length of the exposure time that is not the longest may be determined so that the digital pixel signal that is the exposure result at the exposure time that is not the longest with respect to this low noise floor has a sufficient S / N ratio. Therefore, it is not necessary to unnecessarily increase the length of the exposure time that is not the longest in order to avoid the noise floor, and it is possible to obtain a wide dynamic range while suppressing a decrease in the upper limit of the dynamic range.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
First, the relationship between the imaging surface illuminance I and the digital pixel signal value P in the solid-state imaging device according to the embodiment of the present invention will be described with reference to FIGS. The solid-state imaging device according to the present embodiment performs two exposures for a long time and a short time, and synthesizes image data having a wide dynamic range using a digital pixel signal value P as a result of each exposure. . 1A to 1C correspond to FIGS. 10A to 10C, respectively. In order to facilitate comparison with the prior art, FIGS. 1A and 1B have the same contents as FIGS. 10A and 10B.

  The features of this embodiment are shown in FIG. In the example shown in FIG. 10C, the gain of the preamplifier 203 is set to α (> 1) in both the long-time exposure and the short-time exposure. For this reason, the noise floor of the image data of the composite image is increased, and the S / N ratio snp2 of the lower limit value of the digital pixel signal that is used as the image data of the composite image among the digital pixel signals resulting from the short-time exposure is lowered. In order to recover the decrease in the S / N ratio snp2, the exposure time for short exposure was increased and the straight line p2 was shifted upward. When such a countermeasure is employed, there is a problem that the upper limit value of the dynamic range of the composite image is lowered. Therefore, in the present embodiment, during the short-time exposure period, the gain of the preamplifier 203 is returned from α to 1, and the noise floor is reduced from N (α) to N (1). Further, in order not to change the relationship (straight line p2) between the imaging surface illuminance I and the digital pixel signal value P in the short-time exposure, the time is short enough to offset the decrease in the gain of the preamplifier 203 from α to 1. Increase exposure time of exposure. Specifically, when the linearity of the relationship between the exposure time and the digital pixel signal value P when the imaging surface illuminance I is constant is good, the exposure time is reduced as the gain is decreased from α to 1. Is multiplied by α.

In this way, the lower limit value of the dynamic range of the image data of the composite image is the same as that shown in FIG. 10C, but the upper limit value of the dynamic range is higher than that shown in FIG. 10C. In the example shown in FIG. 10C, it is necessary to ensure a sufficient S / N ratio snp2 between the digital pixel signal P (straight line p2) in the short-time exposure and the noise floor N (α). In contrast, in the example of FIG. 1C, it is sufficient to secure a sufficient S / N ratio snp2 with the noise floor N (1). In the example shown in FIG. 1C, the dynamic range of the image data of the composite image becomes a dynamic range d2 ″ larger than the dynamic range d2 ′ in FIG. .
d2 ''
= D1 '+ (d1-snp2)
= D1- (Log (N (α))-Log (N (1))) + (d1-snp2)
= 2 · d1-snp2- (Log (N (α))-Log (N (1)))
= D2 ′ + (Log (N (α)) − Log (N (1)))> d2 ′ (6)

  FIG. 2 is a block diagram showing a configuration of a CMOS solid-state imaging device which is a specific example of the present embodiment. In this CMOS solid-state imaging device, the pixel matrix unit 10A is formed by arranging the pixels 10 in a matrix.

  FIG. 3 shows a configuration example of one pixel 10 in the pixel matrix unit 10A. As shown in FIG. 3, one pixel 10 includes a PD (Photo Diode) 101, a transfer transistor 102 that is a MOS transistor, a reset transistor 103, an amplification transistor 104, and a row selection transistor 105. It is comprised by. Each of these elements is formed on a p-type semiconductor substrate. In FIG. 3, the PD 101, the transfer transistor 102, and the reset transistor 103 are illustrated in cross-sectional structure, and the amplification transistor 104 and the row selection transistor 105 are illustrated using circuit symbols.

  In FIG. 3, a PD 101 is formed by forming a buried layer of low-concentration n-type impurities on a p-type semiconductor substrate, and is a photoelectric conversion element that generates a signal charge corresponding to the amount of received light. The transfer transistor 102 has a source connected to the PD 101 and a drain FD (Floating Diffusion) 102d. The transfer transistor 102 transfers the signal charge accumulated in the PD 101 to the FD 102d when a transfer pulse TXi is applied to the gate. The reset transistor 103 has a source connected to the power supply VDD and a drain FD102d. The reset transistor 103 resets the FD 102d to the potential of the power supply VDD when a reset pulse RTi is given to the gate. The amplification transistor 104 has a drain connected to the power supply VDD and a gate connected to the FD 102d. The row selection transistor 105 is interposed between the source of the amplification transistor 104 and the column signal line 11, and a row selection pulse SLi is given to the gate. The amplification transistor 104 and the row selection transistor 105 serve as a readout circuit that reads out a voltage corresponding to the electric charge accumulated in the FD 102d to the column signal line 11 when the row selection pulse SLi is applied.

  As shown in FIG. 3, a plurality of pixels 10 having the same configuration are connected to the column signal line 11, and a constant current source serving as a load of the amplification transistor 104 of each pixel P is connected (not shown). . Further, a CDS (Correlated Double Sampling) circuit is connected to each column signal line 11. The column CDS section 20 in FIG. 2 is an aggregate of CDS circuits provided for each column signal line 11. Each CDS circuit samples a voltage read to each column signal line 11 of the pixel matrix unit 10A at each timing when the sampling pulses φr and φs are supplied from the timing generator 50, detects a difference, and outputs an analog pixel signal respectively. Output.

  The variable gain amplifier 25 is an aggregate of variable gain amplifiers provided for each column of the pixels 10 in the pixel matrix unit 10A. Each variable gain amplifier corresponding to each column of pixels 10 serves as the preamplifier 203 in FIG. 9 described above, and amplifies and outputs an analog pixel signal output from each CDS circuit corresponding to each column. .

The column ADC unit 30 is an ADC (Analog to Digital) provided for each column of the pixels 10.
Converter). Each ADC corresponding to each column of pixels 10 converts an analog pixel signal output from each variable gain amplifier corresponding to each column into a digital pixel signal under the control of the timing generator 50. The horizontal scanning circuit 40 is a shift register having the same number of stages as the number of columns of the pixel matrix unit 10A. Under the control of the timing generator 50, the horizontal scanning circuit 40 repeats the operation of taking in one row of digital pixel signals output from the column ADC unit 30 and transferring them serially to the image processing unit 70 for each horizontal scanning period.

  The gain adjusting unit 26 sets the gain of each variable gain amplifier of the variable gain amplifying unit 25 to α (> 1) only during a period in which long exposure is performed under the control of the timing generator 50, and sets the gain to 1 during other periods. It is a circuit that performs the control.

  The vertical scanning circuit 60 is a circuit that generates a row selection pulse SLi, a reset pulse RTi, and a transfer pulse TXi for each row of the pixel matrix unit 10A under the control of the timing generator 50. The timing generator 50 is a circuit that generates signals for timing control of each part of the CMOS solid-state imaging device, such as the vertical scanning circuit 60, the column CDS unit 20, the column ADC unit 30, and the horizontal scanning circuit 40. In the present embodiment, the timing generator 50 and the vertical scanning circuit 60 sequentially select each row of the pixel matrix unit 10A for each horizontal scanning period, and output a row selection pulse SLi to each pixel 10 in the selected i-th row. At the same time, the reset pulse RTi and the transfer pulse TXi are sequentially output and function as drive control means for outputting the sampling pulses φr and φs at the respective timings before and after the transfer pulse TXi.

  Further, in the present embodiment, the timing generator 50 and the vertical scanning circuit 60 as the drive control means cause each pixel 10 of the pixel matrix unit 10A to sequentially perform long-time exposure and short-time exposure, It plays a role of reading out a pixel signal as a result of exposure. Here, the exposure time of the long exposure is a straight line in which the relationship between the imaging surface illuminance I of the pixel 10 and the digital pixel signal value P when the gain of the variable gain amplification unit 25 is α is shown in FIG. It is determined to be given by p1. Further, the exposure time of the short exposure is such that when the gain of the variable gain amplifier 25 is 1, the relationship between the imaging surface illuminance I of the pixel 10 and the digital pixel signal value P is a straight line p2 shown in FIG. It is prescribed to be given in.

The image processing unit 70 is a device that processes digital pixel signals supplied via the horizontal scanning circuit 40 and synthesizes image data for one screen for each frame. In the present embodiment, exposure is performed twice within one frame period, and two types of digital pixel signals, which are exposure results of long exposure and short exposure, are obtained for each pixel. The image processing unit 70 synthesizes image data having a wide dynamic range by using these digital pixel signals having different exposure times. More specifically, when the digital pixel signal value P, which is the result of the long-time exposure, is less than the saturation value Psat shown in FIG. Is used as the pixel value of the pixel 10 in the image data of the composite image. On the other hand, for a certain pixel 10, when the digital pixel signal value P as a result of long exposure reaches the saturation value Psat shown in FIG. 1C, the digital pixel signal value as a result of short exposure. A result obtained by multiplying P by a predetermined coefficient β is used as the pixel value of the pixel 10 in the image data of the composite image. Here, the coefficient β is set to a size such that the result obtained by multiplying the coefficient β by the straight line p2 in FIG. 1C becomes an extension line of the straight line p1 (a broken line in FIG. 1C). Specifically, the coefficient β is given by the following equation.
β = Psat / (N (1) · snp2)) (7)
The image data synthesized by the image processing unit 70 is displayed on a monitor (not shown) or recorded on a recording medium such as an HD (hard disk) (not shown).

  The U / I (user interface) unit 80 includes a display device such as a liquid crystal display panel and various operators such as push buttons. The U / I unit 80 displays various guidance information related to the operation of the CMOS solid-state imaging device, and plays a role of acquiring various information related to imaging conditions and the like from the user via the operation element. The control unit 90 is a device that controls each unit of the CMOS solid-state imaging device in accordance with an instruction from the user acquired via the U / I unit 80.

  FIG. 4 is a block diagram showing specific configurations of the timing generator 50 and the vertical scanning circuit 60. As shown in FIG. 4, the timing generator 50 includes a clock counter 52, a line counter 53, a pulse generator 55, and an enable pulse generator 56.

  The clock counter 52 and the line counter 53 perform a frame switching control and a horizontal scanning period switching control within the frame, and manage information indicating the current time. In the present embodiment, the frame is divided into a plurality of horizontal scanning periods. Each horizontal scanning period constituting one frame is specified by line numbers from 1 to n. Each horizontal scanning period has a time length in which an analog pixel signal for one row is read from the pixel matrix unit 10 </ b> A, digitized, and serially transferred to the image processing unit 70.

  In the present embodiment, the time of one horizontal scanning period is counted by counting clocks having a constant frequency. The clock counter 52 in FIG. 4 performs this clock counting. The count value of the clock counter 52 is used as information indicating the relative time within the horizontal scanning period.

  The clock counter 52 outputs the line clock φH every time it finishes counting the clocks for one horizontal scanning period. The line counter 53 counts this line clock φH. When the number of rows in the pixel matrix unit 10A is n, the line counter 53 initializes the count value every time n line clocks φH are counted. Therefore, the count value of the line counter 53 always indicates the line number of the current horizontal scanning period.

  The pulse generator 55 is a circuit that generates a reset pulse RTG and a transfer pulse TXG that are the basis of the reset pulse RTi and the transfer pulse TXi supplied to each row of the pixel matrix unit 10A. In addition to the reset pulse and the transfer pulse, the pulse generator 55 supplies sampling pulses φr and φs for causing the column CDS unit 20 to perform correlated double sampling, and the column ADC unit 30 applies A to the sampling pulse φr and φs. A sampling pulse for performing / D conversion and a shift clock for causing the horizontal scanning circuit 40 to perform serial transfer are generated. The control unit 90 gives information specifying the count value of the clock counter 52 corresponding to the timing of the rising edge and the falling edge of each pulse and the generation start timing of the shift clock to the pulse generator 55. The pulse generator 55 At the timing indicated by this information, each pulse is raised or lowered, or generation of a shift clock is started.

  The enable pulse generator 56 generates two types of enable pulses ENa and ENb having a pulse width for one horizontal scanning period. The enable pulse ENa is a pulse for instructing reading of a pixel signal. The enable pulse ENb is a pulse for instructing erasure of the accumulated charge in the PD 101 of the pixel 10. The control unit 90 instructs each line number of each horizontal scanning period for generating the enable pulses ENa and ENb in the frame to the enable pulse generator 56, and the enable pulse generator 56 Enable pulses ENa and ENb are generated in each numbered horizontal scanning period.

  The vertical scanning circuit 60 includes shift registers 61 and 62 each having the same number of stages as the number n of rows of the pixel matrix unit 10A, and AND-OR gates 63 and 64 provided for each row of the pixel matrix unit 10A. . The line clock φH output from the clock counter 52 of the timing generator 50 is applied to the clock terminals of the flip-flops forming the stages of the shift registers 61 and 62. The enable pulse ENa output from the enable pulse generator 56 is output to the first data input terminal of the shift register 61, and the enable pulse ENb output from the enable pulse generator 56 is output to the first data input terminal of the shift register 62. Given. The shift register 61 sequentially shifts the enable pulse ENa to the subsequent stage by the line clock φH, and the shift register 62 sequentially shifts the enable pulse ENb to the subsequent stage by the line clock φH.

  Each stage i (i = 1 to n) of the shift register 61 sends an enable pulse ENai (i = 1) to the AND-OR gates 63 and 64 corresponding to the i-th row of the pixel matrix unit 10A. ~ N). The enable pulse ENai is supplied to the AND-OR gates 63 and 64, and is also supplied as a row selection pulse SLi to each pixel 10 in the i-th row of the pixel matrix unit 10A. Each stage i (i = 1 to n) of the shift register 62 sends the enable pulse ENbi (i) to the AND-OR gates 63 and 64 corresponding to the i-th row of the pixel matrix unit 10A. = 1 to n).

  The AND-OR gate 63 corresponding to the i-th row of the pixel matrix unit 10A calculates the logical product of the enable pulse ENai and the reset pulse RTG and the logical product of the enable pulse ENbi and the reset pulse RTG, Is output as a reset pulse RTi. The AND-OR gate 64 corresponding to the i-th row of the pixel matrix unit 10A obtains a logical product of the enable pulse ENai and the transfer pulse TXG and a logical product of the enable pulse ENbi and the transfer pulse TXG, and performs a logical sum of both logical products. Is output as a transfer pulse TXi.

  While the enable pulse ENai is generated, the AND-OR gate 63 corresponding to the i-th row of the pixel matrix unit 10A selects the reset pulse RTG output from the pulse generator 55, and the AND-OR gate 64 transmits the transfer pulse TXG. Are supplied to the pixels 10 in the i-th row of the pixel matrix unit 10A as reset pulses RTi and transfer pulses TXi, respectively. The enable pulse ENai is supplied as a row selection pulse SLi to each pixel 10 in the i-th row of the pixel matrix unit 10A. Accordingly, in each pixel 10 in the i-th row of the pixel matrix unit 10A, the voltage of the FD 102d is read out to the column signal line 11, and the pixel signal is read out.

On the other hand, while the enable pulse ENbi is generated, the AND-OR gate 63 corresponding to the i-th row of the pixel matrix unit 10A selects the reset pulse RTG output from the pulse generator 55, and the AND-OR gate 64 performs the transfer. The pulse TXG is selected and supplied to each pixel 10 in the i-th row of the pixel matrix unit 10A as the reset pulse RTi and the transfer pulse TXi. In this case, the row selection pulse SLi is not supplied to each pixel 10 in the i-th row of the pixel matrix unit 10A. Therefore, in each pixel 10 in the i-th row of the pixel matrix portion 10A, the accumulated charge in the PD 101 is erased.
The above is the details of the configuration of the CMOS solid-state imaging device according to the present embodiment.

  Next, the operation of this embodiment will be described. When it is necessary to acquire image data having a wide dynamic range, in this embodiment, the exposure is performed twice as shown in FIG. 5A for each frame. That is, paying attention to one pixel 10 in the pixel matrix portion 10A, in this embodiment, the long exposure L and the short exposure S are sequentially performed in one frame.

  FIG. 5B illustrates a specific imaging sequence for performing such multiple exposure. In FIG. 5B, the stripes arranged in the vertical direction indicate a state of reading pixel signals and a state of erasing accumulated charges in each row of the pixel matrix portion 10A.

  More specifically, in each horizontal scanning period labeled R in FIG. 5B (hereinafter, horizontal scanning period R), as shown in FIG. 5C, the row selection pulse SLi is set to the active level. During this time, the reset pulse RTi and the transfer pulse TXi are sequentially generated, and the sampling clocks φr and φs are supplied to the column CDS unit 20 at each timing before and after the transfer pulse TXi, and the analog pixels in the i-th row of the pixel matrix unit 10A. A signal is read out. Further, although not shown, conversion of the analog pixel signal into a digital pixel signal by the column ADC unit 30 and serial transfer of the digital pixel signal to the image processing unit 70 by the horizontal scanning circuit 40 are performed.

  In each horizontal scanning period labeled r in FIG. 5B (hereinafter, horizontal scanning period r), as shown in FIG. 5D, the row selection pulse SLi is set to an inactive level and reset. A pulse RTi and a transfer pulse TXi are sequentially generated. During this horizontal scanning period, the pixel signal is not read, and only the charge accumulated in the PD 101 in each pixel 10 in the i-th row of the pixel matrix unit 10A is erased.

  Focusing on one row, in a certain frame, the generation timing of the transfer pulse TXi in the last horizontal scanning period R of the immediately preceding frame is the start point of the long exposure L1, and the transfer pulse TXi in the subsequent horizontal scanning period R. Is the end point of the long-time exposure L1. The generation timing of the transfer pulse TXi within the horizontal scanning period r after the long exposure L1 is the start point of the short exposure S, and the subsequent horizontal scanning period R (that is, the last horizontal scanning period R of the frame). The generation timing of the transfer pulse TXi in () is the end point of the short exposure S and at the same time the start point of the long exposure L1 in the next frame. The method of determining the length of each exposure time of the long exposure L and the short exposure S is as described above with reference to FIG.

  In the present embodiment, at what timing the enable pulse ENa should be supplied to the shift register 61 in order to read out the pixel signal of each row i of the pixel matrix unit 10A in each horizontal scanning period R shown in FIG. It is requested in advance. Further, in the present embodiment, at what timing should the enable pulse ENb be supplied to the shift register 62 in order to erase the accumulated charge in each row i of the pixel matrix portion 10A in each horizontal scanning period r shown in FIG. Is determined in advance. Then, when imaging by two-time exposure, the control unit 90 includes a line number indicating the supply timing of the enable pulse ENa (hereinafter referred to as a read start line number) and a line number indicating the supply timing of the enable pulse ENb ( Hereinafter, the enable pulse generator 56 is notified of the erase start line number).

  The enable pulse generator 56 supplies an enable pulse ENa to the shift register 61 when the line number output from the line counter 53 becomes the read start line number in each frame. The pulse generator 55 generates sampling clocks φr and φs, an A / D conversion clock, and a shift clock for serial transfer in each of a predetermined number of horizontal scanning periods R after the supply timing of the enable pulse ENa. To do. Thereby, in each horizontal scanning period R, the analog pixel signal of each row i of the pixel matrix unit 10A is read.

  The enable pulse generator 56 supplies the enable pulse ENb to the shift register 62 when the line number output from the line counter 53 becomes the erase start line number in each frame. Thereby, the accumulated charges in each row i of the pixel matrix unit 10A are erased in each of a predetermined number of horizontal scanning periods r after the supply timing of the enable pulse ENa.

  On the other hand, in this embodiment, a period during which analog pixel signals for all the pixels as a result of the long exposure L are read in one frame is obtained in advance, and the range of line numbers corresponding to this readout period is the control unit. The gain adjustment unit 26 is notified from 90. In the case of the double exposure, the gain adjustment unit 26 monitors the line number output from the line counter 53, and based on the monitoring result, the time point within the readout period of the analog pixel signal where the current time is the result of the long exposure L. It is determined whether or not. If the current time is within the reading period of the analog pixel signal as a result of the long exposure L, the gain of the variable gain amplifying unit 25 is set to α, and otherwise, the gain is set to 1.

  As a result of the control as described above being performed in each unit, in each horizontal scanning period R including the end point of the long exposure L, one row of analog pixel signals as a result of the long exposure L is output from the pixel matrix unit 10A to the column CDS. Read out via the unit 20, amplified by the gain α in the variable gain amplification unit 25, converted into a digital pixel signal by the column ADC unit 30, and serially transferred to the image processing unit 70 through the horizontal scanning circuit 40. Is done. On the other hand, in each horizontal scanning period R including the end point of the short exposure S, an analog pixel signal for one row as a result of the short exposure S is read from the pixel matrix unit 10A through the column CDS unit 20 and is variable. The gain amplification unit 25 performs amplification at a gain of 1, and the column ADC unit 30 converts it into a digital pixel signal, which is serially transferred to the image processing unit 70 via the horizontal scanning circuit 40.

  Then, the image processing unit 70 synthesizes image data having a wide dynamic range from the digital pixel signal that is the result of the long-time exposure L and the digital pixel signal that is the result of the short-time exposure S according to the method described above. To do.

  As described above, in the present embodiment, the variable gain amplifying unit 25 is arranged in front of the column ADC unit 30, and the analog pixel signal obtained by the long time exposure is sent to the column ADC unit 30 via the variable gain amplifying unit 25. When supplying, the gain of the variable gain amplifying unit 25 is set to a gain α larger than 1, and when supplying an analog pixel signal obtained by short-time exposure to the column ADC unit 30 via the variable gain amplifying unit 25, the variable gain amplifying unit The gain of 25 is returned to 1. Therefore, according to the present embodiment, in the solid-state imaging device using the multiple exposure technique, the sensitivity of the image data in the low illuminance region is obtained by the amplification operation at the gain α of the variable gain amplification unit 25 in the previous stage of the column ADC unit 30. , While preventing the lowering of the upper limit value of the dynamic range associated with the insertion of the variable gain amplifier 25, image data having a wide dynamic range as a whole can be obtained.

Although one embodiment of the present invention has been described above, other embodiments are conceivable for the present invention. For example:
(1) In the above-described embodiment, an example of two-time exposure is given. However, in order to synthesize image data with a wide dynamic range, exposure is performed with three or more types of exposure time, and digital pixel signals that are the results of each exposure The image data may be synthesized from the image data. In this case, only the gain at the time of amplification of the analog pixel signal, which is the exposure result at the longest exposure time among a plurality of types of exposure time, is set to α larger than 1, and the analog pixel signal as the exposure result at the other exposure time is The gain at the time of amplification may be set to 1.
(2) In the above embodiment, the gain at the time of amplification of the analog pixel signal that is the result of the long-time exposure is set to α larger than 1, and the gain at the time of amplification of the analog pixel signal that is the result of the short-time exposure is set to 1. However, if the gain at the time of amplification of the analog pixel signal, which is the result of the short-time exposure, is set to a gain smaller than α, it is useful for preventing a decrease in the upper limit value of the dynamic range of the image data. Therefore, the gain at the time of amplification of the analog pixel signal that is the result of the short-time exposure is not necessarily set to 1.
(3) In the above embodiment, a CMOS solid-state imaging device is shown as an example of the solid-state imaging device according to the present invention. However, the present invention can also be applied to other solid-state imaging devices such as a CCD solid-state imaging device.

It is a figure which shows the relationship between the imaging surface illumination intensity I and the digital pixel signal value P in the solid-state imaging device which is one Embodiment of this invention. It is a block diagram which shows the structure of the CMOS solid-state imaging device which is a specific example of the embodiment. It is a figure which shows the structural example of the pixel 10 in the CMOS solid-state imaging device. 2 is a block diagram showing a configuration example of a timing generator 50 and a vertical scanning circuit 60 in the CMOS solid-state imaging device. FIG. It is a figure which illustrates the imaging sequence for performing twice exposure performed in the CMOS solid-state imaging device, and this twice exposure. It is a figure which shows the structural example for 1 pixel of the transmission system of the pixel signal in a solid-state imaging device. It is a figure which illustrates the relationship between the imaging surface illumination intensity I and the digital pixel signal value P in the solid-state imaging device. It is a figure which illustrates the relationship between Log (I) and Log (P) in the solid-state imaging device. It is a figure which shows the structural example of the transmission system of the pixel signal which employ | adopted the preamplifier 203 for the sensitivity improvement in a low illumination intensity area | region. It is a figure explaining the influence which adoption of the preamplifier 203 has on a dynamic range while explaining the dynamic range of the image data synthesize | combined from the digital pixel signal which is the result of 2 times exposure.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Pixel, 11 ... Column signal line, 10A ... Pixel matrix part, 20 ... Column CDS part, 25 ... Variable gain amplification part, 26 ... Gain adjustment part, 30 ... Column ADC part, 40 ... ... horizontal scanning circuit, 50 ... timing generator, 60 ... vertical scanning circuit, 70 ... image processing section, 80 ... U / I section, 90 ... control section, 52 ... clock counter, 53 ... line counter 56. Enable pulse generator, 55 ... Pulse generator, 61, 62 ... Shift register, 63, 64 ... AND-OR gate.

Claims (1)

A pixel matrix portion formed by arranging a plurality of pixels in a matrix,
Drive control means for causing each pixel of the pixel matrix unit to sequentially perform exposure at a plurality of types of exposure times and reading out an analog pixel signal as a result of each exposure;
Variable gain amplification means for amplifying an analog pixel signal read from the pixel matrix unit;
A / D conversion means for converting the analog pixel signal amplified by the variable gain amplification means into a digital pixel signal;
Image processing means for synthesizing image data having a wide dynamic range from each digital pixel signal obtained from each analog pixel signal as a result of exposure at the plurality of types of exposure times;
A means for adjusting the gain of the variable gain amplifying means in response to switching of the exposure time of the pixel matrix section, and amplifies an analog pixel signal obtained by exposure with the longest exposure time among the plurality of types of exposure time The gain when the first gain is greater than 1 and the gain when the analog pixel signal obtained by exposure other than the longest exposure time is amplified is the second gain smaller than the first gain. And a solid-state imaging device.

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