JP2009277758A - Method of manufacturing organic transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an organic field-effect transistor which is small in secular change of electric characteristics. <P>SOLUTION: The method of manufacturing the organic transistor includes steps of: forming a gate electrode 3 on a polymer substrate 2; forming a gate insulating layer 4 to cover the gate electrode 3; and forming an organic semiconductor layer 5 on the gate insulating layer 4, and also includes a step of carrying out a heat treatment under a vacuum before the step of forming the organic semiconductor layer 5. It is preferred that the step of forming the gate insulating layer 4 includes a step of coating the gate electrode 3 with a solution to form the gate insulating layer 4 and curing the solution into the gate insulating layer 4, and the step of carrying out the heat treatment under a vacuum is performed after the step of forming the gate insulating layer 4. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method for manufacturing an organic transistor, and relates to suppression of deterioration over time of electrical characteristics of the organic transistor.

  In recent years, organic field effect transistors (or organic transistors, hereinafter referred to as organic FETs) using organic semiconductors as channel layers have attracted a great deal of attention. Organic FETs are characterized by a low-cost process, a large area, and mechanical flexibility compared to conventional field effect transistors using an inorganic semiconductor such as silicon as a channel. However, it is known that an element using such an organic semiconductor generally has poor driving stability as compared with an inorganic semiconductor element.

One of the indicators for evaluating the performance of organic FETs is the on / off ratio. The on / off ratio is the ratio of the drain current value at the on time to the drain current value at the off time. In a normal organic FET, the on / off ratio is preferably at least 10 ³ or more. The on-current is preferably 10 ⁻⁶ A or more, and the off-current is preferably 10 ⁻⁹ A or less. However, an element using an organic FET, particularly an element formed by using a coating process has a problem that the on / off ratio becomes small. It is also known that the on / off ratio decreases with time (see, for example, Non-Patent Document 1).

  One of the causes of such poor driving stability is that the material of the organic FET is susceptible to deterioration due to the influence of oxygen and water. Therefore, after manufacturing the organic FET so that it is not affected by oxygen or water, a protective layer is further formed to make it less susceptible to the effects of oxygen and water contained in the atmosphere. Attempts have been made to obtain driving stability by heat-treating (for example, Patent Document 1).

JP 2007-12986 A (page 9) Maying Ju Jung, “The application of soluble and regional poly (3-hexylthiophene) for organic thin film transistor, May, 28th, Synthetic EL Met. 73-77

  However, when a polymer substrate such as plastic is used as the substrate, there is a problem that oxygen and moisture contained in the substrate cannot be removed by the heat treatment after forming the protective layer. Another problem is that the heat treatment after the formation of the organic FET causes the organic semiconductor layer in the organic FET to be damaged by heat, resulting in poor electrical characteristics such as mobility.

  An object of the manufacturing method of the present invention is to provide an organic FET with little deterioration over time in electrical characteristics.

Therefore, the present invention employs the following manufacturing method. Forming a gate electrode on the polymer substrate; forming a gate insulating layer so as to cover the gate electrode; forming an organic semiconductor layer on the gate insulating layer; and source on the organic semiconductor layer And a method of manufacturing an organic transistor including a step of forming a drain electrode, the method including a step of performing a heat treatment in a vacuum before the step of forming an organic semiconductor layer.

  The step of forming the gate insulating layer includes a step of applying a solution to be the gate insulating layer on the gate electrode and curing the solution to form a gate insulating layer. It is characterized by being performed after the step of forming the insulating layer.

  The heat treatment temperature is 180 ° C. or lower. Further, the step of performing the heat treatment in vacuum is characterized by being performed for 6 hours or more.

  According to the organic transistor of the present invention, after the gate insulating layer is formed on the polymer substrate, the deterioration of the on / off ratio with time can be suppressed by heat-treating the polymer substrate and the gate insulating layer. In this way, by performing heat treatment before forming the organic semiconductor layer, the oxygen or water contained in the polymer base material is sufficiently removed, and the organic semiconductor layer is not damaged without heat damage. It is possible to maintain and improve characteristics such as improvement in mobility and on / off ratio and suppression of drift, and more stable driving stability of the organic transistor can be obtained.

  Furthermore, since oxygen and water contained in the polymer substrate can be sufficiently removed, a low off-current can be realized, and an organic transistor having a high on-current can be obtained without causing thermal damage to the organic semiconductor layer. Can do.

  Hereinafter, the other features and advantages of the present invention will be described in detail. However, the present invention is not limited to the following embodiments, and various modifications can be made without departing from the scope of the invention. . FIG. 1 is a schematic cross-sectional view showing a configuration of an organic semiconductor device (organic transistor) of the present invention.

  As shown in FIG. 1, the organic transistor 1 of the present invention has a gate electrode 3, a gate insulating layer 4, an organic semiconductor layer 5, a source electrode 6 and a drain electrode 7 on the surface of a polymer substrate 2. This configuration is the same as that of a conventional organic FET.

  The polymer substrate 2 can be composed of a heat resistant polymer material such as polycarbonate, polyethylene naphthalate (PEN), polyimide (PI), polyethylene terephthalate (PET). In particular, the polymer material film that is commercially available can be used directly as a substrate.

  Next, a method for manufacturing an organic transistor will be described with reference to FIG. First, the gate electrode 3 is formed on the polymer substrate 2. The gate electrode 3 may be formed using at least one of a metal and a conductive organic material. In the case of forming a metal film, an existing vacuum film formation method such as vapor deposition or sputtering may be used, and the electrode shape can be formed by a mask film formation method or a photolithographic method. The electrode forming material used at this time is a metal such as gold, platinum, chromium, palladium, aluminum, indium, molybdenum, nickel, an alloy using these metals, polysilicon, amorphous silicon, tin oxide, indium oxide, Examples thereof include inorganic materials such as indium / tin oxide (ITO) and indium / zinc oxide (IZO). Two or more of these materials may be used in combination.

In the case of forming an electrode using a conductive organic material, a conductive ink such as polyaniline or polythiophene can be applied to form an electrode. In this case, the electrode can be formed by applying an organic material on a substrate and drying it, so that it can be easily and inexpensively performed. Examples of the application method include a spin coating method, a casting method, a pulling method, a transfer method, and an ink jet method.

  Next, a gate insulating layer 4 is formed so as to cover the gate electrode 3. The gate insulating layer 4 is formed by spin-coating and applying a solution of polymethylsilsesquioxane, polyimide, polyvinylphenol, polyvinyl alcohol, polymethyl methacrylate, and the like, followed by heat curing such as an electronic oven. Hereinafter, the method of forming the solution by applying the solution is referred to as a solution method.

  Alternatively, the gate insulating layer may be formed by a chemical vapor deposition method such as polyparaxylylene.

  Further, after the gate insulating layer 4 was formed, the polymer substrate 2 and the gate insulating layer were heat-treated in a vacuum. The heat treatment (annealing treatment) may be performed by heat treatment at 50 to 100 ° C. for 1 minute to 20 hours in a vacuum, and it is particularly preferable to perform heat treatment at 70 to 100 ° C. for 6 to 12 hours.

  In particular, when the gate insulating layer is formed by a solution method, the polymer substrate absorbs moisture during the formation of the gate insulating layer. Therefore, heat treatment is performed in vacuum after the gate insulating layer is formed in order to remove this moisture. It is preferable to perform the process to perform. However, when the solution method is not used for forming the gate insulating layer, for example, when the gate insulating layer is formed using the vapor deposition method, the polymer substrate does not absorb moisture when the gate insulating layer is formed. Even if a heat treatment step is performed in vacuum before forming the gate insulating layer to remove moisture previously contained in the polymer substrate, the same effect can be obtained. For example, only the polymer substrate is heat-treated in a vacuum before forming the gate electrode, or after the gate electrode is formed, the gate electrode and the polymer substrate are heat-treated in a vacuum to remove moisture in the polymer substrate. Is possible. Therefore, the step of performing the heat treatment in a vacuum may be performed before the step of forming the next organic semiconductor layer.

  Next, the organic semiconductor layer 5 is formed. The organic semiconductor layer 5 may be a layer formed using a known organic semiconductor material. Examples of the organic semiconductor material include π-electron conjugated aromatic compounds, chain compounds, organic pigments, organic silicon compounds, It is preferably made of a material such as a charge transfer complex. Specific materials include pentacene, a pentacene derivative having a bicyclo ring introduced between the central benzene rings, tetracene, anthracene, thiophene oligomer derivative, phenylene derivative, phthalocyanine derivative, polyacetylene derivative, polythiophene derivative, cyanine dye, and the like. However, the present invention is not limited to these materials.

  Next, the source electrode 6 and the drain electrode 7 are formed on the organic semiconductor layer 5. Any known electrode can be used as long as it is a known electrode used for the organic semiconductor layer 5, but most organic semiconductors are P-type semiconductors in which carriers for transporting charges are holes. In order to make ohmic contact, it is preferable to form the metal with a high work function. Specific examples include gold and platinum.

  The work function here is a potential difference necessary for taking out electrons in the solid to the outside, and is defined as a value obtained by dividing the energy difference between the vacuum level and the Fermi level by the amount of charge. In addition, when a dopant is densely doped on the surface of the semiconductor layer, carriers can tunnel between the metal and the semiconductor and do not depend on the metal material. Therefore, the metal material or the conductive organic material mentioned for the gate electrode Can also be used.

The manufacturing method of the organic transistor of this invention is demonstrated in detail based on previous FIG. A polycarbonate substrate having a thickness of 120 μm was used as the polymer substrate 1. Three layers of gate electrodes were formed by patterning indium zinc oxide (IZO) having a resistivity of 30 Ω / cm ² formed on the substrate by photolithography. Further, a polymethylsilsesquioxane solution was applied by spin coating, heated at 70 ° C. for 60 minutes, and then heated at 150 ° C. for 60 minutes to form a polysilsesquioxane film to obtain a gate insulating layer 4. .

  After the formation of the gate insulating layer 4, the polycarbonate substrate, the gate electrode layer, and the gate insulating layer were heat-treated at 100 ° C. for 3 hours in a vacuum.

  Next, a poly (3-hexylthiophene) solution is spin-coated to form an organic semiconductor layer 5 having a thickness of 200 nm. Finally, gold having a thickness of 30 nm is deposited through a metal mask to form source / drain electrodes (6, 7). A layer was formed, and heat treatment was performed in vacuum at 70 ° C. for 1 hour to manufacture an organic transistor 1. The organic transistor had a channel length L of 200 μm and a width W of 48 mm.

The organic transistor produced in this example was left in a nitrogen atmosphere, and the change with time of the characteristics was examined. FIG. 2a shows the change in the on / off ratio when the test was performed, and FIG. The result of this example is 100 ° C. for 3 hours, and is shown by a solid white square (□) line in FIG. 2A, and in FIG. It shows with. As shown in FIG. 2 a, the on / off ratio became a substantially constant value even after a lapse of time, and good values of 10 ³ to 10 ⁴ were obtained. Further, as illustrated in FIG. 2b, the on-current value can be held at a high value of 10 ⁻⁶ to 10 ⁻⁵ A, and the off-current value can be held at a low value of 10 ⁻⁹ to 10 ⁻⁸ A. did it.

  An organic transistor was fabricated in the same manner as in Example 1 except that the heat treatment in vacuum after forming the gate insulating layer was performed for 6 hours.

In FIG. 2a, the result of this example is 100 ° C. 6h, and the solid line of the white triangle (Δ) is shown in FIG. 2B. In FIG. It shows with. As shown in FIG. 2 a, the on / off ratio became a substantially constant value even after a lapse of time, and good values of 10 ³ to 10 ⁴ were obtained. In particular, compared with Example 1, a slightly high value could be obtained. Further, as shown in FIG. 2b, the on-current value was kept at a high value, and the off-current was kept at a low value.

  An organic transistor was fabricated in the same manner as in Example 1 except that the heat treatment in vacuum after forming the gate insulating layer was performed for 12 hours.

In FIG. 2a, the result of the present example is 100 ° C. 12h, and in FIG. 2a, the solid line is indicated by a white circle (◯). In FIG. As shown in FIG. 2 a, the on / off ratio became a substantially constant value even after a lapse of time, and good values of 10 ³ to 10 ⁴ were obtained. Similar to Example 2, a slightly higher value was obtained compared to Example 1. Further, as shown in FIG. 2b, the on-current value was kept at a high value, and the off-current was kept at a low value. The performance of the obtained organic transistor is as follows: when a voltage of −80 V is applied to the gate electrode at room temperature (25 ° C.), the mobility is 3 × 10 ⁻³ cm ² / Vs, and the on / off ratio is 10 ³ or more. Good value.

Thus, it was found that the organic transistors manufactured in Example 2 and Example 3 were slightly higher in the on / off ratio than the organic transistor manufactured in Example 1. From this result, it is more preferable that the heat treatment in vacuum after forming the gate insulating layer is performed for 6 hours or more.

(Comparative example)
An organic transistor was fabricated in the same manner as in Example 1 except that the heat treatment in vacuum after forming the gate insulating layer in Examples 1 to 3 was not performed. However, after the obtained organic transistor was left in a nitrogen atmosphere for 6 days, the entire organic transistor was heat-treated in vacuum at 100 ° C. for 12 hours on the 6th day after production. Then, the change with time of the characteristics was examined, and the change of the on / off ratio was shown in FIG.

As shown in FIG. 3a, the on / off ratio recovered to a value of 10 ³ to 10 ⁴ after performing the heat treatment in the vacuum on the sixth day, but as shown in FIG. It became low with 10 ^{< -7} > ^-10 <^-6> A. Thus, when the value of the on-current is low, a high voltage value is required as the performance of the organic transistor, and the amount of flowing current is reduced.

  From these results, it was found that, although the on / off ratio was improved in the heat treatment after the organic transistor was produced, the on-current value was lowered and the characteristics of the organic transistor were lowered. Therefore, it has become clear that the step of performing the heat treatment in vacuum is preferably performed before the formation of the organic semiconductor layer. Further, it has been found that when the gate insulating layer is formed by a solution method, it is more preferable to carry out after the gate insulating layer is formed.

It is sectional drawing of the organic transistor of this invention. It is the graph which showed the relationship between the time after producing the organic transistor of an Example, and ON / OFF ratio. It is the graph which showed the time after producing the organic transistor of an Example, and the relationship between an ON current and an OFF current. It is the graph which showed the relationship between the time after producing the organic transistor of a comparative example, and ON / OFF ratio. It is the graph which showed the time after producing the organic transistor of a comparative example, and the relationship of on current and off current.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Organic transistor 2 Polymer substrate 3 Gate electrode 4 Gate insulating layer 5 Organic semiconductor layer 6 Source electrode 7 Drain electrode

Claims (4)

Forming a gate electrode on the polymer substrate;
Forming a gate insulating layer so as to cover the gate electrode;
Forming an organic semiconductor layer on the gate insulating layer;
A method for producing an organic transistor comprising:
A method for producing an organic transistor, comprising a step of performing a heat treatment in a vacuum before the step of forming the organic semiconductor layer. The step of forming the gate insulating layer includes a step of applying a solution to be the gate insulating layer on the gate electrode, curing the solution to form the gate insulating layer,
The method of manufacturing an organic transistor according to claim 1, wherein the step of performing the heat treatment in vacuum is performed after the step of forming the gate insulating layer.   The temperature of the said heat processing is 180 degrees C or less, The manufacturing method of the organic transistor of Claim 1 or 2 characterized by the above-mentioned.   The method for producing an organic transistor according to any one of claims 1 to 3, wherein the step of performing the heat treatment in vacuum is performed for 6 hours or more.

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