JP2009271695A - Power supply circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a power supply circuit that attains a relatively high power supply voltage even with a low received power when generating power for an internal circuit by rectifying electromagnetic waves given from outside. <P>SOLUTION: A diode-connected DMOS 5 and an NMOS 6 are connected in series between a node N1 at an end of a resonant circuit comprising a coil 1 and a capacitor 2 and a ground potential GND. A gate of the NMOS 6 is connected to a node N2 where a power supply voltage VCL is output. When this causes the power supply voltage VCL accumulated in a capacitor 3 to exceed a threshold voltage VTN of the NMOS 6, the NMOS 6 becomes consistently kept in an on state, performing half wave rectification by the diode-connected DMOS 5. Since the DMOS 5 has the low absolute value of threshold voltage, the voltage drop in conduction is small, thereby attaining a higher power supply voltage VCL. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a power supply circuit in a portable device that operates using an electromagnetic wave applied from the outside as a power supply, such as a smart key having no battery or a non-contact type IC card.

FIG. 2 is a configuration diagram of a conventional power supply circuit.
This power supply circuit is mounted on, for example, a smart key that does not have a battery, and generates a power supply voltage VCL for receiving an electromagnetic wave applied from the outside and supplying it to the internal circuit 10.

  This power supply circuit has a resonance circuit including a coil 1 connected between nodes N1 and N2 and a capacitor 2 connected in parallel thereto. One end of a capacitor 3 for holding the power supply voltage is connected to the node N2, and the other end of the capacitor 3 is connected to the ground potential GND. A diode-connected N-channel MOS transistor (hereinafter referred to as “NMOS”) 4 is connected between the node N1 and the ground potential GND. That is, the source electrode (hereinafter simply referred to as “source”) of the NMOS 4 is connected to the node N1, and the gate electrode (hereinafter simply referred to as “gate”) and the drain electrode (hereinafter simply referred to as “drain”) are connected to the ground potential GND. The node N1 side is a cathode (cathode), and the ground potential GND side is an anode (anode). A power supply voltage VCL is generated at the node N2 and supplied to the internal circuit 10. The signal at the node N1 is given to the internal circuit 10 as the input signal RF.

  The internal circuit 10 operates by the power supply voltage VCL supplied from the power supply circuit, demodulates the input signal RF received from the vehicle-mounted device mounted on the automobile, and performs operations such as unlocking by radio signals. is there.

  FIG. 3 is a signal waveform diagram showing the operation of FIG. 2 by simulation. In this simulation, the resonance frequency of the resonance circuit is 125 kHz, the capacitance of the capacitor 3 is 2.5 nF, and the threshold voltage VTN of the NMOS 4 is 0.7V.

  When this power supply circuit approaches a vehicle and receives a radio wave modulated from a long wave band of about 125 kHz from a vehicle-mounted device (not shown), a high-frequency signal is generated in the resonance circuit including the coil 1 and the capacitor 2 set to tune to this carrier wave. Induced. The high-frequency signal is half-wave rectified by the diode-connected NMOS 4, and the input signal RF at the node N 1 becomes an amplitude waveform input whose lower limit is limited by the threshold voltage VTN (0.7 V in this case) of the NMOS 4. Further, an intermediate level of the amplitude waveform input charged in the capacitor 3 is output to the node N2 as the power supply voltage VCL. The power supply voltage VCL is supplied to the internal circuit 10, and a predetermined operation by the internal circuit 10 is started.

JP 2003-88005 A

  However, in the power supply circuit, since the lower limit of the input signal RF generated at the node N1 is the threshold voltage VTN (0.7 V) of the NMOS 4, even if the beak value of the input signal RF is 2.0 V, the node N2 The generated power supply voltage VCL is 0.65 V at the maximum. For this reason, in order to obtain a power supply voltage VCL sufficient for the internal circuit 10 to operate stably, it is necessary to increase the transmission power on the vehicle-mounted device side. Further, when the transmission power on the vehicle-mounted device side is small, there is a problem that normal operation cannot be performed unless the vehicle-mounted device side is sufficiently close.

  An object of the present invention is to provide a power supply circuit capable of obtaining a relatively high power supply voltage even when received power is small.

  The present invention provides a power supply circuit that receives an electromagnetic wave applied from the outside and generates a power supply voltage to be supplied to an internal circuit, a coil that is connected between a first node and a second node and receives the electromagnetic wave, A first capacitor connected in parallel to the coil; a second capacitor connected between the second node and a common potential; a source connected to the first node; and a gate connected to the common potential. A depletion type first NMOS, and an enhancement type second NMOS having a source connected to the drain of the first NMOS, a gate connected to the second node, and a drain connected to the common potential. It is composed.

  In the present invention, a depletion type first NMOS and an enhancement type second NMOS connected in series are connected in series between the first node at one end of the resonance circuit and the common potential, and the second NMOS is connected in series. The gate is connected to the second node from which the power supply voltage is output. As a result, when the power supply voltage accumulated in the second capacitor becomes higher than the threshold voltage of the second NMOS, the second NMOS is always turned on, and half of the diode-connected depletion-type first NMOS is turned on. Wave rectification is performed. The depletion-type first NMOS has an effect that since the absolute value of the threshold voltage is small, the voltage drop during conduction is small and a higher power supply voltage can be obtained.

  The above and other objects and novel features of the present invention will become more fully apparent when the following description of the preferred embodiment is read in conjunction with the accompanying drawings. However, the drawings are for explanation only, and do not limit the scope of the present invention.

  FIG. 1 is a configuration diagram of a power supply circuit showing a first embodiment of the present invention. Elements common to those in FIG. 2 are denoted by common reference numerals.

  Similar to FIG. 2, this power supply circuit is mounted on a smart key that does not have a battery, and generates a power supply voltage VCL for receiving an electromagnetic wave applied from the outside and supplying it to the internal circuit 10.

  This power supply circuit has a resonance circuit including a coil 1 connected between nodes N1 and N2 and a capacitor 2 connected in parallel thereto. One end of a capacitor 3 for holding a power supply voltage is connected to the node N2, and the other end of the capacitor 3 is connected to a common potential (for example, ground potential GND). A depletion type NMOS (hereinafter referred to as “DMOS”) 5 and a normal (enhancement type) NMOS 6 are connected in series between the node N1 and the ground potential GND. That is, the source which is one electrode of the DMOS 5 is connected to the node N1, and the drain which is the other electrode of the DMOS 5 is connected to the source which is one electrode of the NMOS 6. The drain which is the other electrode of the NMOS 6 is connected to the ground potential GND together with the gate of the DMOS 5. Further, the gate of the NMOS 6 is connected to the node N2.

  A power supply voltage VCL is generated at the node N2 and supplied to the internal circuit 10. The signal at the node N1 is given to the internal circuit 10 as the input signal RF. The internal circuit 10 operates with the power supply voltage VCL supplied from the power supply circuit, and receives and demodulates the input signal RF, for example, having a carrier frequency of 125 kHz received from the vehicle-mounted device mounted on the automobile, and the processing result. In response to this, for example, an operation such as unlocking the door of an automobile is performed using a radio signal of several hundred MHz band.

  FIG. 4 is a signal waveform diagram showing the operation of FIG. 1 by simulation. In this simulation, the resonance frequency of the resonance circuit is 125 kHz, the capacitance of the capacitor 3 is 2.5 nF, and the threshold voltage VTN of the NMOS 4 is 0.7V.

  When a smart key equipped with this power supply circuit approaches a car and receives a radio wave obtained by modulating a carrier wave of a long wave band of about 125 kHz from a vehicle-mounted device (not shown), a coil 1 and a capacitor 2 set to tune to this carrier wave. A high frequency signal is induced in the resonant circuit. The induced high frequency signal is given to a series circuit composed of a DMOS 5, an NMOS 6 and a capacitor 3.

  When the potential on the node N1 side is higher than the potential on the node N2 side due to the high-frequency signal induced between the nodes N1 and N2, the NMOS 6 is turned off, so that no current flows through the series circuit regardless of the state of the DMOS 5. .

  On the other hand, when the potential on the node N2 side is higher than the potential on the node N1 side, the DMOS 5 is turned on, but since the gate of the NMOS 6 is connected to the node N2, the potential accumulated in the capacitor 3, that is, the power supply voltage The on / off state changes according to VCL. When the power supply voltage VCL is less than or equal to the threshold voltage VTN of the NMOS 6, when the voltage between the nodes N2 and N1 exceeds the threshold voltage VTN−the power supply voltage VCL, the NMOS 6 is turned on and electric charge is accumulated in the capacitor 3, The voltage VCL gradually increases.

  When the power supply voltage VCL rises above the threshold voltage VTN, the NMOS 6 is always turned on and half-wave rectification by the DMOS 5 is performed. Since the DMOS 5 has a small absolute value of the threshold voltage and is turned on even when the bias voltage applied to the gate is 0, the lower limit of the input signal RF of the node N1 is raised to the vicinity of the ground potential GND, and a power supply of about 0.8V A voltage VCL is obtained.

  As described above, the power supply circuit according to the first embodiment includes the half-wave rectifier circuit in which the NMOS 6 whose operation state is controlled by the power supply voltage VCL and the diode-connected DMOS 5 are connected in series. When the threshold voltage VTN of the NMOS 6 is exceeded, the influence of the threshold voltage VTN of the NMOS 6 disappears, so that half-wave rectification is performed by the DMOS 5 having a small absolute value of the threshold voltage, and a relatively high power supply voltage VCL can be obtained. There are advantages.

  FIG. 5 is a configuration diagram of a power supply circuit showing a second embodiment of the present invention. Elements common to those in FIG. 1 are denoted by common reference numerals.

  In this power supply circuit, a diode-connected P-channel MOS transistor (hereinafter referred to as “PMOS”) 7 is inserted between the node N2 and the gate of the NMOS 6 in FIG. 1, and between the gate of the NMOS 6 and the ground potential GND. Is connected to a resistance element 8 as a resistance means.

  That is, the source of the PMOS 7 is connected to the node N2, and the gate and drain of the PMOS 7 are connected to the node N3. The node N3 is connected to the gate of the NMOS 6 and one end of the resistance element 8, and the other end of the resistance element 8 is connected to the ground potential GND. As a result, the PMOS 7 operates as a diode having an anode connected to the node N2 and a cathode connected to N3. Other configurations are the same as those in FIG.

  FIG. 6 is a signal waveform diagram showing the operation of FIG. 5 by simulation. In this simulation, the threshold voltage VTP of the PMOS 7 is 1.0 V, the resistance value of the resistance element 8 is 10 MΩ, and other conditions are the same as in the first embodiment.

  In this power supply circuit, due to the effect of the diode-connected PMOS 7 inserted between the node N2 and the gate of the NMOS 6, a current flows through the resistance element 8 after the power supply voltage VCL exceeds the threshold voltage VTP of the PMOS 7, and the node N3 Gradually increases from zero. Therefore, when the power supply voltage VCL exceeds the threshold voltage VTP, the potential of the node N2 is always higher than the potential of the node N3 by the threshold voltage VTP. The subsequent operation is the same as in the first embodiment.

  As a result, the power supply voltage VCL generated by the power supply circuit according to the second embodiment is higher than the power supply circuit according to the first embodiment by the threshold voltage VTP of the PMOS 7.

  As described above, in the power supply circuit according to the second embodiment, the diode-connected PMOS 7 is inserted between the node N2 from which the power supply voltage VCL is output and the gate of the NMOS 6 with respect to the power supply circuit according to the first embodiment. Therefore, there is an advantage that a power supply voltage VCL higher than the first embodiment by the threshold voltage VTP of the PMOS 7 can be obtained.

In addition, this invention is not limited to the said Example, A various deformation | transformation is possible. Examples of this modification include the following.
(A) Although the power supply circuit applied to the smart key has been described, the applicable range of the power supply circuit is not limited to the smart key. It can be widely used as a power supply circuit in portable devices such as a non-contact type IC card that operates using an externally applied electromagnetic wave as a power source. In that case, it is necessary to set the resonance frequency of the resonance circuit including the coil 1 and the capacitor 2 in accordance with the frequency of the radio wave applied from the outside.
(B) The values of the capacitor 3 and the resistance element 8 are examples, and are not limited to these values. In addition, as long as necessary capacitance values and resistance values can be obtained, each capacitor or resistance element may be a MOS capacitor or a MOS resistor constituted by a MOS transistor.
(C) The number of diode-connected PMOS 7 in the second embodiment is not limited to one. By connecting a plurality in series, a higher power supply voltage VCL can be obtained.
(D) The power supply circuit and internal circuit shown in each embodiment may be integrated in one IC chip, or the power supply circuit and internal circuit may be configured as separate IC chips.

It is a block diagram of the power supply circuit which shows Example 1 of this invention. It is a block diagram of the conventional power supply circuit. FIG. 3 is a signal waveform diagram illustrating the operation of FIG. 2. It is a signal waveform diagram which shows the operation | movement of FIG. It is a block diagram of the power supply circuit which shows Example 2 of this invention. FIG. 6 is a signal waveform diagram illustrating the operation of FIG. 5.

Explanation of symbols

1 Coil 2, 3 Capacitor 5 DMOS
6 NMOS
7 PMOS
8 Resistance element 10 Internal circuit

Claims (3)

A power supply circuit that receives an electromagnetic wave applied from the outside and generates a power supply voltage to be supplied to an internal circuit,
A coil connected between the first node and the second node for receiving the electromagnetic wave;
A first capacitor connected in parallel to the coil;
A second capacitor connected between the second node and a common potential;
A depletion type first N-channel MOS transistor having a source electrode connected to the first node and a gate electrode connected to the common potential;
An enhancement type second N-channel MOS transistor having a source electrode connected to the drain electrode of the first N-channel MOS transistor, a gate electrode connected to the second node, and a drain electrode connected to the common potential; The
A power supply circuit characterized by comprising. A power supply circuit that receives an electromagnetic wave applied from the outside and generates a power supply voltage to be supplied to an internal circuit,
A coil connected between the first node and the second node for receiving the electromagnetic wave;
A first capacitor connected in parallel to the coil;
A second capacitor connected between the second node and a common potential;
A P-channel MOS transistor having a source electrode connected to the second node and a gate electrode and a drain electrode connected to the third node;
Resistance means having one end connected to the third node and the other end connected to the common potential;
A depletion type first N-channel MOS transistor having a source electrode connected to the first node and a gate electrode connected to the common potential;
An enhancement-type second N-channel MOS transistor having a source electrode connected to the drain electrode of the first N-channel MOS transistor, a gate electrode connected to the third node, and a drain electrode connected to the common potential; The
A power supply circuit characterized by comprising.   3. The power supply circuit according to claim 2, wherein the P-channel MOS transistor connected between the second node and the third node is composed of a plurality of diode-connected transistors in series.

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