JP2009259863A - Dry etching processing device, and dry etching method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a dry etching processing device and a dry etching method that form an etching groove to a uniform width. <P>SOLUTION: A high-frequency power source 52 for biasing applies a semiconductor wafer W with a bias voltage (for example, not higher than 200 V) for accelerating ions and active seeds in plasma generated by exciting an etching gas (for example, HBr) introduced in a processing container 10 by a microwave introducing device 200, toward the semiconductor wafer W. The absolute value of the bias voltage is set to not higher than 200 V and then energy of ions (for example, Br<SP>+</SP>) in plasma reaching a silicon substrate is made small in order to prevent cutting of a Si-Si covalent bonding, thereby suppressing the generation of active particles (for example, SiBr<SB>3</SB>, SiBr<SB>2</SB>, SiBr etc.). <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a dry etching processing apparatus and dry etching method for dry etching a workpiece to manufacture a semiconductor device, and more particularly to dry etching a silicon substrate (silicon wafer) such as single crystal silicon or polycrystalline silicon. The present invention relates to a dry etching processing apparatus and a dry etching method.

  In recent years, in the field of manufacturing semiconductor devices, shallow trench isolation (STI) technology has been widely used as an element isolation technology. In the STI technology, for example, a trench (etching groove) is formed on a silicon substrate by anisotropic etching. ) Is formed.

As an example of anisotropic etching, for example, a silicon substrate is disposed on one of a pair of counter electrodes provided in an etching chamber, high-frequency power is supplied to both counter electrodes, and Cl ₂ or HBr is supplied into the etching chamber. A method of dry etching a silicon substrate by supplying a gas containing it is disclosed (see Patent Document 1).
JP 2003-7679 A

However, in the dry etching method of Patent Document 1, when controlling the shape of the side wall of the groove formed by etching, active particles (for example, SiBr ₃ when HBr is used when etching the silicon substrate, SiBr ₂ , SiBr, etc.) are generated, and the generated active particles are covalently bonded to Si on the sidewalls of the etching grooves, so that they adhere to the sidewalls of the grooves, and the groove widths on the top and bottom surfaces of the etching grooves are different. It was difficult to control the width of the groove bottom to a required dimension. For this reason, there existed a problem that the dimensional accuracy of the element isolation layer of a semiconductor device fell.

  The present invention has been made in view of such circumstances, and provides a dry etching processing apparatus and a dry etching method capable of uniformly forming the width of an etching groove by setting the absolute value of the bias voltage to 200 V or less. The purpose is to provide.

  Another object of the present invention is to provide a dry etching processing apparatus capable of uniformly forming the width of the etching groove by adjusting the pressure in the processing chamber supplied with the etching gas to a range of 30 mTorr to 100 mTorr. There is.

  Another object of the present invention is to provide a dry etching processing apparatus capable of uniformly forming the width of the etching groove by setting the high-frequency power supplied to excite the etching gas to 100 W or more. .

  Another object of the present invention is to provide a dry etching processing apparatus that can uniformly form the width of the etching groove by exciting the etching gas using the microwave generated by the microwave generating section. is there.

  A dry etching processing apparatus according to a first aspect of the present invention is a dry etching processing apparatus for dry-etching an object to be processed disposed in a processing chamber, and generates plasma for generating plasma by exciting an etching gas supplied into the processing chamber. And a voltage applying unit for applying a bias voltage to the object to be processed in order to accelerate ions and active species in the plasma generated by the plasma generating part in the direction of the object to be processed. The absolute value of the bias voltage applied by the application unit is configured to be 200 V or less.

  The dry etching processing apparatus according to a second aspect of the invention is characterized in that, in the first aspect of the invention, the apparatus includes a pressure adjusting unit that adjusts the pressure in the processing chamber supplied with the etching gas to a range of 30 mTorr to 100 mTorr.

  According to a third aspect of the present invention, in the first or second aspect of the invention, the plasma generation unit includes a high-frequency power supply unit that supplies high-frequency power of 100 W or more for exciting the etching gas. And

  According to a fourth aspect of the present invention, there is provided a dry etching processing apparatus according to any one of the first to third aspects of the present invention, wherein the plasma generator includes a microwave generator, and uses the microwave generated by the microwave generator. And the etching gas is excited.

  A dry etching method according to a fifth aspect of the present invention is a dry etching method for dry etching a workpiece disposed in a processing chamber, wherein an etching gas supplied into the processing chamber is excited to generate plasma, and the generated plasma is In order to accelerate the ions and active species in the direction of the object to be processed, a bias voltage having an absolute value of 200 V or less is applied to the object to be processed, and the generation of active particles is suppressed when the object to be processed is etched. It is characterized by doing.

  A dry etching method according to a sixth invention is characterized in that, in the fifth invention, the active particles are prevented from adhering to the sidewalls of the etching groove of the object to be processed by suppressing the generation of active particles.

In the first invention, the fifth invention, and the sixth invention, the etching gas supplied into the processing chamber is excited to generate plasma, and ions and active species in the generated plasma are processed (for example, In order to accelerate in the direction of the silicon substrate, a bias voltage having an absolute value of 200 V or less (that is, a range of 0 V to −200 V) is applied to the object to be processed, and active particles are generated when the object to be processed is etched. Suppress. For example, when HBr is used as an etching gas, the energy of ions (for example, Br ⁺ ) in plasma reaching the silicon substrate is reduced by setting the bias voltage to 200 V or less, and the Si—Si covalent bond is broken. Thus, generation of active particles (for example, SiBr ₃ , SiBr ₂ , SiBr, etc.) is suppressed.

When the absolute value of the bias voltage exceeds 200 V, the energy of ions reaching the silicon substrate is increased, and the Si—Si covalent bond is cut to generate active particles (for example, SiBr ₃ , SiBr ₂ , SiBr). Generated. The generated active particles combine with Si on the sidewall of the etching groove to become stable (inactive) SiBr ₄ and adhere to the sidewall, so that it becomes difficult to control the width of the etching groove to a required dimension, The dimensional accuracy of the element isolation layer of the semiconductor device is lowered. By making the absolute value of the bias voltage 200 V or less, the generation of active particles is suppressed. As a result, it is possible to prevent the active particles from adhering to the sidewalls of the etching grooves of the silicon substrate, and to uniformly form the etching grooves of the silicon substrate, and to control the width of the etching grooves to a required dimension. In addition, the dimensional accuracy of the element isolation layer of the semiconductor device can be improved.

  In the second invention, the pressure in the processing chamber supplied with the etching gas is adjusted to a range of 30 mTorr to 100 mTorr. When the pressure is smaller than 30 mTorr or larger than 100 mTorr, the electron density in the plasma is lowered. When the electron density decreases, assuming that the high-frequency power supplied to the silicon substrate is constant, the bias voltage must be increased. When the bias voltage is increased, the energy of ions reaching the silicon substrate increases. , Promoting the generation of active particles. By adjusting the pressure in the processing chamber to a range of 30 mTorr to 100 mTorr, the electron density can be increased and the bias voltage can be decreased. Therefore, the generation of active particles can be suppressed and the width of the etching groove of the silicon substrate can be formed uniformly, the width of the etching groove can be controlled to a required dimension, and the element isolation layer of the semiconductor device can be controlled. The dimensional accuracy can be improved.

  In the third invention, the high frequency power supplied to excite the etching gas is set to 100 W or more. When the high-frequency power is smaller than 100 W, the electron density in the plasma is reduced, and if the high-frequency power supplied to the silicon substrate is constant, the bias voltage needs to be increased. The energy of ions reaching the substrate is increased, and the generation of active particles is promoted. By setting the high frequency power to 100 W or more (for example, about 500 W), the electron density in the plasma can be increased and the bias voltage can be decreased. Therefore, the generation of active particles can be suppressed and the width of the etching groove of the silicon substrate can be formed uniformly, the width of the etching groove can be controlled to a required dimension, and the element isolation layer of the semiconductor device can be controlled. The dimensional accuracy can be improved.

In the fourth aspect of the invention, the etching gas is excited using the microwave generated by the microwave generation unit. In the case of using a microwave, since the electron density in plasma can be increased (for example, about 10 ¹¹ particles / cm ³ ), the bias voltage can be decreased. Therefore, the generation of active particles can be suppressed and the width of the etching groove of the silicon substrate can be formed uniformly, the width of the etching groove can be controlled to a required dimension, and the element isolation layer of the semiconductor device can be controlled. The dimensional accuracy can be improved.

  According to the present invention, the generation of active particles can be suppressed and the width of the etching groove of the silicon substrate can be formed uniformly, the width of the etching groove can be controlled to a required dimension, and the element of the semiconductor device The dimensional accuracy of the separation layer can be improved.

  Hereinafter, the present invention will be described with reference to the drawings illustrating embodiments thereof. FIG. 1 is a block diagram showing an example of the configuration of a dry etching processing apparatus 100 according to the present invention. In FIG. 1, 10 is a processing container. The processing container 10 has a bottomed cylindrical shape, and is entirely formed of a conductor such as aluminum. Further, the processing container 10 is grounded. The inside of the processing container 10 is hermetically sealed and serves as a processing space for dry etching processing.

  In the processing container 10, for example, a mounting table 12 for mounting a semiconductor wafer W as an object to be processed which is a silicon substrate such as a silicon single crystal or a silicon polycrystal is disposed. The mounting table 12 has, for example, a disk shape whose surface is flattened with anodized aluminum or the like, and is disposed at a predetermined position from the center of the bottom of the processing container 10 via a support column 14 made of, for example, aluminum.

  The peripheral wall of the processing container 10 is provided with a loading / unloading port 16 for loading and unloading the semiconductor wafer W. The loading / unloading port 16 opens and closes the loading / unloading port 16 while keeping the inside of the processing container 10 sealed. The gate valve 18 is provided.

  A through-hole penetrating the peripheral wall is opened in the processing container 10, and a required gas is introduced into the processing container 10 from a gas introduction pipe 20 fitted in the through-hole. The gas introduction pipe 20 is provided with a gas nozzle 20a, and the gas flow rate can be adjusted to a required value. In addition, by providing a plurality of gas nozzles 20a and introducing different types of gases by the respective gas nozzles, the flow rate of each gas may be controlled independently, or the ceiling of the processing vessel 10 may be shaped like a shower head. It can also be provided in the part.

As a gas for dry etching, for example, HBr only, only Cl _2, mixing of HBr and Cl _2, or may be a mixed gas thereof with O _2. Note that the etching gas is not limited to these, and SF ₆ , CF _{4, and the} like can also be used.

  An exhaust port 22 is provided at the bottom of the processing container 10 so that the inside air of the processing container 10 can be discharged. An exhaust passage 28 in which a pressure control valve 24 and a vacuum pump 26 are interposed is connected to the exhaust port 22. Thereby, the pressure in the processing container 10 can be adjusted to a required value.

  Below the mounting table 12, a plurality of (for example, three) lifting pins 30 are provided for moving the mounting table 12 up and down when the semiconductor wafer W is loaded and unloaded. The elevating pins 30 can be moved up and down by elevating rods 34 that are provided through the bottom of the processing vessel 10 via an extendable bellows 32. The mounting table 12 is formed with an insertion hole 36 through which the elevating pin 30 can be inserted.

  The mounting table 12 is formed of a heat-resistant material, for example, ceramic such as alumina, and a heating unit 38 is provided in the ceramic. The heating means 38 is made of, for example, a thin plate-like resistance heater embedded over substantially the entire area of the mounting table 12, and is connected to the heater power source 42 via the wiring 40 disposed in the support column 14.

  On the top surface of the mounting table 12, for example, a thin plate-like electrostatic chuck 46 having conductor wires 44 arranged in a mesh shape is provided. A DC power supply 50 is connected to the conductor wire 48, and the electrostatic chuck 46 electrostatically attracts the semiconductor wafer W placed on the mounting table 12 by a DC voltage supplied from the DC power supply 50. For example, a bias high-frequency power source 52 for applying 13.56 MHz bias high-frequency power is connected to the conductor wire 44 inside the electrostatic chuck 46 via a matching unit (not shown). The frequency of the high frequency power supplied from the bias high frequency power supply 52 is not limited to 13.56 MHz, but may be a frequency in another RF band such as 27 MHz.

  The bias high-frequency power supply 52 accelerates the ions and active species in the plasma generated by exciting the etching gas introduced into the processing chamber 10 with a microwave introducing apparatus 200 described later in the direction of the semiconductor wafer W. A bias voltage having an absolute value of 200 V or less (that is, a range of 0 V to −200 V, more preferably about −100 V) is applied to the semiconductor wafer W.

A top plate 54 is provided on the ceiling portion of the processing container 10, and the top plate 54 and the processing container 10 maintain airtightness in the processing container 10 by a sealing member 56 such as an O-ring. The top plate 54 is formed of a dielectric material such as quartz, ceramic, alumina (Al ₂ O ₃ ), or aluminum nitride (AlN), and is permeable to microwaves. In addition, the thickness of the top plate 54 can be set to, for example, 20 mm in consideration of pressure resistance.

  On the top surface of the top plate 54, there is provided a microwave introducing device 200 for exciting the etching gas and generating plasma. The microwave introduction device 200 includes a planar antenna member 202 for introducing a microwave into the processing container 10.

For example, when the size of the semiconductor wafer W is 300 mm, the planar antenna member 202 is larger than the wafer size, for example, a disk shape made of a conductive material having a diameter of about 400 to 500 mm and a thickness of about 1 to several mm. The surface is a silver-plated copper plate or aluminum plate. The planar antenna member 202 is formed with a number of microwave radiation slots 204 formed of, for example, long groove-like through holes. The arrangement or form of the slots 204 is not particularly limited. For example, the slots 204 may be arranged concentrically, spirally, or radially, or may be distributed uniformly over the entire antenna member. it can. The planar antenna member 202 has a so-called RLSA (Radial Line Slot Antenna) type antenna structure, which can generate plasma with high density (for example, about 10 ¹¹ pieces / cm ³ ) and low electron energy. it can.

A circular thin plate-like slow wave member 206 is provided on substantially the entire upper surface of the planar antenna member 202. The slow wave member 206 is formed of a dielectric such as quartz, ceramic, alumina (Al ₂ O ₃ ), or aluminum nitride (AlN). The slow wave member 206 has a high dielectric constant characteristic in order to shorten the wavelength of the microwave.

  A wave guide box 210, which is a hollow cylindrical container made of a conductor, is provided so as to cover all of the upper surface and side surfaces of the slow wave member 206. The planar antenna member 202 is configured as a bottom plate of the waveguide box 210. A cooling jacket 212 is provided on the upper portion of the waveguide box 210 as a cooling means for flowing a coolant to cool the waveguide box 210. Note that both the outer peripheral portion of the planar antenna member 202 and the waveguide box 210 are electrically connected to the processing container 10.

  At the center of the upper surface of the slow wave member 206, a power feeding portion 208 protruding upward is formed. A coaxial waveguide 214 is connected to the power feeding unit 208. The coaxial waveguide 214 includes a center conductor 214a and an annular outer conductor 214b disposed around the center conductor 214a at a predetermined interval. The outer conductor 214b is connected to the center of the upper surface of the waveguide box 210. The central conductor 214 a is connected to the central portion of the planar antenna member 202 through a through hole 222 formed in the center of the slow wave member 206. Further, the upper outer periphery of the power feeding unit 208 is mounted in close contact with the lower inner wall of the outer conductor 214b.

  The coaxial waveguide 214 is connected to the microwave generator 220 via a mode converter 216 and a rectangular waveguide 218. For example, the microwave generator 220 generates a microwave of 2.45 GHz, and the generated microwave is propagated to the planar antenna member 202 and the slow wave member 206. Note that the frequency of the microwave is not limited to 2.45 GHz, and may be another frequency such as 8.35 GHz, for example. Moreover, the high frequency electric power for generating a microwave is 100W or more, for example, can be set to values such as 2000W and 500W. Note that the frequency of the high-frequency power for generating plasma is not limited to the microwave, and may be a UHF band, a VHF band, or the like.

  The control means 58 is composed of, for example, a microcomputer, a semiconductor memory, and the like, and controls the overall operation of the dry etching processing apparatus 100. The operation of the dry etching processing apparatus 100 can be realized by processing a computer program having a predetermined processing procedure with a microcomputer. In this case, the computer program can be stored in a storage medium 60 such as an HDD, a semiconductor memory, or a CD (Compact Disc).

  More specifically, the control means 58 controls the flow rate of the etching gas, the pressure in the processing container 10, the bias voltage control of the high frequency power supply 52 for bias, the power control for generating plasma in the microwave introduction device, and the processing container 10. Temperature control, etching time control, semiconductor wafer W loading / unloading control, and the like.

  Next, a process of forming a groove (trench) by dry-etching silicon (Si) of a semiconductor wafer W made of a silicon substrate using the above-described dry etching processing apparatus 100 will be described.

  A semiconductor wafer W, on which a hard mask layer made of a silicon nitride layer (SiN) is formed on the surface of a single crystal silicon substrate or a polycrystalline silicon substrate, is loaded into the processing chamber 10 with the gate valve 18 open, and the lift pins 30 are raised. Then, the semiconductor wafer W is mounted on the upper surface of the mounting table 12. The semiconductor wafer W is electrostatically adsorbed on the electrostatic chuck 46 by applying a DC voltage supplied from the DC power supply 50. The semiconductor wafer W mounted on the mounting table 12 is adjusted to a required process temperature by the heating means 38.

  Next, the gate valve 18 is closed, the pressure control valve 24 is adjusted, and the inside of the processing container 10 is evacuated to a predetermined degree of vacuum. Then, the gas nozzle 20a is controlled to process a required etching gas (for example, HBr). Supply into the container 10. In this case, the pressure in the processing container 10 is adjusted to a required value (for example, a range of 30 mTorr to 100 mTorr) by controlling the pressure control valve 24.

  At the same time, the microwave generator 220 is driven, and the microwave generated by the microwave generator 220 is supplied to the planar antenna member 202 and the slow wave member from the power feeding unit 208 via the rectangular waveguide 218 and the coaxial waveguide 214. The microwave supplied to 206 and having a wavelength shortened by the slow wave member 206 is transmitted through the top plate 54 and introduced into the processing space, thereby exciting the etching gas and generating plasma in the processing space.

Ions (for example, Br ⁺ , HBr ^+, etc.) and active species (radicals, Br _2, etc.) in the plasma are accelerated in the direction of the semiconductor wafer W by the bias voltage (for example, 200 V or less) of the bias high-frequency power source 52, By colliding with the silicon substrate, the silicon substrate on which the hard mask layer is not formed is anisotropically etched.

  Next, the dry etching method according to the present invention will be described in comparison with the conventional dry etching method. FIG. 2 is a cross-sectional view of a silicon substrate 1 formed by conventional dry etching, and FIG. 3 is a schematic view showing a state of conventional dry etching processing. As shown in FIG. 2A, when a semiconductor wafer W having a hard mask layer made of a silicon nitride layer (SiN) 2 formed on the surface of a monocrystalline or polycrystalline silicon substrate 1 is dry-etched, FIG. ), The cross section of the groove (trench) formed by etching becomes tapered. For this reason, for example, although the hard mask layer is dry-etched to make the width of the groove W1, the width of the bottom of the groove is W2, which is different from W1, and how much this W2 becomes can be controlled. Can not. For this reason, there existed a problem that the dimensional accuracy of the element isolation layer of a semiconductor device fell. The width W2 at the bottom of the groove has an error of about 10 to 20% with respect to the width W1.

FIG. 3A shows the state of processing at the surface of the silicon substrate 1 or at the bottom of the groove being formed by etching. When ions accelerated by high energy (for example, Br ⁺ , HBr ^+, etc.) collide with the surface of the silicon substrate 1 or the bottom of the groove, the Si—Si covalent bond (bonding energy is, for example, 2.9 eV) is cut. Then, active particles (active molecules) such as SiBr ₃ are generated. The generated active particles are not limited to SiBr ₃ but also include SiBr ₂ and SiBr.

The reaction formula in this case can be expressed by, for example, Si + 3Br → SiBr ₃ , Si + 2Br → SiBr ₂ , or Si + Br → SiBr.

  As shown in FIG. 3B, these active particles are bonded to the side walls of the silicon substrate 1 by bonding to Si, and as a result, the cross-sectional shape of the grooves is tapered. The active particles generated by the collision of high-energy ions are likely to be bonded to Si on the sidewall as the depth of the etching groove becomes deeper. It becomes tapered as shown in b).

  FIG. 4 is a cross-sectional view of the silicon substrate 1 formed by the dry etching method according to the present invention, and FIG. 5 is a schematic view showing the state of processing of the dry etching method according to the present invention. As shown in FIG. 4A, when the semiconductor wafer W in which the hard mask layer made of the silicon nitride layer (SiN) 2 is formed on the surface of the monocrystalline or polycrystalline silicon substrate 1 is dry-etched, FIG. ), The cross section of the groove (trench) formed by etching is perpendicular to the substrate surface of the silicon substrate 1, and the width of the groove is the same dimension W1 on the surface side and the bottom of the groove.

FIG. 5A shows a state of processing at the surface of the silicon substrate 1 or at the bottom of the groove being formed by etching. When ions (for example, Br ⁺ , HBr ^+, etc.) accelerated by low energy (for example, a bias voltage of 200 V or less, more preferably about 100 V) collide with the surface of the silicon substrate 1 or the bottom of the groove, Si—Si The covalent bond (bonding energy is, for example, 2.9 eV) cannot be cut, and the van der Waals bond (bonding energy is, for example, 0.2 eV) between Br and Br is cut. As a result, inert particles (stable molecules) of SiBr ₄ are generated.

The reaction formula in this case can be expressed by, for example, Si + 4Br → SiBr ₄ .

  Since the inert particles are stable particles, they are discharged out of the processing vessel 10 without being bonded to Si on the side walls of the grooves of the silicon substrate 1 as shown in FIG.

FIG. 6 is an explanatory diagram showing the relationship between the energy at the time of collision and the reaction rate of the generated molecules. In FIG. 6, the horizontal axis indicates the energy when one ion collides with the silicon substrate 1, and the vertical axis indicates the molecular formation reaction rate. As shown in FIG. 6, when the energy of ions is small (for example, 1 eV or less), it is understood that only SiBr ₄ is generated. In addition, SiBr ₃ is generated as the ion energy increases.

As described above, for example, when HBr is used as the etching gas, the energy of ions (for example, Br ⁺ ) in the plasma reaching the silicon substrate 1 is reduced by setting the absolute value of the bias voltage to 200 V or less, It is possible to suppress generation of active particles (for example, SiBr ₃ , SiBr ₂ , SiBr, etc.) by cutting the Si—Si covalent bond.

When the absolute value of the bias voltage exceeds 200 V (for example, when the above-described ion energy exceeds 1 eV), the energy of ions reaching the silicon substrate 1 increases, and the Si—Si covalent bond is broken. Active particles (eg, SiBr ₃ , SiBr ₂ , SiBr, etc.) are generated. The generated active particles combine with Si on the sidewall of the etching groove to become stable (inactive) SiBr ₄ and adhere to the sidewall, so that it becomes difficult to control the width of the etching groove to a required dimension, The dimensional accuracy of the element isolation layer of the semiconductor device is lowered. By making the absolute value of the bias voltage 200 V or less (that is, making the above-mentioned ion energy 1 eV or less, for example), the generation of active particles is suppressed and the width of the etching groove of the silicon substrate 1 is made uniform. The width of the etching groove can be controlled to a required dimension, and the dimensional accuracy of the element isolation layer of the semiconductor device can be improved.

  FIG. 7 is an explanatory diagram showing the relationship between the bias voltage and the electron density. In FIG. 7, the horizontal axis indicates the high frequency power (bias power) supplied from the bias high frequency power supply 52, and the vertical axis indicates the electron density. The curve in the figure shows the relationship between the bias power and the electron density when the bias voltage (for example, 100V, 200V, etc.) is constant. As described above, when the absolute value of the bias voltage exceeds 200 V, active particles are generated, and when the bias voltage is 200 V or less, inactive particles are generated.

  If the high frequency power (bias power) supplied to the silicon substrate 1 is constant, the bias voltage must be increased as the electron density is lower, as shown in FIG. When the bias voltage is increased, the energy of ions reaching the silicon substrate 1 is increased, and the generation of active particles is promoted. On the other hand, the higher the electron density, the lower the bias voltage (for example, the absolute value is about 100 V). Therefore, the generation of active particles can be suppressed, and the width of the etching groove of the silicon substrate 1 can be formed uniformly, the width of the etching groove can be controlled to a required dimension, and the element isolation layer of the semiconductor device Dimensional accuracy can be improved.

  FIG. 8 is an explanatory diagram showing the relationship between the pressure in the processing container 10 and the electron density. As shown in FIG. 8, when the pressure is smaller than 30 mTorr, or when the pressure is larger than 100 mTorr, the electron density in the plasma decreases. If the high-frequency power supplied to the silicon substrate 1 is constant when the electron density is reduced, it is necessary to increase the bias voltage as described above, and when the bias voltage is increased, the silicon substrate 1 is reached. The energy of ions increases and the generation of active particles is promoted. By adjusting the pressure in the processing container 10 to the range of 30 mTorr to 100 mTorr, the electron density can be increased and the bias voltage can be decreased. Thereby, the generation of active particles can be suppressed and the width of the etching groove of the silicon substrate can be formed uniformly, the width of the etching groove can be controlled to a required dimension, and the element isolation layer of the semiconductor device can be controlled. The dimensional accuracy can be improved.

  Further, as described above, in the present invention, the high frequency power for generating the microwave is 100 W or more. If the high frequency power is smaller than 100 W, the electron density in the plasma is reduced, and if the high frequency power supplied to the silicon substrate 1 is constant, it is necessary to increase the bias voltage. When the bias voltage is increased, The energy of ions reaching the silicon substrate 1 is increased, and the generation of active particles is promoted. By setting the high frequency power to 100 W or more, the electron density in the plasma can be increased and the bias voltage can be decreased. Therefore, the generation of active particles can be suppressed, and the width of the etching groove of the silicon substrate 1 can be formed uniformly, the width of the etching groove can be controlled to a required dimension, and the element isolation layer of the semiconductor device Dimensional accuracy can be improved.

Further, as described above, in the present invention, the etching gas is excited using the microwave generated by the microwave generator 220. In the case of using a microwave, since the electron density in plasma can be increased (for example, about 10 ¹¹ particles / cm ³ ), the bias voltage can be decreased. Therefore, the generation of active particles can be suppressed, and the width of the etching groove of the silicon substrate 1 can be formed uniformly, the width of the etching groove can be controlled to a required dimension, and the element isolation layer of the semiconductor device Dimensional accuracy can be improved.

  In the above-described embodiment, the microwave is used as the means for generating the plasma. However, the plasma generating means is not limited to this, and a parallel plate type, an electron cyclotron resonance type (ECR: Electron Cyclotron) is used. Resonance), Helicon Wave Plasma (HWP), Inductively Coupled Plasma (ICP), and the like may be used.

  In the above-described embodiment, the electron density in the processing container 10 can be increased by reducing the vertical dimension (gap) of the processing container 10, that is, the distance between the bottom of the processing container 10 and the top plate. . This is because as the gap of the processing container 10 increases, the difference in height of the electron density increases, so that a decrease in the electron density can be suppressed by reducing the gap. Thereby, the bias voltage can be lowered.

In the above-described embodiment, an example in which HBr is used as an example of the etching gas has been described. However, the etching gas is not limited to HBr. For example, HCl, Cl ₂ or the like can be used. When Cl ₂ is used, the present invention can suppress the generation of active particles (for example, SiCl ₃ , SiCl ₂ , SiCl, etc.).

It is a block diagram which shows an example of a structure of the dry etching processing apparatus which concerns on this invention. It is sectional drawing of the silicon substrate formed by the conventional dry etching. It is a schematic diagram which shows the mode of the process of the conventional dry etching. It is sectional drawing of the silicon substrate formed by the dry etching method which concerns on this invention. It is a schematic diagram which shows the mode of the process of the dry etching method which concerns on this invention. It is explanatory drawing which shows the relationship between the energy at the time of a collision, and the reaction rate of the molecule | numerator produced | generated. It is explanatory drawing which shows the relationship between a bias voltage and an electron density. It is explanatory drawing which shows the relationship between the pressure in a processing container, and an electron density.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Processing container 20a Gas nozzle 24 Pressure control valve 52 High frequency power supply for bias 58 Control means 200 Microwave introduction apparatus 220 Microwave generator

Claims (6)

In a dry etching processing apparatus for dry etching a processing object arranged in a processing chamber,
A plasma generating unit for generating plasma by exciting an etching gas supplied into the processing chamber;
A voltage applying unit for applying a bias voltage to the object to be processed in order to accelerate ions and active species in the plasma generated by the plasma generating part in the direction of the object to be processed;
A dry etching apparatus characterized in that an absolute value of a bias voltage applied by the voltage application unit is set to 200 V or less.   The dry etching processing apparatus according to claim 1, further comprising a pressure adjusting unit that adjusts the pressure in the processing chamber supplied with the etching gas to a range of 30 mTorr to 100 mTorr. The plasma generator is
The dry etching processing apparatus according to claim 1, further comprising a high-frequency power supply unit that supplies a high-frequency power of 100 W or more for exciting the etching gas. The plasma generator is
With a microwave generator,
The dry etching processing apparatus according to any one of claims 1 to 3, wherein the etching gas is excited by using the microwave generated by the microwave generation unit. In a dry etching method for dry etching a processing object disposed in a processing chamber,
Exciting the etching gas supplied into the processing chamber to generate plasma,
In order to accelerate ions and active species in the generated plasma in the direction of the workpiece, a bias voltage having an absolute value of 200 V or less is applied to the workpiece,
A dry etching method, wherein generation of active particles is suppressed when the object to be processed is etched.   6. The dry etching method according to claim 5, wherein the generation of active particles is prevented to prevent the active particles from adhering to the sidewall of the etching groove of the object to be processed.

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