JP2009253645A - Image processor and processing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce hardware costs in smoothing processing and to perform high-definition smoothing processing. <P>SOLUTION: Input multi-level image data are binarized by a binarizing section, and the binarized data are held in a plurality of line buffers. Based on the binarized data held in the plurality of line buffers, when smoothing multi-level image data, the order of transferring the multi-level image data to be smoothed to the binarizing section is controlled. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an edge detection method using pattern matching.

  In recent years, various methods such as replacement by oversampling or pattern matching have been studied as methods for removing jaggies in the field of image forming apparatuses using electrophotographic technology.

  In particular, when pattern matching is performed using hardware (line buffer) and jaggy correction is performed based on the result, two methods described below have been proposed.

  The first method is a method of performing a smoothing process after a pseudo halftone process such as a halftone as described in Patent Document 1. However, in this method, as shown in FIG. 1, the input image data (8 bits) is subjected to pseudo halftone processing by the binarization unit 101. After that, since the smoothing processing unit 102 performs pattern matching to correct the density value of the reference pixel, a problem occurs in the reproducibility of the pseudo halftone.

  In order to solve this problem, it is necessary to create a halftone pattern in consideration of the smoothing process. However, it takes more time to design a halftone pattern in consideration of the smoothing process, and the creation of the halftone pattern becomes more complicated by considering the smoothing process.

  In addition, applying the smoothing process after the pseudo halftone process is performed means that the smoothing process is performed in a state where the amount of information is smaller than that of the original image, and high-performance smoothing process cannot be expected.

  The second method is a method in which smoothing processing is performed before pseudo halftone processing such as halftone. Here, this method will be described with reference to FIG. 8-bit image data is input to the line buffer. Note that when performing the smoothing process using a 5 × 5 window, a line buffer for at least four lines is required. In this example, the line buffer needs 8 bits × 4 lines × (number of pixels in the main scanning direction).

  The image data stored in the line buffer is input to the shift register of the smoothing processing unit 201 to create a 5 × 5 correction window. Using this window, the edge detection unit compares the pattern data stored in the pattern storage unit with edge detection. By this pattern matching, pixels determined to be edges are smoothed by the pixel correction calculation unit, and pixels that are not edges are output as they are. The output multi-bit data is subjected to pseudo halftone processing by the halftone processing unit 202.

  An advantage of this method is that density reproducibility is improved by performing pseudo halftone processing such as halftone on multi-value data after smoothing processing. In addition, since smoothing processing can be performed on multi-bit data, high-performance smoothing can be realized.

However, the problem of the second method is that the data subjected to pseudo halftone processing in the first method is 1 bit, and the line buffer is compared with the case where the smoothing processing is performed on the 1-bit data. The amount of has increased 8 times.
Japanese Patent Laid-Open No. 2002-165096

  In the above conventional example, in the smoothing process for performing edge detection using pattern matching, the halftone pattern must be designed in consideration of the smoothing process in order to apply the smoothing process to the binary data. Further, when smoothing processing is performed on binary data, high definition cannot be expected.

  On the other hand, when smoothing processing is performed on multi-value data, the amount of data in the line buffer is large and the cost of hardware becomes expensive.

  An object of the present invention is to reduce the hardware cost in the smoothing process and to enable a high-quality smoothing process.

  The present invention is an image processing apparatus that performs image processing on input multi-value image data and outputs the image data, and binarization means for binarizing the multi-value image data; and the binarized 2 A plurality of line buffers that hold the binarized data; a processing unit that smoothes the multi-valued image data based on the binarized data held in the plurality of line buffers; and the smoothing process performed by the processing unit Control means for controlling the order in which the multi-value image data is transferred to the binarization means.

  The present invention is also a processing method of an image processing apparatus that performs image processing on input multi-valued image data and outputs the processed multi-valued image data, and a binarization step for binarizing the multi-valued image data; A holding step of holding the binarized binarized data in a plurality of line buffers; a processing step of smoothing the multi-valued image data based on the binarized data held in the plurality of line buffers; And a control step for controlling the order in which the multivalued image data subjected to the smoothing process in the processing step is transferred to the binarization step.

  According to the present invention, the hardware cost in the smoothing process is reduced, and a high-quality smoothing process is possible.

  The best mode for carrying out the invention will be described below in detail with reference to the drawings.

  FIG. 3 is a diagram illustrating an example of the configuration of the image processing unit in the image forming apparatus. The image forming apparatus is a laser printer, and the image processing unit performs smoothing processing on input image data by pattern matching, removes jaggies, and then performs pseudo halftone processing such as halftone and outputs.

  Further, when detecting the edge of the image data by pattern matching, the input multi-valued image data is binarized and stored in the line buffer in order to reduce the size of the line buffer necessary for window processing.

  In FIG. 3, reference numerals 301 to 304 denote line buffers, which temporarily store input binary data. A smoothing processing unit 305 includes a shift register group 311, an edge detection unit 312, and a pixel correction calculation unit 313.

  The shift register group 311 functions as a window for performing edge detection by pattern matching. The shift register group 311 includes a shift register that holds 1-bit data held in the line buffers 301 to 304 and a shift register that holds input 8-bit data. This shift register group 311 is also referred to as a window.

  The edge detection unit 312 includes a pattern storage unit 314 that stores a pattern for edge detection. Then, the pixel correction calculation unit 313 corrects the reference pixel according to the calculation method described later in detail based on the detection result of the edge detection unit 312.

  A halftone unit 306 performs pseudo halftone processing on the image data smoothed by the smoothing processing unit 305. A pulse width modulation (PWM) unit 307 performs pulse width modulation on the halftone-processed pixel data and outputs the result to an engine unit (not shown). Reference numeral 308 denotes a binarization unit that binarizes input multi-value image data. Here, the binarization unit 308 sets 128 of 8-bit data as a binarization threshold, and binarizes to “1” when the pixel data is larger than the threshold and to “0” when the pixel data is smaller.

  Here, a method of binarizing input image data, temporarily storing it in a line buffer (1 bit × 4 lines), and performing a smoothing process on reference pixels by pattern matching using a window will be described with reference to FIGS. I will explain.

  FIG. 4 is a diagram illustrating an example of input image data. Here, it is assumed that the smoothing process is performed on the character “a” having 8-bit data and a density of 50%. In FIG. 4, reference numeral 400 denotes a virtual window showing the relationship between the pixel data and the window 311 when the smoothing process is performed on the pixel data. Further, this window 400 moves to the right side in the figure by the smoothing process. Reference numeral 401 denotes a reference pixel when performing the smoothing process, and is a multi-bit (8-bit) pixel.

  FIG. 5 is a diagram illustrating a window 311 into which binarized pixel data is input. FIG. 6 is a diagram illustrating an example of a matching pattern stored in the pattern storage unit 314. FIG. 7 is a diagram illustrating a correspondence between a matching pattern and a reference pixel calculation method.

  Incidentally, “1 position” of “output at 30% of 1 position” of 701 shown in FIG. 7 is the position shown in FIG. In FIG. 6, six types of matching patterns shown in (a) to (f) are shown as an example. However, the number of patterns is not limited, and as shown in FIG. 7, an operation corresponding to the number of patterns is performed. Prepare a method.

  Here, in the case of the pixel data of the window 311 shown in FIG. 5, the edge detection unit 312 detects the matching pattern shown in FIG. 6B as a matching edge pattern. Accordingly, the pixel correction calculation unit 313 selects “output at 80% of the reference pixels” 702 shown in FIG. 7 as the calculation method, and corrects the density of the reference pixels as shown in FIG.

  FIG. 10 is a diagram illustrating a result of performing the smoothing process. As shown in FIG. 10, the edge portion is smoother than in FIG. The example shown in FIG. 10 is a result of smoothing processing by preparing 20 types of matching patterns.

  When the smoothing process is performed after the pseudo halftone process such as the conventional halftone process is performed, the number of bits of the reference pixel itself is decreased and the amount of information is decreased. However, if the smoothing process is performed before the pseudo halftone process is performed, the reference pixel can be handled with multiple bits (8 bits), so that a higher-performance smoothing process can be performed.

  Further, conventional image data is transferred in order from the first line, and is subjected to smoothing processing. However, in this embodiment, transfer is performed by a characteristic line transfer method in order to greatly reduce the edge detection line buffer.

  Therefore, although the data transfer size is about twice as large, high-performance smoothing processing can be performed with an inexpensive hardware configuration.

  Here, a characteristic line transfer order according to the present invention will be described with reference to FIGS. The control of the line transfer order is executed by a CPU (not shown) according to a program stored in the ROM.

  FIG. 11 is a flowchart showing the line transfer order in this embodiment. First, in step S1101, the line counter N is initialized to “1”. Next, in step S1102, it is determined whether or not the value of the line counter N is “3” or more. If Yes, the process proceeds to step S1104, and if No, the process proceeds to step S1103.

  In step S1103, data indicating white pixels for one line is input from the image data input A in order to process the top of the page as a white pixel. Here, the data input from A passes through the shift register, is binarized by the binarization unit 308, and is input to the line buffer 302. At the same time, the data originally stored in the line buffer 302 passes through the shift register and is input to the line buffer 301.

  On the other hand, in step S1104, image data is input from image data input A. The data input from A passes through the shift register, is binarized by the binarization unit 308, and is input to the line buffer 302. At the same time, the data originally stored in the line buffer 302 passes through the shift register and is input to the line buffer 301.

  Next, in step S1105, it is determined whether or not the value of the line counter N is equal to or less than the “number of lines”. If Yes, the process proceeds to step S1106, and if No, the process proceeds to step S1107.

  In step S1106, the Nth line data is input from the image data input B. The data input from B is binarized by the binarizing unit 308 and input to the line buffer 304. At the same time, the data originally stored in the line buffer 304 passes through the shift register and is input to the line buffer 303. In step S1109, the line counter N is updated to N + 1, the process returns to step S1102, and the above-described processing is repeated.

  In step S1107, since the value of the line counter N exceeds the number of lines, data indicating white pixels for one line is input from the image data input B. In step S1108, it is determined whether or not the value of the line counter N is equal to “number of lines + 2”. If No, the process proceeds to step S1109. If Yes, the process ends.

  In this embodiment, since it is assumed that all data of one page is transferred, correction is performed on the assumption that there are white pixels around the image. However, when the image is transferred by being divided into band units of a plurality of lines, a process of inserting the last line of the previous band is also conceivable.

  In this embodiment, reference pixels are corrected using a 5 × 5 window, but the present invention is not limited to the size of the window.

  In this embodiment, line buffer reduction is attempted using binarized data, but 2/3 types of thresholds are set and edge detection is performed using ternary or quaternary data. It does not limit the bit width.

  Furthermore, in the present embodiment, the case where the smoothing process is performed on all the data of one page has been described. However, when one page is divided into a plurality of bands and transferred, the data for the band that does not need to be smoothed is used. May not be transferred twice.

  FIG. 12 is a diagram illustrating an example of processing each band by dividing one page into a plurality of bands. As shown in FIG. 12, when smoothing processing is performed on the text portions of bands 1, 2, and 6 and smoothing processing is not performed on the natural image portions of bands 3 to 5, whether or not the smoothing processing unit 305 performs processing is determined. The function to set is required.

  FIG. 13 is a diagram illustrating an example of a configuration of an image processing unit that can set whether to perform smoothing processing on each of a plurality of bands. For example, when it is not desired to perform the smoothing process on the natural image portions of the bands 3 to 5, the smoothing ON / OFF register 1301 shown in FIG. Just forward.

  Even if the present invention is applied to a system constituted by a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), it is applied to an apparatus (for example, a copying machine, a facsimile machine, etc.) comprising a single device. It may be applied.

  In addition, a recording medium in which a program code of software for realizing the functions of the above-described embodiments is recorded is supplied to the system or apparatus, and the computer (CPU or MPU) of the system or apparatus stores the program code stored in the recording medium. Read and execute. It goes without saying that the object of the present invention can also be achieved by this.

  In this case, the program code itself read from the computer-readable recording medium realizes the functions of the above-described embodiments, and the recording medium storing the program code constitutes the present invention.

  As a recording medium for supplying the program code, for example, a flexible disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a CD-R, a magnetic tape, a nonvolatile memory card, a ROM, or the like can be used.

  In addition, by executing the program code read by the computer, not only the functions of the above-described embodiments are realized, but also the following cases are included. That is, based on the instruction of the program code, an OS (operating system) running on the computer performs part or all of the actual processing, and the functions of the above-described embodiments are realized by the processing. .

  Further, the program code read from the recording medium is written in a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer. After that, based on the instruction of the program code, the CPU of the function expansion board or function expansion unit performs part or all of the actual processing, and the function of the above-described embodiment is realized by the processing. Needless to say.

It is a figure for demonstrating the method of performing a smoothing process after the pseudo halftone processes, such as the conventional halftone. It is a figure for demonstrating the method of performing a smoothing process before pseudo | simulation halftone processes, such as the conventional halftone. 2 is a diagram illustrating an example of a configuration of an image processing unit in the image forming apparatus. FIG. It is a figure which shows an example of the input image data. It is a figure which shows the window 311 into which the binarized pixel data was input. It is a figure which shows an example of the matching pattern memorize | stored in the pattern memory | storage part 314. It is a figure which shows a response | compatibility with the calculation method of a matching pattern and a reference pixel. It is a figure for demonstrating the "position" described in FIG. FIG. 10 is a diagram for explaining density correction of a reference pixel in a pixel correction calculation unit 313. It is a figure which shows the result of having performed the smoothing process. It is a flowchart which shows the line transfer order in this embodiment. It is a figure which shows an example in the case of dividing each page into a plurality of bands and processing each band. It is a figure which shows an example of a structure of the image process part which can set whether each of a some band is smoothed.

Explanation of symbols

301 Line buffer 302 Line buffer 303 Line buffer 304 Line buffer 305 Smoothing processing unit 306 Halftone unit 307 Pulse width modulation (PWM) unit 308 Binary unit 311 Shift register group (window)
312 Edge detection unit 313 Pixel correction calculation unit 314 Pattern storage unit 400 Window 401 Reference pixel

Claims (7)

An image processing apparatus that performs image processing and outputs input multi-value image data,
Binarizing means for binarizing the multi-valued image data;
A plurality of line buffers for holding the binarized binarized data;
Processing means for smoothing the multi-valued image data based on the binarized data held in the plurality of line buffers;
Control means for controlling the order of transferring the multi-value image data smoothed by the processing means to the binarization means;
An image processing apparatus comprising:   The image processing apparatus according to claim 1, wherein the control unit controls an order of transferring the multi-value image data to the binarization unit and an order of transferring the multi-value image data to the processing unit.   3. The image according to claim 1, wherein the processing unit detects an edge portion of the multivalued image data by pattern matching and performs a smoothing process on the detected edge portion of the multivalued image data. Processing equipment.   The processing means further comprises means for setting whether or not to perform processing when each page is processed by dividing one page into a plurality of bands. The image processing apparatus according to item. A processing method of an image processing apparatus that performs image processing on input multi-valued image data and outputs the processed image data,
A binarization step for binarizing the multi-value image data;
A holding step of holding the binarized binarized data in a plurality of line buffers;
A process for smoothing the multi-valued image data based on the binarized data held in the plurality of line buffers;
A control step for controlling the order in which the multi-value image data smoothed in the processing step is transferred to the binarization step;
A processing method for an image processing apparatus, comprising:   A program for causing a computer to execute the processing method of the image processing apparatus according to claim 5.   A computer-readable recording medium on which the program according to claim 6 is recorded.

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