JP2009253534A - Synchronizing information detector, and digital modulation signal analyzer using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide such a technology that can detect synchronizing information even in a channel signal with high level by searching a time position for obtaining a stable correlation power because the signal level is stable for a specified period in the CDMA communication system. <P>SOLUTION: Memory means 4 and 5 store demodulation data in units of configuration chips and spreading codes in units of symbols, and a correlation computation means 6 relatively slides both the demodulation data read for each of symbols from the memory means while sliding the chip position at least within one slot and the spreading code for every plural K symbols in one frame with respect to the respective continuous K symbols so as to obtain a correlative power Ph in a spreading rate N for each symbol. A timing determination means 7 finds out a chip position where the degree of spreading of the plural K correlation powers Ph is minimum as synchronization time information. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention is a digital communication system proposed by 3GPP (Third Generation Partnership Project), particularly a CDMA (Code Divided Multiple Access) communication system, which is modulated with modulation data including a frame sequence configured in a predetermined transmission format. The present invention relates to a synchronization information detecting apparatus for detecting synchronization information for receiving a carrier wave and synchronizing with demodulated demodulated data or specifying a frame position, and a digital modulation signal analyzing apparatus using the same.

  Modulation signal analysis in a CDMA communication system is used to evaluate the quality of a modulation signal, or to evaluate a device or the like by analyzing the modulation signal via the device or the like as described above. As a technique for analyzing the modulation signal, a technique for evaluating a change in the characteristic property of the modulation signal (see Patent Document 1), an evaluation by comparison with an ideal signal (Patent Documents 2, 3, and 4), etc. There is a technology.

  In CDMA communication, on the transmission side, as shown in FIG. 8, the signal of each channel CH is a channel identification code (also referred to as “channelization code”) corresponding to each channel CH in the mixer 20. Then, the signals are collected by the adder 21 and formed into a series of signals. Further, the signals are spread by the spreading means 22 at the spreading rate N with the scrambling code and transmitted.

On the receiving side, after being demodulated, the spread demodulated data S (t) is subjected to a convolution operation with a spreading code as known data to obtain a correlation power P (t) (see Patent Document 1). Then, the peak position (time position) of the correlation power P (t) is obtained, and the synchronization position is established or the frame position is specified. The code of the channel CH used for this correlation uses a code called CH0 whose channel identification code does not change (for example, PLCH (pilot CH) in cdma2000, CPIH in the WCDMA downlink, and DPCCH in the uplink). The correlation power P is expressed by the following equation.
_N-1
P (t) = {ΣS (t + τ) × conj (Code (τ))} ^{2
τ = 0}
N = spreading rate in terms of sending side (= chips per symbol)
= The receiving side indicates the correlation length which is the range of the correlation power.
(It may be expressed as “diffusion rate SF”.)
conj (Code (τ)): Complex conjugate of the spreading code Code (τ).
The spreading code Code (τ) is a product of a channel identification code and a scrambling code.

In the technique of Patent Document 1, the cross-correlation power between the received signal and the known sequence signal is obtained, and the peak value is obtained by reducing the noise of the cross-correlation power using the resampling means and the averaging means. The reception timing is detected. A pilot symbol is used in the received signal as a signal to be correlated.
Japanese Patent Laid-Open No. 10-32523 JP-A-11-196024 JP 2007-53494 A JP 2004-96264 A

In general, in order to synchronize by such correlation, the signal-to-noise ratio (S / N) becomes a problem as described in Patent Document 1. This S / N problem further has the following problem, and it may be difficult to obtain the correlation power peak.
(1) When a channel having a signal level higher than the signal level (demodulation level) of the channel CH used for synchronization exists (for example, when the spreading rate is small), the noise is originally in an asynchronous state but is at a high level. This is the same as being multiplexed in phase with the other signal (digital signal), so it becomes a digital treatment rather than an analog behavior. At this time, the S / N differs depending on the spreading code (which may be referred to as a “diffusion pattern” when the possible values are emphasized), but may be deteriorated by several dB. For example, when the diffusion rate N (SF) = 2, there are two states of diffusion patterns (1, 1) and (1, −1), and a peak may occur in the correlation power depending on the orthogonality. . Since this is a peak due to uncorrelated noise, the S / N becomes worse.
(2) When the signal level (demodulation level) of the channel CH used for synchronization is smaller than the level of all channels, there is a high possibility that the peak of the correlation power is buried in noise and cannot be detected.
Further, in recent years, the required conditions include the following (3) to (4).
(3) In WCDMA communication, a system with higher transmission speed called HSPA or HSPA + is required. In these systems, the signal level of the channel CH used for synchronization is required to be low. For example, in the uplink DPCCH of WCDMA, it is −18 dB or less. This is because, when the correlation length (spreading rate N) is 256, the signal level is -24 dB (-10 LoG256), and considering the noise variation of 10 dB, the S / N that can be expected is -14 dB, which limits the correlation limit. This is the value shown. That is, the signal may be lower.
Further, a state is defined in which the other signal levels are higher than the DPCCH level, such as a channel with a spreading rate N = 2 or 4.
(4) In general, the base station and the terminal can limit the data time of the output of the terminal, and thus can be synchronized even if the level of the DPCCH for synchronizing the uplink signal is small, but the measurement apparatus cannot limit the output timing of the signal In this case, a situation occurs where synchronization cannot be achieved.

  An object of the present invention is to search for a time position where a stable correlation power can be obtained by utilizing the fact that the signal level is stable for a predetermined period in a CDMA communication system. Thus, it is to provide a technique capable of detecting synchronization timing information even when there is a signal of a channel with a low spread rate N and a high level.

In order to achieve the object, the following (a) to (b) were focused.
(A) Orthogonality is guaranteed between channel identification codes (see FIG. 8). Therefore, when synchronization (correlation) is established with demodulated data (data obtained by demodulating the received signal) and spreading code (here, the product of channel identification code and scrambling code, the same applies hereinafter), the synchronized channel The levels of other channels are 0. Therefore, it is advantageous to correlate with the spreading code.
(B) According to the standard of the CDMA communication system, the output power of the output signal for a certain period (1 slot or 0.5 slot) is constant. For example, even when the level of the synchronization channel is low and the correlation power peak cannot be detected, the correlation power is stably included.
(C) Therefore, even if the correlation power of a plurality of times correlates for different symbols, the stable position of each correlation power appears at the same position with respect to the position of each symbol. Since the correlation is for different symbols, the S / N of the correlation power varies. However, if the correlation powers are compared by matching the symbol positions, the correlation powers of the correlation powers can be obtained at positions where the correlation powers are stable. Variation is minimized.

  Here, before explaining specific means for achieving the object, a signal frame of the CDMA communication system necessary for understanding will be described with reference to FIG. FIG. 7 is a frame of one channel of FIG. 8, and is actually transmitted after being spread by each code as described in FIG.

  In FIG. 7, one frame is composed of a plurality of L slots, each slot is composed of a plurality of K symbols, and each symbol is composed of N chips. The spreading rate is N. A chip is the smallest data unit. If the expression is specified by the code “i”, i = 0 to (K × N × L−1) within one frame and i = 0 to (K × N−1) within one slot. It can change. If the code identifying the slot is “j”, it can change within a range of j = 0 to L−1 within one frame. In one numerical example, if the spreading rate is N = 256 chips and K = 10, 1 slot is K × N = 2560 chips, 1 frame is L = 15 slots, K × N × L = 38400 chips.

  Means for achieving the object of the present invention will be described below. Here, the demodulated data stored in the storage means will be described. The storage means stores the demodulated data in units of chips constituting the demodulated data. Therefore, even if the actual chip rate on the transmitting side is g, the demodulated data is not always stored at the chip rate g. When the receiving unit changes the chip rate g to the chip rate M0 (= 1, 2,... Integer multiple), the data is stored at the chip rate M0 × g.

In order to achieve the object of the present invention, according to the first aspect of the present invention, one frame of a modulated signal spread at a spreading rate N by a spreading code is composed of a plurality of L slots, and one slot is composed of a plurality of K symbols. A synchronization information detecting device configured to detect timing information for synchronization based on demodulated data obtained by demodulating and digitizing a CDMA signal modulated by the modulation signal,
Storage means (4, 5) for storing the demodulated data in units of chips and storing the spreading code in units of symbols;
The demodulated data for each symbol read while sliding the chip position within the at least one slot from the storage means for each of the plurality of consecutive K symbols and the spreading code for each of the plurality of K symbols are relative to each other. A correlation calculation means (6) that slides within the one frame to obtain the correlation power Ph over the spread rate N for each symbol;
Timing determining means (7) for detecting, as the synchronization timing information, a chip position where the degree of dispersion of the obtained K correlation powers Ph is minimum.

According to a second aspect of the present invention, one frame of a modulated signal spread at a spreading rate N by a spreading code is composed of a plurality of L slots, and one slot is composed of a plurality of K symbols. A synchronization information detecting device for detecting synchronization timing information based on demodulated data obtained by demodulating and digitizing a CDMA signal modulated with a signal,
Storage means (4, 5) for storing the demodulated data in units of chips and storing the spreading code in at least the symbols;
The demodulated data and symbols are read out for each of the plurality of consecutive K symbols by reading the demodulated data from the storage means while sliding the chip position within the one frame and reading the spread code for each symbol. Correlation calculation means (6) for obtaining the plurality of K correlation powers Ph over the spreading rate N with each spreading code;
Timing determining means (7) for detecting, as the synchronization timing information, a position where the degree of dispersion of the obtained K correlation powers Ph is minimum.

According to a third aspect of the present invention, in the second aspect of the present invention, the correlation calculation means calculates the next correlation power Ph.
_N-1
Ph = {ΣS (i + τ + h _s × N) × conjCode (τ + h _c × N)} ^{2
τ = 0}
S (i + τ + h _s × N): Demodulated data Code (τ + h _c × N): Spread code data conj: Conjugate complex number h _s = 0 to k−1 (a code specifying a symbol on the demodulated data side)
h _c = 0 to k−1 (a code specifying a symbol on the spreading code side)
h = h _s or h _c
N = spread rate = number of chips per symbol i = 0 to the total number of chips in one frame−1 = 0 to (N × K × L−1)
L: Number of slots in one frame K × L: Number of all symbols in one frame N × K × L: Number of all chips in one frame

  According to a fourth aspect of the present invention, in the third aspect of the present invention, the storage means receives demodulated data having a chip rate of a plurality of M0 times the chip rate on the transmission side, and has a chip rate of the plurality of M0 times. When the demodulated data is stored, the correlation calculation means sets τ to M0 × τ, i = 0 to (N × K × L−1) to i = 0 to (M0 × N × K × L−1). ) To calculate.

The invention according to claim 5 demodulates a CDMA signal in which one frame of a modulated signal spread at a spreading rate N by a spreading code is composed of a plurality of L slots, and one slot is composed of a plurality of K symbols. A synchronization information detecting device for detecting timing information for synchronization based on demodulated data obtained by digitization,
Storage means (4, 5) for storing the demodulated data in units of chips and storing the spreading code in units of symbols;
For each of the plurality of consecutive K symbols, the demodulated data for each symbol is read from the storage means while sliding the chip position within the one slot, and the spreading codes of the plurality of K symbols are respectively read from the storage means. Correlation calculating means (6) for obtaining the plurality of K correlation powers Ph over the spreading rate N between the read demodulated data and the read spreading code while sliding the slot position in the frame;
Timing determining means (7) for detecting, as the synchronization timing information, a chip position at which the degree of dispersion of the obtained K correlation powers Ph is minimum.

The invention according to claim 6 is the invention according to claim 5, wherein the correlation calculating means calculates the next correlation power Ph.
_N-1
Ph = {ΣS (i + h × N + τ) × conjCode (τ + h × N + j × K × N)} ^{2 τ = 0}
S (i + h × N + τ): Demodulated data Code (τ + h × N + j × K × N): Spreading code data conj: Conjugate complex number h _s = 0 to k−1 (a code specifying a symbol on the demodulated data side)
h _c = 0 to k−1 (a code specifying a symbol on the spreading code side)
h = h _s or h _c
N = spread rate = number of chips per symbol i = 0 to (total number of chips in one slot−1) = 0 to (N × K−1)
j = 0 to (L-1)
L: Number of slots in one frame

The invention according to claim 7 is the invention according to claim 6, wherein the storage means outputs demodulated data having a chip rate of a plurality of M0 times the chip rate on the transmission side, and a chip rate of the plurality of M0 times. When the demodulated data is stored, the correlation calculation means sets S (i + τ + h _s × N) to S (i + M0 × τ + h _s × N) and i = 0 to (N × K−1) to i = 0. It is set as the structure which replaces and calculates with (M0 * N * K-1).

The invention according to claim 8 receives a CDMA signal in which one frame of a modulated signal spread at a spreading rate N by a spreading code is composed of a plurality of L slots, and one slot is composed of a plurality of Ka symbols. A digital modulation signal analyzing apparatus having a receiving unit (100) that demodulates and outputs digital demodulated data, and an analyzing unit (300) that analyzes the symbol of the demodulated data,
Storage means (4, 5) for storing the demodulated data in units of chips constituting the symbols and storing the spreading code in units of at least the symbols;
The demodulated data for each symbol read while sliding the chip position within the at least one slot from the storage means for each of the plurality of consecutive K symbols and the spreading code for each of the plurality of K symbols are relative to each other. Correlation calculation means (6) that slides within the one frame to obtain the plurality of K correlation powers Ph over the spreading rate N for each symbol;
Timing determining means (7) for detecting, as synchronization timing information, a position where the degree of dispersion of the obtained plurality of K correlation powers is minimum; and the analysis unit obtains the obtained synchronization timing information. Based on this, the frame position is specified and the demodulated data is analyzed.

  The present invention correlates demodulated data and spreading code for consecutive K symbols, and relatively searches and correlates one of them in the range of one frame. Since the minimum position of the K correlation power variations is used as the synchronization timing information, detection can be performed while reducing the influence of S / N. That is, as compared with the conventional method in which the correlation power peak is obtained after reducing the influence of S / N, the processing related to S / N improvement can be reduced and the synchronization timing information can be acquired.

  Embodiments according to the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a functional configuration of an embodiment of a digital modulation signal analyzing apparatus according to the present invention. FIG. 1 also includes a functional configuration of a synchronization information detection unit (apparatus). FIG. 2 and FIG. 3 are diagrams showing a functional configuration of the Nyquist unit, which is a modification when the Nyquist unit is added to the embodiment of FIG. FIG. 4 is a diagram for explaining a first embodiment of the correlation calculation means of FIG. FIG. 5 is a diagram for explaining the operation of the synchronization information detecting means of FIG. FIG. 6 is a diagram for explaining a second embodiment of the correlation calculation means of FIG. FIGS. 7 and 8 have already been described, but are also used in the embodiment of the present invention.

  The receiving unit 100 in FIG. 1 includes a frequency conversion unit 1, an A / D conversion unit 2, and an orthogonal demodulation unit 3. The receiving unit 100 is, for example, a signal having the format of FIG. 7 from a base station (not shown) of a CDMA communication system as a radio system, mixed with a channel identification code as shown in FIG. 8, and spread with a scrambling code. A carrier wave is sent. On the receiving side, this carrier wave is received, and the frequency converting means 1 converts the frequency of the carrier wave into an intermediate frequency signal. The A / D conversion means 2 converts the intermediate frequency signal into digital data. Then, the orthogonal demodulator 3 demodulates the data by separating the data into I and Q orthogonal data. Then, the digital demodulated data is stored in the data storage means 4 in correspondence with the time of reception (reception timing) in units of chips, which is the minimum unit of data. In the receiving unit 100, the transmission side chip rate may be changed to an integer multiple M0. In this case, the data is stored at the changed demodulated data chip rate. A case in which the chip rate is changed will be described in an aspect in which the Nyquist unit 800 is used in Modifications 1 and 2 described later. Up to that point, it will be basically explained that M0 = 1 and the chip rate is the same on the transmitting side and the receiving side and stored in the data storage means 4.

  The demodulated data is a frame having the same data format as that shown in FIG. 7 (spread) and is stored in the order of the time positions of the format. Actually, the data is stored for each of the I and Q data. However, in the present invention, they are collectively referred to as demodulated data. If the demodulated data stored first is used as it is, it is sent continuously in time, so the head position of the transmission frame is stored in the data storage means 4 in time order without being specified. Thus, by detecting the synchronization position, the head position of the frame in the demodulated data is detected, and for example, a flag is set at the head position so that it can be specified and stored. Therefore, the analysis unit 400 can read the demodulated data from the data storage unit 4 by referring to the head position of the frame.

  The code storage means 5 stores in advance at least one frame of spread code data Code (t), which is a combination of a channel identification code to be correlated and a scrambling code, in units of chips. This is known data used at the time of transmission and is stored in advance. This spreading code is used later for correlation synchronization.

  The correlation calculation means 6 reads the demodulated data read from the data storage means 4 (when data used for calculation is indicated: function display S (t) is used) and the spread code read from the code storage means 5 (used for calculation). When data is displayed: function display Code (t) is used.) Correlation calculation for obtaining correlation power is performed. Since the final purpose is to detect the synchronization position based on the correlation power, this correlation calculation is also an operation for searching where the synchronization position is in the frame. The search range is one frame. Accordingly, the correlation power between the demodulated data S (t) in a specific range (for example: demodulated data in symbol units) and the spread code Code (t) in the specific range is obtained, and either one of them is in the range of at least one frame. The correlation power for one frame is obtained while sliding. Hereinafter, (I) a case where the demodulated data S (t) is slid (first embodiment) and (II) a case where the spreading code code (t) is slid (second embodiment) will be described.

  The synchronization information detection means 7 detects synchronization information based on the calculation result of the correlation calculation means 6, and will be described in the following (I) and (II).

  As common conditions for the following (I) and (II), the demodulated signal is spread at a spreading rate N by a spreading code, one frame is composed of a plurality of L slots, and one slot is a plurality of K pieces. Each symbol is composed of N chips (a chip is data of a minimum unit). Therefore, the total number of symbols in one frame is K × L, and the total number of chips in one frame is K × L × N. In order to describe the order and range, for example, “0” starts and ends with “−1”, for example, 0 to L−1. (The same applies to other codes). As a numerical example, 1 frame = 38400 chips, spreading rate N = 256, 1 frame slot number L = 10, 1 slot symbol number K = 15.

(I) When demodulated data S (t) is slid (first embodiment)
This is advantageous when the level fluctuation is small within the search range (in one frame = K × L × N number of chips). The channel used for detecting the synchronization information is advantageously CPICCC or DPSSH, and one symbol thereof is used.
(I-1) The calculation data acquisition means 6a is provided with demodulated data S (i + τ + 0 × N), S (i + τ + 1 × N),..., S (i + τ + K × N) at each of the consecutive K symbol positions. Is read from the data storage means 4 by sliding the chip position within one frame (by changing from i = 0 to (K × L × N−1) in each demodulated data). The general form is assumed to be demodulated data S (i + τ + h _s × N). h _s takes a value from 0 to K−1 and is a code for specifying a symbol position (or symbol interval (long)). Here, the start h _s = 0 is stored in the data storage means 4 in time series. It may be an arbitrary position of the stored demodulated data. Accordingly, here, h _s corresponds to the order (or number) of positions.

(I-2) Further, the calculation data acquisition means 6a is configured to use spreading codes Code (τ + 0 × N), Code (τ + 1 × N),..., Code (τ + K ×) at the consecutive K symbol positions. N) is read from the code storage means 5. The general form is Code (τ + h _c × N). In addition, h _c is a code for specifying a symbol position (or symbol interval (long)) similarly to h _s and takes a value from 0 to K−1. However, h _s need not be the same value. . Further, the start h _c = 0 may be at an arbitrary position, similarly to h _s .

(I-3) The arithmetic processing means 6b obtains the plurality of K correlation powers Ph over the spreading rate N between the read demodulated data at each symbol position and the spreading code at each symbol position. That is, the following calculation is performed.
_N-1
P0 = | ΣS (i + τ + 0 × N) × conjCode (τ + 0 × N) | ^{2
τ = 0}
_N-1
P1 = | ΣS (i + τ + 1 × N) × conjCode (τ + 1 × N) | ^{2
τ = 0}
...

_N-1
PK-1 = | ΣS (i + τ + (K−1) × N)
^{τ = 0} × conjCode (τ + (K−2) × N) | ²

The general formula for obtaining the correlation powers P0 to PK-1 can be expressed as follows.
_N-1
Ph = | ΣS (i + τ + h _s × N) × conjCode (τ + h _c × N) | ^{2
τ = 0}
i = 0 to the total number of chips in one frame—1 = 0 to (N × K × L−1)
h _s = 0 to K-1
h _c = 0 to K−1
h = h _s or h _c

FIG. 4 shows how the correlation calculation (I) is performed. The demodulated data is read by sliding the demodulated data S (h _s × N) at consecutive K symbol positions (in one slot) for one frame (dotted line in the demodulated data S (t) column in FIG. 4). Yes. Similarly, consecutive K codes (h _c × N) are read in one slot, and the correlation power Ph is obtained in a one-to-one manner as shown in FIG. For each correlation power, a graph is obtained with the vertical axis representing the power and the horizontal axis representing the chip position (maximum K × L × N). The start chip position on the horizontal axis of each graph is shifted by one symbol (the number of N chips). Originally, if the S / N of the correlation is good, for example, the peak position appears at the same position Δt as shown in FIG. 4 and can be used as synchronization information. However, in practice, it is difficult to obtain such a peak. Synchronization information is detected by the synchronization information detection means 7.

  The synchronization information detecting means 7 receives the calculation result of the correlation calculating means 6 and adjusts the horizontal axis position (which is also the chip position and the time position) in which each data is sequentially shifted for each symbol. The variance (variation) of each correlation power is calculated (see FIG. 5). The variance may be a difference between individual correlation powers with respect to the average value of the entire correlation power at the chip position, or may be a specific value instead of the average value. The synchronization information detection means 7 further searches for a point where the width of the dispersion is minimum, and sets the chip position Δt on the horizontal axis as the synchronization information position. If these levels are stable, a correlation should be obtained even if the S / N is bad, and a constant correlation power can be obtained. Since the noise part has a large variation, the difference between the noise parts becomes small if the difference is taken, and the chip position can be detected as synchronization information.

(II) When spreading code code (t) is slid (second embodiment)
Depending on the slot, there may be a case where a reference signal (represented by the symbol HS and inserted by regulation is a signal used for reception at the terminal) is multiplexed and level fluctuations are likely to occur. However, this is an advantageous method. According to the 3GPP regulations, the level of the reference signal HS is stable for 3 slots. Therefore, when detecting the synchronization information here, the data for two slots are searched over one frame to see the synchronization state of the symbols in one slot. Further, CPICCC or DPSSH is advantageous as a channel used for synchronization information detection, and one symbol thereof is used.
(II-1) The calculation data acquisition means 6a is provided with demodulated data S (i + τ + 0 × N), S (i + τ + 1 × N),..., S (i + τ + K × N) at each of the consecutive K symbol positions. Is read out from the data storage means 4 by sliding the chip position within one slot (by changing each demodulated data from i = 0 to K × N−1). The general form is assumed to be demodulated data S (i + τ + h _s × N). h _s is as described in (I) above. In FIG. 6B, the slide range of the demodulated data S (i + τ + h _s × N) is indicated by a dotted line.

(II-2) Further, the calculation data acquisition means 6a is configured to use spreading codes Code (τ + 0 × N + j × K × N), Code (τ + 1 × N + j × K × N), ..., Code (τ + K × N + j × K × N) is slid by one slot in one frame (j = 0 to L−1) and read from the code storage means 5. The general form is Code (τ + h _c × N + j × K × N). Note that h _{c is} also as described in (I) above. In FIG. 6C, the slide range of the spreading code Code (τ + h _s × N + j × N) is indicated by a dotted line.

  In the case of (II), as described above, the demodulated data is slid finely in units of one chip in units of symbols (for a total of two slots). The spreading code is roughly slid in units of one slot.

(II-3) The arithmetic processing means 6b obtains the plurality of K correlation powers Ph over the spreading rate N between the read demodulated data at each symbol position and the spreading code at each symbol position (FIG. 6 ( See C)). That is, the following calculation is performed.
_N-1
P0 = | ΣS (i + τ + 0 × N) × conjCode (τ + 0 × N + j × K × N) | ^{2 τ = 0}
_N-1
P1 = | ΣS (i + τ + 1 × N) × conjCode (τ + 1 × N + j × K × N) | ^{2
τ = 0}
...

_N-1
P (K−1) = | ΣS (i + τ + (K−1) × N)
^{τ = 0} × conjCode (τ + (K−2) × N) + j × K × N | ²

The general formula for obtaining the correlation powers P0 to P (K-1) can be expressed as follows.
_N-1
Ph = | ΣS (i + τ + h _s × N)
^{τ = 0} × conjCode (τ + h _c × N + j × K × N) | ²
i = 0 to (the total number of chips in one slot−1) = 0 to (N × K−1)
j = 0 to L-1
h _s = 0 to K-1
h _c = 0 to K−1
h = h _s or h _c

FIG. 6 shows how to perform these (II) correlation operations. Demodulated data is obtained by sliding demodulated data S (h _s × N) at consecutive K symbol positions (in one slot) for one slot (in the demodulated data S (t) column in FIG. 6B). (A fine dotted line) Reading (using demodulated data for a total of 2 slots). Similarly, reading is performed while sliding each of K consecutive codes (h _c × N) within one slot by one slot (K × N) within one frame (sliding range in FIG. 6C), and correlation power Seeking. The correlation powers P0 to PK-1 are shown as shown in FIG. The correlation power Ph is shifted from the start position on the horizontal axis by one symbol. The position where the synchronization information is considered to be present is in one slot (slot jp in FIG. 6). That is, as described above, in (II), data for two slots is searched over one frame, and the synchronization state of the symbols in one slot is observed.

Since the synchronization information detecting means 7 receives the calculation result of the correlation calculating means 6 and each data is sequentially shifted for each symbol, the horizontal axis position (which is also the chip position as shown in FIG. 6D) In addition, the variance (variation) of each correlation power is calculated as shown in FIG. Similar to (I), the variance may be the difference between the individual correlation powers with respect to the average value of the entire correlation power at the chip position, or may be a specific value instead of the average value. The synchronization information detecting means 7 further searches for a point where the width of the dispersion is minimum, and detects the chip position on the horizontal axis as synchronization information. At this time, when the slot position jp and the chip position ip from the start position of the slot position jp are obtained, the frame start position can be back-calculated and specified as follows.
Frame start position = −N × K × jp + ip

  The frequency correction unit 300 detects the carrier frequency deviation from the data storage unit 4, shifts the frequency component of the demodulated data by the detected frequency frequency deviation, and sends it to the analysis unit 400.

  The analysis unit 400 is demodulated data such as symbol data to be analyzed, which is read with reference to the start value of the frame specified by the synchronization information detection unit 7, and is demodulated data frequency-corrected by the frequency correction unit 300. Is analyzed. For example, data that is evaluated by comparing symbol data with ideal symbol data is read, and, for example, the phase change of the pilot carrier signal is analyzed. Alternatively, the symbol data is evaluated by comparing it with ideal data in a vector manner. Note that the synchronization information detection means 7 can also set a flag at the frame start position based on the detected synchronization information so that the analysis unit 400 can easily read it.

  The display control unit 500 displays the result analyzed by the analysis unit 400 in a desired format. For example, the movement of the symbol data vector is displayed on the IQ coordinates of the tube surface of the display unit 600. In addition, the display control unit 500 performs operation guidance and the like.

  In the above configuration, the synchronization information detection unit 200 executes the memory that configures the data storage unit 4 and the code storage unit 5, the memory that stores the above-described other functional configuration (block), and the program. It can be composed of a CPU.

  According to the present invention, as described above, it is possible to detect the synchronization position, perform frequency correction, and perform modulation signal analysis based on the corrected data.

"Modification 1"
Modification 1 is a case where the Nyquist unit 800 is inserted between the receiving unit 100 and the synchronization information detecting unit 200 in FIG. 1, and the Nyquist unit 800 includes the timing extraction unit 8, the chip time conversion unit 9, and the Nyquist unit in FIG. 2. This is an example in the case of being configured by the converting means 10.

In FIG. 2, the A / D conversion means 2 outputs demodulated data (I ₀ , Q ₀ ) at a chip rate that is twice (generally, twice or more) the chip rate used on the sending side. The timing extraction unit 8 regenerates the clock signal by configuring a PLL based on, for example, the phase of the square-detected signal and the reference signal provided therein. Then, the timing of the recovered clock signal is sent to the chip time conversion means 9. The chip time conversion means 9 corrects the chip time by resampling the demodulated data (I ₀ , Q ₀ ) at this reproduced timing, and outputs it as demodulated data (I ₁ , Q ₁ ). The chip rate of the demodulated data (I ₁ , Q ₁ ) at this time is 2 times or more and is generally set to about 4 times. Further, root Nyquist filter processing (also referred to as RRC = Root Rised Cosine Filter) is performed by the Nyquist unit 10. In other words, a filter process having a predetermined roll-off rate with respect to the clock frequency is performed. By this Nyquistization, the data can be converged and the synchronization capability can be improved. The chip rate of the demodulated data (I, Q) output from the Nyquist means 10 is set to 1.
In this case, the operation of the synchronization information detection unit 200 can be applied to either (I) or (II).

"Modification 2"
Modification 2 is an example in which the Nyquist unit 800 is inserted between the receiving unit 100 and the synchronization information detecting unit 200 in FIG. 1, and the Nyquist unit 800 is configured by the Nyquistizing unit 10 in FIG. 3. is there.

In FIG. 3, the A / D conversion means 2 outputs the demodulated data (I ₀ , Q ₀ ) at a chip rate that is M0 times (generally, 4 times or more is sufficient) the chip rate used on the sending side. . Then, the root Nyquist filter process is performed by the Nyquist unit 10 under the condition that the data at the time of transmission can be reproduced. By this Nyquistization, the data can be converged and the synchronization capability can be improved. Note that the chip rate of the demodulated data (I ₂ , Q ₂ ) output from the Nyquist means 10 is M0 times.
In this case, the operation of the synchronization information detecting unit 200 applies the following (A) instead of the above-mentioned correlation power Ph equation (I) and applies the following (B) instead of the above-mentioned correlation power Ph equation (II). To do.

(I)
_N-1
Ph = | ΣS (i + M0 × τ + h _s × N) × conjCode (τ + h _c × N) | ^{2
τ = 0}
i = 0 to (M0 × N × K × L−1)
Other operations are the same as in the above (I).

(B)
_N-1
Ph = | ΣS (i + M0 × τ + h _s × N)
^{τ = 0} × conjCode (τ + h _c × N + j × K × N) | ²
i = 0 to (M0 × N × K−1)
j = 0 to L-1
Other operations are the same as in (II) above.

It is a figure which shows the function structure of embodiment about the digital modulation signal analysis apparatus which concerns on this invention. The functional configuration of the synchronization information detection unit (device) is also included. It is a modification when a Nyquist part is added to the embodiment of FIG. 1, and is a diagram showing a functional configuration of the Nyquist part. It is another modification at the time of adding a Nyquist part to the embodiment of Drawing 1, and is a figure showing the functional composition of the Nyquist part. It is a figure for demonstrating the 1st embodiment of the correlation calculating means of FIG. It is a figure for demonstrating operation | movement of the synchronous information detection means of FIG. It is a figure for demonstrating the 2nd embodiment of the correlation calculating means of FIG. It is a figure for demonstrating a data format. It is a figure for demonstrating spreading | diffusion on the transmission side of a CDMA communication system.

Explanation of symbols

1 frequency conversion means, 2 A / D conversion means, 3 orthogonal demodulation means, 4 data storage means, 5 code storage means, 6 correlation calculation means, 6a calculation data acquisition means,
6b arithmetic processing means, 7 synchronization information detecting means, 8 timing extracting means,
9 Chip time conversion means 10 Nyquist means
20 mixers, 21 adders, 22 spreading means,
100 receiving unit, 200 synchronization information detecting unit, 300 frequency correcting unit,
400 analysis unit, 500 display control unit, 600 display unit, 700 operation unit,
800 Nyquist Club

Claims (8)

One frame of a modulated signal spread at a spreading rate N by a spreading code is composed of a plurality of L slots, and one slot is composed of a plurality of K symbols, and a CDMA signal modulated by the modulated signal is demodulated. A synchronization information detecting device for detecting timing information for synchronization based on demodulated data obtained by digitization,
Storage means (4, 5) for storing the demodulated data in units of chips constituting the symbols and storing the spreading code in units of symbols;
The demodulated data for each symbol read while sliding the chip position within the at least one slot from the storage means for each of the plurality of consecutive K symbols and the spreading code for each of the plurality of K symbols are relative to each other. A correlation calculation means (6) that slides within the one frame to obtain the correlation power Ph over the spread rate N for each symbol;
A synchronization information detecting apparatus comprising: timing determination means (7) for detecting, as the synchronization timing information, a chip position at which the degree of dispersion of the obtained K correlation powers Ph is minimum. One frame of a modulated signal spread at a spreading rate N by a spreading code is composed of a plurality of L slots, and one slot is composed of a plurality of K symbols, and a CDMA signal modulated by the modulated signal is demodulated. A synchronization information detecting device for detecting timing information for synchronization based on demodulated data obtained by digitization,
Storage means (4, 5) for storing the demodulated data in units of chips and storing the spreading code in at least the symbols;
The demodulated data and symbols are read out for each of the plurality of consecutive K symbols by reading the demodulated data from the storage means while sliding the chip position within the one frame and reading the spread code for each symbol. Correlation calculating means (6) for obtaining the plurality of K correlation powers Ph over the spreading rate N with each spreading code;
A synchronization information detection apparatus comprising: timing determination means (7) for detecting, as the synchronization timing information, a position where the degree of dispersion of the obtained K correlation powers Ph is minimum. The synchronization information detecting apparatus according to claim 2, wherein the correlation calculation unit calculates a next correlation power Ph.
_N-1
Ph = | ΣS (i + τ + h _s × N) × conjCode (τ + h _c × N) | ^{2
τ = 0}
S (i + τ + h _s × N): Demodulated data Code (τ + h _c × N): Spread code data conj: Conjugate complex number h _s = 0 to k−1 (a code specifying a symbol on the demodulated data side)
h _c = 0 to k−1 (a code specifying a symbol on the spreading code side)
h = h _s or h _c
N = spread rate = number of chips per symbol i = 0 to the total number of chips in one frame−1 = 0 to N × K × L−1
L: Number of slots in one frame K × L: Number of all symbols in one frame N × K × L: Number of all chips in one frame   The storage means outputs demodulated data with a chip rate of M0 times a plurality of chip rates on the transmission side, and stores the demodulated data with a chip rate of M0 times the plurality of M0 times. 4. The synchronization according to claim 3, wherein i = 0 to (N × K × L−1) is replaced with i = 0 to (M0 × N × K × L−1) for τ. 5. Information detection device. Obtained by demodulating and digitizing a CDMA signal in which one frame of a modulated signal spread at a spreading rate N by a spreading code is composed of a plurality of L slots and one slot is composed of a plurality of K symbols A synchronization information detecting device for detecting timing information for synchronization based on demodulated data,
Storage means (4, 5) for storing the demodulated data in units of chips and storing the spreading code in units of symbols;
For each of the plurality of consecutive K symbols, the demodulated data for each symbol is read from the storage means while sliding the chip position within the one slot, and the spreading codes of the plurality of K symbols are respectively read from the storage means. Correlation calculating means (6) for obtaining the plurality of K correlation powers Ph over the spreading rate N between the read demodulated data and the read spreading code while sliding the slot position in the frame;
A synchronization information detection apparatus comprising: timing determination means (7) for detecting, as the synchronization timing information, a chip position where the degree of dispersion of the obtained K correlation powers Ph is minimum. The synchronization information detecting apparatus according to claim 5, wherein the correlation calculation unit calculates a next correlation power Ph.
_N-1
Ph = | ΣS (i + h × N + τ) × conjCode (τ + h × N + j × K × N) | ^{2
τ = 0}
S (i + h × N + τ): Demodulated data Code (τ + h × N + j × K × N): Spreading code data conj: Conjugate complex number h _s = 0 to k−1 (a code specifying a symbol on the demodulated data side)
h _c = 0 to k−1 (a code specifying a symbol on the spreading code side)
h = h _s or h _c
N = spread rate = number of chips per symbol i = 0 to (total number of chips in one slot−1) = 0 to (N × K−1)
j = 0 to (L-1)
L: Number of slots in one frame The storage means outputs demodulated data having a chip rate of a plurality of M0 times the chip rate on the transmission side, and stores the demodulated data having a chip rate of the plurality of M0 times, and the correlation calculating means stores the S (i + τ + h _s XN) is replaced with S (i + M0 × τ + _hs × N), and i == 0 to (N × K−1) is replaced with i = 0 to (M0 × N × K−1). The synchronization information detecting apparatus according to claim 6. One frame of a modulated signal spread at a spreading rate N by a spreading code is constituted by a plurality of L slots, and one slot is received and demodulated by receiving a CDMA signal comprising a plurality of Ka symbols. A digital modulation signal analyzing apparatus having a receiving unit (100) for outputting and an analyzing unit (300) for analyzing the symbol of the demodulated data,
Storage means (4, 5) for storing the demodulated data in units of chips constituting the symbols and storing the spreading code in units of at least the symbols;
The demodulated data for each symbol read while sliding the chip position within the at least one slot from the storage means for each of the plurality of consecutive K symbols and the spreading code for each of the plurality of K symbols are relative to each other. Correlation calculation means (6) that slides within the one frame to obtain the plurality of K correlation powers Ph over the spreading rate N for each symbol;
Timing determining means (7) for detecting, as synchronization timing information, a position at which the degree of dispersion of the calculated K correlation powers is minimized,
The digital modulation signal analysis apparatus characterized in that the analysis unit specifies the frame position based on the obtained timing information for synchronization and analyzes the demodulated data.

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