JP2009244648A - Light modulator and manufacturing method thereof, and optical integrating element and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent increase of the number of production processes in a light modulator having a semi-insulating clad layer. <P>SOLUTION: The light modulator is equipped with: an incidence end face 511 receiving incident light; an i-InGaAsP optical waveguide layer 503 propagating the incident light; a pair of electrodes applying an electric field to the i-InGaAsP optical waveguide layer 503; an emission end face 512 emitting light modulated by the applied electric field; an n-InP buffer layer 502 covering a lower face of the i-InGaAsP optical waveguide layer 503; and an n-InP layer 507 provided on the i-InGaAsP optical waveguide layer 503. An SI-InP layer 506 is provided, covering a top face of the i-InGaAsP optical waveguide layer 503 and a side face of the i-InGaAsP optical waveguide layer 503. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an optical modulator having an optical waveguide, in particular, an optical modulator used in an optical transmission device and the like, a manufacturing method thereof, a semiconductor laser including the optical modulator and a wavelength tunable laser, an optical amplifier, and phase control. The present invention relates to a semiconductor optical integrated device including an optical semiconductor device to which a forward bias is applied, such as an apparatus and an optical waveguide, and a manufacturing method thereof.

  In recent years, wavelength tunable lasers used in optical communication systems have been required to integrate not only wavelength tunable functions but also light modulation functions. In particular, it is important to support ultra-high speed optical modulation characteristics under low voltage driving and advanced modulation formats such as multi-level modulation. Furthermore, in the case of integration, monolithic integration capable of minimizing the element size is desirable. In addition, monolithic integration is expected to reduce the cost because the assembly cost can be reduced.

  The pin structure is a structure in which a waveguide layer structure is composed of a p-type cladding layer, a non-doped (hereinafter referred to as “i”) optical waveguide core layer, and an n-type buffer layer. When this pin structure is applied to an optical modulator, a forward bias region such as a wavelength tunable laser and a p-type cladding layer can be shared. This facilitates monolithic integration. This is because the forward bias region is generally formed with a structure in which the upper part of the active layer has a p-type cladding layer and the lower part of the active layer has an n-type buffer layer, so that both the forward bias region and the optical modulator side are p. It has a mold cladding layer. In this case, a butt joint joining technique as shown in Patent Document 1 can be used for monolithic integration of different functional areas such as a forward bias area and an optical modulator.

FIG. 1 shows a method for joining optical waveguide layers by butt joint joining. In this method, an optical waveguide layer A102 and a p-InP cladding layer A103 are formed on an n-InP substrate 101, and a SiO ₂ mask 104 is formed on a part of the p-InP cladding layer A103 (FIG. 1A). ). Only the portion of the p-InP clad layer A103 that is not covered with the SiO ₂ mask 104 is etched using an etchant (FIG. 1B). An optical waveguide layer B105 and a p-InP clad layer B106 are formed on the n-InP substrate 101 exposed by etching (FIG. 1C), and the p-InP clad layer A103 and the p-InP clad layer B106 are formed. Then, a p-InP cladding layer 107 is formed (FIG. 1D).

  In this butt joint bonding technique, if the p-InP cladding layer A103 in the first region (for example, the forward bias region) is not bonded to the optical waveguide layer A102 in a sufficiently thin layer thickness of about submicrometer, the second region The optical waveguide layer B105 (for example, on the optical modulator side) rises to the upper cladding layer side of the first region at the joining surface, and there arises a problem that abnormal growth and coupling loss at the joining point increase. Therefore, when the technique described in Patent Document 1 is used, it is difficult to join when the cladding layer is thick, so that the cladding layer of the optical integrated device is common (same doping, p-type layer in the case of the above structure). If there is, it can be realized by forming a common cladding layer (p-InP cladding layer 107) in the entire two regions after the optical waveguide layer A102 and the optical waveguide layer B105 are joined.

  FIG. 2 shows an example of an optical modulator. FIG. 2A shows an example of a pin structure optical modulator. This p-i-n structure optical modulator has a mesa structure in which an optical waveguide layer 202 and a p-InP cladding layer 203 are stacked on an n-InP substrate 201. A signal electrode 204 is formed on the p-InP cladding layer 203, and a ground electrode 205 is formed on the lower surface of the n-InP substrate 201. The features of the pin structure optical modulator as shown in FIG. 2A are that the applied electric field is concentrated on the optical waveguide layer 202 which is a thin i layer, so that the refractive index modulation efficiency is high and the waveguide length is short. A high extinction ratio may be obtained. On the other hand, this thin i layer has a large capacitance, so it is difficult to achieve phase velocity matching and impedance matching between the modulated RF signal and the optical signal. Another problem is that the light absorption loss and the electric signal absorption loss in the p-InP cladding layer 203 are large.

  An n-SI (semi-insulating layer) -in structure optical modulator as shown in FIG. 2 (b) is proposed as a structure for improving the disadvantages of the pin structure optical modulator shown in FIG. 2 (a). (Patent Document 2). This n-SI-i-n structure optical modulator includes an n-InP buffer layer 207, an i-optical waveguide layer 208, an SI-InP cladding layer 209, and an n-InP cladding layer 210 on an SI-InP substrate 206. A mesa structure in which is stacked is formed. A signal electrode 211 is formed on the n-InP cladding layer 210, and a ground electrode 212 is formed on the n-InP buffer layer 207.

According to this n-SI-i-n structure, loss of optical signals and electrical signals due to the p-type semiconductor layer can be reduced, phase velocity matching and impedance matching are easy, and it is advantageous for widening the band. Further, by inserting the SI-InP cladding layer 209 between the n-InP cladding layer 210 and the i-optical waveguide layer 208, high withstand voltage characteristics are ensured. Since the applied electric field is applied to a limited region in the SI-InP clad layer 209 and the i-optical waveguide layer 208, the modulation efficiency of the refractive index due to the electro-optic effect can be increased, and low voltage driving, Light modulation with a short electrode length becomes possible. However, since the n-SI-i-n structure optical modulator and the clad layer in the forward bias region such as the wavelength tunable laser are different, there is a problem that monolithic integration of both is very difficult.
JP-A-9-102649 International Publication No. 2004/081638 Pamphlet JP 2003-177368 A Japanese Patent Laid-Open No. 11-87844

  By the way, in an optical modulator such as an n-SI-i-n structure, an effect that an electric field can be effectively applied to the optical waveguide layer by forming an SI layer on the side surface of the waveguide as in Patent Document 3 is sought. There is also a structure. However, for this purpose, the optical modulator also requires a step of forming the SI layer after the formation of the high mesa waveguide, and there is a problem that the number of manufacturing steps increases. Further, there are concerns that turn-on is suppressed at the interface between the waveguide and the SI layer regrowth, a step is formed on the top of the waveguide mesa due to SI layer regrowth, and electrode breakage occurs in the subsequent electrode process. .

  In order to monolithically integrate a plurality of regions having different cladding layers, the following method has been considered.

(I) Formation of a butt joint including an optical waveguide layer and a cladding layer (OSCAR-BJ) instead of a normal butt joint of only an optical waveguide layer. (Figure 3)
(Ii) After the normal butt joint, a clad layer in one region is formed by overall growth. Thereafter, the cladding layer in the other region is removed, and a desired cladding layer is formed in that region. (Fig. 4)

FIG. 3 is a diagram for explaining (i). In this method, first, an optical waveguide layer 302 in a first region and an InP cladding layer 303 in a first region are formed on an InP substrate 301, and a SiO ₂ mask is formed on a part of the InP cladding layer 303 in the first region. 304 is formed (FIG. 3A). Only the portion not covered with the SiO ₂ mask 304 is etched using an etching solution (FIG. 3B). A second region of the optical waveguide layer 305 and a second region of the InP clad layer 306 are formed on the exposed InP substrate 301 (FIG. 3C).

  For (i), an OSCAR-BJ (One-step cladding layer butt joint) technique that can be coupled even when the upper cladding layers (InP cladding layers 303 and 306) are as thick as about 1 μm can be used (Patent Literature). 4). This enables a structure in which different optical waveguide layers (optical waveguide layers 302 and 305) and upper cladding layers having different dopings are integrated at the same junction at the same time, and the upper cladding layer in different regions must be shared. Is resolved. Moreover, it is not necessary to perform additional growth of the shared cladding layer at the end, and the number of growth times can be reduced.

  However, there are many restrictions and difficulties in implementing (i). For example, a) The layer thickness of the InP cladding layer 303 on the side to be bonded is suppressed to about 1 μm in order to control the optical waveguide layer so as not to be raised to the InP cladding layer 303 on the bonding surface. There is a need to appropriately select, c) the shape of the optical waveguide layer 302 and the InP clad layer 303 is controlled by side etching, and the butt joint growth conditions may be restricted.

FIG. 4 is a diagram for explaining (ii). In this method, first, an optical waveguide layer 402 in a first region and an InP cladding layer 403 in a first region are formed on an InP substrate 401, and a SiO ₂ mask is formed on a part of the InP cladding layer 403 in the first region. 404 is formed (FIG. 4A). Only the portion not covered with the SiO ₂ mask 404 is etched using an etching solution (FIG. 4B). A second region of the optical waveguide layer 405 and a second region of the InP clad layer 406 are formed on the InP substrate 401 exposed by etching (FIG. 4C). After removing the SiO ₂ mask 404, an InP cladding layer 407 in the first region is grown (FIG. 4D), and subsequently, after forming the SiO ₂ mask 408, etching is performed (FIG. 4E). The InP clad layer 409 in the second region is grown (FIG. 4F).

  On the other hand, in (ii), a) the number of times of growth increases, and b) a step on the crystal growth surface occurs at the joint surface of the optical waveguide layer 402 in the first region. There is a problem that defects occur in the through process of exposure, dry etching, and buried (BH) growth of the side surfaces of the optical waveguide layers 402 and 405 when forming the optical waveguide layer 405 in this region.

  In recent years, it has also been required to monolithically integrate three or more different functional areas such as a laser, an optical amplifier, a phase control device, and an optical modulator. Both (i) and (ii) The difficulty of repeatedly performing the joining is also considered.

  As described above, butt joint bonding in different functional regions having different cladding layers has problems such as limitation of formation conditions, fear of occurrence of defects in the through process, and increase in the number of manufacturing steps such as growth.

  On the other hand, in addition to the waveguide and the butt joint of the upper clad layer, in order to realize an optical modulator monolithically integrated with the wavelength tunable laser, the BH structure is configured with the same composition and structure in the same element. This is important for process simplification. That is, a BH structure having a high current block characteristic is required in the forward bias region, and an ultra-low capacitance BH structure is required in the optical modulator region, and there is a high resistance layer BH structure as a structure satisfying these. In the case of a high resistance BH structure, a high mesa waveguide may be formed and a single high resistance layer may be grown. Compared to a double buried (block growth + cladding growth) structure or a pnp-BH structure, the fabrication is possible. It is also easy.

  An object of the present invention is to provide an optical modulator having a semi-insulating clad layer, which does not increase the number of manufacturing steps, suppresses turn-on at the interface between the optical waveguide and the semi-insulating layer regrowth. An object of the present invention is to provide a structure capable of suppressing the generation of a step and forming the semi-insulating layer on the side surface of the optical waveguide without causing an electrode step in the subsequent electrode process.

  Another object of the present invention is to easily manufacture an optical integrated device including an optical modulator having a semi-insulating cladding layer and an optical semiconductor element connected to the optical modulator without increasing the number of steps. It is to provide a structure that can be done.

According to the present invention, an incident end face for incident light;
A first optical waveguide layer that propagates the incident light;
A pair of electrodes for applying an electric field to the first optical waveguide layer;
An emission end face for emitting the light modulated by the applied electric field;
A first conductive lower cladding layer covering the lower surface of the first optical waveguide layer;
The first conductive upper cladding layer provided on the first optical waveguide layer;
With
There is provided an optical modulator provided with a semi-insulating semiconductor layer covering an upper surface of the first optical waveguide layer and a side surface of the first optical waveguide layer.

According to the present invention, the above-described optical modulator;
An optical semiconductor element connected to the optical modulator;
Including
An optical integrated device is provided in which a forward bias is applied to the optical semiconductor device.

Moreover, according to the present invention, a manufacturing method suitable for the optical modulator is provided. That is, according to the present invention, a step of preparing a semiconductor substrate;
Forming a first laminated structure by sequentially laminating a first conductive cladding layer and a first optical waveguide layer on the semiconductor substrate;
Etching the first laminated structure to form a first mesa;
Covering the surface of the formed first mesa with a semi-insulating semiconductor layer;
A method for manufacturing an optical modulator is provided.

Furthermore, according to the present invention, a manufacturing method suitable for the above-described optical integrated device is provided. That is, according to the present invention, a step of preparing a semiconductor substrate;
Forming a second laminated structure by sequentially laminating a first conductive cladding layer, a second optical waveguide layer, and a second conductive cladding layer on the semiconductor substrate;
Forming a first laminated structure by laminating a first optical waveguide layer on the first conductive cladding layer;
Connecting the first optical waveguide layer and the second optical waveguide layer;
Etching the first laminated structure to form a first mesa and etching the second laminated structure to form a second mesa;
Burying the second mesa with a semi-insulating semiconductor layer and covering the surface of the first mesa with the semi-insulating semiconductor layer;
An optical integrated device manufacturing method including the above is provided.

  According to the present invention, an optical modulator having a semi-insulating cladding layer has a structure capable of suppressing turn-on at the interface between the optical waveguide and the semi-insulating layer regrowth. In addition, it has a structure that forms a semi-insulating semiconductor layer on the side surface of an optical waveguide without generating a step on the top of the waveguide mesa due to regrowth of the semi-insulating layer and subsequent electrode step breakage in the subsequent electrode process. ing. Therefore, the yield of the optical modulator is improved and a high-performance optical modulator can be realized.

  In addition, the second effect of the present invention is a structure in which an optical modulator having a semi-insulating cladding layer and an optical semiconductor element connected to the optical modulator can be easily manufactured without increasing the manufacturing process. The yield of an optical integrated device having an optical modulator is improved, and a high-performance optical integrated device can be realized.

  Hereinafter, the present invention will be described in detail with reference to the drawings.

(First embodiment)
FIG. 5 is a diagram illustrating the optical modulator of the present embodiment. FIG. 5A is a plan view showing the optical modulator of this embodiment. FIG. 5E is a cross-sectional view taken along the line BB ′ in FIG. 5A of the optical modulator according to the present embodiment.

  The optical modulator of the present embodiment includes an incident end face 511 that receives light, an i-InGaAsP optical waveguide layer 503 (first optical waveguide layer) that propagates the incident light, and an electric field applied to the i-InGaAsP optical waveguide layer 503. A pair of electrodes (signal electrode 509, ground electrode 510), an emission end face 512 that emits light modulated by the applied electric field, and an n-InP buffer layer that covers the lower surface of the i-InGaAsP optical waveguide layer 503 502 (first conductive lower clad layer) and an n-InP layer 507 (first conductive upper clad layer) provided on the i-InGaAsP optical waveguide layer 503. An SI-InP layer 506 (semi-insulating semiconductor layer) that covers the upper surface of the i-InGaAsP optical waveguide layer 503 and the side surface of the i-InGaAsP optical waveguide layer 503 is provided.

  The optical modulator according to the present embodiment includes an Fe (iron) -doped high resistance type InP substrate 501. A stacked body 513 in which an n-InP buffer layer 502 and an i-InGaAsP optical waveguide layer 503 are sequentially stacked is provided on the InP substrate 501. As shown in FIG. 5E, the stacked body 513 is processed into a mesa shape. The surface of the stacked body 513 is covered with the SI-InP layer 506. This optical modulator is a so-called Mach-Zehnder optical modulator.

  In this embodiment, the semi-insulating semiconductor layer refers to a semiconductor layer doped with iron as an impurity. Thereby, inside the semi-insulating semiconductor layer, the doped iron functions as a deep acceptor in the semiconductor layer and captures and ionizes the electrons existing in the vicinity, so that there are no free electrons. For this reason, the current is prevented from flowing in the semi-insulating layer, and the entire layer functions as an insulator. The SI-InP layer 506 can function as a semi-insulating semiconductor layer because the InP crystal is doped with iron. In addition to iron, Ru, Cr, Co, Ti, or the like may be doped.

  Next, a method for manufacturing the optical modulator of this embodiment will be described. FIGS. 5B to 5D are cross-sectional views taken along the line BB ′ of FIG. 5A in each step.

  The optical modulator manufacturing method according to the present embodiment includes a step of preparing an SI-InP substrate 501, an n-InP buffer layer 502 (first conductive cladding layer), and an i-InGaAsP optical waveguide on the SI-InP substrate 501. A step of sequentially laminating the waveguide layer 503 to form a laminated structure (first laminated structure) (FIG. 5B), a step of etching the laminated structure to form a mesa structure (FIG. 5C), And a step of covering the surface of the formed mesa structure with the SI-InP layer 506 (FIG. 5D).

Specifically, as shown in FIG. 5B, an n-InP buffer layer 502 (thickness: 2 μm, carrier concentration: 1 × 10 6) is formed on the (100) surface of the Fe (iron) -doped high resistance InP substrate 501. ¹⁸ cm ⁻³ ), an active layer (thickness 0.3 μm, emission wavelength 1.4 μm) having an InGaAsP quantum well structure which is an i-InGaAsP optical waveguide layer 503, and an SI-InP cladding layer 504 (thickness 20 nm). Laminate sequentially by MOVPE method. Next, an optical waveguide forming SiO ₂ mask 505 is formed by CVD and photolithography so as to form an optical waveguide pattern as shown in FIG. 5A (FIG. 5C).

Next, as shown in FIG. 5C, a waveguide mesa having a depth of 1 μm that penetrates the optical waveguide layer is formed by methane dry etching, and the SiO ₂ mask 505 is removed.

Thereafter, as shown in FIG. 5 (d), an SI-InP layer 506 (thickness 1 μm) and an n-InP layer 507 (thickness 0.5 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) are sequentially grown as a whole. To do.

  At this time, when the entire deep and thin waveguide mesa is embedded, the thickness of the layer formed on the mesa is thinner than that of the flat portion. This is because the growth shape at the top of the mesa is triangular and a slow growth surface ((111) B surface) is likely to be formed. If the slow growth surface does not collapse as the growth progresses, the entire mesa top will not grow thick. Because.

  However, considering the optical modulator alone, it is sufficient to continue the growth until the SI-InP layer 506 above the i-InGaAsP optical waveguide layer 503 reaches a desired layer thickness, and the growth layer thickness above the i-InGaAsP optical waveguide layer 503. In contrast, since the growth layer on the side surface of the i-InGaAsP optical waveguide layer 503 is thicker, it can be flattened.

  Further, the SI-InP layer 506 and the n-InP layer 507 are grown to a desired thickness at the stage of flat growth, and then a waveguide mesa is formed, and the SI-InP layer 506 is formed again on the side surface of the waveguide mesa. However, a similar structure can be realized. In this case, there are concerns that the growth time is long, there is a step on the top of the waveguide mesa, the electrode may be cut off, and there is a possibility of generation of turn-on current flowing through the regrowth interface of the waveguide mesa. This structure eliminates these concerns.

  Thereafter, only the phase modulation region of the Mach-Zehnder optical modulator is covered with a photoresist, and the n-InP layer 507 in other regions is removed by wet etching. Thereby, each of the two phase modulation regions of the Mach-Zehnder type optical modulator is electrically separated. Etching of the n-InP layer 507 and the underlying SI-InP layer 506 cannot be selectively stopped, but the MMI portion and the S-shaped waveguide portion other than the phase adjustment region of the Mach-Zehnder optical modulator, that is, the MMI portion and the S-shaped waveguide portion are guided by light. Therefore, the SI-InP layer 506 only needs to have a certain thickness.

Thereafter, as shown in FIG. 5E, a groove reaching the n-InP buffer layer 502 is formed in the formation region of the ground electrode 510, an SiO ₂ mask 508 is attached, and an upper portion of the i-InGaAsP optical waveguide layer 503 is formed. A window is opened for electrode contact in the groove formed earlier. Thereafter, the signal electrode 509 is formed on the i-InGaAsP optical waveguide layer 503 in the phase modulation region, and the ground electrode 510 is formed on the n-InP buffer layer 502 in the groove formed previously.

  The electrode structure is a cut-off parallel plate electrode in which the SI-InP layer 506 at a certain distance from both sides of the waveguide mesa is removed by dry etching to form a mesa shape and the electrode is formed up to the side surface of the mesa. The structure may be used. By using a cut-off parallel plate electrode structure, speed matching and impedance matching are facilitated, which is advantageous for wideband characteristics.

  Through the above steps, even in an n-SI-in-structure optical modulator having an SI layer on the side surface of the waveguide, the growth time is shortened, turn-on is suppressed at the waveguide and SI layer regrowth interface, and SI layer regrowth is achieved. This eliminates the possibility of the occurrence of a step in the upper portion of the waveguide mesa and the subsequent occurrence of the electrode break in the subsequent electrode process. In addition, the SI layer formed on the side surface of the mesa can efficiently apply an electric field to the optical waveguide layer, and also has an effect of contributing to improving reliability as a lateral mode control layer and a side surface protection layer of the optical waveguide layer. .

  Next, the effect of this embodiment will be described. Since the optical modulator of this embodiment can simultaneously cover the upper surface and the side surface of the i-InGaAsP optical waveguide layer 503, there is no problem of increasing the number of manufacturing steps. Further, since the upper surface and the side surface of the i-InGaAsP optical waveguide layer 503 are covered without forming an interface, turn-on at the optical waveguide layer and SI layer regrowth interface can be suppressed. In addition, it is possible to eliminate the possibility of the occurrence of a step in the upper portion of the waveguide mesa due to the SI layer regrowth and the occurrence of the electrode step in the subsequent electrode process. Therefore, the yield can be improved. Furthermore, the SI layer formed on the side surface of the mesa can efficiently apply an electric field to the optical waveguide layer, and can also play a role of improving the reliability as a lateral mode control layer and a side surface protection layer of the optical waveguide layer. .

(Second Embodiment)
6 and 7 are diagrams showing the optical integrated device of this embodiment. FIG. 6A is a plan view showing the optical integrated device of this embodiment. FIG. 6H and FIG. 7I are perspective views showing the optical integrated device of this embodiment.

  The present embodiment includes an optical modulator region including the Mach-Zehnder optical modulator described in the first embodiment and a DFB laser region including an optical semiconductor element connected to the optical modulator. When a forward bias is applied to the optical semiconductor element, the optical semiconductor element functions as a distributed feedback (DFB) DFB laser.

  FIG. 7J is a cross-sectional view taken along the line CC ′ of FIG. The configuration of the optical modulator included in the optical integrated device of this embodiment is as described in the first embodiment. As shown in FIG. 6A and FIG. 7J, the incident end face on which light is incident. 624, an i-InGaAsP optical waveguide layer 607 (first optical waveguide layer) that propagates incident light, and a pair of electrodes that apply an electric field to the i-InGaAsP optical waveguide layer 607 (signal electrode 617, ground electrode 618) An exit end face 625 that emits light modulated by the applied electric field, an n-InP buffer layer 602 (lower cladding layer) that covers the lower surface of the i-InGaAsP optical waveguide layer 607, and an i-InGaAsP optical waveguide layer 607. And an n-InP layer 615 (first conductive clad layer) provided thereon. An SI-InP layer 614 (semi-insulating semiconductor layer) that covers the upper surface of the i-InGaAsP optical waveguide layer 607 and the side surface of the i-InGaAsP optical waveguide layer 607 is provided. Note that the stacked body 622 corresponds to the stacked body 513.

  The optical integrated device of this embodiment includes an SI-InP substrate 601 provided with an optical modulator region and a DFB laser region. FIG. 7 (k) is a cross-sectional view taken along the line BB ′ of FIG. 6 (a) showing the DFB laser region. As shown in FIG. 7 (k), the DFB laser region is sequentially formed on the SI-InP substrate 601. The stacked n-InP buffer layer 602 (first conductive first cladding layer), i-InGaAsP optical waveguide layer 604 (second optical waveguide), and p-InP cladding layer 609 (second conductive layer). A second clad layer) and a laminate 621 (second laminate). Further, this optical integrated device has an SI-InP layer 614 (semi-insulating semiconductor layer) in which the stacked body 621 is embedded.

  In other words, the optical integrated device of the present embodiment has an optical modulator monolithically integrated with a forward bias region such as a wavelength tunable laser, wherein the forward bias region has a p-type cladding structure and the optical modulator side has an n-SI type cladding structure. In addition, the side surfaces of the i-InGaAsP optical waveguides 604 and 607 in both the forward bias region and the optical modulator have a structure including an SI-type current blocking layer (SI-InP layer 614). In the SI-InP layer 614, the InP crystal is doped with iron. Thereby, in the SI-InP layer 614, the doped iron functions as a deep acceptor in the InP crystal and captures and ionizes the electrons existing in the vicinity, so that there are no free electrons. For this reason, the current is prevented from flowing in the SI-InP layer 614, and the entire layer functions as a substantially insulator. Therefore, the SI-InP layer 614 can function as a semi-insulating semiconductor layer.

  Further, the optical integrated device of the present embodiment has a layer thickness of the SI-InP layer 614 formed between the upper surface of the i-InGaAsP optical waveguide 604 and the lower surface of the n-InP layer 615 (A in FIG. 7J). ) Is thinner than the thickness of the SI-InP layer 614 in which the stacked body 621 is embedded (B in FIG. 7K). More specifically, the integrated SI-type current blocking layer (about 3 μm) in the forward bias region is composed of the SI-type cladding layer (about 1 μm) on the i-InGaAsP optical waveguide layer 607 in the optical modulator region and the optical modulator. The thickness of the i-InGaAsP optical waveguide layer 607 in the region is different from that of the SI-type layer (about 2 μm) on the side surface side, and “the current blocking layer thickness in the forward bias region is thicker than the cladding layer thickness in the modulator region”. The current blocking layer thickness in the forward bias region is thicker than the optical waveguide side surface layer thickness in the modulator region ”.

  At this time, the i-InGaAsP optical waveguide layer 607 of the optical modulator and the mesa in the DFB laser region are covered with the same SI-InP layer 614. Therefore, since the number of times of growth is not increased and there is no regrowth interface, there are advantages in that turn-on is suppressed and that electrode step breakage at the stepped portion caused by regrowth is avoided.

  Next, a method for manufacturing the optical integrated device of this embodiment will be described. 6B to 6F show cross-sectional views taken along line AA ′ of FIG. 6A in each step. FIGS. 6G and 6H are perspective views in each step.

  The optical integrated device manufacturing method of this embodiment includes a step of preparing an SI-InP substrate 601 (semiconductor substrate), an n-InP buffer layer 602 (first conductive cladding layer) on the SI-InP substrate 601, and A step of sequentially stacking an i-InGaAsP optical waveguide layer 604 (second optical waveguide) and a p-InP cladding layer 609 (second conductive cladding layer) to form a second stacked structure in the DFB laser region (FIG. 6). (C), (d)), a step of forming an i-InGaAsP optical waveguide layer 607 on the n-InP buffer layer 602 to form a first laminated structure in the optical modulator region (FIG. 6D), , The step of connecting the i-InGaAsP optical waveguide layer 607 and the i-InGaAsP optical waveguide layer 604 (FIG. 6D), and etching the first laminated structure to form the first mesa in the optical modulator region. Etching the second stacked structure to form a second mesa in the DFB laser region (FIG. 6G), filling the second mesa with the SI-InP layer 614 (semi-insulating semiconductor layer), Covering the surface of one mesa with the SI-InP layer 614 (FIG. 6H).

More specifically, in FIG. 6D, the forward bias region is obtained after the active layer (i-InGaAsP optical waveguide layer 604) in the forward bias region and the i-InGaAsP optical waveguide layer 607 of the optical modulator are joined by butt joint. The p-InP cladding layer 609 is grown on the entire surface, and only the p-InP cladding layer 609 in the optical modulator region is removed by wet etching so that the boundary surface has a forward mesa shape (FIG. 6E). If the i-InGaAsP optical waveguide layer 604 is arranged in the forward mesa direction with respect to the SI-InP substrate 601, the etched surface in the bonding direction can be obtained in the forward mesa shape by using an HCl-based etchant. Thereafter, the optical waveguide in the entire region is formed by dry etching, the SiO ₂ mask 613 in the light modulation region is removed (FIGS. 6F and 6G), and the SI-InP layer 614 and the n-InP layer 615 are sequentially formed. It grows (FIG. 6 (h)). At this time, a current blocking layer is formed on the side surface of the i-InGaAsP optical waveguide 604 in the forward bias region, a cladding layer covering the entire i-InGaAsP optical waveguide layer 607, a lateral mode control layer, and a core side surface protective layer However, due to the difference in the embedding shape, the current blocking layer thickness in the forward bias region is formed to be thicker than the cladding layer thickness in the modulator region and the thickness of the side surface layer of the optical waveguide layer. can get.

  More specifically, the optical integrated device of this embodiment and the manufacturing method thereof will be described. The optical waveguide indicated by A-A ′ in FIG. 6A is connected by a curved waveguide or a multimode interference waveguide (MMI) structure, and is not linear, but is viewed obliquely from above. 6 (g), (h), and FIG. 7 (i) show the joints of the respective regions connected by straight waveguides for the sake of simplicity, such as curved waveguides and 1 × 2 multimode interference. Even if they are connected with a type waveguide (MMI: Multimode Interference) structure, the configuration of the element itself does not change.

As shown in FIG. 6B, an n-InP buffer layer 602 (thickness 2 μm, carrier concentration 1 × 10 ¹⁸ cm ^{− is formed} on the (100) surface of the Fe (iron) -doped high-resistance SI-InP substrate 601. ³ ) is grown by the MOVPE method, and a diffraction grating is formed on the n-InP buffer layer 602 in the DFB laser region by an electron beam (EB) drawing method.

Next, as shown in FIG. 6C, an n-InGaAsP guide layer 603 (1.3 μm composition, thickness 0.1 μm, 1 × 10 ¹⁸ cm ⁻³ ), i-InGaAsP in the DFB laser region is formed by MOVPE. An active layer (thickness 0.3 μm, emission wavelength 1.55 μm) having an InGaAsP quantum well structure to be the optical waveguide layer 604 and a p-InP cladding layer 605 (thickness 20 nm) are sequentially stacked by the MOVPE method, and SiO _2. A mask 606 is formed only in the DFB laser region by CVD and photolithography. Thereafter, etching is performed up to the middle portion of the InGaAsP active layer (i-InGaAsP optical waveguide layer 604) by methane-based dry etching, and then the remaining InGaAsP active layer is wet-etched with a mixed solution of sulfuric acid, hydrogen peroxide solution, and water. The n-InGaAsP guide layer 603 is selectively removed.

Next, as shown in FIG. 6D, an InGaAsP layer (thickness: 0.3 μm, emission wavelength: 1.40 μm) which is an i-InGaAsP optical waveguide layer 607 in the Mach-Zehnder type optical modulator region, a p-InP cladding layer 608 (thickness 20 nm) is selectively formed in the Mach-Zehnder type optical modulator region by using a butt joint joining technique. By selectively removing the InGaAsP active layer selectively by wet etching in the previous step, side etching progresses on the p-InP clad layer 605 and the SiO ₂ mask 606, and this collar portion is a butt joint. Suppressing growth at the bonding surface of the InGaAsP optical waveguide layer 607 to be bonded at the step S is suppressed. Further, since the height of the active layer in the DFB laser region and the height of the optical waveguide layer in the Mach-Zehnder type optical modulator region coincide, a butt joint junction with a small coupling loss at the junction surface can be realized.

Thereafter, after removing the SiO ₂ mask 606, a p-InP cladding layer 609 (thickness 2 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ), which is an upper cladding layer in the DFB laser region, and a p-InGaAs contact layer 610 ( A thickness of 0.2 μm and a carrier concentration of 1 × 10 ¹⁹ cm ⁻³ ) and a p-InP cap layer 611 (thickness of 0.05 μm and a carrier concentration of 1 × 10 ¹⁸ cm ⁻³ ) are sequentially stacked.

Next, as shown in FIG. 6E, after removing the p-InP cap layer 611, a SiO ₂ mask 612 is formed only in the DFB laser region by CVD and photolithography, and Mach-Zehnder light modulation is performed by wet etching. The p-InGaAs contact layer 610 and the p-InP cladding layers 608 and 609 on the optical waveguide layer in the vessel region are removed. First, the p-InGaAs contact layer 610 is etched using a mixed solution of sulfuric acid, hydrogen peroxide solution, and water. Thereafter, the p-InP cladding layers 608 and 609 are selectively removed without performing any etching on the i-InGaAsP optical waveguide layer 607 by wet etching using a mixed solution of hydrochloric acid and phosphoric acid. At this time, by forming the waveguide in the forward mesa direction, the etched cross section of the p-InP cladding layers 608 and 609 formed by this etching has a forward mesa shape.

Thereafter, as shown in FIG. 6 (f), after removing the SiO ₂ mask 612, the entire region of the optical waveguide forming SiO _{2 is} formed by the CVD method and photolithography so that the waveguide pattern shown in FIG. 6 (a) is obtained. A mask 613 is formed. At this time, the interface between the DFB laser region and the Mach-Zehnder type optical modulator region has a step of 2 μm due to the removal of the p-InP cladding layers 608 and 609. As described above, this interface has a smooth forward mesa shape. For this reason, it is difficult for the mask shape shakiness generated during photolithography to occur due to the unevenness of the growth surface on the butt joint junction (the above-mentioned (ii)) surface including the clad layer.

When a waveguide is formed after the upper cladding layer on the optical modulator region side is formed by selective growth like a conventional butt joint junction including a cladding layer, SiO _{2 is} formed at the interface between the DFB laser region and the optical modulator region. Irregularities on the growth surface occur alongside the mask. Since the unevenness increases as the thickness of the selectively grown upper clad layer increases, the step cannot be ignored when the upper clad is about 1.5 μm as in this structure. With such irregularities, there is a concern that it is difficult to form a smooth surface in the vicinity of the irregular surface not only in the above-described problems that occur during photolithography but also in the formation of a waveguide by dry etching using an SiO ₂ mask.

Next, as shown in FIG. 6G, a waveguide mesa having a depth of 3 μm that penetrates the i-InGaAsP optical waveguide layers 604 and 607 is formed in a batch for all the integrated elements by methane dry etching. Thereafter, only the SiO ₂ mask 613 in the optical modulator region is removed by photolithography.

Thereafter, as shown in FIG. 6 (h), using the SiO ₂ mask 613, the SI-InP layer 614 is formed on the side surface of the waveguide mesa in the DFB laser region and on the entire waveguide mesa in the Mach-Zehnder optical modulator region. (Thickness 1 μm) and n-InP layer 615 (thickness 0.5 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) are grown in order.

  At this time, it should be noted that the required thicknesses of the clad layer in the Mach-Zehnder type optical modulator region and the current blocking layer in the DFB laser region which are simultaneously grown are different. That is, the SI current blocking layer in the DFB laser region needs to have a layer thickness equivalent to the waveguide mesa depth, so that a layer thickness of about 3 μm is desirable. On the other hand, the SI cladding layer on the side of the Mach-Zehnder type optical modulator has an appropriate layer thickness of about 1 μm, so that the Mach-Zehnder type optical modulator can be seen from the cross-sectional structure of each region in FIGS. The desired layer thickness differs between the SI layer thickness (A) above the optical waveguide in the region and the SI layer thickness (B) in the DFB laser region.

  In response to this requirement, if the method shown in this embodiment is used, the SI clad layer in the Mach-Zehnder optical modulator region is maintained at an appropriate thickness of about 1 μm, and the SI current blocking layer in the DFB laser region is set to a desired value. The thickness can be set to about 3 μm.

  That is, when the entire deep and thin waveguide mesa such as the Mach-Zehnder optical modulator region is embedded as in the optical integrated device of the present embodiment, the layer thickness formed on the mesa is thinner than the flat portion. This is because the growth shape at the top of the mesa is triangular and a slow growth surface ((111) B surface) is likely to be formed. If the slow growth surface does not collapse as the growth progresses, the entire mesa top will not grow thick. .

Therefore, if the target SI cladding layer on the optical waveguide layer in the Mach-Zehnder type optical modulator region is to be grown by about 1 μm, a growth layer thickness of 2 μm or more is necessarily required in the flat region. The growth layer thickness of 2 μm or more in this flat region corresponds to about 3 μm when converted to the current blocking layer thickness on the side surface of the waveguide in the DFB laser region. This is because the growth to the side surface of the waveguide has a mechanism in which the thickness is increased as compared with the flat portion, and this is due to the contribution of the mesa side surface having the SiO ₂ mask provided thereon.

  Note that, depending on the growth conditions, the thickness of the growth layer on the mesa side surface may be up to about 2.5 μm to 4 μm depending on the growth conditions. Although the shape rises from the waveguide, the influence on the laser characteristics due to the increase or decrease of the rise is small.

  Thus, since the degree of freedom of the current block layer thickness on the laser side is large, the SI layer may be adjusted on the Mach-Zehnder optical modulator side, and the desired layer thickness differs between the DFB laser region and the Mach-Zehnder optical modulator region. However, simultaneous formation is possible.

  The advantages of growing the entire waveguide mesa in the Mach-Zehnder type optical modulator region are as described in the first embodiment.

Thereafter, as shown in FIG. 7I, only the phase modulation region of the Mach-Zehnder optical modulator is covered with a photoresist, and the n-InP layer 615 in the other region is removed by wet etching. As a result, the DFB laser region and the Mach-Zehnder optical modulator, and the two phase modulation regions of the Mach-Zehnder optical modulator are electrically separated from each other. Although the n-InP layer 615 and the underlying SI-InP layer 614 cannot be selectively stopped, as described above, the SI-InP layer 614 in the DFB laser region is slightly thicker than the desired layer thickness. Even if the SI-InP layer 614 is etched, the laser characteristics are not affected. Similarly, since the MMI part and the S-shaped waveguide part other than the phase adjustment region of the Mach-Zehnder type optical modulator only have to play the role of guiding light, the SI-InP layer 614 only needs to have a certain thickness. . Further, since the upper portion of the optical waveguide 604 in the DFB laser region is protected by the SiO ₂ mask 613 used for the BH growth, it is not affected by the etching.

Thereafter, after removing the SiO ₂ mask 613, as shown in FIG. 7 (j), a groove reaching the n-InP buffer layer 602 is formed in each electrode formation region, an SiO ₂ mask 616 is attached, and an i-InGaAsP optical waveguide is formed. A window is opened for electrode contact in the upper part of the waveguide layer 607 and the groove formed earlier. Thereafter, the signal electrode 617 of the Mach-Zehnder type optical modulator, the p-side electrode 619 of the DFB laser region are placed on each waveguide, the ground electrode 618 of the Mach-Zehnder type optical modulator region, and the n-side electrode 620 of the DFB laser region are n -Formed on the InP buffer layer 602;

  Through the above-described steps, regions having different upper cladding layers, such as a pin structure DFB laser having a high resistance block layer formed on the side surface of the waveguide and an n-SI-in structure Mach-Zehnder optical modulator, are formed. A monolithically integrated device can be realized without increasing the number of times of growth and suppressing a process failure occurring at a joint surface in a different region.

    Next, the effect of this embodiment will be described. According to the optical integrated device of this embodiment, the SI-InP layer 614 covering the upper surface of the i-InGaAsP optical waveguide layer 607 and the side surface of the i-InGaAsP optical waveguide layer 607 of the optical modulator is provided. In addition, the optical waveguide of the DFB laser can be embedded by the SI-InP layer 614. Therefore, the number of times of growth can be reduced, and easy manufacturing with fewer steps can be realized. In addition, since the BH growth is performed after the formation of the waveguide in the entire region, it is possible to eliminate the process defect that occurs at the step on the joint surface. Furthermore, in the optical modulator, since the periphery of the optical waveguide layer is covered with an SI layer having a continuous interface (not having a regrowth interface), generation of turn-on current flowing through the regrowth interface can be suppressed. . Therefore, the yield can be improved and a high-performance optical integrated device can be realized.

  Further, according to the method of manufacturing an optical integrated device of this embodiment, the forward bias region high resistance current blocking layer, the optical modulator region semi-insulating cladding layer, and the optical waveguide side layer, which are common layers, are formed by the SI-InP layer 614. Grows at the same time. This method provides the following advantages over the cladding layer bonding method shown in FIGS. There are no special restrictions on the thickness of the cladding layer and the growth conditions on the side to be joined as in the above (i) (FIG. 3). Compared to the above (ii) (FIG. 4), the number of times of growth is small, and BH growth is performed after the formation of the waveguide in the entire region, so that it is possible to eliminate the process failure that occurs at the step on the joint surface. In addition, since the optical modulator is covered with an SI layer having a continuous interface around the optical waveguide layer (having no regrowth interface), generation of turn-on current flowing through the regrowth interface can be expected to be suppressed.

  As described above, according to the structure and the manufacturing method of the optical integrated device of the present embodiment, the forward bias region having the p-InP-cladding layer formed on the side surface of the optical waveguide with the SI-InP layer 614 and the n-SI-in Fabrication of moricic integrated devices in regions with different cladding layers, such as optical modulators with SI cladding layers such as structures, without increasing the number of process steps and eliminating defects at the clad layer interface during waveguide formation it can.

  Further, according to the present embodiment, in a monolithic semiconductor optical integrated device having an optical modulator having different optical waveguide layer upper cladding layers in different functional regions and a forward bias region such as a wavelength tunable laser, an increase in the number of growths and a process failure It is possible to provide an element structure capable of producing a high-performance optical integrated element while eliminating the above, and a manufacturing method thereof.

  In the optical integrated device of this embodiment, the forward bias region has a p-type cladding structure, the optical modulator region has an n-SI type cladding structure, and both the forward bias region and the optical modulator region have an SI current on the waveguide side surface. It has a structure consisting of block layers. Therefore, while simultaneously forming the SI current blocking layer in the forward bias region and the SI cladding layer in the optical modulator region with different desired layer thicknesses, the current blocking layer thickness in the forward bias region and the desired layer thickness in the cladding region in the modulator region, respectively. Can be realized. Therefore, the p-i-n structure forward bias region having high current blocking characteristics, the loss of optical signals and electrical signals can be reduced, phase speed matching and impedance matching are easy, and n-SI-i is advantageous for widening the bandwidth. A monolithic integrated device with a different upper cladding layer, such as an n-structure optical modulator, can be easily realized while reducing the number of process steps and eliminating defects at the clad layer interface during waveguide formation. Become.

(Third embodiment)
Next, with reference to FIGS. 8 and 9, an element structure of an optical amplifier integrated with a phase adjustment region according to a third embodiment and an optical integrated element integrated with a Mach-Zehnder optical modulator and a manufacturing method thereof will be described. FIG. 8A is a plan view for explaining the optical integrated device of this embodiment. FIGS. 8B to 8F are cross-sectional views taken along the line AA ′ of FIG. 8A for explaining the optical integrated device of this embodiment. FIGS. 8G, 8H, and 9I are perspective views for explaining the optical integrated device of this embodiment. FIG. 9J is a cross-sectional view taken along the line CC ′ of FIG. 8A for explaining the optical modulator region of the optical integrated device of this embodiment. FIG. 9K is a sectional view taken along the line BB ′ in FIG. 8A for explaining the optical amplifier region of the optical integrated device of this embodiment.

  That is, in the optical integrated device of this embodiment, the DFB laser of the second embodiment functions as a wavelength tunable laser. In the present embodiment, the optical amplifier region amplifies laser light. The phase adjustment region adjusts the phase of the laser beam according to the input electric signal. The phase adjustment region includes a wavelength tunable filter.

  Note that the optical waveguide indicated by AA ′ in FIG. 8A is connected by a curved waveguide or a multimode interference waveguide (MMI) structure and is not linear, but obliquely upward. 8 (g), (h), and FIG. 9 (i) viewed from FIG. 9 are shown in a form in which the junctions of the respective regions are connected by straight waveguides for simplification, but are not shown by curved waveguides or 1 × 2 Even if they are connected with a multimode interference waveguide (MMI) structure, the configuration of the elements does not change.

As shown in FIG. 8B, an n-InP buffer layer 702 (thickness 2 μm, carrier concentration 1 × 10 ¹⁸ cm ^{− is formed} on the (100) surface of the Fe (iron) -doped high-resistance SI-InP substrate 701. ³ ), an active layer having an InGaAsP quantum well structure (i-InGaAsP waveguide layer 703, thickness 0.3 μm, emission wavelength 1.55 μm) as an optical amplifier region optical waveguide layer, p-InP cladding layer 704 (thickness) 20 nm) is sequentially laminated by the MOVPE method, and the SiO ₂ mask 705 is formed only in the optical amplifier region by the CVD method and photolithography. Thereafter, etching is performed to about the middle portion of the InGaAsP active layer by methane-based dry etching, and then the remaining InGaAsP active layer is selectively removed by wet etching of a mixed solution of sulfuric acid, hydrogen peroxide solution, and water.

Next, as shown in FIG. 8C, an InGaAsP optical waveguide layer 706 (thickness 0.3 μm, emission wavelength 1.40 μm) which is a shared optical waveguide of the phase adjustment region and the Mach-Zehnder type optical modulator region, p − An InP cladding layer 707 (thickness 20 nm) is selectively formed in the phase modulation region and the Mach-Zehnder light modulation region by using a butt joint bonding technique. Thereafter, after removing the SiO ₂ mask 705, the p-InP clad layer 708 (thickness 2 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ), which is the upper clad layer of the optical amplifier region and the phase adjustment region, is formed, and p-InGaAs. A contact layer 709 (thickness 0.2 μm, carrier concentration 1 × 10 ¹⁹ cm ⁻³ ) and a p-InP cap layer 710 (thickness 0.05 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) are sequentially stacked.

Next, as shown in FIG. 8D, after the p-InP cap layer 710 is removed, a SiO ₂ mask 711 is formed only in the optical amplifier region and the phase adjustment region by CVD and photolithography, and wet etching is performed. The p-InP cladding layer 708 and the p-InGaAs contact layer 709 on the optical waveguide layer in the Mach-Zehnder optical modulator region are removed. This etching is as shown in the second embodiment.

Next, as shown in FIG. 8E, after the SiO ₂ mask 711 is removed, the optical waveguide forming SiO in the entire region is formed again by the CVD method and photolithography so that the waveguide pattern of FIG. 7A is obtained. _Two masks 712 are formed.

Next, as shown in FIG. 8F, a waveguide mesa having a depth of 3 μm that penetrates the i-InGaAsP optical waveguide layers (703, 706) is formed in a batch of all the integrated elements by methane dry etching. Thereafter, only the SiO ₂ mask 712 in the optical modulator region is removed by photolithography.

Thereafter, as shown in FIG. 8 (h), using the SiO ₂ mask 712, the entire waveguide mesa in the Mach-Zehnder optical modulator region is formed on the side surface of the waveguide mesa in the optical amplifier region and the phase adjustment region. An InP layer 713 (thickness 1 μm) and an n-InP layer 714 (thickness 0.5 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) are grown sequentially.

  At this time, as described in the second embodiment, the thickness required for the SI-cladding layer in the Mach-Zehnder type optical modulator region and the current blocking layer in the optical amplifier region and the phase adjustment region which are simultaneously grown are different. Since the degree of freedom of the current block layer thickness in the amplifier region and the phase adjustment region is large, the SI layer may be adjusted on the Mach-Zehnder type optical modulator side, and desired in the optical amplifier region, the phase adjustment region, and the Mach-Zehnder type optical modulator region. Simultaneous formation is possible even if the layer thicknesses are different.

  Thereafter, as shown in FIG. 9I, only the phase modulation region of the Mach-Zehnder type optical modulator is covered with a photoresist, and the n-InP layer 714 in the other region is removed by wet etching. As a result, the optical amplifier region, the phase adjustment region, the Mach-Zehnder type optical modulator, and the two phase modulation regions of the Mach-Zehnder type optical modulator are electrically separated from each other.

  Thereafter, a groove is formed by dry etching as a gap reflector. The depth is about 8 μm, and the gap spacing of the gap reflector is about 0.8 μm. The gap reflecting mirror plays a role of a reflection end face of the wavelength tunable laser and enables integration with different functional areas.

Finally, as shown in FIG. 9 (j), after removing the SiO ₂ mask 715, a groove reaching the n-InP buffer layer 702 is formed in each electrode formation region, and the SiO ₂ mask 715 is attached, and the i-InGaAsP A window is opened for electrode contact in the upper portion of the optical waveguide layer 706 and the groove portion formed earlier. Thereafter, the signal electrode 717 of the Mach-Zehnder optical modulator and the p-side electrode 718 of the optical amplification region are placed on each waveguide, the ground electrode 717 of the Mach-Zehnder optical modulator region, and the n-side electrode 719 of the optical amplification region are n of the grooves. -Formed on the InP buffer layer 702;

  Through the above steps, the optical amplifier in which the phase adjustment region of the pin structure in which the high resistance block layer is formed on the side surface of the i-InGaAsP optical waveguide layer 703 and the n-SI-in structure Mach-Zehnder type optical modulation are integrated. A device that monolithically integrates regions having different upper cladding layers, such as a vessel, can be realized without increasing the number of times of growth and suppressing process failures that occur at the joint surfaces in different regions.

  An external resonator type wavelength tunable laser is formed on the outside of the semiconductor element by using a wavelength tunable filter composed of a collimating lens, a free spectral range 50 GHz etalon, and a liquid crystal as an external resonator of the laser. Tuning can be performed by changing the voltage applied to the wavelength of 1.53 μm to 1.57 μm.

(Fourth embodiment)
Next, with reference to FIGS. 10 and 11, an element structure of an optical amplifier integrated with a phase adjustment region and an element integrated with a Mach-Zehnder optical modulator according to a fourth embodiment of the present invention and a manufacturing method thereof will be described. In the fourth embodiment, in the optical integrated device manufacturing process of the third embodiment, the p-type cladding layer in the optical modulator region is etched after the optical waveguide is formed. The plan view of the optical integrated device of this embodiment is the same as FIG. 8A, and FIGS. 10A and 10B are AA ′ cross-sectional views of FIG. FIGS. 10C and 10D are perspective views for explaining the process of the optical integrated device of this embodiment. FIG. 11E is a perspective view of the optical integrated device of this embodiment. FIG. 11F is a cross-sectional view taken along the line CC ′ of FIG. 8A for explaining the optical modulator region of the optical integrated device of this embodiment. FIG. 11G is a cross-sectional view taken along the line BB ′ of FIG. 8A for explaining the optical amplification region of the optical integrated device of this embodiment.

The process up to the step of forming the p-InP cladding layer 808 in the optical amplifier region and the phase adjustment region shown in FIGS. 10A and 10B is the same as the method described in the third embodiment. That is, an n-InP buffer layer 802 (thickness 2 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ), optical amplifier region optical waveguide on the (100) surface of the Fe (iron) -doped high-resistance SI-InP substrate 801 An InGaAsP quantum well structure active layer (i-InGaAsP waveguide layer 803, thickness 0.3 μm, emission wavelength 1.55 μm) and p-InP cladding layer 804 (thickness 20 nm) are sequentially formed by the MOVPE method. Then, the SiO ₂ mask 805 is formed only in the optical amplifier region by the CVD method and photolithography. Thereafter, etching is performed to about the middle portion of the InGaAsP active layer by methane-based dry etching, and then the remaining InGaAsP active layer is selectively removed by wet etching of a mixed solution of sulfuric acid, hydrogen peroxide solution, and water. Next, an i-InGaAsP optical waveguide layer 806 (thickness 0.3 μm, emission wavelength 1.40 μm) which is a shared optical waveguide of the phase adjustment region and the Mach-Zehnder type optical modulator region, and a p-InP cladding layer 807 (thickness 20 nm). ) Are selectively formed in the phase adjustment region and the Mach-Zehnder light modulation region by using a butt joint joining technique. Thereafter, a p-InP clad layer 808 (thickness 2 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) and a p-InGaAs contact layer 809 (thickness 0. 2 μm, carrier concentration 1 × 10 ¹⁹ cm ⁻³ ) and p-InP cap layer 810 (thickness 0.05 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) are sequentially stacked.

Next, as shown in FIG. 10C, a SiO ₂ mask 811 for forming a waveguide is formed, and a waveguide mesa having a depth of 3 μm that penetrates the optical waveguide layer by methane-based dry etching is formed all over the integrated element. To do. Unlike the method described in the third embodiment, since the waveguide mesa is formed before etching the cladding layer in the Mach-Zehnder optical modulator region, the bottom surface after the mesa formation is aligned and the region boundary generated after the BH growth The level difference at the point becomes smaller, and the subsequent process failure in the electrode process shown in FIG. Further, the etching needs to be controlled so that the bottom surface of the waveguide mesa is located deeper than the i-InGaAsP optical waveguide layers 803 and 806 and in the n-InP buffer layer 802, as described in the third embodiment. Compared to the method, there is an advantage that the allowable range of etching control is widened.

Thereafter, as shown in FIG. 10D, only the SiO ₂ mask 811 in the Mach-Zehnder optical modulator region is removed. Thereafter, only the p-InP cladding layer 808 and the p-InGaAs contact layer 809 above the waveguide mesa in the Mach-Zehnder optical modulator region are removed. Here, although not shown, the following process is performed to remove only the p-InP cladding layer 808 on the mesa. After forming the mesa, a resist is applied, and exposure is performed using a mask that covers the entire optical amplifier region and the phase adjustment region. At this time, the exposure is adjusted and the Mach-Zehnder light modulation region that is not covered with the exposure mask is introduced. The resist receding is adjusted so that only the top of the waveguide mesa is exposed. At this time, the resist is adjusted so as not to recede to the height of the optical waveguide layer.

By the above process, only the upper part of the waveguide mesa in the Mach-Zehnder type optical modulator region is not covered with the resist. Thereafter, the p-InGaAs contact layer 809 is etched using a mixed solution of sulfuric acid, hydrogen peroxide solution, and water, and then the i-InGaAsP optical waveguide layer 806 is slightly formed by wet etching using a mixed solution of hydrochloric acid and phosphoric acid. The p-InP cladding layer 808 is selectively removed without etching. At this time, by forming the waveguide in the forward mesa direction, the etching cross section of the p-InP cladding layer formed by etching forms a forward mesa shape as in the third embodiment. Thereafter, if the resist is removed, the SiO ₂ mask 811 is formed only on the waveguide mesa in the optical amplifier region and the phase adjustment region.

As in the third embodiment, the subsequent processes are performed using a SiO ₂ mask 811 and, as shown in FIG. 11E, on the side of the waveguide mesa in the optical amplifier region and the phase adjustment region, Mach-Zehnder type optical modulation. In the vessel region, an SI-InP layer 812 (thickness 1 μm) and an n-InP layer 813 (thickness 0.5 μm, carrier concentration 1 × 10 ¹⁸ cm ⁻³ ) are sequentially grown on the entire waveguide mesa. Subsequent electrode formation steps are performed in the same manner as in the third embodiment, thereby completing the device. That is, as shown in FIG. 11E, after the SiO ₂ mask 811 is removed, a groove reaching the n-InP buffer layer 802 is formed in each electrode formation region, and the SiO ₂ mask 814 is attached to the i-InGaAsP optical waveguide. A window is opened for electrode contact in the upper part of the waveguide 806 and the groove formed earlier. Thereafter, the signal electrode 815 of the Mach-Zehnder optical modulator, the p-side electrode 817 of the optical amplifier region are placed on each waveguide, the ground electrode 816 of the Mach-Zehnder optical modulator region, and the n-side electrode 818 of the optical amplifier region are n of the grooves. -Formed on the InP buffer layer 802;

  Through the above-described steps, different upper portions such as an optical amplifier in which a phase adjustment region of a pin structure in which a high resistance block layer is formed on a waveguide side surface and an n-SI-in structure Mach-Zehnder type optical modulator are integrated. An element that monolithically integrates a region having a cladding layer can be manufactured with improved process controllability compared to the third embodiment. In addition, 4th Embodiment is realizable by passing through the same manufacturing process also in 2nd Embodiment.

(Fifth embodiment)
In the fifth embodiment, although not shown, in the optical modulator described in the first embodiment, the n-SI-i-n structure of the optical modulator is replaced with an n-SI-p-i-n structure. Structure.

  This embodiment can be realized by a similar manufacturing method by replacing the SI-InP layer 504 in FIG. 5B with a p-InP layer in the first embodiment. By adopting the structure of the present embodiment, the following effects can be expected in addition to the advantages of the first embodiment.

  By inserting a thin p-type layer between the SI layer and the i layer, loss reduction, which is an advantage of the n-SI-i-n structure, and phase velocity matching and impedance matching of the optical signal and the modulated RF signal can be achieved. Thus, an electric field stronger than the n-SI-in structure can be applied to the optical waveguide layer, and low voltage driving of the Mach-Zehnder optical modulator can be expected.

As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.
For example, the present invention can adopt the following modes.
(1) In an optical modulator including a semi-insulating semiconductor layer in an upper clad layer of an optical waveguide layer, the optical modulator has a semi-insulating semiconductor layer on a side surface of the optical waveguide layer, An optical modulator characterized in that the semi-insulating upper clad semiconductor layer has a continuous interface.
(2) In the element that integrates the optical modulator according to (1) and the forward bias region having the semi-insulating current confining semiconductor layer, the semi-insulating upper clad semiconductor layer of the optical modulator and the half of the forward bias region are integrated. An integrated optical device, wherein an insulating current confining semiconductor layer is integrated, and the thickness of the semi-insulating upper clad semiconductor layer is thinner than the thickness of the semi-insulating current confining semiconductor layer.
(3) The optical integrated device according to (2), wherein the thickness of the semi-insulating semiconductor layer on the side surface of the optical waveguide layer of the optical modulator is smaller than the thickness of the semi-insulating current confining semiconductor layer in the forward bias region. .
(4) The optical integrated device according to any one of (2) to (3), wherein the forward bias region is an optical amplifier that amplifies laser light.
(5) The optical integrated device according to any one of (2) to (3), wherein the forward bias region includes a phase adjustment region for adjusting a phase of laser light in accordance with an input electric signal and the optical amplifier.
(6) The optical integrated device according to any one of (2) to (3), wherein a forward bias region includes the phase adjustment region including a wavelength tunable filter and the optical amplifier, and the forward bias region is a wavelength tunable laser. .
(7) The method of manufacturing an optical modulator according to (1), wherein the semi-insulating semiconductor layer on the side surface of the waveguide and the semi-insulating upper clad semiconductor layer are formed simultaneously.
(8) In the optical integrated device according to any one of (2) to (3), the semi-insulating semiconductor layer of the optical modulator and the semi-insulating semiconductor layer in the forward bias region are formed simultaneously. Production method.

  Also, in the above embodiment, the example of the size and the example of the concentration have been shown. However, since it varies greatly depending on the crystal growth condition, the laser structure, etc., it is needless to say that an appropriate size and concentration should be adopted. There are no restrictions on the types of dielectric film and insulator film. The substrate is not limited to a high resistance substrate and may be an n-type conductive substrate. Examples of the active layer include InGaAsP, InGaAs, AlGaInAs, and the like, but are not limited as long as the active layer is applicable, and may be a bulk structure or a quantum well structure. Fe is cited as a dopant for the high resistance layer, but there is no limitation as long as it functions as a high resistance layer dopant such as Ru (ruthenium), Cr, Co, and Ti. In addition, the n-InP upper cladding layer in the optical modulator region is not formed together with the SI layer, and the number of times of growth is increased. However, the n-InP upper cladding layer may be selectively formed only on the upper waveguide of the modulator. This increases the number of steps because the growth is increased once, but the etching process of the semiconductor element portion can be reduced accordingly.

  In the present embodiment, an example of an integrated device having two to three regions has been described. Needless to say, the present invention can be applied to an integrated device having three or more regions, and the number of regions is not limited.

It is process drawing which shows an example of butt joint joining. It is a figure which shows an example of an optical modulator. (A) It is sectional drawing of a pin structure optical modulator. (B) It is sectional drawing of an n-SI-in structure optical modulator. It is process drawing which shows an example of the butt joint joining containing a clad layer. It is process drawing which shows an example of the butt joint joining containing a clad layer. It is a figure explaining the optical modulator of the 1st Embodiment of this invention. (A) It is a top view explaining the optical modulator of the 1st Embodiment of this invention. (B)-(d) It is sectional drawing which shows the manufacturing process of the optical modulator of the 1st Embodiment of this invention. (E) It is sectional drawing explaining the optical modulator of the 1st Embodiment of this invention. It is a figure explaining the optical integrated element of the 2nd Embodiment of this invention. (A) It is a top view explaining the optical integrated element of the 2nd Embodiment of this invention. (B)-(f) It is sectional drawing which shows the manufacturing process of the optical integrated device of the 2nd Embodiment of this invention. (G), (h) It is a perspective view explaining the manufacturing process of the optical integrated device of the 2nd Embodiment of this invention. It is a figure explaining the optical integrated element of the 2nd Embodiment of this invention. (I) It is a perspective view explaining the optical integrated element of the 2nd Embodiment of this invention. (J) It is sectional drawing explaining the optical modulator area | region of the optical integrated device of the 2nd Embodiment of this invention. (K) It is sectional drawing explaining the DFB laser area | region of the optical integrated device of the 2nd Embodiment of this invention. It is a figure explaining the optical integrated element of the 3rd Embodiment of this invention. (A) It is a top view explaining the optical integrated element of the 3rd Embodiment of this invention. (B)-(f) It is sectional drawing which shows the manufacturing process of the optical integrated device of the 3rd Embodiment of this invention. (G), (h) It is a perspective view explaining the manufacturing process of the optical integrated device of the 3rd Embodiment of this invention. It is a figure explaining the optical integrated element of the 3rd Embodiment of this invention. (I) It is a perspective view explaining the optical integrated element of the 3rd Embodiment of this invention. (J) It is sectional drawing explaining the optical modulator area | region of the optical integrated device of the 3rd Embodiment of this invention. (K) It is sectional drawing explaining the optical amplifier area | region of the optical integrated element of the 3rd Embodiment of this invention. It is a figure explaining the 4th Embodiment of this invention. (A), (b) It is sectional drawing which shows the manufacturing process of the optical integrated device of the 4th Embodiment of this invention. (C), (d) It is a perspective view explaining the manufacturing process of the optical integrated device of the 4th Embodiment of this invention. It is a figure explaining the optical integrated element of the 4th Embodiment of this invention. (E) It is a perspective view explaining the optical integrated element of the 4th Embodiment of this invention. (F) It is sectional drawing explaining the optical modulator area | region of the optical integrated element of the 4th Embodiment of this invention. (G) It is sectional drawing explaining the optical amplification area | region of the optical integrated device of the 4th Embodiment of this invention.

Explanation of symbols

101 n-InP substrate 102 Optical waveguide layer A
103 p-InP cladding layer A
104 SiO ₂ mask 105 Optical waveguide layer B
106 p-InP cladding layer B
107 p-InP cladding layer 201 n-InP substrate 202 optical waveguide layer 203 p-InP cladding layer 204 signal electrode 205 ground electrode 206 SI-InP substrate 207 n-InP buffer layer 208 i-optical waveguide layer 209 SI-InP cladding layer 210 n-InP cladding layer 211 signal electrode 212 ground electrode 301 InP substrate 302 first region optical waveguide layer 303 first region InP cladding layer 304 SiO ₂ mask 305 second region optical waveguide layer 306 second InP cladding layer 401 in the region InP substrate 402 Optical waveguide layer 403 in the first region InP cladding layer 404 in the first region SiO ₂ mask 405 Optical waveguide layer 406 in the second region InP cladding layer 407 in the second region InP cladding layer 408 S in one region O ₂ mask 409 second InP cladding layer 501 SI-InP substrate 502 n-InP buffer layer 503 i-InGaAsP optical waveguide layer 504 SI-InP cladding layer 505 SiO ₂ mask 506 SI-InP layer 507 n-InP layer in the region of the 508 SiO ₂ mask 509 Signal electrode 510 Ground electrode 511 Entrance end face 512 Exit end face 513 Stack 601 SI-InP substrate 602 n-InP buffer layer 603 n-InGaAsP guide layer 604 i-InGaAsP optical waveguide layer 605 p-InP cladding layer 606 SiO ₂ mask 607 i-InGaAsP optical waveguide layer 608 p-InP cladding layer 609 p-InP cladding layer 610 p-InGaAs contact layer 611 p-InP cap layer 612 SiO ₂ mask 613 iO ₂ mask 614 SI-InP layer 615 n-InP layer 616 SiO ₂ mask 617 signal electrode 618 ground electrode 619 p-side electrode 620 n-side electrode 621 laminate 622 laminate 624 incident end face 625 emitting end face 701 SI-InP substrate 702 n -InP buffer layer 703 i-InGaAsP optical waveguide layer 704 p-InP cladding layer 705 SiO ₂ mask 706 i-InGaAsP optical waveguide layer 707 p-InP cladding layer 708 p-InP cladding layer 709 p-InGaAs contact layer 710 p-InP cap layer 711 SiO ₂ mask 712 SiO ₂ mask 713 SI-InP layer 714 n-InP layer 715 SiO ₂ mask 716 signal electrode 717 ground electrode 718 p-side electrode 719 n-side electrode 801 SI-an In Substrate 802 n-InP buffer layer 803 i-InGaAsP optical waveguide layer 804 p-InP cladding layer 805 SiO ₂ mask 806 i-InGaAsP optical waveguide layer 807 p-InP cladding layer 808 p-InP cladding layer 809 p-InGaAs contact layer 810 p-InP cap layer 811 SiO ₂ mask 812 SI-InP layer 813 n-InP layer 814 SiO ₂ mask 815 signal electrode 816 ground electrode 817 p-side electrode 818 n-side electrode

Claims (11)

An incident end face to which light is incident;
A first optical waveguide layer that propagates the incident light;
A pair of electrodes for applying an electric field to the first optical waveguide layer;
An emission end face for emitting the light modulated by the applied electric field;
A first conductive lower cladding layer covering the lower surface of the first optical waveguide layer;
The first conductive upper cladding layer provided on the first optical waveguide layer;
With
An optical modulator provided with a semi-insulating semiconductor layer that covers an upper surface of the first optical waveguide layer and a side surface of the first optical waveguide layer. A semiconductor substrate;
A first laminate in which the lower cladding layer and the first optical waveguide layer are sequentially laminated is provided on the semiconductor substrate;
The optical modulator according to claim 1, wherein the first laminated body is processed into a mesa shape. A semiconductor substrate;
A first laminate in which the lower cladding layer and the first optical waveguide layer are sequentially laminated is provided on the semiconductor substrate;
The optical modulator according to claim 1, wherein a surface of the first stacked body is covered with the semi-insulating semiconductor layer. An optical modulator according to any one of claims 1 to 3,
An optical semiconductor element connected to the optical modulator;
Including
An optical integrated device in which a forward bias is applied to the optical semiconductor device. A semiconductor substrate provided with the optical modulator and the optical semiconductor element connected to the optical modulator;
The optical semiconductor element is:
A second laminate including a first conductive first cladding layer, a second optical waveguide layer, and a second conductive second cladding layer, which are sequentially laminated on the semiconductor substrate;
The optical integrated device according to claim 4, wherein the semi-insulating semiconductor layer provided in the optical modulator embeds the second stacked body.   The layer thickness of the semi-insulating semiconductor layer formed between the upper surface of the first optical waveguide layer and the lower surface of the upper cladding layer is greater than the layer thickness of the semi-insulating semiconductor layer embedding the second stacked body. The optical integrated device according to claim 4 or 5, wherein the optical integrated device is thin.   7. The optical integrated device according to claim 4, wherein the optical semiconductor device is an optical amplifier that amplifies laser light.   8. The optical integrated device according to claim 4, wherein the optical semiconductor element has a phase adjustment region for adjusting a phase of laser light in accordance with an input electric signal and an optical amplification region for amplifying the laser light. The optical semiconductor element is a wavelength tunable laser, and includes a phase adjustment region that adjusts a phase of laser light according to an input electric signal, and an optical amplification region that amplifies the laser light,
The optical integrated device according to claim 4, wherein the phase adjustment region includes a wavelength tunable filter. Preparing a semiconductor substrate; and
Forming a first laminated structure by sequentially laminating a first conductive cladding layer and a first optical waveguide layer on the semiconductor substrate;
Etching the first laminated structure to form a first mesa;
Covering the surface of the formed first mesa with a semi-insulating semiconductor layer;
A method of manufacturing an optical modulator comprising: Preparing a semiconductor substrate; and
Forming a second laminated structure by sequentially laminating a first conductive cladding layer, a second optical waveguide layer, and a second conductive cladding layer on the semiconductor substrate;
Forming a first laminated structure by laminating a first optical waveguide layer on the first conductive cladding layer;
Connecting the first optical waveguide layer and the second optical waveguide layer;
Etching the first laminated structure to form a first mesa and etching the second laminated structure to form a second mesa;
Burying the second mesa with a semi-insulating semiconductor layer and covering the surface of the first mesa with the semi-insulating semiconductor layer;
An optical integrated device manufacturing method including:

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