JP2009239174A - Pattern forming method, method of forming contact hole, and method of manufacturing electrooptical device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a pattern forming method capable of reducing costs by preventing resist from remaining in etching, and to provide a method of forming a contact hole and a method of manufacturing an electrooptical device. <P>SOLUTION: A metal film 3 is formed on a film 2 formed on a base material 1, a resist mask 4 is formed on the metal film 3, and the metal film 3 is dry-etched by the resist mask 4 to form a metal mask 4. In the pattern forming method, the metal mask 4 is used to dry-etch a film for patterning, and the metal mask 4 is removed. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a pattern forming method, a contact hole forming method, and an electro-optical device manufacturing method.

Conventionally, wiring and contact holes are formed by dry etching using a resist pattern as a mask and then removing the resist with a solution. Here, when miniaturization is required, dry etching is used for etching. This is because wet etching is isotropic etching, so the controllability of the etching amount in the horizontal and vertical directions is poor, and it is difficult to form a contact hole with a small hole diameter and a high aspect ratio. On the other hand, dry etching is anisotropic etching, which has good controllability of the etching amount in the horizontal and vertical directions, can form contact holes with a small hole diameter and a high aspect ratio, and can be miniaturized. Because it is suitable.
The resist is thermally damaged during the dry etching process and forms a hardened layer on the surface. The cured layer formed on the surface inhibits the reaction between the solution and the resist when the resist is stripped, and causes a resist residue after stripping. Therefore, after dry etching, the resist is ashed with O ₂ gas or a mixed gas containing O ₂ and fluorine, thereby removing the hardened layer formed on the surface and peeling without causing a resist residue. (For example, refer to Patent Document 1).
Japanese Patent Laid-Open No. 5-102108

However, the prior art has the following problems even when ashing is performed after etching. As a first problem, since the thickness of the interlayer insulating film to be etched is large, the etching time is longer than in other processes, the damage to the resist during etching is increased, and the hardened layer is thickened. In addition, as a second problem, for example, a gas such as C ₄ F ₈ is used to ensure a selection ratio with respect to the semiconductor layer. In this case, a deposition film (polymerized film) is formed on the resist surface during etching. The deposition film needs to be removed during ashing. In addition, as a third problem, the etching apparatus used when forming the contact hole has a high plasma density in order to increase the rate, and accordingly, the plasma density at the time of ashing also becomes high, which causes thermal damage to the resist. Recures the surface. Therefore, in order to peel off such a resist residue, it is necessary to use a stripping solution having a high stripping capability, which may increase the cost.

  SUMMARY OF THE INVENTION The present invention has been made in view of such circumstances, and a pattern forming method, a contact hole forming method, and an electro-optical device manufacturing method that realize cost reduction by preventing residual resist during etching. The purpose is to provide.

  In order to solve the above problems, a pattern forming method of the present invention includes a step of forming a metal film on a film formed on a base material, a resist mask is formed on the metal film, and the resist mask is used. A step of dry etching the metal film to form a metal mask, a step of dry etching the film using the metal mask and patterning, and a step of removing the metal mask. To do.

According to the pattern forming method of the present invention, since a film is patterned by using a metal mask, for example, even when the film is thick and dry etching takes time, a resist is formed on the film during etching. It is possible to prevent a resist residue from occurring and to form a good pattern. Accordingly, since no resist residue is generated on the pattern, an inexpensive stripping solution can be used, and the cost can be reduced.
Furthermore, dry etching suitable for miniaturization can be used while reducing costs.

In the pattern forming method, it is preferable to perform dry etching using the resist mask as a mask together with the metal mask during the patterning step of the film.
According to this structure, the process of peeling a resist mask by peeling a resist mask with a metal mask after film | membrane pattern formation becomes unnecessary, and a process can be simplified.

  The contact hole forming method of the present invention includes a step of forming a metal film on a film covering a substrate, a resist mask is formed on the metal film, and the metal film is dry-etched using the resist mask. A step of forming a metal mask, a step of dry etching the film using the metal mask to form a hole exposing the conductive portion formed on the surface of the base material, and removing the metal mask And a process.

  According to the contact hole forming method of the present invention, since a contact hole (hole) can be formed by using a metal mask, for example, even when the film is thick and time is required for dry etching, the film is not etched. There is no resist on the top, so that resist residue can be prevented and good contact hole formation can be performed. Accordingly, no resist residue is formed on the film in which the contact hole is formed, so that an inexpensive stripping solution can be used and the cost can be reduced.

In the contact hole forming method, it is preferable that in the step of forming the hole, dry etching is performed using the resist mask as a mask together with the metal mask.
According to this structure, the process of peeling a resist mask by peeling a resist mask with a metal mask after contact hole formation becomes unnecessary, and a process can be simplified.

  The electro-optical device manufacturing method of the present invention is an electro-optical layer manufacturing method in which an electro-optical layer is sandwiched between a pair of substrates, and an active region of a semiconductor layer constituting a switching element formed on one of the substrates. Forming a metal film on an interlayer insulating film covering the metal layer, forming a resist mask on the metal film, dry-etching the metal film using the resist mask, and forming the metal mask; Forming a hole exposing the active region by dry etching the interlayer insulating film using a mask; removing the metal mask; and a conductive portion connected to the active region through the hole And a step of forming.

  According to the method of manufacturing an electro-optical device of the present invention, a contact hole (hole) for connecting to an active region of a switching element can be formed by using a metal mask, so that, for example, the interlayer insulating film is thick and dry etching is performed. Even when time is required, since no resist is present on the interlayer insulating film during etching, resist residue does not occur and good conduction to the semiconductor layer can be ensured. In addition, since no resist residue is generated on the interlayer insulating film, an inexpensive stripping solution can be used, and the cost can be reduced.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a contact hole forming process. In this description, a case where a contact hole is formed in an interlayer insulating film is taken as an example. This step is applied when manufacturing a liquid crystal display device as an electro-optical device to be described later.

As shown in FIG. 1A, a metal film 3 is formed on an interlayer insulating film (film) 2 formed on a substrate 1. Here, the base material 1 includes various materials such as a substrate, a substrate whose surface is covered with an insulating layer, or a substrate on which metal wiring is formed. In the present embodiment, the interlayer insulating film 2 is formed so as to cover the conductive portion 6 formed on the surface of the substrate 1. The interlayer insulating film 2 is made of silicon oxide such as a SiO ₂ film.

  In the present embodiment, as the metal film 3, a 2000-nm Mo film is formed by sputtering, for example. As the metal film 3, a Ti film, an Al film, or a Cr film can be used in addition to the Mo film. The interlayer insulating film 2 is formed to a thickness of, for example, 7000 mm.

Subsequently, as shown in FIG. 1B, a resist is formed on the metal film 3, and the resist is patterned by photolithography to form a resist mask 4. Then, the metal film 3 is dry etched using the resist mask 4. At this time, an etching gas having a high selectivity with respect to the interlayer insulating film 2 (SiO ₂ film), for example, Cl ₂ is used. By dry etching the metal film 3, a metal mask 5 is formed on the interlayer insulating film 2 as shown in FIG. The metal mask 5 has an opening formed at a position corresponding to the conductive portion 6 formed on the substrate 1, and the opening diameter is about 1.8 μm.

Subsequently, the resist mask 4 on the metal mask 5 is removed as shown in FIG.
Here, during the dry etching process of the metal film 3 (Mo film), since the film thickness of the film to be etched (metal film 3) is small, the processing time of the interlayer insulating film 2 is shortened to about one third. In addition, since Cl ₂ used as an etching gas is difficult to form a deposition film (polymerized film), a resist residue hardly occurs when the resist mask 4 is peeled off. Even if a resist residue occurs on the metal mask 5, there is no problem because it is removed together with the metal mask 5 when the metal mask 5 described later is peeled off.

Then, the interlayer insulating film 2 is dry etched using the metal mask 5. At this time, an etching gas having a high selectivity with respect to the metal mask 5 (Mo film), for example, C ₂ HF ₅ is used. As an etching gas, CF ₄ , C ₄ F ₈ , CHF ₃ , and CH ₂ F ₂ can be used in addition to C ₂ HF ₅ .

  Subsequently, the metal mask 5 is removed with a solution. As a solution for removing the metal mask 5 (Mo film), phosphoric acid, nitric acid, acetic acid, or a mixed solution thereof can be used.

  When a Ti film is used as the metal mask 5, hydrofluoric acid, nitric acid, or a mixed solution thereof can be used. When an Al film is used as the metal mask 5, phosphoric acid, nitric acid, acetic acid, or a mixed solution thereof can be used. When a Cr film is used as the metal mask 5, cerium ammonium nitrate can be used.

By removing the metal mask 5 in this manner, a contact hole (hole) 7 exposing the conductive portion 6 is formed in the interlayer insulating film 2 as shown in FIG.
In this embodiment, the resist mask 4 is peeled off as shown in FIG. 1D prior to the dry etching process of the interlayer insulating film 2. However, in the present invention, the resist mask 4 is not peeled off. (The step of FIG. 1D is omitted), and the interlayer insulating film 2 can be dry etched using the resist mask 4 and the metal mask 5 as a mask. Thereby, it is not necessary to separately perform a step of removing the resist mask 4, and the manufacturing process can be simplified.

  Incidentally, since the interlayer insulating film 2 is generally thicker than other dry etching processes, the etching time is particularly long. Therefore, when etching is performed by forming a resist mask on the interlayer insulating film as in the prior art, damage to the mask due to the etching increases, which may cause a resist residue on the interlayer insulating film.

  On the other hand, in the method according to this embodiment, since the interlayer insulating film 2 is dry-etched using the metal mask 5, no resist is present on the interlayer insulating film 2 during etching, and a resist residue is generated. Can be prevented. Therefore, an inexpensive stripping solution used in the manufacturing process can be adopted, and the cost can be reduced.

  The method for forming the contact hole is not limited to the interlayer insulating film 2, and a film having a relatively large film thickness and requiring a long time for etching is patterned by using the metal mask 5 to form a wiring or the like. The present invention can also be applied to a pattern forming method for obtaining a pattern. That is, the pattern forming method of the present invention includes a step of forming a metal film on a film formed on a substrate, a resist mask on the metal film, and dry etching the metal film using the resist mask. Forming a metal mask, dry etching the film using the metal mask, patterning, and removing the metal mask. According to the pattern forming method of the present invention, since no resist exists on the film during etching, it is possible to prevent a resist residue from occurring and to form a good pattern.

(Method for manufacturing electro-optical device)
Next, a case where the present invention is applied to a manufacturing process of a liquid crystal display device will be described as an embodiment of a method for manufacturing an electro-optical device of the present invention. First, since the manufacturing method of the present invention is characterized in that a TFT array substrate on which TFT elements as switching elements are formed is formed, the manufacturing process of the TFT array substrate will be mainly described. The contact hole forming process described above is used as part of the manufacturing process of the TFT array substrate.

First, the liquid crystal display device manufactured by this method will be described.
FIG. 3 is a plan view of the liquid crystal display device according to the present invention as seen from the counter substrate side shown together with each component, and FIG. 4 is a cross-sectional view taken along the line HH ′ of FIG. FIG. 5 is an equivalent circuit diagram of various elements and wirings in a plurality of pixels formed in a matrix in the image display region of the liquid crystal display device, and FIG. 6 is a part manufactured by a manufacturing process described later in the liquid crystal display device. FIG. In each drawing used in the following description, the scale is different for each layer and each member so that each layer and each member can be recognized on the drawing.

  3 and 4, in the liquid crystal display device (electro-optical device) 100 according to the present embodiment, a pair of TFT array substrate 10 and counter substrate 25 are attached by a sealing material 54 which is a photo-curable sealing material. The liquid crystal 55 is sealed and held in a region partitioned by the sealing material 54.

  A peripheral parting 53 made of a light shielding material is formed in a region inside the region where the sealing material 54 is formed. A data line driving circuit 201 and a mounting terminal 202 are formed along one side of the TFT array substrate 10 in a region outside the sealing material 54, and the scanning line driving circuit 204 is formed along two sides adjacent to the one side. Is formed. On the remaining side of the TFT array substrate 10, a plurality of wirings 205 are provided for connecting between the scanning line driving circuits 204 provided on both sides of the image display area. In addition, an inter-substrate conductive material 206 for providing electrical continuity between the TFT array substrate 10 and the counter substrate 25 is disposed in at least one corner of the counter substrate 25.

In the liquid crystal display device 100, depending on the type of the liquid crystal 55 to be used, that is, depending on the operation mode such as TN (Twisted Nematic) mode, STN (Super Twisted Nematic) mode, or normally white mode / normally black mode. A retardation plate, a polarizing plate, and the like are arranged in a predetermined direction, but the illustration is omitted here.
In addition, the liquid crystal display device 100 has, for example, red (R), green (G), and blue (B) color filters (non-uniform) in a region of the counter substrate 25 facing each pixel electrode (to be described later) of the TFT array substrate 10. As shown, a full color display is possible.

  In the image display area of the liquid crystal display device 100 having such a structure, as shown in FIG. 5, a plurality of pixels 100a are arranged in a matrix, and each of these pixels 100a has a pixel switching area. TFT (switching element) 30 is formed, and a data line 6 a for supplying pixel signals S 1, S 2,..., Sn is electrically connected to the source of the TFT 30. Pixel signals S1, S2,..., Sn to be written to the data lines 6a may be supplied line-sequentially in this order, or may be supplied for each group to a plurality of adjacent data lines 6a. . Further, the scanning line 3a is electrically connected to the gate of the TFT 30, and the scanning signals G1, G2,..., Gm are applied to the scanning line 3a in a pulse-sequential manner in this order at a predetermined timing. It is configured.

  The pixel electrode 9 is electrically connected to the drain of the TFT 30, and the pixel signal S1, S2,..., Sn supplied from the data line 6a is obtained by turning on the TFT 30 as a switching element for a certain period. Write to each pixel at a predetermined timing. The pixel signals S1, S2,..., Sn written in the liquid crystal via the pixel electrode 9 in this way are held for a certain period with the counter electrode 21 of the counter substrate 25 shown in FIG. In order to prevent the retained pixel signals S1, S2,..., Sn from leaking, a storage capacitor 60 is added in parallel with the liquid crystal capacitor formed between the pixel electrode 9 and the counter electrode 21. For example, the voltage of the pixel electrode 9 is held by the storage capacitor 60 for a time longer than the time when the source voltage is applied. Thereby, the charge retention characteristics are improved, and the liquid crystal display device 100 with a high contrast ratio can be realized. Reference numeral 3 b denotes an auxiliary capacitance line connected to the counter electrode 21.

  FIG. 6 shows a partially enlarged view around the TFT 30 of the TFT array substrate 10 in the liquid crystal display device 100. As shown in FIG. 6, the TFT array substrate 10 includes a TFT 30 having a semiconductor layer 12, a gate electrode 14, a drain electrode 19, and a source electrode 22.

  The TFT array substrate 10 includes a semiconductor layer 12 made of polysilicon formed on a substrate body 10A via a base insulating film 11 made of a silicon oxide film. A gate electrode 14 is provided on the semiconductor layer 12 via a gate insulating film 13 made of a silicon oxide film. A first interlayer insulating film 15 made of silicon oxide or the like is formed so as to cover the gate electrode 14.

  The first interlayer insulating film 15 and the gate insulating film 13 expose the contact hole 17 that exposes the drain region (active region) 12A of the semiconductor layer 12 and the source region (active region) 12B of the semiconductor layer 12. A contact hole 20 is formed. Further, on the first interlayer insulating film 15, a drain electrode (conductive portion) 19 connected to the drain region 12 </ b> A through the contact hole 17 and a source electrode (connected to the source region 12 </ b> B through the contact hole 20). Conductive portion) 22 is provided. A second interlayer insulating film 16 made of silicon oxide is formed so as to cover the drain electrode 19 and the source electrode 22. In addition, a contact hole 23 for exposing the drain electrode 19 is formed in the second interlayer insulating film 16. A pixel electrode 9 is formed on the second interlayer insulating film 16, and the pixel electrode 9 is connected to the drain electrode 19 through the contact hole 23.

The manufacturing method of the liquid crystal display device according to the present embodiment applies the above-described contact hole forming method to the interlayer insulating film (the first interlayer insulating film 15 and the gate insulating film 13) that covers the TFT 30 on the substrate body 10A. Forming the contact holes 17 and 20 and forming the source electrode 22 and the drain electrode 19 in the contact holes 17 and 20.
The substrate body 10A in the manufacturing method of the liquid crystal display device corresponds to the base material 1 in the contact hole forming method shown in FIGS. 1 and 2, and the first interlayer insulating film 15 and the gate insulation in the manufacturing method of the liquid crystal display device. The film 13 corresponds to the interlayer insulating film 2 shown in FIGS. 1 and 2, and the drain region 12A and the source region 12B in the manufacturing method of the liquid crystal display device correspond to the conductive portion 6 shown in FIGS.

Therefore, in the method for manufacturing the liquid crystal display device according to the present embodiment, contact holes 17 for forming the source electrode 22 and the drain electrode 19 connected to the source region 12B or the drain region 12A by using the metal mask 5 are provided. Thus, even when the interlayer insulating film is thick and time is required for dry etching, no resist is present on the interlayer insulating film during etching, and the generation of residual resist can be prevented. Therefore, good conduction can be ensured in the TFT 30. Further, since no resist residue is generated on the interlayer insulating film, an inexpensive stripping solution can be used, and the cost can be reduced.
Further, the liquid crystal display device 100 according to the present embodiment can be used for electronic devices such as a mobile phone and a PC (personal computer). In the mobile phone, the liquid crystal display device 100 according to the present embodiment is used for the display screen. Further, in a PC, it can be used for an input unit such as a keyboard and a display screen. In addition, by incorporating the peripheral circuit in the substrate in the liquid crystal panel, the number of parts can be greatly reduced, and the apparatus body can be reduced in weight and size.

  In addition, this invention is not limited to the above-mentioned embodiment, In the range which does not deviate from the meaning of this invention, it can change suitably. For example, in the above-described embodiment, the liquid crystal display device has been described as the electro-optical device. However, the source / drain electrodes that are conductive through the contact holes manufactured by the above-described method are provided in the source / drain regions of the semiconductor layer constituting the TFT. The present invention is also applicable to an organic EL device including an electro-optical device substrate, an electrophoretic display device, and the like.

It is a figure explaining the formation process of a contact hole. It is a figure explaining the formation process of the contact hole following FIG. It is a plane block diagram of a liquid crystal display device. It is sectional drawing which follows the H-H 'line | wire of FIG. 3 of a liquid crystal display device. It is an equivalent circuit diagram of a liquid crystal display device. It is an enlarged view which shows the principal part of the TFT array substrate of a liquid crystal display device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Base material, 2 ... Interlayer insulating film (film | membrane), 3 ... Metal film, 4 ... Resist mask, 5 ... Metal mask, 6 ... Conductive part, 7 ... Contact hole, 12 ... Semiconductor layer, 13 ... Gate insulating film ( Interlayer insulating film), 15 ... first interlayer insulating film (interlayer insulating film), 17, 20 ... contact hole, 19 ... drain electrode (conductive portion), 22 ... source electrode (conductive portion), 100 ... liquid crystal display device (electrical) Optical device)

Claims (5)

Forming a metal film on the film formed on the substrate;
Forming a resist mask on the metal film, and dry etching the metal film using the resist mask to form a metal mask;
Patterning the film by dry etching using the metal mask; and
Removing the metal mask;
A pattern forming method comprising:   2. The pattern forming method according to claim 1, wherein in the patterning step of the film, dry etching is performed using the resist mask as a mask together with the metal mask. Forming a metal film on the film covering the substrate;
Forming a resist mask on the metal film, and dry etching the metal film using the resist mask to form a metal mask;
Forming a hole exposing the conductive portion formed on the surface of the base material by dry etching the film using the metal mask; and
Removing the metal mask;
A method for forming a contact hole, comprising:   The method for forming a contact hole according to claim 3, wherein in the step of forming the hole, dry etching is performed using the resist mask as a mask together with the metal mask. In the manufacturing method of the electro-optic layer formed by sandwiching the electro-optic layer between a pair of substrates,
Forming a metal film on an interlayer insulating film covering an active region of a semiconductor layer constituting a switching element formed on one side of the substrate;
Forming a resist mask on the metal film, and dry etching the metal film using the resist mask to form a metal mask;
Forming a hole exposing the active region by dry etching the interlayer insulating film using the metal mask;
Removing the metal mask;
Forming a conductive portion connected to the active region through the hole;
A method for manufacturing an electro-optical device.

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