JP2009236627A - Voltage measurement apparatus, integrated circuit substrate, and voltage measurement method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a voltage measurement apparatus for suppressing an increase in a circuit area, and accurately measuring a voltage. <P>SOLUTION: The voltage measurement apparatus includes: a comparison section 11 having a plurality of unit comparators 100 for comparing a measured voltage as an measuring object with an identical reference voltage, inputting respectively the identical standard voltage thereto, and each comparing the measured voltage with the reference voltage determined in response to the standard voltage; and an analysis section 13 for analyzing a comparison result from each unit comparator 100 including a fluctuation in a characteristic of circuit elements composing each unit comparator 100, and obtaining the measured voltage. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a voltage measurement device, an integrated circuit board, and a voltage measurement method for measuring a voltage value at an arbitrary measurement point on an integrated circuit board, for example.

  2. Description of the Related Art A voltage measuring device that measures a voltage at a certain time is conventionally applied to an analog / digital converter (A / D converter), a sensor, and the like.

  In the A / D converter, the voltage to be converted is held by a sample and hold circuit consisting of a switch and a capacitor, and the holding voltage and the reference voltage are sequentially and parallelly compared by a comparator to obtain a corresponding digital output. Yes. Here, it is difficult to reduce the area of the capacitor in the hold circuit in order to reduce a holding voltage error due to charge leakage. In a fine process with large variations, it is necessary to intentionally design a large device size, and it is becoming difficult to reduce a circuit area according to process scaling.

  This is due to the following reason. That is, the variation is caused by the fluctuation of impurities under the channel region, the fluctuation of its position, or the like. This is because, as shown in Non-Patent Document 1, the variation represented by the dispersion of the device threshold distribution is inversely proportional to the device size, that is, the channel area.

  In addition, the voltage measuring apparatus includes, for example, the following as an existing on-chip voltage measuring circuit that realizes power supply voltage fluctuation on an integrated circuit.

  The voltage measurement circuit described in Non-Patent Document 2 is a circuit that converts a voltage at a measurement point into a current and guides it outside the chip, converts the current into a voltage with an oscilloscope or the like outside the chip, and reads a voltage fluctuation.

  The voltage measurement circuit described in Non-Patent Document 3 includes a circuit that converts a voltage into a current, and a sampling circuit that holds a voltage to be measured before the measurement circuit in order to increase voltage measurement accuracy. .

  The voltage measurement circuit described in Non-Patent Document 4 compares the voltage of the source follower with a reference voltage, holds the comparison result with a latch comparator, converts the held voltage into a current, and leads it outside the chip. This is a circuit that reads voltage fluctuations by converting current to voltage using an oscilloscope or the like outside the chip.

M. Pelgrom, A. Duinmaijer and A. Welbers, “Matching properties of MOS transistors,” IEEE J. Solid-state circuits, Vol. 24, No. 5, pp. 1433-1439, Oct. 1989. R. Ho, B. Amrutur, K. Mai, B. Wilburn, TT Mori, and M. Horowitz, “Applications of on-chip samplers for test and measurement of integrated circuits,” in Proc. Symp. VLSI Circuits, 1998, pp. 138139. M. Takamiya, M. Mizuno, and K. Nakamura, “An on-chip, 100-GHz sampling rate, 8-channel sampling oscilloscope macro with embedded sampling clock generator,” in Proc. ISSCC, Feb. 2002, pp. 182183 . M. Nagata, T. Okumoto, and K. Taki, “A built-in technique for probing power supply and ground noise distribution within large-scale digital integrated circuits,” IEEE J. Solid-State Circuits, vol. 40, no. 4, pp. 813 819, 2005.

  The voltage measurement circuits described in Non-Patent Documents 2 to 4 as described above have the following problems, for example.

  In the voltage measurement circuit described in Non-Patent Document 2, it is necessary that the transistor used for calibration and the characteristics of the transistor used for measurement coincide with each other with high accuracy. Therefore, in order to improve the measurement accuracy, the size of the transistor provided for each measurement point cannot be significantly reduced. Further, in order to obtain a sufficient voltage and secure a noise margin when converting from current to voltage at the chip end, it is necessary to make the current amplification transistor larger. In addition, since the voltage of the measured value is an analog quantity, it takes a larger area to add an analog / digital converter to digitize the value measured in the chip.

  In addition, in the voltage measurement circuit described in Non-Patent Document 3, a capacitor for sampling the voltage is provided in order to perform high-accuracy voltage-current conversion. It is necessary not to change under the influence of external noise. For this reason, it is necessary to make the size of this capacitor larger than a certain size, and it is difficult to make it smaller as the circuit becomes finer. Also, the circuit configuration after the voltage-current conversion is similar to the voltage measurement circuit described in Non-Patent Document 2, the size of the current amplification transistor is increased, and analog / Since a digital converter or the like is required, the area becomes large.

  Further, in the voltage measurement circuit described in Non-Patent Document 4, it is necessary to reduce the offset voltage held by the latch comparator having the differential transistor, and thus it is difficult to reduce the circuit area related to the latch comparator. . In addition, the circuit configuration after the voltage-current conversion increases the size of the transistor for current amplification, and requires an analog / digital converter for observing the voltage on the chip, resulting in an increase in area.

  The present invention has been proposed in view of such circumstances, a voltage measuring device that measures a voltage value with high accuracy while suppressing an increase in circuit area, an integrated circuit board on which the voltage measuring device is mounted, And it aims at providing the voltage measuring method.

  As a means for solving the above-described problem, the voltage measuring apparatus according to the present invention has a plurality of unit comparators for comparing a measurement voltage value to be measured with a reference voltage value, and is identical to each unit comparator. A reference voltage value is input, and each unit comparator compares a measured voltage value with a reference voltage value determined according to the reference voltage value, and variations in characteristics of circuit elements constituting each unit comparator And an analysis unit for analyzing a comparison result obtained from each unit comparator including a variation due to the above and obtaining a measurement voltage value.

  The integrated circuit board according to the present invention includes a plurality of unit measurement circuits that are connected in parallel to the measurement point for measuring the voltage value and compare the measurement voltage value at the measurement point with the reference voltage value. The same reference voltage value is input to the comparator, and each unit comparator compares the measured voltage value with a reference voltage value set according to the reference voltage value, and circuit elements constituting each unit comparator And an analysis unit for analyzing a comparison result obtained from each unit comparator including a variation due to variation in the characteristics of each of the two to obtain a measured voltage value.

  In the voltage measurement method according to the present invention, the same reference voltage value is input to each of the plurality of unit measurement circuits that compare the measurement voltage value to be measured with the reference voltage value, and each unit comparator measures the measurement voltage. Comparison obtained from each unit comparator, including a comparison step for comparing the value with a reference voltage value set according to the reference voltage value, and a variation due to variation in characteristics of circuit elements constituting each unit comparator Analyzing the result to obtain a measured voltage value.

  In the present invention, the same reference voltage value is input to each of the plurality of unit comparison circuits that compare the measurement voltage value to be measured with the reference voltage value, and each unit comparator determines the measurement voltage value according to the reference voltage value. The comparison result obtained from each unit comparator including the variation due to the variation in the characteristics of the circuit elements constituting each unit comparator is analyzed, and the measured voltage value is calculated. Therefore, the voltage value can be measured with high accuracy while suppressing an increase in circuit area.

  The voltage measuring device to which the present invention is applied is a device that measures the voltage at an arbitrary measurement point on an integrated circuit board. In the present embodiment, first, the voltage measuring apparatus 1 according to the first embodiment having a configuration as shown in FIG. 1 will be described in detail.

  The voltage measuring apparatus 1 includes a comparison unit 11 having a plurality of unit comparators 100, a shift register 12 that holds a comparison result obtained from each unit comparator 100 that the comparison unit 11 has, and a comparison that is held in the shift register 12. The analysis part 13 which analyzes a result and the control part 14 which outputs the various control signals which control each part are provided.

  In the comparison unit 11, for example, a total of 64 unit comparators 100 of 8 × 8 are arranged in an array. Then, the comparison unit 11 drives each unit comparator 100 with the power supply voltage VDD. The comparison unit 11 receives, for example, a measurement voltage value Vmeas at an arbitrary measurement point on an unillustrated integrated circuit board, and receives a reference voltage value Vref, a control signal PRECB, and a control signal EVAL from the control unit 14. , Vmeas, Vref, PRECB and EVAL input are supplied to each unit comparator 100.

  The comparison unit 11 preferably includes a larger number of unit comparators 100 in order to improve the measurement accuracy. However, for the sake of convenience, a total of 64 unit comparators 100 are provided below. This will be described on the assumption.

  Specifically, the comparison unit 11 outputs comparison results M_OUT [00] to M_OUT [63] obtained from each unit comparator 100 described later to the shift register 12, respectively.

  FIG. 2 is a diagram illustrating a configuration of the unit comparator 100 included in the comparison unit 11.

  As shown in FIG. 2, the unit comparator 100 compares the measured voltage value Vmeas with the reference voltage value determined according to the reference voltage value Vref according to the control signals PRECB and EVAL supplied from the control unit 14. , A circuit for outputting a comparison result.

  In order to perform such processing, the unit comparator 100 includes transistors M1 to M7, capacitors C1 and C2, and a NOT operation element N.

  The transistor M1 is a switching element that conducts when the voltage value of the node V1 is HIGH, and causes a current to flow from the node V2 to the ground side via the transistor M7. In the figure, L1 and W1 indicate the gate electrode pattern length and the gate electrode pattern width of the transistor M1 mounted on the integrated circuit substrate, respectively.

  The transistor M2 is a switching element that conducts when the voltage value of the node V2 is HIGH, and causes a current to flow from the node V1 to the ground side via the transistor M7. In the figure, L2 and W2 indicate the gate electrode pattern length and the gate electrode pattern width of the transistor M2 mounted on the integrated circuit substrate, respectively.

  The transistor M3 conducts when the voltage value of the node V1 is LOW, that is, when the voltage value of the node V2 is HIGH, so that the power supply voltage VDD is applied to the transistor M2 via the node V2, and the node V2 is HIGH. It is a switching element to be maintained.

  The transistor M4 conducts when the voltage value of the node V2 is LOW, that is, when the voltage value of the node V1 is HIGH, so that the power supply voltage VDD is applied to the transistor M1 via the node V1, and the node V1 is HIGH. It is a switching element to be maintained.

  The transistor M5 is a switching element that conducts when the control signal PRECB is LOW to apply the measured voltage value Vmeas to the parasitic capacitor C1.

  The transistor M6 is a switching element that conducts when the control signal PRECB is LOW to apply the reference voltage value Vref to the parasitic capacitor C2. The transistors M1 and M3 form an inverting amplifier, and the transistors M2 and M4 are also inverting amplifiers. Which connect each other's output to the input. Due to the positive feedback operation of the two inverting amplifiers, one of the potentials of the node V1 and the node V2 is HIGH and one is LOW.

  The transistor M7 conducts the positive feedback operation by turning on when the control signal EVAL is HIGH. That is, it is a switching element for determining the potentials of the node V1 and the node V2.

  The NOT operation element N is a circuit element that outputs, as a HIGH comparison result M_OUT, that the node V2 becomes LOW due to the transistor M1 conducting to the ground side.

  The unit comparator 100 configured as described above performs the following operation in order to compare the measured voltage value Vmeas with the reference voltage value (Vref + Voff) determined according to the reference voltage value Vref.

  First, when the control signal PRECB is LOW, the unit comparator 100 turns on the transistors M5 and M6 and applies the measured voltage value Vmeas and the reference voltage value Vref to the capacitors C1 and C2, respectively.

  In the unit comparator 100, when the control signal PRECB becomes HIGH and the transistors M5 and M6 are opened, the control signal EVAL becomes HIGH, the transistor M7 is turned on, and the transistors M1 to M4 operate.

  Here, in the pair of the transistor M1 and the transistor M2, the pair of the transistor M3 and the transistor M4, and the pair of the transistor M5 and the transistor M6, the variation due to the variation of the circuit elements is so small that it can be ignored, and the designed characteristics are completely If they match, a comparison result M_OUT as shown in the following equations (1) and (2) is obtained.

If Vmeas> Vref, M_OUT = 1 (1) Expression If Vmeas <Vref, M_OUT = 0 (2) Expression

  Strictly speaking, when the measured voltage value Vmeas and the reference voltage value Vref are completely equal, the comparison result is not determined. However, in the real world, the measured voltage value Vmeas and the reference voltage value Vref are caused by thermal fluctuation or the like. The time when is completely equal does not continue for a long time, and either of the above formulas (1) and (2) is obtained.

  The above comparison results can be obtained when the designed characteristics completely match.However, in recent miniaturized circuit boards, pairs designed to have the same operating characteristics due to variations in impurity concentration, etc. Even if the formed transistors are arranged closest to each other, the actual situation is that the threshold value and the gate size are different among the transistors constituting the pair.

  Therefore, in each unit comparator 100, as described above, the measured voltage value Vmeas is set to the reference voltage value according to the variation of the offset voltage value Voff due to the variation in the characteristics of the transistor and the variation in the parasitic capacitance of the capacitor. Compared to a reference voltage value (Vref + Voff) obtained by adding an offset voltage value Voff to Vref, a comparison result M_OUT of the following expressions (3) and (4) is obtained.

If Vmeas> Vref + Voff, M_OUT = 1 (3) If Vmeas <Vref + Voff, then M_OUT = 0 (4)

  Here, the offset voltage value Voff is a unique value that differs for each unit comparator 100 due to the above-described variation. This is because each unit comparator 100 substantially performs comparison processing using different reference voltage values even if the reference voltage value Vref is the same.

  If the reference voltage value Vref is fixed and various measured voltage values Vmeas are input to the unit comparator 100, the offset voltage value Voff is obtained by detecting the point where the comparison result switches between 1 and 0. Can do.

  The offset voltage value Voff of each unit comparator 100 obtained in this way is distributed as follows, for example.

  The solid line shown in FIG. 3 indicates that the same reference voltage value Vref (1 [V]) is applied to N (N is a natural number) unit comparators 100, and the measurement voltage Vmeas is 0.8 [V]. ] To 1.2 [V], the ratio n1 / N is plotted when n1 (n1 is a natural number) 1 appears in the comparison output. From this specific example, it can be seen that the value of Voff in each unit comparator 100 is within a range of about ± 0.15 [V].

  In the voltage measuring apparatus 1, as described above, the distribution of the offset voltage value Voff obtained from each unit comparator 100 constituting the comparison unit 11 is analyzed, and the same comparison result is output for any measured voltage value. The correspondence relationship between the ratio of the unit comparator 100 in the comparison unit 11 and the measured voltage value Vmeas is stored in advance in the internal memory 131 included in the analysis unit 13, and the analysis unit 13 is stored in the comparison result and the internal memory 131. The measured voltage value Vmeas is obtained by referring to the information.

  Next, the shift register 12 that holds a plurality of comparison results M_OUT [00] to M_OUT [63] obtained from the unit comparator 100 and sequentially supplies them to the analysis unit 13 will be described.

  The shift register 12 includes a storage element that holds the comparison result M_OUT from each unit comparator 100 that constitutes the comparison unit 11, and sequentially compares each unit comparison that constitutes the comparison unit 11 in accordance with a timing chart as shown in FIG. The comparison results M_OUT [00] to M_OUT [63] from the device 100 are output to the analysis unit 13.

  That is, as the precharge operation, the control unit 14 changes the control signal PRECB from HIGH to LOW, thereby causing the capacitors C1 and C2 of each unit comparator 100 constituting the comparison unit 11 to have the measured voltage value Vmeas and the reference voltage value, respectively. Vref is applied.

  Next, the control unit 14 changes the control signal PRECB from LOW to HIGH and the control signal EVAL from LOW to HIGH, and causes each unit comparator 100 to perform the above-described comparison processing. That is, when the control signal EVAL changes from LOW to HIGH, in each unit comparator 100, either one of the node V1 and the node V2 is HIGH according to the magnitude relationship between the measured voltage value Vmeas and the reference voltage value (Vref + Voff). The other becomes LOW and is output as a comparison result.

  When the comparison result is held in the storage element constituting the shift register 12, the control unit 14 configures the shift register 12 with the comparison result obtained by each unit comparator 100 by setting the control signal LOAD to HIGH. Write to each storage element. Next, the control unit 14 sets the control signal LOAD to LOW and inputs the clock signal S_CLK to the shift register 12 to sequentially output the output signal S_OUT to the analysis unit 13.

  As the comparison unit 11 and the shift register 12 operate according to the timing chart as described above, the comparison results obtained by the unit comparators 100 constituting the comparison unit 11 are supplied to the analysis unit 13.

  The control unit 14 causes the analysis unit 13 to analyze a variation due to variations in characteristics of circuit elements constituting each unit comparator 100 based on the comparison result obtained from each unit comparator 100. Specifically, the control unit 14 shows the correspondence between the fluctuation of the offset voltage value Voff of the unit comparator 100 when the reference voltage value is changed and the ratio of the unit comparator 100 that outputs the same comparison result. In order to obtain this, each processing unit is caused to perform the following processing.

  Specifically, in the voltage measurement device 1, the control unit 14 performs a process according to the flowchart illustrated in FIG. 5, thereby creating a table used by the analysis unit 13 to obtain a measurement voltage value.

  In step S11, the control unit 14 sets the measured voltage value Vmeas to a voltage Vc near the median value of the measured voltage range. For example, when it is desired to measure the power supply voltage fluctuation, the control unit 14 sets Vc = 1.0 [V].

  In step S12, the control unit 14 sets the reference voltage value Vref to the initial voltage Vrefi. Here, the control part 14 sets Vrefi suitably according to the voltage range to measure. In this example, the control unit 14 sets the measurement range from 0.6 [V] to 1.4 [V] and Vrefi to 1.4 [V].

  In step S13, the control signals are supplied to the comparison unit 11 and the shift register 12, and a series of measurement operations “precharge / evaluation / reading of states” are performed according to the timing chart shown in FIG. As a result, 1 or 0 is input to the analysis unit 13 as a comparison result obtained by each unit comparator 100.

  In step S14, the control unit 14 causes the analysis unit 13 to perform the following evaluation process. That is, the analysis unit 13 counts the number of outputs of “1” as the evaluation result, and writes the counted number in the C column of the table shown in FIG. That is, the analysis unit 13 writes the number in the column C of the line number 1 among the line numbers associated with Vrefi. Also, the analysis unit 13 assumes that the number of unit comparators 100 corresponding to the number written in the C column is equal to or less than the offset voltage value Voff obtained from the relationship Voff = Vref−Vc, for example. Is associated with Vrefi and written in column B of line number 1.

  In step S15, the control unit 14 decreases the voltage Vref by Δvref. Here, Δvref is set to 0.1 [V] for simplicity of explanation, but it is possible to use a finer voltage or a coarse voltage depending on the desired accuracy. Depending on the application, it is not always necessary to use a constant voltage. In this case, the table becomes unequal.

  In step S16, the control unit 14 determines whether or not Vref is lower than the lower limit voltage Vrefl. Here, when Vref is lower than the lower limit voltage Vrefl, the controller 14 determines that the table is completed and ends this processing step. Further, when Vref has not reached the lower limit voltage Vrefl, the control unit 14 returns to step S13 again to perform the process of “precharge / evaluation / read state”, and from the comparison result according to the process of step S14. A process of writing the obtained value in each column after line number 2 is performed.

  As described above, in the voltage measuring apparatus 1, when the table as shown in FIG. 6, that is, when the measured voltage value Vmeas is fixed to 1 [V], the reference voltage value is 0.6 [V] to 1.. A table showing the change in the number of unit comparators 100 that output the comparison result “1” when the value is changed in increments of 0.1 [V] to 4 [V] is created.

  The table shown in FIG. 6 is converted into a correspondence relationship as shown in FIG. 7 and managed in the internal memory 131 of the analysis unit 13, for example.

  That is, as illustrated in FIG. 7, the analysis unit 13 changes the total number of unit comparators 100 that output the same comparison result “1” in the state where the reference voltage value is Vref, and the change in the measured voltage value Vmeas. Are stored in the internal memory 131.

  The analysis unit 13 uses the table as shown in FIG. 7 to calculate the ratio of the number of unit comparators 100 from which the same comparison result is obtained with respect to the total number of unit comparators 100 constituting the comparison unit 11. Based on the calculated ratio, a measured voltage value Vmeas is obtained.

  For example, when the number of unit comparators 100 whose comparison result is 1 when the reference voltage value is Vref is 52, the analysis unit 13 is supplied from the shift register 12. The measured voltage value Vmeas can be determined to be Vref + 0.2 [V] by counting the value “1” and referring to the table shown in FIG.

Note that information indicating the relationship of the distribution of such offset voltage Voff may be actually performing measurements as described above, the solid line average 0 of FIG. 3, the cumulative frequency distribution of normal distribution of variance sigma ² Therefore, if the average value and variance of the distribution of the offset voltage value Voff are known in advance by some method, the prior measurement is not necessarily required, and this can be omitted to simplify the measurement procedure. More specifically, for example, it is possible to measure dispersion of several chips in the wafer and to represent dispersion of the offset voltage value Voff of the voltage measurement circuit in all chips on the wafer.

  As described above, in the voltage measuring apparatus 1, the same reference voltage value Vref is input to each of the plurality of unit comparators 100 that compare the measurement voltage value Vmeas to be measured with the reference voltage value (Vref + Voff). The unit comparator 100 compares the measured voltage value Vmeas with a reference voltage value (Vref + Voff) set in accordance with the reference voltage value Vref, and the variation due to the variation in the characteristics of the circuit elements constituting each unit comparator 100 is calculated. In addition, since the comparison result obtained from each of the unit comparators 100 is analyzed to obtain the measurement voltage value Vmeas, the voltage value can be measured with high accuracy while suppressing an increase in circuit area.

  In this way, the increase in the circuit area can be suppressed, first, because it is not necessary to compensate for variations in element characteristics, which is one of the problems caused by the progress of miniaturization. This is because the configuration becomes simple and the circuit mounting area can be reduced. Second, in order to measure the voltage, the variation in the element characteristics constituting the unit comparator 100 is used, so that it is inevitably possible to use a transistor with a small size, and the circuit area according to the scaling can be reduced. This is because it becomes possible.

  The reason why the voltage value can be measured with high accuracy is that a large number of comparison units 11 can be connected in parallel to one measurement point, and high-speed measurement can be expected. By connecting many unit comparators in parallel, the number of unit comparators whose offset voltage values Voff are close to each other but slightly different can be increased, which is the reason why the voltage measurement accuracy can be improved.

  In addition, the voltage measuring apparatus 1 can measure a non-repetitive waveform, which is difficult in the conventional voltage measurement process in which voltage measurement is performed with high accuracy by holding the measurement voltage value several times and comparing the voltage value of each sampling. There is an advantage that it becomes possible.

  As described above, in the voltage measuring apparatus 1, the measurable range in which the measured voltage value is measured is determined only by the variation due to the variation in the characteristics of the circuit elements constituting each unit comparator 100. For example, in the case of information regarding the distribution of the reference voltage value of each unit comparator 100 as shown in FIG. 3 described above, the range that can be accurately measured is within ± 0.15 [V] with respect to the reference voltage value. It becomes.

  As described above, in the voltage measuring apparatus 1, the center value of the measurement range can be changed to some extent by adjusting the reference voltage value, but the comparison unit 11 includes the unit comparator 100 having two or more types of operation characteristics. Thus, for example, the voltage measurement range (maximum value and minimum value) can be changed for the following reason.

  First, a derivation process for deriving the distribution of the offset voltage value Voff of the unit comparator 100 using the following physical model will be described.

  Assume that initial voltages of the measured voltage value Vmeas and the reference voltage value Vref input to the unit comparator 100 are V_ref and V_meas, respectively, and are close to the power supply voltage value Vdd. Then, by maintaining the control signal PRECB at HIGH, the transistors M5 and M6 are turned off. In the initial state, the paired transistors M1 and M2 operate in the saturation region. In the range where both of these transistors M1 and M2 operate in the saturation region, the following simultaneous differential equations are obtained from Kirchhoff's current law for the nodes V1 and V2.

  In equation (5), Vt1 and Vt2 are voltage values that are thresholds for conducting the transistors M1 and M2, respectively, μ is carrier mobility, Cox is a unit gate oxide film capacity, α is an α-power law model of transistor current. Represents the velocity saturation index of the carrier at. Since the range in which the transistors M1 and M2 operate in the saturation region is short, when the measured voltage value Vmeas and the reference voltage value Vref are linearized by first-order Taylor expansion and solved, the following equation (6) is obtained.

Here, P1 and P2 are given by Equation (7) and Equation (8), respectively.

  Further, when the voltages necessary for the transistors M3 and M4 to become conductive are Vd1 and Vd2, respectively, and the times t until reaching the voltages are t1 and t2, respectively, the following equation (9) is obtained. .

  If the parameter on the right side of equation (9) is known, it can be determined from the magnitude relationship between t1 and t2 which one of the transistors M3 and M4 is conductive first. Here, when one of the transistors becomes conductive, a current further flows from the power supply line through the transistor to a node (for example, V1) to which the transistor is connected, and the potential further increases. The potential of the side node (for example, V2) drops. That is, the cumulative frequency distribution of the unit comparators 100 having the same offset voltage can be known by examining which of t1 and t2 is greater than the variation of each parameter from the equation (9).

  FIG. 8 shows the cumulative frequency distribution of the unit comparator 100 that is obtained using the above-described equation (9) and obtains the same comparison result, and is found to be in good agreement with the SPICE Monte Carlo simulation. In FIG. 8, the voltage measurement sensitivity is higher in the portion where the slope of the curve is larger.

  Therefore, in the design of the voltage measuring apparatus 1, it is necessary to set the characteristics of each unit comparator 100 so that the high sensitivity region matches the range of the voltage to be measured. As a method for determining the characteristics, first, Vref is set near the voltage to be measured.

  Moreover, the voltage measuring apparatus 1 can adjust the measurement voltage range by changing the parameter, in addition to changing the reference voltage value Vref, using the above-described equation.

  Here, the solid line shown in (1) of FIG. 8 indicates that the pattern length L and the pattern width W of the pair of transistors constituting the unit comparator 100 and the capacitances of the capacitors C1 and C2 have the same characteristics. 8 shows the cumulative frequency distribution of the offset voltage corresponding to the comparison unit 11 designed.

  Also, the broken line indicated by (2) in FIG. 8 indicates the offset voltage corresponding to the comparison unit 11 in which the paired elements in the unit comparator 100 are designed unbalanced, for example, the capacitance C1 = 2 × C2. The cumulative frequency distribution is shown.

  In the unit comparator 100 corresponding to the solid line indicated by (1) in FIG. 8, the unit having a high measurement sensitivity in the measurement range (a) and corresponding to the broken line indicated by (2) in FIG. In the instrument 100, the measurement range (b) is a portion with high measurement sensitivity.

  Therefore, if the measured voltage value Vmeas is around 1 [V], the comparison unit 11 takes a circuit configuration corresponding to the solid line shown in (1) of FIG. 8, and the measured voltage value Vmeas is around 0.9 [V]. If there is a circuit configuration corresponding to the broken line shown in (2) of FIG. 8, the comparison unit 11 takes, for example, a new power supply pin or a power generation circuit with Vref set to 1 [V]. The measurement range can be adjusted without any problem. That is, in the voltage measurement device 1, the measurement sensitivity in the voltage measurement range can be set adaptively according to the characteristics of the unit comparator 100 included in the comparison unit 11.

  Furthermore, the measurable voltage range can also be adjusted by using, for example, two or more unit measurement circuits having different design characteristics in the array. In the case of FIG. 8, the comparison unit 11 combining the circuit group of the unit comparator 100 showing the cumulative frequency distribution of (1) and the circuit group of the unit comparator 100 showing the cumulative frequency distribution of (2) performs the measurement of FIG. As indicated by the range (c), the width of the measurable range may be increased to about 80 [mV] with respect to about 50 [mV] which is the width of the measurement ranges (a) and (b) described above. it can.

  As described above, in the voltage measuring device 1, the voltage measuring range (maximum value and minimum value) is set by combining the two or more types of unit comparators 100 having different designed operating characteristics to constitute the comparison unit 11. Can be changed.

  In addition to knowing the absolute value of the voltage to be measured, it may be sufficient to know only whether the measured voltage is above or below a certain value depending on the application of voltage observation. For example, it is a case where it is constantly monitored whether or not the power supply voltage drop exceeds an allowable value, and a warning is issued when it is detected that the voltage is lower than the allowable value.

  The analysis unit 13 replaces the process of obtaining the measurement voltage value Vmeas according to the ratio of the unit comparator 100 from which the same comparison result is obtained as described above, and whether or not the measurement voltage value exceeds an arbitrarily set threshold value. Can be easily determined by performing the following processing.

  FIG. 9 shows the probability density distribution of the offset voltage value of the unit comparison circuit 100. Here, it is assumed that the analysis unit 13 determines whether or not the voltage to be measured that is a threshold value is lower than −150 [mV]. In other words, the analysis unit 13 represents the unit comparator 100 that constitutes the comparison unit 11 as, for example, a unit comparator 100 that can obtain different comparison results at the boundary of −150 [mV] that is the threshold voltage of the criterion. The unit comparator 100 corresponding to the shaded area shown in FIG. In FIG. 6, if the area of the shaded portion A with respect to the entire area is 5%, for example, in the comparison unit 11 composed of the 64-bit unit comparator 100, about three have an offset voltage corresponding to the shaded portion A. . As can be seen from the fact that the number and arrangement of impurities are typical causes of variation, the offset voltage takes a value specific to the unit comparator, and if a chip is specified, the offset voltage for each unit comparator 100 is This is because it is uniquely determined.

  The analysis unit 13 measures the offset voltage of each unit comparator 100 that constitutes the comparison unit 11 in advance before performing the measurement process, and if three near the hatched portion A are specified, the voltage to be measured Can be determined by monitoring only the comparison results obtained by the three unit comparators 100.

  For example, the analysis unit 13 determines that the measured voltage value is lower than −150 [mV] when two or more of the three outputs output 0. On the contrary, the analysis unit 13 determines that the measured voltage value is larger than −150 [mV] when 0 of the three outputs is 1 or less. Specifically, the analysis unit 13 makes such a determination as follows.

  The analysis unit 13 sets the three unit comparators 100 corresponding to the hatched portion A as A1, A2, and A3, respectively, and outputs the comparison results obtained by these unit comparators 100 as OA1, OA2, and OA3. Then, the analysis unit 13 creates a truth table of the logic circuit Y = f (OA1, OA2, OA3) for determining that the majority is 0 as shown in FIG. Note that the logic circuit realizing FIG. 10 can be easily created by using a logic synthesis program or the like. In this logic circuit, only the 3 bits of interest are input to be analyzed. Conversely, since it is not necessary to monitor the 61-bit comparison results obtained from the other unit comparators 100, the analysis processing regarding these 61-bit data can be stopped.

  The analysis unit 13 may use, as a simpler logical operation, a comparison result obtained only from the 1-bit unit comparator 100 representing the hatched portion A as a criterion for determination. Since it is only necessary to monitor the output of the unit comparator 100, the circuit configuration can be further simplified.

  Next, with reference to FIG. 11, a voltage measurement apparatus 2 according to the second embodiment will be described.

  Similar to the voltage measurement device 1 according to the first embodiment, the voltage measurement device 2 includes a comparison unit 11, a shift register 12, an analysis unit 13, and a control unit 14, and further includes a comparison unit 11. A register 15 for selecting an arbitrary unit comparator 100 from a plurality of unit comparators 100 is further provided.

  The register 15 includes storage elements corresponding to the 64-bit unit comparator 100 constituting the comparison unit 11 in a one-to-one correspondence. The value of each storage element is controlled by the control unit 14, and each storage element becomes 1. At this time, selection signals ELM_EN [01] to [63] for operating the unit comparator 100 corresponding to the storage element are output to the comparison unit 11.

  The voltage measuring apparatus 2 having such a configuration gates signals such as the control signals PREC and EVAL to the register 15 and stores each memory of the register 15 indicating the unit comparator 100 whose output is to be monitored. By operating only an arbitrary unit comparator 100 according to the output from the element, only the comparison result obtained from the desired unit comparator 100 can be supplied to the analysis unit 13.

  The voltage measuring apparatus 1 according to the first embodiment and the voltage measuring apparatus 2 according to the second embodiment as described above are described above with respect to arbitrary measurement points on the integrated circuit substrate as described below. By connecting the unit comparators 100 included in the comparison unit 11 in parallel, the voltage value at this measurement point can be measured. In particular, in the voltage measuring device 1 according to the first embodiment and the voltage measuring device 2 according to the second embodiment, the configuration of each unit comparator 100 configuring the comparison unit 11 is easy to be mounted on a semiconductor. Since it has a circuit configuration, it can be easily mounted in the vicinity of a measurement point to be measured in various integrated circuit boards as shown below.

  FIG. 12 is a configuration example of the integrated circuit board 5 on which the voltage measuring device to which the present invention is applied is mounted. The integrated circuit board 5 includes five voltage measurement circuits 51, 52, 53, 54, 55 as shown in FIG. Each of the voltage measurement circuits 51, 52, 53, and 54 is a voltage measurement device to which the present invention is applied, and monitors a power supply voltage drop as needed. That is, in the integrated circuit board 5, by detecting a state in which the voltage measurement circuits 51 to 54 are equal to or lower than a specified power supply voltage, for example, a warning signal that notifies a voltage drop can be generated.

  FIG. 13 is a configuration example of an integrated circuit board 6 having a function of measuring and monitoring a power supply voltage using a voltage measuring apparatus to which the present invention is applied. The integrated circuit board 6 includes a circuit block 61, a circuit block 62, an operation control circuit 63 that controls operations of these circuit blocks 61 and 62, and voltage measurement circuits 64 and 65 to which the present invention is applied. In the integrated circuit board 6, the power supply wiring VDD2 is connected to the circuit block 61 and the circuit block 62 via branch lines VDDA2 and VDDB2, respectively. In the integrated circuit board 6, for example, voltage measurement circuits 64 and 65 are connected to VDDA2 and VDDB2, respectively, and voltage fluctuations in the circuit blocks 61 and 62 are monitored. The voltage measurement circuits 64 and 65 transmit the voltage measurement result to the operation control circuit 63. Then, the operation control circuit 63 changes the circuit operation by, for example, reducing the clock frequency by transmitting a control signal to the circuit block 61 and the circuit block 62 according to the transmitted voltage fluctuation amount. A further voltage drop can be prevented, or the power supply voltage supplied to the power supply voltage generation circuit for generating the power supply voltage supplied to the circuit blocks 61 and 62 can be slightly increased to compensate for the dropped voltage. it can.

  FIG. 14 is a configuration example of an integrated circuit board 7 in which the voltage measuring device to which the present invention is applied is used for detecting crosstalk noise. The integrated circuit board 7 includes four circuit blocks 71, 72, 73, 74 and a voltage measurement circuit 75 to which the present invention is applied. In the integrated circuit board 7, in order to connect the circuit block 71 and the circuit block 73 via the circuit block 72, the crosstalk noise of the long-distance wirings wired in parallel is monitored by the voltage measurement circuit 75. The malfunction control due to noise can be prevented by changing the signal transmission timing from the monitoring result by the operation control circuit that does not.

  FIG. 15 is a configuration example of an integrated circuit board 8 using a voltage measuring device to which the present invention is applied as a signal receiving circuit. The integrated circuit board 8 includes four circuit blocks 81, 82, 83, and 84 and a voltage measurement circuit 85 to which the present invention is applied. In the integrated circuit board 8, the voltage measurement circuit 85 can detect a signal level at a certain moment inputted from the circuit block 81 to the circuit block 84, output it as a digital value, and hold it. In this way, in the integrated circuit board 8, the voltage measurement circuit 85 can be used as a receiving circuit that receives a signal.

  For example, when the binary signal is received using the voltage measurement circuit having the 64-bit unit comparator 100 in the integrated circuit board 8, the number of outputs of “1” is more than 32 bits which is a half of 64 bits. When there are many, it can determine with having received the level H, and when there are few, it can be determined with having received the level L. Further, in the integrated circuit board 8, if the comparison unit 11 includes a large number of unit comparators 100, more stable signal transmission / reception can be achieved by dynamically determining an optimum threshold value. Note that the present invention is not limited to reception of binary signals, and can be expanded to arbitrary signal levels such as quaternary signal transmission.

  Further, the present invention is not limited to signal transmission between circuits within a single integrated circuit board, and as shown in FIG. 16, voltage measurement is performed as a receiving circuit in signal transmission between the integrated circuit board 91 and the integrated circuit board 92. It is also possible to implement the devices 93, 94.

  In addition, this invention is not limited only to the above embodiment, Of course, a various change is possible in the range which does not deviate from the summary of this invention.

It is the figure which showed the structure of the voltage measuring device which concerns on 1st Embodiment to which this invention was applied. It is the figure which showed the circuit structure of the unit comparator which a comparison part has. It is a figure for demonstrating distribution of the offset voltage value Voff of each unit comparator which a comparison part has. It is a timing chart for demonstrating operation | movement of a voltage measuring device. It is a flowchart for obtaining the correspondence between the fluctuation of the offset voltage value Voff of the unit comparator when the reference voltage value is changed and the ratio of the unit comparator that outputs the same comparison result. It is the figure which showed the correspondence of the fluctuation | variation of the offset voltage value Voff of a unit comparator when a reference voltage value is changed, and the ratio of the unit comparator which outputs the same comparison result. It is the figure which showed the correspondence of the change of the total number of the unit comparators which output the same comparison result "1", and the change of measured voltage value Vmeas. FIG. 8 is a diagram showing the cumulative frequency distribution of the offset voltage derived by the physical model. It is the figure which showed probability density distribution of the offset voltage value of a unit comparison circuit. It is the figure which showed the truth table of the logic circuit Y = f (OA1, OA2, OA3) which determines that the majority is 0. It is the figure which showed the structure of the voltage measuring device which concerns on 2nd Embodiment. It is the figure which showed the structural example of the integrated circuit board by which the voltage measuring device to which this invention was applied was mounted. It is the figure which showed the structural example of the integrated circuit board which has a function which measures and monitors a power supply voltage using the voltage measurement apparatus with which this invention was applied. It is the figure which showed the structural example of the integrated circuit board which used the voltage measuring device to which this invention was applied for the detection of crosstalk noise. It is the figure which showed the structural example of the integrated circuit board which used the voltage measuring device to which this invention was applied as a signal receiving circuit. It is the figure which showed the structural example which mounted the voltage measuring device to which this invention was applied as a receiving circuit in the signal transmission between an integrated circuit board and an integrated circuit board.

Explanation of symbols

  1, 2, 93 Voltage measuring device, 11 comparison unit, 12 shift register, 13 analysis unit, 14 control unit, 15 register, 100 unit comparator, 5, 6, 7, 8, 91, 92 integrated circuit board, 51- 54, 64, 75, 85 Voltage measurement circuit, 61, 62, 71-73, 81-84 circuit block, 63 operation control circuit

Claims (6)

A plurality of unit comparators for comparing the measurement voltage value to be measured with a reference voltage value, and the same reference voltage value is input to each of the unit comparators, and each of the unit comparators outputs the measurement voltage value. A comparison unit for comparing with a reference voltage value determined according to the reference voltage value;
A voltage measurement comprising: an analysis unit that analyzes a comparison result obtained from each unit comparator, including a variation due to variations in characteristics of circuit elements constituting each unit comparator, and obtains the measured voltage value apparatus.   The analysis unit calculates a ratio of the number of unit comparators having the same comparison result with respect to a total number of the plurality of unit comparators included in the comparison unit, and performs the measurement based on the calculated ratio. The voltage measuring device according to claim 1, wherein the voltage value is obtained.   The voltage measuring apparatus according to claim 2, wherein the comparison unit includes two or more types of unit comparators having different designed operating characteristics according to a measurement range set for the measurement voltage value.   The analysis unit selects a unit comparator that can obtain a different comparison result at a predetermined threshold voltage among the unit comparators of the comparison unit, and according to the comparison result by the selected unit comparator, The voltage measuring device according to claim 2, wherein it is determined whether or not the measured voltage value exceeds a threshold value. A plurality of unit measurement circuits that are connected in parallel to the measurement point for measuring the voltage value and compare the measurement voltage value at the measurement point with the reference voltage value, and the same reference voltage value is input to each unit comparator. Each of the unit comparators compares the measured voltage value with a reference voltage value set according to the reference voltage value;
An integrated circuit comprising: an analysis unit that analyzes a comparison result obtained from each unit comparator including a variation due to variation in characteristics of circuit elements constituting each unit comparator and obtains the measured voltage value substrate. The same reference voltage value is input to each of the plurality of unit measurement circuits that compare the measurement voltage value to be measured with the reference voltage value, and each of the unit comparators determines the measurement voltage value according to the reference voltage value. A comparison step for comparing with a set reference voltage value;
A voltage measurement including an analysis step of analyzing a comparison result obtained from each unit comparator including a variation due to variations in characteristics of circuit elements constituting each unit comparator and obtaining the measured voltage value Method.

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