JP2009231509A - Method of manufacturing electronic component package, and the electronic component package - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an electronic component package which can be manufactured readily and is low cost, and to provide the electronic component package. <P>SOLUTION: The method of manufacturing the electronic component package includes steps of forming a cavity for storing an electronic component in a plate substrate; forming a tapered through-hole with its diameter becoming smaller, as going toward the bottom of the plate substrate, in part of the bottom of the cavity; forming an insulating film on the cavity formation surface of the plate substrate, on the surface of the plate substrate opposite to the cavity forming surface, and on the internal surface of the through-hole; forming a metal film on the insulating film, formed on the cavity forming surface and the internal surface of the through-hole; forming a through-hole electrode, by blocking up near a smallest-diameter portion of the through-hole with a conductive member; and, by removing unnecessary portions of the metal film, except for a portion which serves as an electronic component mounting pad and an interconnecting portion for connecting the electronic component mounting pad and the through-hole, forming the electronic component mounting pad and the interconnecting portion. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an electronic component package manufacturing method and an electronic component package.

  In recent years, in order to suppress the influence of disturbance on the electronic component body when mounting the electronic component with a higher density on the electronic device or the like, the electronic component is mounted in various packages and then applied to the electronic device or the like. Installed. In the electronic component package thus formed, an electronic component mounting pad on which a conductor pattern is formed and an external terminal are electrically connected. As an example of an electronic component using this, an electronic component package includes There is a piezoelectric vibrator that houses a piezoelectric vibrating piece.

  A large number of the piezoelectric vibrators are incorporated in portable communication devices, electronic devices, and the like, and miniaturization of piezoelectric vibrators has been promoted rapidly with the miniaturization of devices. In particular, the development of piezoelectric vibrators compatible with surface mounting has been carried out, and in order to realize this, a through electrode is provided in the piezoelectric vibrator for electrical connection between the piezoelectric vibrating piece and the mounting substrate. It is known to form. (For example, refer to Patent Document 1.)

  FIG. 5 is a diagram showing the overall structure of the piezoelectric vibrator. In the piezoelectric vibrator 41, a piezoelectric vibrating piece 42 in which an excitation electrode (not shown) is formed is mounted on the electronic component mounting pad 43 and electrically connected to the external terminal 45 through the through electrode 44. After the piezoelectric vibrating piece 42 is mounted in the package 46 that houses the electronic component, a lid 47 is joined to the upper part of the electronic component package 46 to hermetically seal the package interior 48.

  The through electrode 44 is formed by forming a through hole 49 in the electronic component package 46, forming an insulating film 50 on the inner surface of the through hole 49, performing insulation treatment, and filling the inner surface with a conductive member 51. It is what is done. Here, the electronic component mounting pad 43 and the conductive member 51 can be integrally formed of the same member.

  FIGS. 4A and 4B are diagrams for explaining a method of manufacturing an electronic component package according to the prior art, and FIGS. 4A to 4J are cross-sectional views showing a package formation state in each process. Hereinafter, a conventional method for manufacturing an electronic component package will be described with reference to FIGS. 4A and 4B.

(A) is a figure which shows the process of forming an insulating film in a substrate back surface.
Reference numeral 101 denotes a substrate, and the substrate material is, for example, silicon. First, an insulating film 102 is formed on the back surface of the substrate 101. This insulating film is, for example, a silicon oxide film (SiO ₂ ), and is formed by a sputtering method or a CVD (Chemical Vapor Deposition) method.

  FIG. 6B is a diagram illustrating a process of forming cavities 103 (concave portions) arranged at predetermined positions on the surface of the substrate 101. The cavity 103 is formed using a photolithography technique or an etching technique. Although not shown, after a resist is applied to the surface of the substrate 101 by a spin coat method, a spray coat method, or the like, a photomask is placed on the substrate 101 and ultraviolet exposure is performed, and unnecessary portions are removed with a developer. After the pattern is formed, the exposed portion of the substrate surface is etched by an etching process, and then the resist is removed using an organic solvent such as acetone to form the cavity 103. Although this step is based on a positive type photoresist, a negative type can be formed in the same manner.

  (C) is a diagram illustrating a process of forming a through hole 104 for a through electrode for connecting an electronic component mounted in the cavity 103 and an external terminal. Similar to the formation of the cavity 103, a pattern is formed by photolithography, and then a predetermined position is etched to the insulating film 102 by dry and wet etching to form a through hole 104.

(D) is a diagram showing a step of forming an insulating film 105 on the surface of the substrate 101. When the inside of the through hole 104 is filled with a conductive member in a later step, the substrate 101 is electrically insulated. Formed to take. The insulating film 105 is formed by sputtering or CVD, and is, for example, a silicon oxide film (SiO ₂ ).

Subsequently, a step of filling the through hole 104 with a conductive member is performed. Various conductive members can be selected, but electrolytic plating is suitable for filling the small-diameter holes.
(E) is a diagram showing a step of forming a common electrode film 106 on the insulating film. The formation of the common electrode film 106 is a pretreatment for performing electroplating in the through-hole 104. First, the common electrode film 106 is formed on the insulating film 105 on the substrate 101 by a sputtering method or a vacuum evaporation method. The material of the common electrode film 106 is, for example, gold (Au).

  (F) shown in FIG. 4B is a step of forming a mask pattern on the common electrode by photolithography. An electroplating resist film 107 is applied on the common electrode film 106, covered with a photomask 108, exposed to ultraviolet light, and a portion irradiated with light is removed by a developer to form the pattern for electroplating. Is done. Although this step is based on a positive type photoresist, a negative type can be formed in the same manner.

  (G) is a step of filling the through hole 104 with a conductive member. After the common electrode film 106 for electrolytic plating and the patterned resist film 107 for electrolytic plating are formed by the steps (e) and (f), electrolytic plating is performed and the conductive member 109 is formed in the through hole 104. Fill. The conductive member is gold (Au) like the common electrode.

  (H) is a step of peeling the resist film 107 for electrolytic plating and the common electrode film 106 after filling the through hole 104 with a conductive member.

  (I) is a diagram showing an insulating film 102 formed on the back surface of the substrate 101 immediately below the through hole 104 and a mask pattern for opening the insulating film 105 in the through hole 104 on the surface of the substrate 101. It is. This process is also performed by photolithography and etching. A resist film 110 is coated on the insulating film 102 on the back surface of the substrate 101, covered with a photomask, exposed to ultraviolet light, a portion irradiated with light by a developer is removed, and a pattern for opening the insulating film 102 is formed. Form. Although this step is based on a positive type photoresist, a negative type can be formed in the same manner. Thereafter, the insulating film 105 and the insulating film 102 formed on the front and back surfaces of the substrate 101 are simultaneously etched by wet and dry etching to expose the conductive member 109.

  (J) is a diagram showing a process for electrically connecting an electronic component mounting portion (not shown) and an external terminal (not shown) existing in the cavity 103 through the conductive member 109. A metal film 111 is formed on the insulating film 102 on the back surface of the substrate 101 by a sputtering method or a vacuum deposition method, and the openings of the insulating film 102 and the insulating film 105 are filled with metal, and the conductive member 109 and Make electrical connections.

  Thereafter, although not shown, an electronic component to be mounted in the electronic component package is mounted in the cavity 103, a lid is formed on the electronic component package to seal the inside of the cavity in a hermetic manner, and then each individual component is sealed. One electronic component is completed by dividing each product.

JP 2007-267101 A

  However, the above-described conventional method for manufacturing an electronic component package has the following problems in some steps.

  In the case of using silicon as a package substrate in manufacturing the electronic component package, since the silicon itself has conductivity, the entire silicon surface serving as the package substrate is to prevent conduction with the electronic component housed in the cavity. Insulation treatment must be performed.

  In the conventional manufacturing process described above, first, an insulating film is formed on the back surface of the substrate by a sputtering method, a CVD method, or the like to form cavities and through-holes, and sputtering is performed on the surface of the substrate even after the cavities and through-holes are formed. An insulating film is formed by a method, a CVD method, or the like, and the film forming process of the insulating film is performed in two steps. Therefore, it contributes to the increase in man-hours.

  For example, as another method of forming an insulating film on the substrate, a method of performing an insulating treatment once on both sides using a thermal oxidation method is conceivable. However, thermal oxidation is performed before forming the cavity and the through hole. In other words, since an insulating film is formed on the entire surface of the substrate, the insulating film must be opened before the formation of the cavity and the through hole, and it is inevitable that the number of processes is increased.

  Moreover, when manufacturing an electronic component package, it is conceivable to use an SOI (Silicon on Insulator) wafer as a package substrate. However, since the SOI wafer itself is manufactured by a multi-step process, a general silicon is used. It becomes expensive compared with the substrate.

  Further, in the conventional manufacturing method, in order to enable contact between the through electrode and the external terminal, a step of opening a part of the insulating film is necessary, which also increases man-hours. It was a factor.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide an electronic component package manufacturing method and an electronic component package that are easy and inexpensive to manufacture.

  In order to achieve the above object, an electronic component package manufacturing method of the present invention includes a step of forming a cavity for housing an electronic component in a flat substrate, and a portion of the bottom surface of the cavity toward the flat substrate bottom. Forming a tapered through-hole so as to reduce the hole diameter, forming a cavity forming surface of the flat plate substrate, a surface opposed thereto, and an insulating film on the inner surface of the through-hole, and the cavity forming surface, A step of forming a metal film on the insulating film formed on the inner surface of the through hole, a step of forming a through electrode by closing the vicinity of the minimum diameter portion of the through hole with a conductive member, The electronic component mounting pad and the connection wiring portion that connects the electronic component mounting pad and the through electrode are left, and other unnecessary metal films are removed to remove the electronic component mounting pad and the connection wiring. And having a step of forming a.

  The step of forming a metal film on the insulating film on the cavity forming surface and the inner surface of the through hole is a sputtering method or a vacuum deposition method, and the through electrode is formed by closing the vicinity of the minimum diameter portion of the through hole with the conductive member. The step of forming can be performed simultaneously with the step of forming the metal film.

  The step of forming a through electrode by closing the vicinity of the minimum diameter portion of the through hole with a conductive member can be performed by electrolytic plating.

  In the step of forming the through electrode by closing the vicinity of the minimum diameter portion of the through hole with a conductive member, the conductive member can be heated and melted and filled after the conductive member is placed on the top of the through hole.

  The flat substrate is a silicon substrate, and the step of forming a cavity and the step of forming a through hole can be formed by etching.

  According to the electronic component package of the present invention, at least an electronic component storage unit, an electronic component mounting pad, a through electrode, and a connection wiring unit that connects the electronic component mounting pad and the through electrode are formed by the electronic component package manufacturing method. It is characterized by being made.

  According to the present invention, after forming the cavity and the through hole without forming an insulating film to be an etching stop layer on the substrate, the insulating film is collectively formed on the front surface and the back surface of the silicon substrate by a thermal oxidation method. Since it can be formed, the process can be simplified.

  In addition, when the through electrode and the external terminal are connected, a process of opening a part of the insulating film is not required to enable contact between the two electrodes, so that the process can be simplified.

  Hereinafter, the manufacturing method of the electronic component package of this invention is demonstrated in detail based on drawing. FIGS. 1-1 and 1-2 are views for explaining a method of manufacturing an electronic component package according to the present invention, and FIGS. 1A to 1F are cross-sectional views showing states of the electronic component package in each step.

  FIG. 1A is a process of forming cavities 12 (concave portions) arranged at predetermined positions on the surface of the silicon substrate 11. Although not shown, after a resist is applied to the surface of the silicon substrate 11 by spin coating or spray coating, a photomask is placed on the silicon substrate 11 and ultraviolet exposure is performed. After removing the portion and forming the pattern, the portion where the silicon substrate surface is exposed is etched by an etching process, and then the resist is removed using an organic solvent such as acetone to form the cavity 12. Note that although a positive type photoresist is used in this step, it can be similarly formed even if a negative type photoresist is employed.

  (B) is a figure which shows the process of forming the through-hole 13 for electrically connecting the electronic component mounted in the said cavity 12, and an external terminal. Similar to the formation of the cavity 12, patterning is performed by photolithography so that the resist is left in portions other than the through holes 13, and the through holes 13 are formed in a tapered shape by dry and wet etching. The purpose of forming the taper shape is to electrically connect the electronic component mounting pad portion 14 (virtual line indicated by a broken line) in the electronic component package to be formed later and the through hole 13 to the electronic component mounting pad portion 14. This is because the metal film is formed so as not to be short-circuited at the time of connection. Further, at this time, it is preferable that the diameter of the minimum diameter portion 15 of the through-hole 13 is formed to be as small as possible.

  (C) is a step of forming a silicon oxide film 16 on the entire surface of the cavity 12, the through hole 13 and the silicon substrate 11 by a thermal oxidation method. A silicon oxide film 16 is formed on the surface of the silicon substrate 11 by placing the silicon substrate 11 in which the cavities 12 and the through holes 13 are formed in a quartz tube furnace and heating the silicon substrate 11 at a high temperature. By this step, an insulating film can be formed at a necessary portion of the silicon substrate 11 at once. Further, since the silicon oxide film 16 which is an insulating film is formed with the through hole 13 being completely opened, as shown in the conventional manufacturing method, it is performed to enable contact between the through electrode and the external terminal. A process of opening a part of the insulating film is not necessary, and the process can be simplified.

  In FIG. 1-2D, a metal film 17 is formed on the silicon oxide film 16 formed on the entire surface of the silicon substrate 11 to be an electrode wiring for electrically connecting the electronic component and the external terminal. It is a process to do. The metal film 17 is mainly formed by a sputtering method, a vacuum deposition method, or the like, and the metal to be formed is not particularly limited. However, in the step of forming the metal film 17 on the entire surface of the silicon substrate 11, the minimum diameter portion 15 of the through hole 13 can be filled with the metal film 17. From this viewpoint, the metal film 17 is formed in a thick film. Desirable metals are desirable. Further, in order to facilitate the deposition of the metal film 17 on the tapered portion of the through hole 13 during sputtering or vacuum deposition, the metal film 17 is preferably formed by the oblique sputtering method or the oblique evaporation method. By doing so, it is easy to form the metal film 17 on the tapered portion of the through hole 13 and it is reliable. The through-hole 13 is formed in a tapered shape, and the width of the through-hole is formed on the back surface side of the silicon substrate 11 with a very small diameter. The through-electrode can be formed by filling the metal film 17 in the extremely small diameter portion.

  FIG. 6 is a conceptual diagram of the oblique deposition method. In the oblique vapor deposition, the silicon substrate 56 to be deposited with respect to the vapor deposition source 52 is installed in parallel in the case of the vacuum vapor deposition method, but the substrate holder rotating rod 54 that is taken out of the vacuum chamber 55 from the substrate holder 53. By rotating, vacuum deposition can be performed at an intended angle on the substrate. According to this oblique vapor deposition method, it becomes possible to form a film thickness distribution on the metal to be deposited, or a portion where the metal film is difficult to adhere when the silicon substrate 56 is placed in parallel is also the substrate holder 53. It becomes easy to form a film by the rotation. Note that the conceptual diagram of the oblique sputtering method is almost the same as that in FIG.

  (E) of the metal film 17 formed on the inner surface of the cavity 12 and the inner surface of the through hole 13, the metal film 17 on the inner surface of the through hole 13, and the electronic component mounting pad portion on the bottom surface of the cavity 12 connected thereto. This is a step of removing the metal film 17 other than the portion to be formed. Although not shown, a positive-type or negative-type resist is formed on the surface of the metal film 17, and a photomask is placed on the resist, followed by ultraviolet exposure and patterning by immersing in a developing solution. A through electrode formed of the metal film 17 is formed on the minimum diameter portion 15 of the through hole 13 by metal etching, and an electronic component mounting pad formed of the metal film 17 is formed on the bottom surface of the cavity 12 while being connected to the through electrode. The metal film 17 remaining in the tapered portion of the through hole 13 becomes a connection wiring portion that connects the electronic component mounting pad and the through electrode.

  (F) is a step of forming a metal film 18 on the back surface of the silicon substrate 11, and by patterning the metal film 18, an external terminal electrically connected to an electronic component mounted in the cavity 12 It becomes the pad for. The metal film 18 comes into contact with the metal film 17 exposed at the minimum diameter portion 15 of the through hole 13. A metal film 18 is formed on the back surface of the silicon substrate 11 by a sputtering method or a vacuum deposition method. Although not shown, the metal film 18 is patterned to form a pad portion for an external terminal at a predetermined position. Here, when the upper surface of the cavity 12 is covered and the inside of the cavity is vacuum-sealed, depending on the required accuracy of the degree of vacuum, the metal film 18 may be formed into a thick film to form the through-hole 13. Since the vicinity of the minimum diameter portion 15 can be thickened, the degree of vacuum in the cavity can be maintained.

  FIG. 2 is a diagram for explaining a method of manufacturing an electronic component package according to another embodiment. Here, another example of the method for filling the conductive member in the through hole will be described in the process shown in the first embodiment. Specifically, as shown in the first embodiment, the diameter of the bottom part of the through hole is formed to be as small as possible, but the conductivity in the through hole when this is not possible. The member filling method will be described.

  As described in the first embodiment, the cavity 12 is formed on the surface of the silicon substrate 11 by etching, and then the through hole 13 is formed again by etching. The pattern formation of the cavity 12 and the through-hole 13 is performed by photolithography, and the resist used can be a positive type or a negative type.

  Thereafter, a silicon oxide film 16 is formed on the entire surface of the silicon substrate 11, the cavity 12, and the through-hole 13 by a single thermal oxidation method, and the surface of the silicon substrate 11, that is, the cavity 12 and the through-hole 13. A metal film 17 is formed on the silicon oxide film 16. The metal film 17 is formed by sputtering or vacuum deposition. As a result, the state shown in FIG. In this embodiment, the metal film 17 is thinly formed. At this point, the minimum diameter portion of the through hole 13 is not closed and is open.

  FIG. 2B is a process of forming a mask pattern for electrolytic plating on the metal film 17. A resist film 19 is applied on the metal film, a photomask 20 is placed thereon, UV exposure is performed, a portion irradiated with light is removed by a developer, and a pattern for electrolytic plating is formed. Although this step is based on a positive type photoresist, a negative type can be formed in the same manner.

  FIG. 2C shows a step of filling the through hole 13 with a conductive member by electrolytic plating. As a result, an electrolytic plating film 21 is formed as a conductive member in a portion where the resist film 19 is not present, and the minimum diameter portion of the through hole 13 is filled with the electrolytic plating film 21 to form a through electrode.

  FIG. 2D shows a step of peeling off the resist 19 for electrolytic plating and the unnecessary metal film. When the metal film 17 is peeled off, although not shown in the drawing, it is patterned by photolithography so as to leave only the portion in the through-hole 13 and the part to be the electronic component pad and the wiring connecting both, and unnecessary by etching. Peel and remove the part.

  FIG. 2E is a diagram showing a process for electrically connecting the inside of the cavity 12 and the external terminals of the electronic component package. A metal film 22 is formed on the silicon oxide film 16 on the back surface of the silicon substrate 11 by a sputtering method or a vacuum deposition method, and the insulating film opening is filled with a metal, and the electrolytic plating film 21 in the through hole 13 is filled. And make electrical connection. The external terminal is formed by patterning the metal film 22 into an arbitrary shape.

  As described above, by using electrolytic plating for filling the conductive member, the filling of the conductive member into the through-hole 13 becomes easy and reliable, and the airtightness in the cavity 12 is sufficiently ensured.

  FIG. 3 is a view for explaining a method of manufacturing an electronic component package according to still another embodiment. Here, another example of the filling method in the through hole will be described in the steps shown in the first embodiment. Specifically, as shown in the first embodiment, the diameter of the bottom part of the through hole is formed to be as small as possible, but the method of filling the through hole when this is not possible Shall be described.

  As in the first embodiment, the cavity 12 is formed on the silicon substrate surface 11 by etching, and then the through hole 13 is formed again by etching. The pattern formation of the cavity 12 and the through-hole 13 is performed by photolithography, and the resist used can be formed in either a positive type or a negative type.

  Thereafter, a silicon oxide film 16 is formed on the entire surface of the silicon substrate 11, the cavity 12, and the through-hole 13 by a single thermal oxidation method, and the surface of the silicon substrate 11, that is, the cavity 12 and the through-hole 13. A metal film 17 is formed on the silicon oxide film 16. This metal film 17 is formed by sputtering or vacuum deposition. As a result, the state as shown in FIG. This figure shows a state when the metal film 17 is thinly formed. At this time, the minimum diameter portion of the through-hole 13 is not closed and opened.

  FIG. 3B is a step of installing a solder ball 23 as a conductive member in the through hole 13. At least the solder ball 23 having a diameter smaller than the maximum diameter of the through hole 13 on the cavity 12 side is mounted on the cavity side of the through hole 13.

  FIG. 3C shows a process of filling the through hole in which the solder ball 23 is melted. By irradiating laser light from the cavity 12 side, the solder ball 23 is melted and the through hole 13 is filled to form a through electrode.

  FIG. 3D is a process of peeling the metal film 17. When the metal film 17 is peeled off, although not shown, patterning is performed by photolithography so as to leave only the through hole 13, the electronic component pad, and the connection wiring portion connecting both of them, and unnecessary portions are peeled off by etching. Remove.

  FIG. 3E is a diagram showing a process for electrically connecting the inside of the cavity 12 and the external terminals of the electronic component package. A metal film 24 is formed on the silicon oxide film 16 on the back surface of the silicon substrate 11 by sputtering or vacuum evaporation. As a result, the conductive member (molten solder ball 13) exposed to the minimum diameter portion of the through hole 13 and the metal film 24 come into contact with each other, and electrical connection becomes possible.

  As described above, by using a solder ball for filling the conductive member, the filling of the conductive member into the through hole 13 becomes easy and reliable, and the airtightness in the cavity 12 is sufficiently secured. The external terminal is formed by patterning the metal film 24 into an arbitrary shape.

  According to the electronic component purge manufacturing method described above, an electronic component package that is easy to manufacture and highly reliable can be obtained.

Explanatory drawing which showed the implementation method of an electronic component package. Example 1 Explanatory drawing which showed the implementation method of an electronic component package. Example 1 Explanatory drawing which showed the implementation method of an electronic component package. (Example 2) Explanatory drawing which showed the implementation method of an electronic component package. (Example 3) Explanatory drawing which showed the implementation method of an electronic component package. (Conventional example) Explanatory drawing which showed the implementation method of an electronic component package. (Conventional example) Example of completion when electronic components are mounted in an electronic component package. Conceptual diagram of oblique deposition

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 Silicon substrate 12 Cavity 13 Through-hole 14 Pad for electronic component mounting 15 Through-hole minimum diameter part 16 Silicon oxide film 17 Metal film 18 Metal film 19 Resist film 20 Photomask 21 Electroplating film 22 Metal film 23 Solder ball 24 Metal film 41 Piezoelectric vibrator 42 Piezoelectric vibrating piece 43 Electronic component mounting pad 44 Through electrode 45 External terminal 46 Electronic component package 47 Lid 48 Package inside 49 Through hole 50 Insulating film 51 Conductive member 52 Deposition source 53 Substrate holder 54 Substrate holder rotating rod 55 Vacuum Chamber 56 Silicon substrate 101 Substrate 102 Insulating film 103 Cavity 104 Through hole 105 Insulating film 106 Common electrode film 107 Resist film for electroplating 108 Photomask 109 Conductive member 110 Resist film 111 Metal film

Claims (6)

Forming a cavity for storing electronic components on a flat substrate;
Forming a tapered through hole in a part of the bottom surface of the cavity so that the hole diameter decreases toward the flat substrate bottom;
Forming an insulating film on the cavity forming surface of the flat plate substrate, a surface facing the cavity forming surface, and the inner surface of the through hole;
Forming a metal film on the insulating film formed on the cavity forming surface and the inner surface of the through hole;
Forming a through electrode by closing the vicinity of the minimum diameter portion of the through hole with a conductive member;
Of the metal film, the electronic component mounting pad is left, and the portion that becomes the connection wiring portion for connecting the electronic component mounting pad and the through electrode is left, and the other unnecessary metal film is removed to remove the electronic component mounting pad. And forming the connection wiring portion,
A method of manufacturing an electronic component package, comprising:   The step of forming a metal film on the insulating film on the cavity forming surface and the inner surface of the through hole is a sputtering method or a vacuum deposition method, and the through electrode is formed by closing the vicinity of the minimum diameter portion of the through hole with the conductive member. The method of manufacturing an electronic component package according to claim 1, wherein the forming step is performed simultaneously with the step of forming the metal film.   2. The method of manufacturing an electronic component package according to claim 1, wherein the step of forming a through electrode by closing the vicinity of the minimum diameter portion of the through hole with a conductive member is performed by electrolytic plating.   The step of forming a through electrode by closing the vicinity of the minimum diameter portion of the through hole with a conductive member is characterized in that after the conductive member is placed on the through hole, the conductive member is heated and melted and filled. The method of manufacturing an electronic component package according to claim 1.   5. The electronic component package according to claim 1, wherein the flat substrate is a silicon substrate, and the step of forming a cavity and the step of forming a through hole are formed by etching. Method.   The electronic component package manufacturing method according to claim 1, wherein at least an electronic component storage unit, an electronic component mounting pad, a through electrode, and a connection for connecting the electronic component mounting pad and the through electrode are provided. An electronic component package comprising a wiring portion.

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