JP2009225341A - Solid imaging apparatus, and driving method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent a variation of a signal output level of a frame whose electronic zoom magnification is changed. <P>SOLUTION: A solid imaging apparatus includes a pixel portion (100) where pixels are located in two dimensions, a reset scanning circuit (102) which reset-scans each frame of a floating diffusion and photoelectric conversion element in a unit of line by controlling a reset transistor and transfer transistor, and a read scanning circuit (101) which transfer-scans each frame of pixel signal of the photoelectric conversion element in an unit of line. The time from the reset scanning to the transfer scanning is the charge accumulation time of the photoelectric conversion element, and the reset scanning circuit changes a vertical scanning cycle of a frame N-1 in the time from the end of transfer scanning of the frame N-1 to the transfer scanning start of a frame N to start the reset scanning of the frame N. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device used for an electronic camera or the like and a driving method thereof.

  Conventionally, as an imaging device that captures, records, and reproduces still images and moving images, a memory card having a solid-state memory element is used as a recording medium, and still images and moving images captured by a solid-state imaging element such as a CCD or CMOS are recorded and reproduced. Solid-state imaging devices such as electronic cameras are already known. The CCD is a charge coupled device, and the CMOS is a complementary metal oxide semiconductor.

  In addition, small-sized imaging devices such as camera-equipped mobile phones are equipped with an electronic zoom function that electronically zooms by enlarging the image by extracting only signals in the desired range from the imaging area. Has been.

  As a solid-state imaging device having an electronic zoom function, for example, there is an imaging device disclosed in Patent Document 1. This is based on the changed horizontal scanning period and vertical scanning period even when the reset scanning period of frame N partially overlaps the readout scanning period of frame N-1 when the electronic zoom magnification is changed during moving image shooting. , Reset scanning and readout scanning of frame N are performed. By this control, a uniform image is obtained by making the exposure time in the frame N in which the electronic zoom magnification has been changed constant, thereby realizing a smooth electronic zoom magnification change.

  On the other hand, in a small imaging device such as a camera-equipped cellular phone, a three-transistor CMOS sensor disclosed in Patent Document 2 is widely used to reduce the area of a transistor in one pixel and secure the area of a photodiode. It is used. In this system, one pixel is constituted by a transfer MOS that temporarily transfers charges accumulated in a photodiode to a floating diffusion (hereinafter referred to as FD), an amplification MOS provided for each pixel, and a reset MOS that resets the potential of the FD. is doing.

  Patent Document 3 describes an imaging apparatus that can prevent the difference in accumulation time from occurring in the next frame even when the driving method is switched.

JP 2005-94142 A JP 2003-46864 A JP 2007-74032 A

  However, in the CMOS transistor having the three-transistor configuration disclosed in Patent Document 2, when the potential of the photodiode is reset, the potential of the vertical output line changes corresponding to the reset potential. Accordingly, it is impossible to simultaneously set the timing for resetting the charge accumulated in the photodiode in the selected row by the reset scanning and the timing for reading out the charge accumulated in the photodiode in the selected row by the reading scan to the CT. Hereinafter, the selected row by the reset scanning is referred to as a “reset row”, the reset timing is referred to as a “reset timing”, the selected row by the readout scanning is referred to as a “reading row”, and the timing of reading out to the CT is “reading” It is called “timing”.

  Since the imaging apparatus disclosed in Patent Document 1 needs to perform readout scanning and reset scanning at independent timings, the reset timing of the reset row and the readout timing of the readout row do not overlap by changing the electronic zoom magnification at various ratios. It was difficult to do so. In addition, in order to perform readout scanning and reset scanning at independent timings, two sensor drive signals are required, and there is a problem that the control circuit becomes complicated.

  An object of the present invention is to provide a solid-state imaging device and a driving method thereof capable of preventing a change in signal output level of a frame in which the electronic zoom magnification is changed, obtaining a uniform image, and realizing a smooth electronic zoom magnification change. Is to provide.

  The solid-state imaging device of the present invention includes a photoelectric conversion element that performs photoelectric conversion, a floating diffusion for storing electric charge, a transfer transistor for transferring a pixel signal of the photoelectric conversion element to the floating diffusion, and the floating diffusion. By controlling the reset transistor and the transfer transistor, a pixel portion in which a pixel having a reset transistor for connecting a reset voltage to the reset voltage, and an amplification transistor having a gate connected to the floating diffusion is arranged two-dimensionally, and the reset transistor and the transfer transistor The reset scanning circuit that resets the pixel signal of the floating diffusion and the photoelectric conversion element for each frame in a row unit, and the pixel signal of the photoelectric conversion element by controlling the transfer transistor The floating diffusion includes a readout scanning circuit that performs transfer scanning for each frame in a row unit, and the time from the reset scanning to the transfer scanning is a charge accumulation time of the photoelectric conversion element, and the reset scanning circuit In the period from the end of the transfer scan of N-1 to the start of the transfer scan of frame N, the reset scan of frame N is started by changing the vertical scan period with respect to frame N-1.

  The solid-state imaging device driving method according to the present invention includes a photoelectric conversion element that performs photoelectric conversion, a floating diffusion for accumulating charges, and a transfer transistor for transferring a pixel signal of the photoelectric conversion element to the floating diffusion. And a driving method of a solid-state imaging device having a pixel portion in which pixels having a reset transistor for connecting the floating diffusion to a reset voltage and an amplification transistor having a gate connected to the floating diffusion are two-dimensionally arranged. A reset scanning step of reset scanning the pixel signal of the floating diffusion and the photoelectric conversion element for each frame by controlling the reset transistor and the transfer transistor; A readout scanning step of transferring and scanning the pixel signal of the photoelectric conversion element to the floating diffusion for each frame by controlling a register, and the time from the reset scanning to the transfer scanning is the photoelectric conversion element In the period from the end of the transfer scan of frame N-1 to the start of the transfer scan of frame N, the reset scanning step changes the vertical scanning period with respect to frame N-1 N reset scans are started.

  By changing the vertical scanning period in a predetermined period, it is possible to prevent fluctuation of the signal output level of the frame in which the electronic zoom magnification is changed. As a result, a uniform image can be obtained, and a smooth electronic zoom magnification change can be realized.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a block diagram of a solid-state imaging device according to the first embodiment of the present invention. The solid-state imaging device is used in an electronic camera, has an electronic zoom function during moving image shooting, and can change the electronic zoom magnification. In FIG. 1, the pixel unit 100 has two-dimensionally arranged unit pixels that convert an input optical signal into an electrical signal and store it. The readout scanning circuit 101 and the reset scanning circuit 102 are scanning circuits for selecting a row of the pixel unit 100. The electrical signal accumulated in the pixels constituting the row selected by the readout scanning circuit 101 is read out by the readout circuit 104 in units of rows. Thereafter, a series of operations in which a row in a predetermined region in the pixel portion 100 is sequentially scanned by the readout scanning circuit 101 and an electrical signal accumulated in the pixel is read to the readout circuit 104 is referred to as readout scanning. In addition, an optical signal accumulated in the pixel read out by the readout circuit 104 is referred to as a pixel signal.

  On the other hand, an operation of sequentially scanning a row in a predetermined region in the pixel portion 100 by the reset scanning circuit 102 and resetting an electric signal accumulated in the pixel to a predetermined potential is called reset scanning. The time for accumulating the optical signal in the pixel is controlled by the time from the reset scanning to the readout scanning.

  The horizontal scanning circuit 103 is a scanning circuit for selecting a column of the pixel unit 100. Pixel signals read by the reading circuit 104 in units of rows are sequentially output in units of columns selected by the horizontal scanning circuit 103. The analog pixel signal output from the readout circuit 104 is digitized by an AD (analog / digital) converter 105. The digitized pixel signal is adjusted by the gain correction circuit 106 so that a desired output level is obtained by multiplying the output by a predetermined value. The gain-corrected pixel signal is input to a memory 107 that holds pixel signals for at least one row. Even when the vertical scanning cycle is changed due to a change in electronic zoom magnification or the like, the pixel signals for at least one row held in the memory 107 are read out at a predetermined frame rate. Thus, the frame rate can be kept constant by controlling writing and reading of the memory 107 at a timing corresponding to the electronic zoom magnification.

  The imaging control unit 108 receives a vertical scanning signal for driving the readout scanning circuit 101 and the reset scanning circuit 102, a horizontal scanning signal for driving the horizontal scanning circuit 103, a control signal for the AD converter 105, and a gain control signal for the gain correction circuit 106. Control. In addition, the imaging control unit 108 controls writing and reading control signals in the memory 107. Specifically, the imaging control unit 108 performs control corresponding to the electronic zoom magnification.

  In this embodiment, the output of the readout circuit 104 is input to the AD converter 105, and digital gain correction is performed by the gain correction circuit 106 on the digitized pixel signal. Here, as shown in FIG. 7, the effect of the present embodiment does not change even if the analog gain correction is performed by the gain correction circuit 106 on the pixel output output from the readout circuit 104 and then digitized by the AD converter 105. . The AD converter 105 outputs the pixel signal to the memory 107.

  FIG. 2 is a circuit diagram of pixels in the pixel unit 100 constituting the solid-state imaging device according to the present embodiment. Hereinafter, the MOS field effect transistor is referred to as a MOSFET. The unit pixel 200 includes a photodiode 201, an amplification MOSFET 204, a transfer MOSFET 202, and a reset MOSFET 203 for resetting the photodiode 201. The amplification MOSFET 204 amplifies the charge generated by the photodiode 201. The transfer MOSFET 202 is provided between the photodiode 201 and the amplification MOSFET 204, selects a pixel in units of rows, and transfers the charge of the photodiode 201 to the amplification MOSFET 204. The gate of the amplification MOSFET 204 has a function of temporarily holding a pixel signal, and is called a floating diffusion (FD) 205.

  The gate of the amplification MOSFET 204 and the source of the reset MOSFET 203 are connected to the photodiode 201 via the transfer MOSFET 202. The drain of the reset MOSFET 203 and the drain of the amplification MOSFET 204 are connected to a power supply voltage Vcc that can be pulse-driven. Since the FD 205 is connected to the gate of the amplification MOSFET 204, the amplification MOSFET 204 outputs a signal corresponding to the potential of the FD 205 to the vertical signal line 206.

  The signal charge generated by the photodiode 201 is transferred to the FD 205 by the transfer MOSFET 202. A large number of pixels are connected to the vertical signal line 206, but when the pixel 200 is configured with three transistors as in this embodiment, the selection of the pixel is controlled by the potential of the FD 205. Normally, the potential of the FD 205 is set to a low level, and when a pixel is selected, the potential of the FD 205 of the selected pixel is set to a high level, so that the signal of the selected pixel is output to the vertical signal line 206. Thereafter, the potential of the FD 205 of the selected pixel is returned to the low level, and the pixel is not selected.

  When resetting the signal charge generated by the photodiode 201, the charge accumulated in the photodiode 201 is reset by setting Vcc, Pres, and Ptx to high level. At this time, since the potential of the FD 205 is at a high level that is a reset potential, a signal corresponding to the reset potential is output to the vertical signal line 206 on the vertical signal line 206.

  Accordingly, when the row selected by the reset scanning circuit 102 performs reset scanning during the period in which the row selected by the readout scanning circuit 101 performs readout scanning, two vertical signal lines 206 are subjected to two scans. Pixels will be selected at the same time. Therefore, the signal read out to the vertical signal line 206 is destroyed. Therefore, in the pixel having the three-transistor configuration according to this embodiment, the readout operation to the vertical signal line 206 in the readout row and the photodiode reset operation in the reset row cannot be performed simultaneously.

  FIG. 3 is a diagram showing the timing of reset scanning and readout scanning of a frame whose vertical scanning cycle is changed by changing the magnification of the electronic zoom according to the present embodiment. In this figure, the range of pixels read out on the entire screen is further illustrated. Hereinafter, a method for driving the solid-state imaging device will be described.

  Here, the frame rate is fixed at 1/60 seconds. The electronic zoom magnification is set so that the electronic zoom magnification is M, that is, vertical scanning that performs 1 / M line thinning out, so that the electronic zoom magnification from the frame N is 2M times, that is, vertical scanning that performs 1 / 2M line thinning out. It has changed. The number of lines obtained by subtracting the read start line from the read end line is ½ that of frame N−1 in frame N.

  The accumulation time of the frame N is represented by the period from the reset scan of the frame N indicated by the dotted line to the readout scan of the frame N indicated by the solid line. In this embodiment, the vertical scanning cycle is switched from 1 / M row thinning to 1 / 2M thinning at time A when the reading of the frame N-1 is completed. If the reset scanning of the frame N is started in the period from the time A to the time B, the reading operation to the vertical signal line in the reading row and the photodiode resetting operation in the reset row do not overlap. This period from time A to time B is called a vertical blanking period.

  Next, gain correction in this embodiment will be described. In FIG. 3, for simplification of description, if the sensitivities of the pixels are assumed to be the same in the frames N−1, N, and N + 1, the accumulation of the frames N−1, N, and N + 1 is performed. The time must be equal to T1. However, since the accumulation period T2 from the end time A of the N-1 frame to the start time B of the N frame is shorter than T1, the signal output is lowered accordingly. In order to compensate for the insufficient signal output, the gain correction circuit 106 shown in FIG. 1 applies a gain of T1 / T2 times to correct the signal level of the pixel signal of frame N to be equal to that of frame N-1. is doing. The product of the gain T1 / T2 and the accumulation time T2 for amplifying the pixel signal of the frame N is equal to the product of the gain 1 and the accumulation time T1 for amplifying the pixel signal of the frame N-1.

  In the present embodiment, the brightness of the subject in the frames N−1, N, and N + 1 is assumed to be the same for the sake of simplification, but there are cases where the actual brightness is different. At this time, the gain to be corrected in the frame N is not T1 / T2, and it is necessary to set the gain in consideration of the illuminance ratio of the subject in the frames N-1 and N.

  FIG. 4 is a diagram showing the writing and reading timings of the memory 107 of the frame whose vertical scanning cycle is changed by changing the magnification of the electronic zoom according to the present embodiment. At time A shown in FIG. 3, the vertical scanning cycle is changed from electronic zoom magnification M times to 2M times. Since the horizontal blanking period changes as the electronic zoom magnification changes, the write timing of the memory 107 changes. Even if the vertical scanning period is changed, the frame rate is fixed to 1/60 seconds, so the read timing of the memory 107 does not change. In other words, the frame rate can be kept constant by changing the time from memory writing to reading of the frame whose vertical scanning cycle is changed from T3 to T4 by the memory 107 shown in FIG.

  As described above, according to the present embodiment, in the solid-state imaging device having the three-transistor pixel 200 shown in FIG. 2, the signal output in the frame in which the electronic zoom magnification is changed can be made constant and uniform. An image can be obtained and a smooth electronic zoom magnification change can be realized.

(Second Embodiment)
In the second embodiment of the present invention, the sensitivity of the pixel with respect to incident light when the electronic zoom magnification is 2M times is doubled compared to when the magnification is M times. The number of pixel signals added when the electronic zoom magnification is M times and 2M times is doubled to use more pixel information, thereby reducing resolution degradation due to the electronic zoom.

  FIG. 5 is a diagram illustrating the timing of reset scanning and readout scanning of a frame whose vertical scanning period is changed by changing the magnification of the electronic zoom according to the second embodiment of the present invention. In FIG. 5, the brightness of the subject is the same in frames N−1, N, and N + 1. Compared with the frame N-1, in the frame N, the sensitivity is doubled by adding two rows of pixel signals. Therefore, if the accumulation time of frame N-1 is T1, the accumulation time of frames N and N + 1 is T1 / 2, but when T1 / 2 is longer than the vertical blanking period of frame N-1, frame N-1 This is kept in the vertical blanking period T2.

  In the present embodiment, even if the electronic zoom magnification change is changed, the readout scanning having different vertical scanning periods and the reset scanning do not overlap, so that the vertical scanning signal generated by the imaging control unit 108 can be simplified. .

  In order to compensate for the exposure time that is insufficient in frame N, the gain correction circuit 106 shown in FIG. 1 applies a gain of (T1 / 2) / T2 times, and the signal level of the pixel signal of frame N is the same as that of frame N-1. Corrections are made to be equal. The product of the sensitivity (for example, twice) of the pixel signal of the frame N, the gain (for example (T1 / 2) / T2) for amplifying the pixel signal, and the accumulation time (for example, T2) is T1. The product of the sensitivity (1 ×) of the pixel signal of the frame N−1, the gain (for example, 1) for amplifying the pixel signal, and the accumulation time (for example, T1) is T1. The product of frame N is equal to the product of frame N-1.

  In the present embodiment, the brightness of the subject in the frames N−1, N, and N + 1 is assumed to be the same for the sake of simplification, but there are cases where the actual brightness is different. At this time, the gain to be corrected in the frame N is not (T1 / 2) / T2, but needs to be a gain in consideration of the illuminance ratio of the subject in the frames N-1 and N.

  As described above, according to the present embodiment, in the solid-state imaging device having the three-transistor pixel 200 shown in FIG. 2, the signal output in the frame in which the electronic zoom magnification is changed can be made constant and uniform. An image can be obtained and a smooth electronic zoom magnification change can be realized.

(Third embodiment)
The third embodiment of the present invention performs gain correction over several frames before and after the electronic zoom magnification change. Compared with the first embodiment in which the gain correction is performed for only one frame when the electronic zoom magnification is changed, the change in image quality for each frame due to the gain change is reduced by gradually increasing the gain to the target correction value over a plurality of frames. It is.

  FIG. 6 is a diagram showing an accumulation time and a gain correction value of a frame whose vertical scanning period is changed by changing the magnification of the electronic zoom according to the third embodiment of the present invention. In FIG. 6, the brightness of the subject in the frames N-5 to N + 5 is the same for the sake of simplicity. That is, if the sensitivity of the pixels is the same, the accumulation times of frames N-5 to N + 5 are equal to T1, but when T1 is longer than the vertical blanking period of frame N-1, the vertical blanking of frame N-1 The period is set to T2 or less. In the present embodiment, the accumulation time T1 of the frame N-5 is sufficiently longer than the vertical blanking period T2, and the accumulation time (1/6) × T1 of the frame N is equal to that of the vertical blanking period T2, or It is in a small state.

  In the present embodiment, even if the electronic zoom magnification change is changed, the readout scanning having different vertical scanning periods and the reset scanning do not overlap, so that the vertical scanning signal generated by the imaging control unit 108 can be simplified. .

  In the frame N-5 five frames before the electronic zoom change, the pixel signal is output with the accumulation time T1 and the gain correction value 1. From frame N-4 to N, the accumulation time is decreased in increments of T1 / 6, and the gain correction value is increased so that the signal level of the corrected pixel signal becomes equal. From frame N + 1 to N + 4, the accumulation time is increased in increments of T1 / 6, and the gain correction value is decreased so that the signal level of the corrected pixel signal becomes equal.

  In this embodiment, the adjustment of the accumulation time and the gain correction are performed for the four frames before and after the electronic zoom magnification change, but the effect of this embodiment does not change even if the number of frames is changed.

  As described above, according to the present embodiment, in the solid-state imaging device having the three-transistor pixel 200 shown in FIG. 2, the exposure time in the frame in which the electronic zoom magnification is changed can be made constant and uniform. An image can be obtained and a smooth electronic zoom magnification change can be realized.

  In this embodiment, when the gain is increased by one frame at the time of switching, the S / N is prevented from abruptly deteriorating by that frame. Therefore, the S / N deterioration is not visually noticeable by gradually adjusting the gain. It has the effect.

(Fourth embodiment)
The fourth embodiment of the present invention is an embodiment similar to the first embodiment, but a correction method for correcting a pixel signal of a frame whose vertical scanning cycle is changed by changing the magnification of an electronic zoom or the like by a gain correction circuit. Is different. In the first embodiment, the pixel signal of the frame in which the vertical scanning cycle is changed is corrected with a uniform gain value, but in this embodiment, correction is performed with a gain that differs for each read row.

  In the first embodiment, the vertical scanning cycle is switched from 1 / M row thinning to 1 / 2M thinning at time A when the reading of frame N-1 ends. The difference is that the vertical scanning cycle is switched at time B when reading scanning is started.

  FIG. 8 is a diagram showing the timing of reset scanning and readout scanning of a frame whose vertical scanning cycle is changed by changing the magnification of the electronic zoom according to the fourth embodiment of the present invention. In the present embodiment, the vertical scanning cycle is switched from 1 / M line thinning to 1 / 2M thinning at time B when reading of the frame N starts. The accumulation time of frame N is represented by the period from the reset scan of frame N to the read scan of frame N. The reset scan of frame N is scanned in the vertical scan cycle of frame N-1, that is, 1 / M row skipping, and the readout scan of frame N is scanned in the vertical scan cycle of frame N, that is, 2 / M row skipping. The accumulation time of the frame N is different for each row. For this reason, the gain correction circuit 106 of the present embodiment changes the gain correction value for each row, not for each frame. The gain correction value takes a value from 1 to T1 / T5, where T1 is the accumulation time of the read start row of frame N and T5 is the accumulation time of the read end row. Thus, by changing the gain correction value for each row, the signal level of the pixel signal is corrected to be equal to the frame N-1.

  Also, the switching timing of the vertical scanning cycle is controlled by the imaging control unit 108 shown in FIG. The imaging control unit 108 switches the vertical scanning cycle to A when the accumulation time of the frame N is shorter than the vertical blanking period T2 of the frame N-1. FIG. 9 shows the timing of reset scanning and readout scanning when the accumulation time of frame N is shorter than the vertical blanking period T2 of frame N-1. In this case, since the accumulation time of the frame N is T1, the gain correction circuit does not correct with different gains for each row.

  As shown in FIG. 8, the accumulation time (for example, T1) of the frame N is longer than the period from the end of the reading scan of the frame N-1 to the start of the reading scan of the frame N (period from time A to B). In that case, the reset scanning circuit 102 starts reset scanning of the frame N without changing the vertical scanning period.

  As shown in FIG. 9, the accumulation time of frame N (for example, T1) is shorter than the period (period from time A to B) from the end of the scanning scan of frame N-1 to the start of reading scanning of frame N. In that case, the reset scanning circuit 102 starts reset scanning of the frame N so as to change the vertical scanning period.

  In the present embodiment, the brightness of the subject in the frames N−1, N, and N + 1 is set to be the same for the sake of simplification, but may actually be different. At this time, the gain to be corrected in the frame N is not 1 to T1 / T5 but needs to be a gain in consideration of the illuminance ratio of the subject in the frames N-1 and N.

  As described above, according to the present embodiment, in the solid-state imaging device having the three-transistor pixel 200 shown in FIG. 2, the exposure time in the frame in which the electronic zoom magnification is changed can be made constant and uniform. An image can be obtained and a smooth electronic zoom magnification change can be realized.

(Fifth embodiment)
The fifth embodiment of the present invention is an embodiment similar to the first embodiment, but the circuit configuration of the unit pixel is different. FIG. 10 is a circuit diagram of the pixels in the pixel unit 100 constituting the solid-state imaging device according to the fifth embodiment of the present invention. The unit pixel 200 includes a photodiode 201, an amplification MOSFET 204, a transfer MOSFET 202, and a reset MOSFET 203 for resetting the photodiode 201. The amplification MOSFET 204 amplifies the charge generated by the photodiode 201. The transfer MOSFET 202 is provided between the photodiode 201 and the amplification MOSFET 204, selects a pixel in units of rows, and transfers the charge of the photodiode 201 to the amplification MOSFET 204.

  The gate of the amplification MOSFET 204 and the source of the reset MOSFET 203 are connected to the photodiode 201 via the transfer MOSFET 202, and the drain of the reset MOSFET 203 is connected to a reset voltage Vres that can be pulse-driven. The drain of the amplification MOSFET 204 is connected to the power supply voltage Vcc. Since the FD 205 is connected to the gate of the amplification MOSFET 204, the amplification MOSFET 204 outputs a signal corresponding to the potential of the FD 205 to the vertical signal line 206.

  The signal charge generated by the photodiode 201 is transferred to the FD 205 by the transfer MOSFET 202. A large number of pixels are connected to the vertical signal line 206, but when a pixel is configured with three transistors as in this embodiment, the selection of the pixel is controlled by the potential of the FD 205. Normally, the potential of the FD 205 is set to a low level, and when a pixel is selected, the potential of the FD 205 of the selected pixel is set to a high level, so that the signal of the selected pixel is output to the vertical signal line 206. Thereafter, the potential of the FD 205 of the selected pixel is returned to the low level, and the pixel is not selected.

  When resetting the signal charges generated by the photodiode 201, the charges accumulated in the photodiode 201 are reset by setting Vres, Pres, and Ptx to a high level. Since the configuration other than the circuit configuration of the pixel is the same as that of the first embodiment, description thereof is omitted.

  As described above, according to the first to fifth embodiments, the pixel unit 100 includes the pixel 200 having the photoelectric conversion element 201, the floating diffusion 205, the transfer transistor 202, the reset transistor 203, and the amplification transistor 204 in a two-dimensional shape. Is arranged. The photoelectric conversion element 201 is, for example, a photodiode, and performs photoelectric conversion. The floating diffusion 205 accumulates charges. A transfer transistor (MOSFET) 202 transfers the pixel signal of the photoelectric conversion element 201 to the floating diffusion 205. A reset transistor (MOSFET) 203 connects the floating diffusion 205 to a reset voltage Vcc or Vres. The gate of the amplification transistor (MOSFET) 204 is connected to the floating diffusion 205. The reset scanning circuit 102 controls the reset transistor 203 and the transfer transistor 202 to reset scan the pixel signals of the floating diffusion 205 and the photoelectric conversion element 201 for each frame in units of rows. The read scanning circuit 101 controls the transfer transistor 202 to transfer and scan (read scan) the pixel signal of the photoelectric conversion element 201 to the floating diffusion 205 for each frame in a row unit. The time from the reset scan to the transfer scan is the charge accumulation time of the photoelectric conversion element. The reset scanning circuit 102 changes the vertical scanning period with respect to the frame N-1 and performs the reset scanning of the frame N during a period from the end of the transfer scanning of the frame N-1 to the start of the transfer scanning of the frame N. Start.

  The gain correction circuit 106 amplifies the pixel signal output from the amplification transistor 204. At that time, as shown in FIG. 3, the gain correction circuit 106 uses a gain (for example, T1 / T2) for amplifying the pixel signal of frame N to a gain (for example, T1 / T2) for amplifying the pixel signal of frame N-1. Make it larger than 1). Here, the charge accumulation time T2 of the frame N is shorter than the charge accumulation time T1 of the frame N-1.

  The product of the gain (eg, T1 / T2) for amplifying the pixel signal of frame N and the charge accumulation time (eg, T2) is the gain (eg, 1) for amplifying the pixel signal of frame N-1. It is substantially equal to the product of the charge accumulation time (eg, T1).

  In FIG. 5 and the like, the product of the sensitivity (for example, twice) of the pixel signal of frame N and the gain (for example (T1 / 2) / T2) for amplifying the pixel signal and the charge accumulation time (for example, T2) is T1. The product of the sensitivity (1 ×) of the pixel signal of the frame N−1, the gain (for example, 1) for amplifying the pixel signal, and the charge accumulation time (for example, T1) is T1. The product of frame N is approximately equal to the product of frame N-1.

  In FIG. 6, the gain correction circuit 106 increases the gain stepwise from frame NM (M is an integer greater than 1) to frame N.

  In FIG. 6, the gain correction circuit 106 gradually decreases the gain from frame N to frame N + M (M is an integer greater than 1).

  As shown in FIG. 9, the charge accumulation time (for example, T1) of frame N is longer than the period from the end of the transfer scan of frame N-1 to the start of the transfer scan of frame N (the period from time A to B). short. In that case, the reset scanning circuit 102 starts the reset scanning of the frame N so as to change the vertical scanning period.

  Further, as shown in FIG. 8, the charge accumulation time (for example, T1) of frame N is a period from the end of the transfer scan of frame N-1 to the start of the transfer scan of frame N (period from time A to B). Longer than. In that case, the reset scanning circuit 102 starts the reset scanning of the frame N without changing the vertical scanning cycle.

  The gain correction circuit 106 amplifies the pixel signal output from the amplification transistor 204. As shown in FIG. 8, the reset scanning circuit 102 determines that the frame N has a charge accumulation time longer than the period from the end of the transfer scan of the frame N-1 to the start of the transfer scan of the frame N. The reset scanning is performed so that the charge accumulation time differs for each row. The gain correction circuit amplifies the pixel signal of frame N with a different gain for each row.

  Also in FIG. 8, the product of the gain for amplifying the pixel signal in frame N and the charge accumulation time is equal to the product of the gain for amplifying the pixel signal in frame N-1 and the charge accumulation time. Almost equal.

  Also in FIG. 8, the product of the sensitivity of the pixel signal of frame N, the gain for amplifying the pixel signal, and the charge accumulation time is used to amplify the sensitivity of the pixel signal of frame N-1 and the pixel signal. Is approximately equal to the product of the gain and the charge accumulation time.

  In a CMOS sensor having a three-transistor configuration with fewer selection switches, the change in the signal output level of the frame in which the electronic zoom magnification is changed can be prevented by changing the vertical scanning cycle in a predetermined period. As a result, a uniform image can be obtained, and a smooth electronic zoom magnification change can be realized.

  The above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

1 is a block diagram of a solid-state imaging device according to a first embodiment of the present invention. 1 is a circuit diagram of a pixel constituting a solid-state imaging device according to a first embodiment of the present invention. FIG. 6 is a diagram illustrating reset scanning and readout scanning timing of a frame whose vertical scanning cycle is changed by changing the magnification of the electronic zoom according to the first embodiment of the present invention. FIG. 6 is a diagram illustrating memory write and read timings of a frame whose vertical scanning cycle is changed by changing the magnification of the electronic zoom according to the first embodiment of the present invention. FIG. 10 is a diagram illustrating reset scanning and readout scanning timing of a frame whose vertical scanning cycle is changed by changing the magnification of the electronic zoom according to the second embodiment of the present invention. It is the figure which showed the accumulation | storage time and gain correction value of the flame | frame in which the vertical scanning period was changed by the magnification change etc. of the electronic zoom by the 3rd Embodiment of this invention. 1 is a block diagram of a solid-state imaging device according to a first embodiment of the present invention. It is the figure which showed the accumulation | storage time and gain correction value of the flame | frame in which the vertical scanning period was changed by the magnification change etc. of the electronic zoom by the 4th Embodiment of this invention. It is the figure which showed the accumulation | storage time and gain correction value of the flame | frame in which the vertical scanning period was changed by the magnification change etc. of the electronic zoom by the 4th Embodiment of this invention. It is a circuit diagram of the pixel which comprises the solid-state imaging device by the 5th Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Pixel part 101 Reading scanning circuit 102 Reset scanning circuit 103 Horizontal scanning circuit 104 Reading circuit 105 AD converter 106 Gain correction circuit 107 Memory 108 Imaging control part 200 Pixel 201 Photodiode 202 Transfer MOSFET
203 Reset MOSFET
204 Source follower amplifier 205 Floating diffusion (FD)
206 Vertical signal line

Claims (11)

A photoelectric conversion element that performs photoelectric conversion, a floating diffusion for accumulating charges, a transfer transistor for transferring a pixel signal of the photoelectric conversion element to the floating diffusion, and a connection for connecting the floating diffusion to a reset voltage A pixel portion in which a pixel having a reset transistor and an amplification transistor whose gate is connected to the floating diffusion is two-dimensionally arranged;
A reset scanning circuit configured to reset and scan the pixel signal of the floating diffusion and the photoelectric conversion element for each frame by controlling the reset transistor and the transfer transistor;
A readout scanning circuit that controls scanning of the transfer transistor to transfer and scan pixel signals of the photoelectric conversion elements to the floating diffusion in units of rows;
The time from the reset scan to the transfer scan is the charge accumulation time of the photoelectric conversion element,
The reset scanning circuit changes the vertical scanning period with respect to the frame N-1 and starts the reset scanning of the frame N during a period from the end of the transfer scanning of the frame N-1 to the start of the transfer scanning of the frame N-1 A solid-state imaging device. And a gain correction circuit for amplifying the pixel signal output from the amplification transistor,
2. The solid-state imaging device according to claim 1, wherein the gain correction circuit makes a gain for amplifying the pixel signal of frame N larger than a gain for amplifying the pixel signal of frame N-1.   The product of the gain for amplifying the pixel signal in frame N and the charge accumulation time is substantially equal to the product of the gain for amplifying the pixel signal in frame N-1 and the charge accumulation time. The solid-state imaging device according to claim 2.   The product of the sensitivity of the pixel signal of frame N, the gain for amplifying the pixel signal, and the charge accumulation time is the product of the sensitivity of the pixel signal of frame N-1, the gain for amplifying the pixel signal, and the charge accumulation time. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is substantially equal to a product of   3. The solid-state imaging device according to claim 2, wherein the gain correction circuit increases the gain stepwise from a frame NM (M is an integer greater than 1) to a frame N. 4.   3. The solid-state imaging device according to claim 2, wherein the gain correction circuit gradually decreases the gain from frame N to frame N + M (M is an integer greater than 1).   The reset scanning circuit changes the vertical scanning cycle so as to change the vertical scanning cycle when the charge accumulation time of the frame N is shorter than the period from the end of the transfer scanning of the frame N-1 to the start of the transfer scanning of the frame N. When the reset scan is started and the charge accumulation time of frame N is longer than the period from the end of the transfer scan of frame N-1 to the start of the transfer scan of frame N, the vertical scan cycle is not changed and the frame N The solid-state imaging device according to claim 1, wherein the reset scanning is started. And a gain correction circuit for amplifying the pixel signal output from the amplification transistor,
When the charge accumulation time of the frame N is longer than the period from the end of the transfer scan of the frame N-1 to the start of the transfer scan of the frame N, the reset scanning circuit performs the charge accumulation time of the frame N for each row. Perform the reset scan differently,
The solid-state imaging device according to claim 7, wherein the gain correction circuit amplifies the pixel signal of the frame N with a different gain for each row.   The product of the gain for amplifying the pixel signal in frame N and the charge accumulation time is substantially equal to the product of the gain for amplifying the pixel signal in frame N-1 and the charge accumulation time. The solid-state imaging device according to claim 8.   The product of the sensitivity of the pixel signal of frame N, the gain for amplifying the pixel signal, and the charge accumulation time is the product of the sensitivity of the pixel signal of frame N-1, the gain for amplifying the pixel signal, and the charge accumulation time. The solid-state imaging device according to claim 8, wherein the solid-state imaging device is substantially equal to a product of A photoelectric conversion element that performs photoelectric conversion, a floating diffusion for accumulating charges, a transfer transistor for transferring a pixel signal of the photoelectric conversion element to the floating diffusion, and a connection for connecting the floating diffusion to a reset voltage A method for driving a solid-state imaging device having a pixel portion in which a pixel having a reset transistor and an amplification transistor having a gate connected to the floating diffusion is two-dimensionally arranged,
A reset scanning step of reset scanning the pixel signal of the floating diffusion and the photoelectric conversion element for each frame by controlling the reset transistor and the transfer transistor;
A read scanning step of scanning the pixel signal of the photoelectric conversion element to the floating diffusion for each frame by controlling the transfer transistor;
The time from the reset scan to the transfer scan is the charge accumulation time of the photoelectric conversion element,
The reset scanning step changes the vertical scanning period with respect to the frame N-1 and starts the reset scanning of the frame N during a period from the end of the transfer scanning of the frame N-1 to the start of the transfer scanning of the frame N. A method for driving a solid-state imaging device.

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