JP2009225159A - Reflecting surface of electromagnetic wave - Google Patents

Reflecting surface of electromagnetic wave Download PDF

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JP2009225159A
JP2009225159A JP2008067965A JP2008067965A JP2009225159A JP 2009225159 A JP2009225159 A JP 2009225159A JP 2008067965 A JP2008067965 A JP 2008067965A JP 2008067965 A JP2008067965 A JP 2008067965A JP 2009225159 A JP2009225159 A JP 2009225159A
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electromagnetic wave
loaded
substrate
capacitance
conductor patches
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JP4926099B2 (en
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Kouji Ihata
光詞 井幡
Koichiro Misu
幸一郎 三須
崇 ▲柳▼
Takashi Yanagi
Hidemasa Ohashi
英征 大橋
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Mitsubishi Electric Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To obtain a reflecting surface of an electromagnetic wave which can form a magnetic wall in which a reflection phase becomes 0° in a plurality of frequency bands, with a simple single-layer structure in which an inductance element and a capacitance element are alternately loaded between conductor patches. <P>SOLUTION: There are provided: a substrate 2; a ground plate 1 formed on a first face of the substrate 2; a plurality of conductor patches 3 which are formed on a second face of the substrate 2 and arranged at a given interval, and each of which has a dimension of at least one wavelength or less at an operating frequency; an inductance element 4 which is loaded between the adjacent conductor patches, and indicates inductiveness in a specific frequency range; and a capacitance element 5 which is loaded between the adjacent conductor patches, and indicates a capacitance property in a specific frequency range. The inductance element 4 and the capacitance element 5 are alternately loaded. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

この発明は、複数の周波数帯において反射位相が0°となる磁気壁を形成する電磁波反射面に関するものである。   The present invention relates to an electromagnetic wave reflection surface that forms a magnetic wall having a reflection phase of 0 ° in a plurality of frequency bands.

複数の周波数帯域において、反射位相が0°となる磁気壁を形成する電磁波反射面として、多重周波数帯域における電磁インピーダンスが大きいテクスチャ化表面が知られている(例えば、特許文献1参照)。このテクスチャ化表面は、複数の周波数帯域において反射位相が0°の高インピーダンス表面を形成するものであり、接地平面と、接地平面から一定の距離を隔てて配置された第一のアレイ中に配置された複数の導体プレートであって、接地平面と第一アレイとの間の距離が無線周波数ビームの波長より短く、上記第一のアレイが第一の格子定数を有する複数の導電プレートと、第一のアレイの格子定数より大きい格子定数を有する第二のアレイを形成する、上記複数の導電プレートと関連した複数の導電エレメントを備えている。   A textured surface having a large electromagnetic impedance in a multi-frequency band is known as an electromagnetic wave reflecting surface forming a magnetic wall having a reflection phase of 0 ° in a plurality of frequency bands (see, for example, Patent Document 1). This textured surface forms a high-impedance surface with a reflection phase of 0 ° in multiple frequency bands, and is placed in a ground plane and a first array placed at a distance from the ground plane. A plurality of conductive plates, wherein the distance between the ground plane and the first array is shorter than the wavelength of the radio frequency beam, and the first array has a first lattice constant; A plurality of conductive elements associated with the plurality of conductive plates form a second array having a lattice constant greater than that of the one array.

特表2004−514364号公報JP-T-2004-514364

しかしながら、従来の電磁波反射面は、複数の周波数帯で反射位相が0°となる磁気壁を得るために多層構造を利用しており、構造が複雑になり、製造コストが増大するという問題点があった。   However, the conventional electromagnetic wave reflecting surface uses a multilayer structure in order to obtain a magnetic wall having a reflection phase of 0 ° in a plurality of frequency bands, so that the structure becomes complicated and the manufacturing cost increases. there were.

この発明は、上述のような課題を解決するためになされたもので、その目的は、導体パッチ間にインダクタンス素子、キャパシタンス素子を交互に装荷した簡単な単層構造で、複数の周波数帯において反射位相が0°となる磁気壁を形成することができる電磁波反射面を得るものである。   The present invention has been made to solve the above-described problems, and its object is to provide a simple single-layer structure in which an inductance element and a capacitance element are alternately loaded between conductor patches, and to reflect in a plurality of frequency bands. An electromagnetic wave reflecting surface capable of forming a magnetic wall having a phase of 0 ° is obtained.

この発明に係る電磁波反射面は、基板と、前記基板の第一の面に形成された導体と、前記基板の第二の面に形成され、所定の間隔で配列され、各々が少なくとも動作周波数において1波長以下の寸法を有する複数の導体パッチと、隣接する導体パッチ間に装荷され、特定の周波数範囲で誘導性を示すインダクタンス素子と、隣接する導体パッチ間に装荷され、特定の周波数範囲で容量性を示すキャパシタンス素子とを設け、前記インダクタンス素子及び前記キャパシタンス素子が交互に装荷されているものである。   The electromagnetic wave reflecting surface according to the present invention is formed on a substrate, a conductor formed on the first surface of the substrate, and a second surface of the substrate, arranged at a predetermined interval, each at least at an operating frequency A plurality of conductor patches having a dimension of one wavelength or less, an inductance element loaded between adjacent conductor patches and exhibiting inductivity in a specific frequency range, and loaded between adjacent conductor patches and having a capacitance in a specific frequency range And a capacitance element that exhibits the characteristics, and the inductance element and the capacitance element are alternately loaded.

この発明に係る電磁波反射面は、導体パッチ間にインダクタンス素子、キャパシタンス素子を交互に装荷した簡単な単層構造で、複数の周波数帯において反射位相が0°となる磁気壁を形成することができるという効果を奏する。   The electromagnetic wave reflecting surface according to the present invention has a simple single layer structure in which an inductance element and a capacitance element are alternately loaded between conductor patches, and can form a magnetic wall having a reflection phase of 0 ° in a plurality of frequency bands. There is an effect.

実施の形態1.
この発明の実施の形態1に係る電磁波反射面について図1から図3までを参照しながら説明する。図1は、この発明の実施の形態1に係る電磁波反射面の構成を示す図である。同図(a)は平面図、(b)は(a)中のA−A’線での断面図である。なお、以降では、各図中、同一符号は同一又は相当部分を示す。
Embodiment 1 FIG.
The electromagnetic wave reflecting surface according to the first embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a diagram showing a configuration of an electromagnetic wave reflecting surface according to Embodiment 1 of the present invention. FIG. 4A is a plan view, and FIG. 4B is a cross-sectional view taken along line AA ′ in FIG. In the following, in each figure, the same reference numerals indicate the same or corresponding parts.

図1において、この発明の実施の形態1に係る電磁波反射面は、地板(導体)1と、基板2と、導体パッチ3と、特定の周波数範囲で誘導性を示すインダクタンス素子4と、特定の周波数範囲で容量性を示すキャパシタンス素子5とが設けられている。   In FIG. 1, an electromagnetic wave reflecting surface according to Embodiment 1 of the present invention includes a ground plane (conductor) 1, a substrate 2, a conductor patch 3, an inductance element 4 exhibiting inductivity in a specific frequency range, and a specific A capacitance element 5 that exhibits capacitance in the frequency range is provided.

基板2は誘電体等から構成され、この基板2の第一の面上には、地板1が形成されている。また、基板2をはさんで地板1と対向する基板2の第二の面上には、少なくとも動作周波数において1波長以下の寸法を有する複数の導体パッチ3が所定の間隔で、一次元的、または二次元的に配列されている。さらに、複数の導体パッチ3の隣接する導体パッチ間にはインダクタンス素子4、キャパシタンス素子5が交互に装荷されている。   The substrate 2 is made of a dielectric or the like, and a ground plane 1 is formed on the first surface of the substrate 2. On the second surface of the substrate 2 facing the ground plane 1 across the substrate 2, a plurality of conductor patches 3 having a dimension of one wavelength or less at least at the operating frequency are one-dimensionally at a predetermined interval. Or they are arranged two-dimensionally. Further, the inductance elements 4 and the capacitance elements 5 are alternately loaded between adjacent conductor patches of the plurality of conductor patches 3.

つぎに、この実施の形態1に係る電磁波反射面の動作について図面を参照しながら説明する。   Next, the operation of the electromagnetic wave reflecting surface according to the first embodiment will be described with reference to the drawings.

この実施の形態1に係る電磁波反射面に電磁波が入射した場合、隣接する導体パッチ3間でキャパシタンス成分が生じる。また、導体パッチ3上に流れる電流により、インダクタンス成分が生じる。これらの電磁波反射面の構造により形成されるキャパシタンス成分とインダクタンス成分が、隣接する導体パッチ3間に交互に装荷されたインダクタンス素子4またはキャパシタンス素子5と組み合わさることにより、複数のLC共振回路が形成されるため、複数の共振を得ることができる。各LC共振回路は、各共振周波数において高インピーダンス特性を示すため、複数の導体パッチ3が配列された面が高インピーダンス面となる。この高インピーダンス面に電磁波が入射した場合、その反射位相は0°となる磁気壁として動作する。したがって、複数の周波数において磁気壁として動作することとなる。   When an electromagnetic wave is incident on the electromagnetic wave reflecting surface according to the first embodiment, a capacitance component is generated between the adjacent conductor patches 3. Further, an inductance component is generated by the current flowing on the conductor patch 3. A plurality of LC resonance circuits are formed by combining the capacitance component and the inductance component formed by the structure of the electromagnetic wave reflecting surface with the inductance element 4 or the capacitance element 5 alternately loaded between the adjacent conductor patches 3. Therefore, a plurality of resonances can be obtained. Since each LC resonance circuit exhibits high impedance characteristics at each resonance frequency, the surface on which the plurality of conductor patches 3 are arranged becomes a high impedance surface. When an electromagnetic wave is incident on this high impedance surface, it operates as a magnetic wall whose reflection phase is 0 °. Therefore, it operates as a magnetic wall at a plurality of frequencies.

この実施の形態1に係る電磁波反射面では、隣接する導体パッチ3間にインダクタンス素子4またはキャパシタンス素子5が交互に装荷され、単層構造で、複数の周波数帯域において磁気壁動作を得ることができる。一方、従来の電磁波反射面では、複数の周波数帯域において磁気壁動作を得るために、多層構造としているため、実施の形態1に係る電磁波反射面の方が、構造が簡単になり、製造も容易となる。また、従来の電磁波反射面では、磁気壁動作帯域が構造からのみ決定されるが、実施の形態1では、導体パッチ3のサイズや隣接する導体パッチ3間の距離等の構造からだけでなく、インダクタンス素子4またはキャパシタンス素子5の素子値を変えることにより、磁気壁動作帯域を変更することができるため、容易に所望の周波数帯域で磁気壁動作を得ることが可能となる。   In the electromagnetic wave reflecting surface according to the first embodiment, the inductance elements 4 or the capacitance elements 5 are alternately loaded between the adjacent conductor patches 3, and a magnetic wall operation can be obtained in a plurality of frequency bands with a single layer structure. . On the other hand, since the conventional electromagnetic wave reflecting surface has a multilayer structure in order to obtain a magnetic wall operation in a plurality of frequency bands, the electromagnetic wave reflecting surface according to Embodiment 1 has a simpler structure and is easier to manufacture. It becomes. Further, in the conventional electromagnetic wave reflecting surface, the magnetic wall operating band is determined only from the structure, but in the first embodiment, not only from the structure such as the size of the conductor patch 3 and the distance between the adjacent conductor patches 3, Since the magnetic wall operation band can be changed by changing the element value of the inductance element 4 or the capacitance element 5, it is possible to easily obtain the magnetic wall operation in a desired frequency band.

ここで、計算例を用いて、実施の形態1による電磁波反射面について説明する。図2は、計算に用いた電磁波反射面の単位セル構造を示す図であり、同図(a)は平面図、(b)は側面図である。   Here, the electromagnetic wave reflection surface according to the first embodiment will be described using a calculation example. 2A and 2B are diagrams showing a unit cell structure of the electromagnetic wave reflection surface used for the calculation. FIG. 2A is a plan view and FIG. 2B is a side view.

計算では、図2に示す電磁波反射面の単位セル構造において、導体パッチ3を2.9mm×2.9mm、隣接する導体パッチ間の距離を0.2mmとし、基板2の厚さを0.8mm、基板2の誘電率を4.2とした。また、隣接する導体パッチ3間に装荷されたインダクタンス素子4およびキャパシタンス素子5の素子値は、それぞれ0.5nH、4pFとした。   In the calculation, in the unit cell structure of the electromagnetic wave reflecting surface shown in FIG. 2, the conductor patch 3 is 2.9 mm × 2.9 mm, the distance between adjacent conductor patches is 0.2 mm, and the thickness of the substrate 2 is 0.8 mm. The dielectric constant of the substrate 2 was 4.2. The element values of the inductance element 4 and the capacitance element 5 loaded between adjacent conductor patches 3 were 0.5 nH and 4 pF, respectively.

図3は、図2に示す単位セル構造を無限周期配列し、図2中のx方向に電界成分を有する平面波が垂直入射した場合の反射位相特性を計算した結果を示す図である。図3に示すように、約2GHzと約15GHzの2つの周波数において、反射位相が0°となっており、2つの周波数帯域で磁気壁動作を示している。   FIG. 3 is a diagram showing a result of calculating the reflection phase characteristics when the unit cell structure shown in FIG. 2 is arranged in an infinite period and a plane wave having an electric field component is perpendicularly incident in the x direction in FIG. As shown in FIG. 3, the reflection phase is 0 ° at two frequencies of about 2 GHz and about 15 GHz, and the magnetic wall operation is shown in two frequency bands.

この実施の形態1では、誘電体等の基板2の第一の面上に地板1が形成され、基板2をはさんで地板1と対向する基板2の第二の面上に、少なくとも動作周波数において1波長以下の寸法を有する複数の導体パッチ3が所定の間隔で、一次元的、または二次元的に配列され、さらに、複数の導体パッチ3の隣接する導体パッチ間にはインダクタンス素子4またはキャパシタンス素子5が交互に装荷された構成について説明したが、それに限るものではなく、上記構成において、複数の導体パッチ3がビアホール等の導体を介して地板1に接続された構成としても、同様の効果を得ることができる。   In the first embodiment, a ground plane 1 is formed on a first surface of a substrate 2 such as a dielectric, and at least an operating frequency is disposed on a second surface of the substrate 2 that faces the ground plane 1 across the substrate 2. Are arranged in a one-dimensional or two-dimensional manner at a predetermined interval, and between the adjacent conductor patches of the plurality of conductor patches 3, an inductance element 4 or The configuration in which the capacitance elements 5 are alternately loaded has been described. However, the configuration is not limited thereto. In the above configuration, the same configuration may be adopted in which a plurality of conductor patches 3 are connected to the ground plane 1 through conductors such as via holes. An effect can be obtained.

実施の形態2.
この発明の実施の形態2に係る電磁波反射面について図4から図7までを参照しながら説明する。図4は、この発明の実施の形態2に係る電磁波反射面の構成を示す図である。同図(a)は平面図、(b)は(a)中のA−A’線での断面図である。
Embodiment 2. FIG.
An electromagnetic wave reflecting surface according to Embodiment 2 of the present invention will be described with reference to FIGS. FIG. 4 is a diagram showing the configuration of the electromagnetic wave reflecting surface according to the second embodiment of the present invention. FIG. 4A is a plan view, and FIG. 4B is a cross-sectional view taken along line AA ′ in FIG.

図4において、この発明の実施の形態2に係る電磁波反射面は、地板1と、基板2と、導体パッチ3と、特定の周波数範囲で誘導性を示すインダクタンス素子4(4a、4b)と、特定の周波数範囲で容量性を示すキャパシタンス素子5(5a、5b)とが設けられている。   In FIG. 4, the electromagnetic wave reflecting surface according to the second embodiment of the present invention includes a ground plane 1, a substrate 2, a conductor patch 3, and an inductance element 4 (4 a and 4 b) that exhibits inductivity in a specific frequency range, Capacitance elements 5 (5a, 5b) exhibiting capacitance in a specific frequency range are provided.

基板2は誘電体等から構成され、この基板2の第一の面上には、地板1が形成されている。また、基板2をはさんで地板1と対向する基板2の第二の面上には、少なくとも動作周波数において1波長以下の寸法を有する複数の導体パッチ3が所定の間隔で、一次元的、または二次元的に配列されている。さらに、複数の導体パッチ3の隣接する導体パッチ間にはインダクタンス素子4、キャパシタンス素子5が交互に装荷されている。   The substrate 2 is made of a dielectric or the like, and a ground plane 1 is formed on the first surface of the substrate 2. On the second surface of the substrate 2 facing the ground plane 1 across the substrate 2, a plurality of conductor patches 3 having a dimension of one wavelength or less at least at the operating frequency are one-dimensionally at a predetermined interval. Or they are arranged two-dimensionally. Further, the inductance elements 4 and the capacitance elements 5 are alternately loaded between adjacent conductor patches of the plurality of conductor patches 3.

複数の導体パッチ3の隣接する導体パッチ間に装荷されたインダクタンス素子4、キャパシタンス素子5の素子値は、水平方向(図中のx方向)と垂直方向(図中のy方向)、すなわちインダクタンス素子4aと4b、およびキャパシタンス素子5aと5bで異なるように設定されている。   The element values of the inductance element 4 and the capacitance element 5 loaded between adjacent conductor patches of the plurality of conductor patches 3 are the horizontal direction (x direction in the figure) and the vertical direction (y direction in the figure), that is, the inductance element. 4a and 4b and capacitance elements 5a and 5b are set differently.

つぎに、この実施の形態2に係る電磁波反射面の動作について図面を参照しながら説明する。   Next, the operation of the electromagnetic wave reflecting surface according to the second embodiment will be described with reference to the drawings.

この実施の形態2に係る電磁波反射面に電磁波が入射した場合、隣接する導体パッチ3間でキャパシタンス成分が生じる。また、導体パッチ3上に流れる電流により、インダクタンス成分が生じる。これらの電磁波反射面の構造により形成されるキャパシタンス成分とインダクタンス成分が隣接する導体パッチ3間に交互に装荷されたインダクタンス素子4またはキャパシタンス素子5と組み合わさることにより、LC共振回路が形成されるため、複数の共振を得ることになる。各LC共振回路は、共振周波数において高インピーダンス特性を示し、これにより反射位相が0°となる磁気壁として動作する。   When an electromagnetic wave is incident on the electromagnetic wave reflecting surface according to the second embodiment, a capacitance component is generated between the adjacent conductor patches 3. Further, an inductance component is generated by the current flowing on the conductor patch 3. Since the capacitance component and the inductance component formed by the structure of the electromagnetic wave reflecting surface are combined with the inductance element 4 or the capacitance element 5 alternately loaded between the adjacent conductor patches 3, an LC resonance circuit is formed. , You will get multiple resonances. Each LC resonance circuit exhibits high impedance characteristics at the resonance frequency, and thus operates as a magnetic wall having a reflection phase of 0 °.

この実施の形態2に係る電磁波反射面では、複数の導体パッチ3の隣接する導体パッチ間にインダクタンス素子4またはキャパシタンス素子5が交互に装荷されており、さらに、インダクタンス素子4またはキャパシタンス素子5の素子値はx方向とy方向で異なるように設定されている。したがって、入射する電磁波が有する電界成分の方向により、導体パッチ3間に装荷されたインダクタンス素子4およびキャパシタンス素子5の寄与の仕方が異なるため、上記共振周波数が異なるようになる。   In the electromagnetic wave reflecting surface according to the second embodiment, the inductance element 4 or the capacitance element 5 is alternately loaded between the adjacent conductor patches of the plurality of conductor patches 3, and further, the inductance element 4 or the element of the capacitance element 5. The value is set to be different between the x direction and the y direction. Therefore, since the contribution method of the inductance element 4 and the capacitance element 5 loaded between the conductor patches 3 differs depending on the direction of the electric field component of the incident electromagnetic wave, the resonance frequency becomes different.

例えば、図4で示した面に電磁波が入射するとし、電磁波が図4中のx方向に電界成分を有しているとすると、磁気壁動作に寄与するのは、インダクタンス素子4aおよびキャパシタンス素子5aとなる。   For example, if an electromagnetic wave is incident on the surface shown in FIG. 4 and the electromagnetic wave has an electric field component in the x direction in FIG. 4, it is the inductance element 4a and the capacitance element 5a that contribute to the magnetic wall operation. It becomes.

一方、図4で示した単位セル構造を無限周期に配列した面に入射する電磁波が、図4中のy方向に電界成分を有している場合、磁気壁動作に寄与するのは、インダクタンス素子4bおよびキャパシタンス素子5bとなる。   On the other hand, when the electromagnetic wave incident on the surface in which the unit cell structure shown in FIG. 4 is arranged in an infinite period has an electric field component in the y direction in FIG. 4b and capacitance element 5b.

したがって、この実施の形態2のように、x方向とy方向で装荷するインダクタンス素子4およびキャパシタンス素子5の素子値を異なるように設定することで、入射波の電界成分の方向によって、磁気壁動作帯域を異なるようにすることができる。   Therefore, as in the second embodiment, by setting the element values of the inductance element 4 and the capacitance element 5 loaded in the x direction and the y direction to be different from each other, the magnetic wall operation depends on the direction of the electric field component of the incident wave. The bandwidth can be different.

ここで、計算例を用いて、実施の形態2に係る電磁波反射面について説明する。図5は、計算に用いた電磁波反射面の単位セル構造を示す図であり、同図(a)は平面図、(b)は側面図である。   Here, the electromagnetic wave reflecting surface according to the second embodiment will be described using a calculation example. 5A and 5B are diagrams showing the unit cell structure of the electromagnetic wave reflection surface used in the calculation, where FIG. 5A is a plan view and FIG. 5B is a side view.

計算では、図5に示す電磁波反射面の単位セル構造において、導体パッチ3を2.9mm×2.9mm、隣接する導体パッチ3間の距離を0.2mmとし、基板2の厚さを0.8mm、基板2の誘電率を4.2とした。また、隣接する導体パッチ3間に装荷されたインダクタンス素子4およびキャパシタンス素子5の素子値は、図中のx方向のインダクタンス素子4aおよびキャパシタンス素子5aをそれぞれ0.5nH、2pFとし、y方向のインダクタンス素子4bおよびキャパシタンス素子5bをそれぞれ1nH、4pFとした。   In the calculation, in the unit cell structure of the electromagnetic wave reflecting surface shown in FIG. 5, the conductor patch 3 is 2.9 mm × 2.9 mm, the distance between adjacent conductor patches 3 is 0.2 mm, and the thickness of the substrate 2 is 0.2 mm. The dielectric constant of 8 mm and the substrate 2 was 4.2. Also, the element values of the inductance element 4 and the capacitance element 5 loaded between the adjacent conductor patches 3 are 0.5 nH and 2 pF for the x-direction inductance element 4a and the capacitance element 5a in the figure, respectively, and the y-direction inductance The element 4b and the capacitance element 5b were 1 nH and 4 pF, respectively.

図6及び図7は、図5に示す単位セル構造を無限周期配列した面に電磁波が垂直入射した場合の反射特性を計算した結果であり、図6は入射波がx方向に電界成分を有する場合の結果であり、図7は入射波がy方向に電界成分を有する場合の結果である。図6に示すように、約3GHzと約15GHzにおいて、反射位相が0°となっており、2つの周波数帯域で磁気壁動作を示しているのに対して、図7に示すように、約2GHzと約13GHzにおいて、反射位相が0°となっており、2つの周波数帯域で磁気壁動作を示している。このように、実施の形態2に係る電磁波反射面では、入射波の有する電界成分の方向により、磁気壁動作帯域を変えることが可能となる。   6 and 7 show the results of calculating the reflection characteristics when electromagnetic waves are vertically incident on a surface in which the unit cell structure shown in FIG. 5 is arranged in an infinite period. FIG. 6 shows the incident wave having an electric field component in the x direction. FIG. 7 shows the result when the incident wave has an electric field component in the y direction. As shown in FIG. 6, the reflection phase is 0 ° at about 3 GHz and about 15 GHz, and the magnetic wall operation is shown in two frequency bands, whereas, as shown in FIG. 7, the reflection phase is about 2 GHz. At about 13 GHz, the reflection phase is 0 °, indicating magnetic wall operation in two frequency bands. Thus, in the electromagnetic wave reflecting surface according to the second embodiment, the magnetic wall operating band can be changed depending on the direction of the electric field component of the incident wave.

この実施の形態2では、誘電体等の基板2の第一の面上に地板1が形成され、基板2をはさんで地板1と対向する基板2の第二の面上に、少なくとも動作周波数において1波長以下の寸法を有する複数の導体パッチ3が所定の間隔で、一次元的、または二次元的に配列され、さらに、複数の導体パッチ3の隣接する導体パッチ間にはインダクタンス素子4またはキャパシタンス素子5が交互に装荷され、複数の導体パッチ3の隣接する導体パッチ間に装荷されたインダクタンス素子4またはキャパシタンス素子5の素子値は、x方向とy方向で異なるように設定された構成について説明したが、これに限るものではなく、前記構成において、複数の導体パッチ3をビアホール等の導体を介して地板1に接続した構成としても、同様の効果を得ることができる。   In the second embodiment, the ground plane 1 is formed on the first surface of the substrate 2 such as a dielectric, and at least the operating frequency is disposed on the second surface of the substrate 2 that faces the ground plane 1 across the substrate 2. Are arranged in a one-dimensional or two-dimensional manner at a predetermined interval, and between the adjacent conductor patches of the plurality of conductor patches 3, an inductance element 4 or Regarding the configuration in which the capacitance elements 5 are alternately loaded, and the element values of the inductance elements 4 or the capacitance elements 5 loaded between the adjacent conductor patches of the plurality of conductor patches 3 are set to be different in the x direction and the y direction. Although described above, the present invention is not limited to this. In the above configuration, the same effect can be obtained even when the plurality of conductor patches 3 are connected to the ground plane 1 through conductors such as via holes. It is possible.

実施の形態3.
この発明の実施の形態3に係る電磁波反射面について図8から図16までを参照しながら説明する。図8は、この発明の実施の形態3に係る電磁波反射面の構成を示す図である。同図(a)は平面図、(b)は(a)中のA−A’線での断面図である。
Embodiment 3 FIG.
An electromagnetic wave reflecting surface according to Embodiment 3 of the present invention will be described with reference to FIGS. FIG. 8 is a diagram showing a configuration of an electromagnetic wave reflecting surface according to Embodiment 3 of the present invention. FIG. 4A is a plan view, and FIG. 4B is a cross-sectional view taken along line AA ′ in FIG.

図8において、この発明の実施の形態3に係る電磁波反射面は、地板1と、基板2と、導体パッチ3と、特定の周波数範囲で誘導性を示すインダクタンス素子4と、特定の周波数範囲で容量性を示すキャパシタンス素子5とが設けられている。   In FIG. 8, the electromagnetic wave reflecting surface according to the third embodiment of the present invention includes a ground plane 1, a substrate 2, a conductor patch 3, an inductance element 4 exhibiting inductivity in a specific frequency range, and a specific frequency range. A capacitance element 5 having a capacitive property is provided.

基板2は誘電体等から構成され、この基板2の第一の面上には、地板1が形成されている。また、基板2をはさんで地板1と対向する基板2の第二の面上には、少なくとも動作周波数において1波長以下の寸法を有する複数の導体パッチ3が所定の間隔で、一次元的、または二次元的に配列されている。さらに、複数の導体パッチ3の隣接する導体パッチ間には少なくとも2個以上のインダクタンス素子4またはキャパシタンス素子5が交互に装荷されている。   The substrate 2 is made of a dielectric or the like, and a ground plane 1 is formed on the first surface of the substrate 2. On the second surface of the substrate 2 facing the ground plane 1 across the substrate 2, a plurality of conductor patches 3 having a dimension of one wavelength or less at least at the operating frequency are one-dimensionally at a predetermined interval. Or they are arranged two-dimensionally. Further, at least two or more inductance elements 4 or capacitance elements 5 are alternately loaded between adjacent conductor patches of the plurality of conductor patches 3.

この実施の形態3に係る電磁波反射面の基本的な動作については、上記の実施の形態1および実施の形態2と同様であるので、ここでは省略し、異なる部分を以下に説明していく。この実施の形態3に係る電磁波反射面は、隣接する導体パッチ3間に少なくとも2個以上のインダクタンス素子4またはキャパシタンス素子5が交互に装荷されているため、導体パッチ3上を流れる電流が流れやすくなり、磁気壁動作帯域が広帯域化する効果を得ることができる。   Since the basic operation of the electromagnetic wave reflecting surface according to the third embodiment is the same as that of the first embodiment and the second embodiment, the description thereof will be omitted here, and different parts will be described below. In the electromagnetic wave reflecting surface according to the third embodiment, since at least two or more inductance elements 4 or capacitance elements 5 are alternately loaded between adjacent conductor patches 3, a current flowing on the conductor patch 3 easily flows. Thus, the effect of widening the magnetic wall operating band can be obtained.

この実施の形態3に係る電磁波反射面の磁気壁動作帯域広帯域化について、計算例を用いて説明する。図9及び図10は、導体パッチ3間に装荷したインダクタンス素子4の個数と磁気壁動作帯域の関係を求めるための電磁波反射面の単位セル構造を示す図である。図9は、導体パッチ3間にインダクタンス素子を1個装荷した場合の単位セル構造であり、同図(a)は平面図、(b)は側面図である。また、図10は、導体パッチ3間にインダクタンス素子を2個装荷した場合の単位セル構造であり、同図(a)は平面図、(b)は側面図である。   The widening of the magnetic wall operating band of the electromagnetic wave reflecting surface according to the third embodiment will be described using a calculation example. 9 and 10 are diagrams showing a unit cell structure of the electromagnetic wave reflection surface for obtaining the relationship between the number of the inductance elements 4 loaded between the conductor patches 3 and the magnetic wall operating band. FIG. 9 shows a unit cell structure in the case where one inductance element is loaded between the conductor patches 3. FIG. 9 (a) is a plan view and FIG. 9 (b) is a side view. FIG. 10 shows a unit cell structure when two inductance elements are loaded between the conductor patches 3. FIG. 10 (a) is a plan view and FIG. 10 (b) is a side view.

図11は、図9の単位セル構造において、導体パッチ3を6mm×3mm、隣接する導体パッチ3間の距離を0.2mm、基板2の厚さを0.8mm、基板2の誘電率を4.2、インダクタンス素子4の素子値を0.1nH、キャパシタンス素子5の素子値を5.4pFとしたものを無限周期に配列した面に図中のx方向に電界成分を有する平面波が入射した場合の反射位相特性である。図11のように、2.19GHzで反射位相が0°となり、この周波数の近傍で磁気壁として動作している。反射位相が±90°となる周波数帯域を磁気壁動作帯域とすると、磁気壁動作帯域幅は0.051GHzであり、次の式1で定義される磁気壁動作帯域比帯域幅は2.33%となる。   FIG. 11 shows the unit cell structure of FIG. 9 in which the conductor patch 3 is 6 mm × 3 mm, the distance between adjacent conductor patches 3 is 0.2 mm, the thickness of the substrate 2 is 0.8 mm, and the dielectric constant of the substrate 2 is 4. .2, when a plane wave having an electric field component in the x direction in the figure is incident on the surface in which the element value of the inductance element 4 is 0.1 nH and the element value of the capacitance element 5 is 5.4 pF arranged in an infinite period Is the reflection phase characteristic. As shown in FIG. 11, the reflection phase is 0 ° at 2.19 GHz, and it operates as a magnetic wall in the vicinity of this frequency. Assuming that the frequency band in which the reflection phase is ± 90 ° is the magnetic wall operating band, the magnetic wall operating bandwidth is 0.051 GHz, and the magnetic wall operating band ratio bandwidth defined by the following equation 1 is 2.33%. It becomes.

(磁気壁動作比帯域幅)=(磁気壁動作帯域幅)/(反射位相が0°となる周波数)
(式1)
(Magnetic wall motion ratio bandwidth) = (Magnetic wall motion bandwidth) / (Frequency at which reflection phase is 0 °)
(Formula 1)

図12は、図10の単位セル構造において、導体パッチ3を6mm×3mm、隣接する導体パッチ3間の距離を0.2mm、基板2の厚さを0.8mm、基板2の誘電率を4.2、2個のインダクタンス素子4の素子値をそれぞれ0.2nH、キャパシタンス素子5の素子値を5.4pFとしたものを無限周期配列した面に電界成分を図中のx方向に有する平面波が入射した場合の反射位相特性である。図12のように、2.37GHzで反射位相が0°となり、この周波数の近傍で磁気壁動作している。反射位相が±90°となる周波数帯域を磁気壁動作帯域とすると、磁気壁動作帯域幅は0.066GHzであり、上記の式1で定義される磁気壁動作帯域比帯域幅は2.79%となる。   FIG. 12 shows the unit cell structure of FIG. 10 where the conductor patch 3 is 6 mm × 3 mm, the distance between the adjacent conductor patches 3 is 0.2 mm, the thickness of the substrate 2 is 0.8 mm, and the dielectric constant of the substrate 2 is 4. .2, a plane wave having an electric field component in the x direction in the figure on the surface in which the element values of the two inductance elements 4 are 0.2 nH and the element value of the capacitance element 5 is 5.4 pF are arranged infinitely. This is a reflection phase characteristic when incident. As shown in FIG. 12, the reflection phase becomes 0 ° at 2.37 GHz, and the magnetic wall operates near this frequency. Assuming that the frequency band where the reflection phase is ± 90 ° is the magnetic wall operating band, the magnetic wall operating bandwidth is 0.066 GHz, and the magnetic wall operating band ratio bandwidth defined by the above equation 1 is 2.79%. It becomes.

上述のように、導体パッチ3間に装荷するインダクタンス素子4の個数を増やすことで、磁気壁動作帯域が広帯域化する効果を得ることができる。   As described above, by increasing the number of inductance elements 4 loaded between the conductor patches 3, the effect of widening the magnetic wall operating band can be obtained.

図13及び図14は、導体パッチ3間に装荷したキャパシタンス素子5の個数と磁気壁動作帯域の関係を求めるための電磁波反射面の単位セル構造である。図13は、導体パッチ3間にキャパシタンス素子5を1個装荷した場合の単位セル構造であり、同図(a)は平面図、(b)は側面図である。また、図14は、導体パッチ3間にキャパシタンス素子5を2個装荷した場合の単位セル構造であり、同図(a)は平面図、(b)は側面図である。   FIGS. 13 and 14 show unit cell structures of the electromagnetic wave reflecting surface for obtaining the relationship between the number of capacitance elements 5 loaded between the conductor patches 3 and the magnetic wall operating band. FIGS. 13A and 13B show a unit cell structure when one capacitance element 5 is loaded between the conductor patches 3. FIG. 13A is a plan view and FIG. 13B is a side view. FIG. 14 shows a unit cell structure when two capacitance elements 5 are loaded between the conductor patches 3. FIG. 14A is a plan view and FIG. 14B is a side view.

図15は、図13の単位セル構造において、導体パッチ3を6mm×6mm、隣接する導体パッチ3間の距離を0.2mm、基板2の厚さを0.8mm、基板2の誘電率を4.2、キャパシタンス素子5の素子値を8pFとしたものを無限周期に配列した面に電界成分を図中のx方向に有する平面波が入射した場合の反射位相特性である。図15のように、2.14GHzで反射位相が0°となり、この周波数の近傍で磁気壁として動作している。反射位相が±90°となる周波数帯域を磁気壁動作帯域とすると、磁気壁動作帯域幅は0.057GHzであり、式1で定義される磁気壁動作帯域比帯域幅は2.66%となる。   FIG. 15 shows the unit cell structure of FIG. 13 in which the conductor patch 3 is 6 mm × 6 mm, the distance between adjacent conductor patches 3 is 0.2 mm, the thickness of the substrate 2 is 0.8 mm, and the dielectric constant of the substrate 2 is 4. .2. Reflection phase characteristics when a plane wave having an electric field component in the x direction in the figure is incident on a surface in which the element value of the capacitance element 5 is 8 pF and arranged in an infinite period. As shown in FIG. 15, the reflection phase is 0 ° at 2.14 GHz, and it operates as a magnetic wall in the vicinity of this frequency. Assuming that the frequency band where the reflection phase is ± 90 ° is the magnetic wall operating band, the magnetic wall operating bandwidth is 0.057 GHz, and the magnetic wall operating band ratio bandwidth defined by Equation 1 is 2.66%. .

図16は、図14の単位セル構造において、導体パッチ3を6mm×6mm、隣接する導体パッチ3間の距離を0.2mm、基板2の厚さを0.8mm、基板2の誘電率を4.2、2個のキャパシタンス素子5の素子値をそれぞれ4pFとしたものを無限周期配列した面に電界成分をx方向に有する平面波が入射した場合の反射位相特性である。図16のように、2.31GHzで反射位相が0°となり、この周波数の近傍で磁気壁動作している。反射位相が±90°となる周波数帯域を磁気壁動作帯域とすると、磁気壁動作帯域幅は0.086GHzであり、式1で定義される磁気壁動作帯域比帯域幅は3.73%となる。   FIG. 16 shows the unit cell structure of FIG. 14 in which the conductor patch 3 is 6 mm × 6 mm, the distance between adjacent conductor patches 3 is 0.2 mm, the thickness of the substrate 2 is 0.8 mm, and the dielectric constant of the substrate 2 is 4. .2 is a reflection phase characteristic when a plane wave having an electric field component in the x direction is incident on a surface in which the element values of the two capacitance elements 5 are 4 pF and arranged infinitely. As shown in FIG. 16, the reflection phase becomes 0 ° at 2.31 GHz, and the magnetic wall operates near this frequency. Assuming that the frequency band in which the reflection phase is ± 90 ° is the magnetic wall operating band, the magnetic wall operating bandwidth is 0.086 GHz, and the magnetic wall operating band ratio bandwidth defined by Equation 1 is 3.73%. .

上述のように、導体パッチ3間に装荷するキャパシタンス素子5の個数を増やすことで、磁気壁動作帯域が広帯域化する効果を得ることができる。   As described above, by increasing the number of capacitance elements 5 loaded between the conductor patches 3, the effect of widening the magnetic wall operating band can be obtained.

以上のように、この実施の形態3に係る電磁波反射面では、複数の導体パッチ3の隣接する導体パッチ間には少なくとも2個以上のインダクタンス素子4またはキャパシタンス素子5を交互に装荷することにより、複数の磁気壁動作帯域を広帯域化することができる。   As described above, in the electromagnetic wave reflecting surface according to the third embodiment, by alternately loading at least two inductance elements 4 or capacitance elements 5 between adjacent conductor patches of the plurality of conductor patches 3, A plurality of magnetic wall operation bands can be widened.

この実施の形態3では、誘電体等の基板2の第一の面上に地板1が形成され、基板2をはさんで地板1と対向する基板2の第二の面上に、少なくとも動作周波数において1波長以下の寸法を有する複数の導体パッチ3が所定の間隔で、一次元的、または二次元的に配列され、さらに、複数の導体パッチ3の隣接する導体パッチ間には少なくとも2個以上のインダクタンス素子4またはキャパシタンス素子5が交互に装荷された構成について説明したが、これに限るものではなく、前記構成において、複数の導体パッチ3をビアホール等の導体を介して地板1に接続した構成としても、同様の効果を得ることができる。   In the third embodiment, the ground plane 1 is formed on the first surface of the substrate 2 such as a dielectric, and at least the operating frequency is disposed on the second surface of the substrate 2 that faces the ground plane 1 across the substrate 2. A plurality of conductor patches 3 having a dimension of one wavelength or less are arranged one-dimensionally or two-dimensionally at a predetermined interval, and at least two or more conductor patches 3 are adjacent to each other. Although the configuration in which the inductance elements 4 or the capacitance elements 5 are alternately loaded has been described, the present invention is not limited to this, and in the configuration described above, a plurality of conductor patches 3 are connected to the ground plane 1 via conductors such as via holes. However, the same effect can be obtained.

なお、以上の実施の形態では、電磁波反射面を構成する導体パッチの形状を矩形とした場合を例示して説明したが、導体パッチの形状は矩形に限らず正六角形、正八角形、楕円などにしてもよい。   In the above embodiment, the case where the shape of the conductor patch constituting the electromagnetic wave reflecting surface is rectangular has been described as an example. However, the shape of the conductor patch is not limited to a rectangle, but a regular hexagon, a regular octagon, an ellipse, or the like. May be.

また、以上の実施の形態では、2つの周波数帯域での磁気壁動作を例示して説明したが、電磁波反射面を構成する複数の導体パッチ3や隣接する導体パッチ3間の距離、基板2の厚さ、基板2の誘電率などの構造、インダクタンス素子4の素子値、キャパシタンス素子5の素子値の設定により複数の周波数帯域で磁気壁動作させることも可能である。   In the above embodiment, the magnetic wall operation in the two frequency bands has been described as an example. However, the distance between the plurality of conductor patches 3 constituting the electromagnetic wave reflecting surface and the adjacent conductor patches 3, the substrate 2 It is possible to operate the magnetic wall in a plurality of frequency bands by setting the thickness, the structure such as the dielectric constant of the substrate 2, the element value of the inductance element 4, and the element value of the capacitance element 5.

この発明の実施の形態1に係る電磁波反射面の構成を示す図である。It is a figure which shows the structure of the electromagnetic wave reflective surface which concerns on Embodiment 1 of this invention. この発明の実施の形態1に係る電磁波反射面の計算に用いた単位セル構造を示す図である。It is a figure which shows the unit cell structure used for calculation of the electromagnetic wave reflective surface which concerns on Embodiment 1 of this invention. この発明の実施の形態1に係る電磁波反射面の計算した反射位相特性を示す図である。It is a figure which shows the reflection phase characteristic calculated of the electromagnetic wave reflective surface which concerns on Embodiment 1 of this invention. この発明の実施の形態2に係る電磁波反射面の構成を示す図である。It is a figure which shows the structure of the electromagnetic wave reflective surface which concerns on Embodiment 2 of this invention. この発明の実施の形態2に係る電磁波反射面の計算に用いた単位セル構造を示す図である。It is a figure which shows the unit cell structure used for calculation of the electromagnetic wave reflective surface which concerns on Embodiment 2 of this invention. この発明の実施の形態2に係る電磁波反射面の計算した反射位相特性(入射波がx方向に電界成分を有する場合)を示す図である。It is a figure which shows the reflective phase characteristic (when an incident wave has an electric field component in x direction) calculated by the electromagnetic wave reflective surface which concerns on Embodiment 2 of this invention. この発明の実施の形態2に係る電磁波反射面の計算した反射位相特性(入射波がy方向に電界成分を有する場合)を示す図である。It is a figure which shows the reflective phase characteristic (when an incident wave has an electric field component in ay direction) of the electromagnetic wave reflective surface which concerns on Embodiment 2 of this invention. この発明の実施の形態3に係る電磁波反射面の構成を示す図である。It is a figure which shows the structure of the electromagnetic wave reflective surface which concerns on Embodiment 3 of this invention. 導体パッチ間にインダクタンス素子を1個装荷した場合の単位セル構造を示す図である。It is a figure which shows the unit cell structure at the time of loading one inductance element between conductor patches. 導体パッチ間にインダクタンス素子を2個装荷した場合の単位セル構造を示す図である。It is a figure which shows the unit cell structure at the time of loading two inductance elements between conductor patches. 図9の単位セル構造における反射位相特性を示す図である。It is a figure which shows the reflection phase characteristic in the unit cell structure of FIG. 図10の単位セル構造における反射位相特性を示す図である。It is a figure which shows the reflection phase characteristic in the unit cell structure of FIG. 導体パッチ間にキャパシタンス素子を1個装荷した場合の単位セル構造を示す図である。It is a figure which shows the unit cell structure at the time of loading one capacitance element between conductor patches. 導体パッチ間にキャパシタンス素子を2個装荷した場合の単位セル構造を示す図である。It is a figure which shows the unit cell structure at the time of loading two capacitance elements between conductor patches. 図13の単位セル構造における反射位相特性を示す図である。It is a figure which shows the reflection phase characteristic in the unit cell structure of FIG. 図14の単位セル構造における反射位相特性を示す図である。It is a figure which shows the reflection phase characteristic in the unit cell structure of FIG.

符号の説明Explanation of symbols

1 地板、2 基板、3 導体パッチ、4 インダクタンス素子、4a インダクタンス素子、4b インダクタンス素子、5 キャパシタンス素子、5a キャパシタンス素子、5b キャパシタンス素子。   1 ground plane, 2 substrate, 3 conductor patch, 4 inductance element, 4a inductance element, 4b inductance element, 5 capacitance element, 5a capacitance element, 5b capacitance element.

Claims (3)

基板と、
前記基板の第一の面に形成された導体と、
前記基板の第二の面に形成され、所定の間隔で配列され、各々が少なくとも動作周波数において1波長以下の寸法を有する複数の導体パッチと、
隣接する導体パッチ間に装荷され、特定の周波数範囲で誘導性を示すインダクタンス素子と、
隣接する導体パッチ間に装荷され、特定の周波数範囲で容量性を示すキャパシタンス素子とを備え、
前記インダクタンス素子及び前記キャパシタンス素子が交互に装荷されている
ことを特徴とする電磁波反射面。
A substrate,
A conductor formed on the first surface of the substrate;
A plurality of conductor patches formed on the second surface of the substrate, arranged at predetermined intervals, each having a dimension of one wavelength or less at least at an operating frequency;
An inductance element loaded between adjacent conductor patches and exhibiting inductivity in a specific frequency range;
A capacitance element loaded between adjacent conductor patches and exhibiting capacitance in a specific frequency range;
The electromagnetic wave reflecting surface, wherein the inductance element and the capacitance element are alternately loaded.
前記導体パッチに対して水平方向に装荷されるインダクタンス素子の素子値と前記導体パッチに対して垂直方向に装荷されるインダクタンス素子の素子値が異なり、かつ
前記導体パッチに対して水平方向に装荷されるキャパシタンス素子の素子値と前記導体パッチに対して垂直方向に装荷されるキャパシタンス素子の素子値が異なる
ことを特徴とする請求項1記載の電磁波反射面。
The element value of the inductance element loaded in the horizontal direction with respect to the conductor patch is different from the element value of the inductance element loaded in the vertical direction with respect to the conductor patch, and loaded in the horizontal direction with respect to the conductor patch. 2. The electromagnetic wave reflecting surface according to claim 1, wherein an element value of the capacitance element and an element value of the capacitance element loaded in a direction perpendicular to the conductor patch are different.
前記インダクタンス素子は、隣接する導体パッチ間に少なくとも2個以上装荷され、かつ
前記キャパシタンス素子は、隣接する導体パッチ間に少なくとも2個以上装荷される
ことを特徴とする請求項1又は2記載の電磁波反射面。
The electromagnetic wave according to claim 1 or 2, wherein at least two or more inductance elements are loaded between adjacent conductor patches, and at least two or more capacitance elements are loaded between adjacent conductor patches. Reflective surface.
JP2008067965A 2008-03-17 2008-03-17 Electromagnetic wave reflection surface Expired - Fee Related JP4926099B2 (en)

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JP2011109414A (en) * 2009-11-17 2011-06-02 Toshiba Tec Corp Periodic structure
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JP2013055639A (en) * 2011-08-31 2013-03-21 Industrial Technology Research Institute Communication device and method for expanding antenna impedance bandwidth therefor
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JP2003529261A (en) * 2000-03-29 2003-09-30 エイチアールエル ラボラトリーズ,エルエルシー Tunable impedance surface
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JP2004514364A (en) * 2000-11-14 2004-05-13 エイチアールエル ラボラトリーズ,エルエルシー Textured surfaces with high electromagnetic impedance in multiple frequency bands
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JP2010233025A (en) * 2009-03-27 2010-10-14 Mitsubishi Electric Corp Reflecting surface of electromagnetic waves
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JP2011193345A (en) * 2010-03-16 2011-09-29 Mitsubishi Electric Corp Electromagnetic wave reflection plane
JP2013055639A (en) * 2011-08-31 2013-03-21 Industrial Technology Research Institute Communication device and method for expanding antenna impedance bandwidth therefor
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WO2023175414A1 (en) 2022-03-18 2023-09-21 Ricoh Company, Ltd. Electromagnetic-wave absorber and reflector, planar antenna, and method for manufacturing electromagnetic-wave absorber and reflector

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