JP2009218327A - Method of manufacturing thin film transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing thin film transistors in which thin film transistor having small variation in characteristics are easily manufactured. <P>SOLUTION: In the method of manufacturing the thin film transistor that uses a coating device which coats a substrate with a semiconductor solution in which a semiconductor material is dissolved or dispersed in order by ejecting drops of the semiconductor solution while moving a head having a plurality of nozzles ejecting the drops to form thin film transistors in a matrix in effective operation regions on the substrate, the drops are ejected from the nozzles to the effective operation regions and an outer circumferential region enclosing the effective operation regions to apply the semiconductor solution onto the substrate in order. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a thin film transistor.

  In recent years, research and development of an organic TFT element using an organic semiconductor material has been actively promoted as a technique to compensate for the disadvantages of a conventional thin film transistor (hereinafter referred to as TFT) element made of silicon (Patent Document 1, Non-Patent Document 1). Reference 1 etc.).

  Since organic TFT elements can be manufactured by a low-temperature process, it is said that a light and hard-to-break resin substrate can be used, and that a flexible display using a resin film as a support can be realized (Non-Patent Document). See 2).

  In recent years, as a pixel driving element, for the purpose of reducing manufacturing cost and improving productivity, many methods for manufacturing TFTs using a coating apparatus typified by an ink jet method under atmospheric pressure have been proposed. For example, in a process of forming a TFT of a liquid crystal panel or an organic EL (Electro Luminescence) panel used in a display device, a droplet of a semiconductor solution in which a semiconductor material is dissolved or dispersed is ejected using a coating device, and sequentially applied onto a substrate. A technique for forming a semiconductor film by applying a semiconductor solution is disclosed (see Patent Document 2).

  When a semiconductor solution is sequentially formed on a substrate using an inkjet method to form a semiconductor film of a TFT element, the crystal growth process of the semiconductor material changes depending on the drying speed of the solvent after the semiconductor solution is applied. The size of the semiconductor crystal of the semiconductor film formed after vaporization differs. Therefore, when the drying speed of the solvent varies, the characteristics of the semiconductor film vary greatly, and the characteristics of the manufactured TFT elements also vary greatly.

In order to solve such a problem, a method is disclosed in which a crystal is grown greatly by changing the partial pressure of a gas composed of the same component as the solvent in the vicinity of a droplet applied on a substrate in two stages (patent) Reference 3). That is, immediately after the droplet of the semiconductor solution is applied, the partial pressure of the gas composed of the same component as the solvent in the vicinity of the droplet is controlled to the first partial pressure at which the solution forming the droplet is supersaturated. Crystal nuclei are formed in the droplets. After the generation of the crystal nuclei, the partial pressure of the gas composed of the same component as the solvent in the vicinity of the droplet is reduced to a second partial pressure at which the crystal nuclei can grow. In the method disclosed in Patent Document 3, it is necessary to perform any one of depressurization, heating, and atmosphere replacement in order to control the partial pressure of a gas composed of the same component as the solvent after applying droplets on the substrate. .
Japanese Patent Laid-Open No. 10-190001 JP 2007-243081 A JP 2003-192499 A Advanced Material 2002 2002 No. 2 page 99 (Review) SID'01 Digest page 57

  However, in the case of using a coating apparatus that sequentially applies droplets by moving a head having a plurality of nozzles, the vicinity of the droplets immediately after applying the droplets on the substrate as disclosed in Patent Document 3 It is difficult to control the vicinity of the droplet in which crystal nuclei are generated to the first partial pressure and the second partial pressure, respectively. In particular, it is more difficult when the substrate area is large, such as a liquid crystal panel or an organic EL panel used in a display device, and a region where droplets are ejected from the head is widened.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a method for manufacturing a thin film transistor in which a thin film transistor with less variation in characteristics is produced by a simple method.

1.
A substrate having a plurality of nozzles for ejecting droplets of a semiconductor solution in which a semiconductor material is dissolved or dispersed is moved to eject the droplets and sequentially apply the semiconductor solution onto the substrate. In a thin film transistor manufacturing method of forming thin film transistors in a matrix in an effective operation region above
A method of manufacturing a thin film transistor, wherein the droplets are ejected from the nozzle to the effective operation region and an outer peripheral region surrounding the effective operation region, and a semiconductor solution is sequentially applied onto a substrate.
2.
2. The method of manufacturing a thin film transistor according to 1 above, wherein an interval between the nozzles that apply the semiconductor solution to the outer peripheral region is equal to or less than that of the nozzles that apply the semiconductor solution to the effective operation region.
3.
The distance of the head that moves when the semiconductor solution is applied to the outer peripheral region is equal to or less than the distance of the head that moves when the semiconductor solution is applied to the effective operation region. 3. A method for producing a thin film transistor according to 2.
4).
4. The method of manufacturing a thin film transistor according to any one of 1 to 3, wherein the semiconductor material is a low molecular organic semiconductor material.
5.
Applying the semiconductor solution to the effective operating region;
Drying the semiconductor solution to form a semiconductor layer;
Forming a semiconductor protective layer on the semiconductor layer formed in the effective operation region;
5. The method of manufacturing a thin film transistor according to any one of 1 to 4, wherein the steps are performed in this order.
6).
6. The step of removing the semiconductor layer formed in the outer peripheral region after the step of forming a semiconductor protective layer on the semiconductor layer formed in the effective operation region. A method for manufacturing a thin film transistor.

  According to the present invention, since the droplets are ejected from the nozzle to the effective operation region for manufacturing the TFT element and the outer peripheral region surrounding the effective operation region, and the semiconductor solution is sequentially applied onto the substrate, the coating is applied to the effective operation region. The partial pressure of the solvent in the vicinity of the dropped droplet can be made uniform regardless of the position where the droplet is dropped. Therefore, it is possible to provide a method for manufacturing a thin film transistor in which a thin film transistor with less variation in characteristics is manufactured by a simple method.

  Hereinafter, the present invention will be described in detail with reference to embodiments, but the present invention is not limited thereto.

  FIG. 1 is an explanatory view for explaining an outline of a method for producing a thin film transistor of the present invention, and FIG. 2 is a cross-sectional view schematically showing a configuration of a main part of a coating apparatus 90 according to an embodiment of the present invention. A method for manufacturing a thin film transistor of the present invention will be described with reference to FIGS.

  The coating apparatus 90 is an apparatus that applies the semiconductor solution 50 to a predetermined position of the substrate 1 and forms the semiconductor layer 10 in a matrix. For example, the coating apparatus 90 includes a head 80, a head driving unit 97, a nozzle driving unit 95, and a control unit 93 as shown in FIG. In the lower left of FIG. 1A, X, Y, and Z coordinate axes indicating a three-dimensional coordinate system are illustrated. 2 is a cross-sectional view of the coordinate system shown in FIG. 1 in the X-axis direction. Hereinafter, the drawings will be described based on this coordinate system.

  Arrows A, B, and C in FIG. 1 indicate directions in which the head 80 moves on the substrate 1 by being driven by the head driving unit 97. The regions indicated by 40a, 40b, 40c, and 40d of the substrate 1 are regions where TFT elements are formed on the substrate 1, and are referred to as effective operation regions in the present invention. In the present invention, areas indicated by 41a, 41b, 41c, and 41d surrounding the effective operation areas 40a, 40b, 40c, and 40d are referred to as outer peripheral areas. In the effective operation regions 40a, 40b, 40c, and 40d, the source electrode 9 and the drain electrode 8 that are not shown in FIG. 1 are formed in a matrix in the previous step. In the process of FIG. 1, a semiconductor solution 50 is applied between the source electrode 9 and the drain electrode 8, and an organic solvent of the applied semiconductor solution 50 is vaporized to form a semiconductor layer 10 (not shown).

  In the present invention, by applying the semiconductor solution 50 to the outer peripheral region 41 in addition to the effective operation region 40, the partial pressure of the organic solvent evaporated from the semiconductor solution 50 is made uniform in the effective operation region 40. The semiconductor solution 50 applied to the central part and the peripheral part is dried under the same conditions. The effective operation area 40 and the outer peripheral area 41 will be described in detail later.

  In the embodiment of FIG. 1, in order to produce TFT elements in the four effective operation areas 40 a, 40 b, 40 c, and 40 d on the substrate 1, the head 80 moves in the order of arrows A, B, and C according to a command from the control unit 93. An example in which the semiconductor solution 50 is applied will be described. The present invention is not limited to the case where TFT elements are formed in the four effective operation regions 40a, 40b, 40c, and 40d, and the number of effective operation regions 40 is not limited.

  In FIG. 1B, after the semiconductor solution 50 is applied from the head 80 to the effective operation area 40a and the outer peripheral area 41a, the head 80 applies the semiconductor solution 50 to a part of the effective operation area 40b and the outer peripheral area 41b. State. A portion indicated by 44 in FIG. 1B will be described later with an enlarged view shown in FIG.

  The nozzle 81 shown in FIG. 2 is connected to a storage tank (not shown) that stores the semiconductor solution 50, and is configured so that the semiconductor solution 50 is supplied to the nozzle 81. A plurality of nozzles 81 are arranged on the surface of the head 80 facing the substrate 1 at a predetermined interval in the Y-axis direction. Each nozzle 81 includes, for example, a piezoelectric element used in a known nozzle, and the control unit 93 can control the injection amount. The nozzle driving unit 95 drives, for example, a piezoelectric element of each nozzle 81, and sequentially moves in the direction of arrow A (X-axis negative direction) by the head driving unit 97 to inject a predetermined amount of the semiconductor solution 50a as shown in FIG. . As shown in FIG. 2, the semiconductor solution 50 b is immediately after being applied onto the substrate 1. When the solvent of the semiconductor solution is evaporated, a semiconductor crystal grows to become the semiconductor layer 10.

  Reference numeral 20 in FIG. 2 denotes a mounting table on which the substrate 1 is mounted.

  3 is an enlarged view of the portion indicated by 44 in FIG. 1B, and FIG. 4 is a cross-sectional view of the portion indicated by AA ′ in FIG.

  As shown in FIGS. 3 and 4, a source electrode 9, a drain electrode 8, a gate insulating layer 7, and a gate electrode 2 constituting the TFT element are formed in the effective operation region 40a. The gate electrode 2 is formed below the gate insulating layer 7, and the source electrode 9 and the drain electrode 8 are formed above the gate insulating layer 7. In the present specification, when each component is distinguished, suffixes a, b... Are added as shown in FIGS.

  Reference numeral 10 denotes a semiconductor layer formed in the effective operation region 40a, and reference numeral 11 denotes a semiconductor layer formed in the outer peripheral region 41a. The semiconductor layer 10 is formed so as to cover the channel portion between the source electrode 9 and the drain electrode 8 as shown in FIGS. As shown in FIG. 3, the semiconductor layer 11 is provided in two rows in the X direction and the Y direction in the outer peripheral region 41a where the source electrode 9 and the drain electrode 8 constituting the TFT element are not provided.

  Since the semiconductor layer 11 is not formed on the right side of the outer peripheral area 41a, particularly the semiconductor solution 50b injected to the outermost periphery, the surrounding solvent concentration is low and the solvent drying speed is fast. Therefore, for example, the semiconductor layer 11a formed on the outermost periphery of the outer peripheral region 41a is dried in a short time without sufficiently growing crystals compared to, for example, the semiconductor layer 10d formed in the central portion of the effective operation region 40a. On the other hand, the semiconductor layer 11b formed in the outer peripheral region 41a is on the right side of the semiconductor layer 10a formed in the outermost periphery of the effective operation region 40a, so that the partial pressure of the solvent that is vaporized from the periphery is the effective operation region 40a. This is almost the same as, for example, the semiconductor layer 10d formed in the central portion. Therefore, for example, the partial pressure of the solvent evaporated from the periphery of the semiconductor layer 10a formed around the effective operation region 40a and the partial pressure of the solvent evaporated from the periphery of the semiconductor layer 10d formed in the center of the effective operation region 40a. Are equal, and the partial pressure of the solvent is equalized at a high pressure at any position in the effective operation region 40a. As a result, the solvent is slowly and uniformly evaporated from the semiconductor solution 50b applied to the effective operation region 40a, and the crystal of the semiconductor material grows large, so that the semiconductor layer 10 having a large semiconductor crystal is obtained.

  FIG. 4 shows a state where the semiconductor layers 11a and 11b in the outer peripheral region 41a are dried earlier than the semiconductor layers 10a, 10b, 10c, and 10d in the effective operation region 40a.

  In this embodiment, the example of the bottom gate-bottom contact type TFT element has been described. However, the present invention is not limited to this, and the bottom gate-top contact type, the top gate type, and the top & bottom contact type element can also be used. Similar effects can be obtained.

  In the example of FIG. 3, the semiconductor layer 10 and the semiconductor layer 11 are formed at equal intervals in both the X direction and the Y direction. However, the semiconductor material type, the solvent, the area of the effective operation region 40a, and the arrangement pattern of the thin film transistors are respectively used. Accordingly, an optimal value is appropriately set. The area of the outer peripheral region 41a, that is, the distances D1 and D2 from the effective operation region are unnecessary portions after the TFT element is manufactured, and it is desirable that the distance is small. Therefore, it is desirable that the interval between the semiconductor layers 11 be equal to or less than the interval between the semiconductor layers 10.

  In order to shorten the interval between the semiconductor layers 11 formed in the outer peripheral region 41 in the Y-axis direction, the interval between the nozzles 81 that apply the semiconductor solution 50 to the outer peripheral region 41 is equal to the nozzle 81 that applies the semiconductor solution 50 to the effective operation region 40. The head 80 equivalent to or less than that may be used.

  Further, in order to shorten the interval between the semiconductor layers 11 formed in the outer peripheral region 41 in the X-axis direction, the distance of the head 80 that moves when the semiconductor solution 50 is applied to the outer peripheral region 41 is changed to the effective operation region 40 in the semiconductor. The distance may be equal to or less than the distance of the head 80 that moves when the solution 50 is applied.

  FIG. 5 is an explanatory view for explaining an example of a method for producing a bottom gate bottom contact type organic TFT of the present invention.

As manufacturing methods for manufacturing the bottom gate bottom contact type organic TFT in the effective operation region 40 using the coating apparatus 90, the following steps S1 to S4 will be described.
S1... Step for forming gate electrode and gate insulating layer S2... Step for forming source electrode and drain electrode S3... Step for injecting semiconductor solution S4. Step S5 for drying the solution to form the semiconductor layer S ... Step for forming the semiconductor protective layer A manufacturing method in the case of forming a bottom gate bottom contact type TFT will be described in order with reference to FIG. .

  5A to 5F are cross-sectional views of the channel portion of the TFT element formed in the effective operation region 40. FIG.

S1... Step of forming gate electrode and gate insulating layer After forming the gate electrode 2 on the substrate 1 as shown in FIG. 5A, the gate insulating layer is formed as an upper layer as shown in FIG. 7 is formed.

  In the present invention, the material of the substrate 1 is not particularly limited. For example, glass, polyimide, polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyethersulfone (PES), or the like can be used.

  The gate electrode 2 can be formed by patterning the substrate 1 on the surface of which a thin film made of an electrode material is formed by sputtering or vapor deposition using a photolithography method, various printing methods, or applying droplets. A method of forming a material thin film only on a desired portion using the method can be used.

  As the electrode material, Au, Ag, Pd, Al, Cr, Pt, Cu, ITO, or the like can be used when a thin film is formed by sputtering or vapor deposition. In the case of the droplet coating method, metal nanoparticle ink in which metal nanoparticles such as Ag nanoparticles, Au nanoparticles, and AgPd nanoparticles are dispersed in a solvent, and metal oxide in which metal oxides such as ITO nanoparticles are dispersed in a solvent An organic material-dispersed ink in which an organic material such as nanoparticle ink or PEDOT / PSS is dispersed in a solvent can be used.

  Next, the gate insulating layer 7 is formed. As a formation method, there are a spin coating method, a CVD method, a sputtering method, and the like. As a material of the gate insulating layer 7, inorganic oxides such as silicon oxide, aluminum oxide, tantalum oxide, and titanium oxide, and inorganic nitrides such as silicon nitride and aluminum nitride can be used. Or, polyimide, polyamide, polyester, polyacrylate, photo-curing resin of photo radical polymerization system, photo cation polymerization system, copolymer containing acrylonitrile component, organic compound such as polyvinyl phenol, polyvinyl alcohol, novolac resin, cyanoethyl pullulan Etc. can also be used.

S2... Step of forming source and drain electrodes A source electrode 9 and a drain electrode 8 are formed on the substrate 1 as shown in FIG.

  After cleaning the substrate on which the gate insulating layer 7 is formed, the source electrode 9 and the drain electrode 8 are formed by using a photolithography method, various printing methods, and a droplet coating method in the same manner as the method for forming the gate electrode 2. The same electrode material as that of the gate electrode 2 can be used as the electrode material of the source electrode 9 and the drain electrode 8.

S3... Step of injecting semiconductor solution Using the coating apparatus 90, a semiconductor solution 50a in which a semiconductor material is dissolved or dispersed is injected from the nozzle 81 as shown in FIG.

  The semiconductor material is not particularly limited as long as it is dissolved or dispersed in a solvent. The same applies not only to organic polymer materials, but also to organic low-molecular materials with soluble side chains to increase solubility, and semiconductor materials may be low-molecular materials, polymer materials, or oligomers. It is desirable to use a low molecular organic semiconductor material that is in a crystalline state immediately after injection. When a low molecular organic semiconductor material is used, an organic TFT having high mobility can be manufactured.

  Low molecular weight semiconductor materials include solubility in organic solvents such as silyl groups, ferrocenyl groups, silylalkyl groups, silylalkoxy groups, silylalkenyl groups, ferrocenylalkyl groups, ferrocenylalkoxy groups, and ferrocenylalkenyl groups. Acenes to which substituents for improvement are added are preferred. As the acene material, pentacene, tetracene, anthracene, anthradithiophene, benzothienobenzothiophene and the like are preferable.

  Examples of the π-conjugated polymer and oligomer include thiophene, vinylene, chelenylene vinylene, phenylene vinylene, p-phenylene, a substituted product thereof, or two or more of these repeating units, and the number (n) of the repeating units is 2. At least one selected from the group consisting of an oligomer of ˜15, a polymer having the repeating unit number (n) of 20 or more, or a condensed polycyclic aromatic compound such as pentacene is preferable. A material having a three-dimensional regular structure by adding a substituent such as a C4 to C15 alkyl group to at least one of the repeating units is preferable.

  Furthermore, after injecting the semiconductor solution 50a from the nozzle 81, a material that does not crystallize even when the solvent of the semiconductor solution 50a is dried at room temperature, but crystallizes by heating is also preferably used. For example, a pentacene derivative having a bicyclo structure (which is converted to pentacene by heating to remove ethylene), a porphyrin precursor in which a bicyclo [2.2.2] octadiene skeleton is condensed (to remove ethylene by heating) To become tetrabenzoporphyrin). Moreover, you may use what has coordination metal elements, such as Cu, Zn, Ni, in the center of a porphyrin skeleton.

  Examples of the solvent include chlorine solvents such as chloroform, methylene chloride, dichloroethane, ether solvents such as tetrahydrofuran, toluene, xylene, tetralin, anisole, n-hexylbenzene, cyclohexylbenzene, monochlorobenzene, o-dichlorobenzene, benzoic acid. Aromatic hydrocarbon solvents such as ethyl acetate and methyl benzoate can be used. Or, aliphatic hydrocarbon solvents such as decalin and bicyclohexyl, ketone solvents such as acetone, methyl ethyl ketone, 2-heptanone, ester solvents such as ethyl acetate, butyl acetate, ethyl cellosolve acetate, propylene glycol monomethyl ether acetate May be used. A mixture of a plurality of these solvents may be used.

  The same semiconductor solution 50a as that in the effective operation area 40a is also injected into the outer peripheral area 41.

S4... Step of drying semiconductor solution to form semiconductor layer The semiconductor solution 50 that has flowed in between the source electrode 9 and the drain electrode 8 is dried to form the semiconductor layer 10 as shown in FIG. Form. For example, since the semiconductor layer 11b, the semiconductor layer 11a, and the like are also provided in the right direction of the outermost semiconductor layer 10a of the effective operation region 40a shown in FIG. 3, the partial pressure of the vaporized solvent is around the semiconductor layer 10a. For example, the periphery of the semiconductor layer 10d becomes approximately the same. Therefore, since the solvent of the semiconductor solution 50b applied to the effective operation region 40a is slowly evaporated, a crystal of the semiconductor material grows large during that time, and a TFT element with good performance with little variation is obtained.

  Although this step may be performed at room temperature, when the substrate 1 is set to a predetermined temperature, crystals grow larger and a TFT element with good performance can be obtained.

  In this way, the semiconductor solution 50 is sequentially ejected from the nozzle 81 to a predetermined region between the source electrode 9 and the drain electrode 8 on the substrate 1 to form the semiconductor layer 10.

S5... Step of forming a semiconductor protective layer A semiconductor protective layer 12 covering the semiconductor layer 10 is formed as shown in FIG.

  Next, a semiconductor protective layer 12 that covers the semiconductor layer 10 is formed. As a formation method, the semiconductor protective layer 12 may be selectively formed using a spin coating method, an ink jet method, or the like, or a photolithography method after forming the semiconductor protective layer 12 using a CVD method, a sputtering method, or the like. For example, patterning may be performed. As a material of the semiconductor protective layer 12, inorganic oxides such as silicon oxide, aluminum oxide, tantalum oxide, and titanium oxide, and inorganic nitrides such as silicon nitride and aluminum nitride can be used. Or, polyimide, polyamide, polyester, polyacrylate, photo-curing resin of photo radical polymerization system, photo cation polymerization system, copolymer containing acrylonitrile component, organic compound such as polyvinyl phenol, polyvinyl alcohol, novolac resin, cyanoethyl pullulan Etc. can also be used.

Further, on the semiconductor protective layer 12, in order to prevent damage to the TFT element in the subsequent device fabrication process and deterioration of the TFT element after device fabrication, an inorganic material such as SiO ₂ , SiNx, Al ₂ O _{3 is} used. The passivation film to be formed may be provided by a known method such as a sputtering method or a CVD method.

S6... Removing the semiconductor layer formed in the outer peripheral region The semiconductor layer 11 formed in the outer peripheral region 41 is removed by exposing the substrate 1 to, for example, an O ₂ plasma atmosphere. The semiconductor layer 10 of the TFT element is not removed because it is masked by the semiconductor protective layer 12.

    When the semiconductor layer 11 is removed by this step, the outer peripheral region 41 can be used as a connection terminal portion with an external circuit, an integrated circuit portion for controlling the thin film transistor array, and a sealing portion for sealing the entire device. . In addition, since unnecessary semiconductor layer 11 is removed from the substrate, connection failure and circuit malfunction due to semiconductor layer 11 can be prevented.

  This completes the description of the manufacturing method of the bottom gate bottom contact type organic TFT.

  In this embodiment, an example of a bottom gate / bottom contact type organic TFT has been described. However, the present invention can be similarly applied to a bottom gate / top contact type organic TFT, a top gate type organic TFT, and the like.

  Hereinafter, although the Example performed in order to confirm the effect of this invention is described, this invention is not limited to these.

In each Example and each Comparative Example described below, a 90 mm × 120 mm glass substrate having a Cr film formed on the surface thereof at 120 nm was used as the substrate 1. In each embodiment, a total of 76,800 bottom gate bottom contact type TFTs of 320 in the effective operation region 40 on the substrate 1, 320 in the arrangement direction (row direction) of the nozzles 81 and 240 in the movement direction (column direction) of the head 80 are manufactured. did. In the following description, each TFT element is specified by a row number and a column number. The row in which the head 80 starts emission in the effective operation region 40a is the first row, and when the surface of the substrate 1 on which the TFT element is formed is viewed from the head 80 side, the column that is emitted to the leftmost side of the effective operation region 40a is the first column. One column. Hereinafter, the coordinates of the TFT elements in the m-th row and the n-th column are represented by (m, n).
[Example 1]
In this example, a bottom gate bottom contact type TFT was manufactured using the coating apparatus 90 in the steps S1 to S4 described in FIG. The interval between the nozzles 81 of the head 80 used in this example is 282 μm. The head 80 is driven at a pitch of 282 μm by the head driving unit 97. In this embodiment, two columns of semiconductor layers 11 are formed in the outer peripheral region 41 at the same interval of 282 μm as the effective operation region 40 in both the row direction and the column direction as shown in FIG.

  In the step of injecting the semiconductor solution described later, the semiconductor solution 50a is injected between the 320 source electrodes 9 and the drain electrodes 8 formed in the effective operation region 40 from the 320 nozzles 81 of the head 81, and effective. The semiconductor solution 50 a is ejected from the two nozzles 81 to the outer peripheral areas 41 on both sides of the operation area 40. Further, the head 81 injects the semiconductor solution 50a from the outer peripheral area 41 two lines before the effective operation area 40, and from the 324 nozzles 81 to the outer peripheral area 41 of the two lines after the effective operation area 40 and the effective operation area 40. The semiconductor solution 50 is injected.

  Subsequent steps will be described in order with the same step numbers as in FIG. 5, and description of common points will be omitted.

S1... Step of forming gate electrode and gate insulating layer After applying a photosensitive resist on the substrate 1 on which the conductive thin film is formed, it is exposed and developed through a photomask having a pattern of the gate electrode 2 Thus, a resist layer having the shape of the gate electrode 2 was formed. After the etching, the resist layer was removed, and the gate electrode 2 was formed.

  Next, after applying optomer PC403 which is a photosensitive acrylate material using a spin coat method, patterning was performed using a photolithography method to form the gate insulating layer 7.

S2... Step of forming source and drain electrodes A source electrode 9 and a drain electrode 8 having a thickness of 50 .mu.m made of Au were formed by photolithography.

S3... Step of injecting semiconductor solution The head 80 shown in FIG. 4 was sequentially moved in the direction of arrow A at a pitch of 282 .mu.m, and the semiconductor solution 50a was injected from the nozzle 81 into the effective operation region 40 and the outer peripheral region 41. As the semiconductor solution 50a, a solution obtained by dissolving 3% by mass of 6,13-bistriethylsilylethynylpentacene in tetrahydronaphthalene was used.

S4... Step of drying semiconductor solution to form semiconductor layer The semiconductor solution 50b flowing between the source electrode 9 and the drain electrode 8 is dried, and the semiconductor layer 10 as shown in FIG. Formed. At this time, the semiconductor solution 50 b applied to the outer peripheral region 41 is also dried to form the semiconductor layer 11.
[Example 2]
A substrate 1 having the same shape and material as in Example 1 was fabricated in the same process as Example 1 up to Steps S1 to S4, and then a bottom gate / bottom contact type TFT was fabricated, and then Steps S5 and S6 were performed.

S5: Step of forming a semiconductor protective layer A toluene solution of polystyrene was applied so as to cover the semiconductor layer 10 by using a piezo ink jet apparatus. After coating, the substrate 1 was heated using a hot plate at 80 ° C. to dry the solvent, thereby forming a semiconductor protective layer 12 of a polystyrene thin film.

S6: Step of removing the semiconductor layer formed in the outer peripheral region The substrate 1 was exposed to an atmosphere of O ₂ plasma, and the semiconductor layer 11 formed in the outer peripheral region 41 was removed.
[Comparative Example 1]
This comparative example was performed in order to confirm the effect of the semiconductor solution 50 injected to the outer peripheral region 41 performed in Example 1 and Example 2. The difference from Example 1 and Example 2 is that the semiconductor solution 50 was not injected into the outer peripheral region 41 in the step of injecting the semiconductor solution in Step S3. Other than that, a bottom-gate bottom-contact TFT was fabricated under the same conditions as in Example 1.

〔Experimental result〕
In this experiment, a TFT element at a specific position was selected from 76800 TFT elements formed on the substrate 1, and a drain current was measured for each of them using a probe electrode. The measurement conditions were a gate bus potential of −30V, a source bus potential of 0V, and a drain voltage of −40V.

  The coordinates of the measured TFT elements are (1, 1), (1, 160), (120, 160), (120, 319), (239, 1), (239, 160). The measurement results are shown in the table below.

  As can be seen from Table 1, the drain currents of the TFT elements fabricated in Examples 1 and 2 are in the range of 3.5 μA to 3.8 μA regardless of the position of the TFT elements, and a large amount of drain current can flow. There was little variation. Moreover, there was no difference in the drain current of the TFT elements produced in Examples 1 and 2, and it was confirmed that there was no particular change in electrical characteristics even when Steps S5 and S6 were performed.

  On the other hand, the TFT element manufactured in Comparative Example 1 has a coordinate element of (1, 1), (1, 160), (239, 1) corresponding to the peripheral portion of the effective operation region 40, particularly 0.2 μA, 0. The drain current was very small at 8 μA and 0.7 μA. Since the drain current of the central (120, 160) TFT element is 3.7 μA, it can be said that the variation in drain current is very large depending on the position of the manufactured TFT element.

  In the present specification, an example of manufacturing a bottom gate bottom contact type organic TFT has been described. However, the application of the present invention is not limited to the manufacture of a bottom gate bottom contact type organic TFT element. It can also be applied to the manufacture of organic TFTs, top gate type organic TFTs, and the like.

  As described above, according to the present invention, it is possible to provide a thin film transistor manufacturing method for manufacturing a thin film transistor with little variation in characteristics by a simple method.

It is explanatory drawing explaining the outline of the manufacturing method of the thin-film transistor of this invention. It is sectional drawing which showed typically the structure of the principal part of the coating device 90 which concerns on embodiment of this invention. It is an enlarged view of the part shown by 44 of FIG.1 (b). It is sectional drawing of the part shown by AA 'of FIG. It is explanatory drawing explaining an example of the manufacturing method of the bottom gate bottom contact type organic TFT of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Substrate 2 Gate electrode 7 Gate insulating layer 8 Drain electrode 9 Source electrode 10 Semiconductor layer (semiconductor layer of effective operation region 40)
11 Semiconductor layer (semiconductor layer in outer peripheral region 41)
DESCRIPTION OF SYMBOLS 12 Semiconductor protective layer 20 Substrate stand 40 Effective operation area | region 41 Outer periphery area | region 50 Semiconductor solution 80 Head 81 Nozzle 90 Application | coating apparatus 93 Control part 95 Nozzle drive part 97 Head drive part

Claims (6)

A substrate having a plurality of nozzles for ejecting droplets of a semiconductor solution in which a semiconductor material is dissolved or dispersed is moved to eject the droplets and sequentially apply the semiconductor solution onto the substrate. In a thin film transistor manufacturing method of forming thin film transistors in a matrix in an effective operation region above
A method of manufacturing a thin film transistor, wherein the droplets are ejected from the nozzle to the effective operation region and an outer peripheral region surrounding the effective operation region, and a semiconductor solution is sequentially applied onto a substrate. 2. The method of manufacturing a thin film transistor according to claim 1, wherein an interval between the nozzles that apply the semiconductor solution to the outer peripheral region is equal to or less than that of the nozzle that applies the semiconductor solution to the effective operation region. 2. The distance of the head that moves when the semiconductor solution is applied to the outer peripheral region is equal to or less than the distance of the head that moves when the semiconductor solution is applied to the effective operation region. Or a method for producing the thin film transistor according to 2; 4. The method of manufacturing a thin film transistor according to claim 1, wherein the semiconductor material is a low molecular organic semiconductor material. Applying the semiconductor solution to the effective operating region;
Drying the semiconductor solution to form a semiconductor layer;
Forming a semiconductor protective layer on the semiconductor layer formed in the effective operation region;
5. The method of manufacturing a thin film transistor according to claim 1, wherein the steps are performed in this order. 6. The step of removing the semiconductor layer formed in the outer peripheral region is performed after the step of forming a semiconductor protective layer on the semiconductor layer formed in the effective operation region. Manufacturing method of the thin film transistor.

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