JP2009218014A - Illuminating lamp control apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent an illuminating lamp from having an enlarged load in advance by suitably determining deterioration of a capacitor used for an MERS. <P>SOLUTION: An illuminating lamp control apparatus includes: the MERS 4 having a bridge circuit 20 connected between the illuminating lamp 2 and an AC power source 3 and composed of first to fourth MOSs 21A to 24a for performing a switching operation in response to respective driving signals and first to fourth diodes 21B to 24B connected in parallel with the respective MOSs, and the capacitor 25 connected across middle points of the bridge circuit 20; a control device 13 for inputting the driving signal to the MERS 4; and a dimming light volume setting section 5 for setting a dimming light volume of the illuminating lamp 2. The control device 13 determines whether or not deterioration of the capacitor 25 is existed in response to a specific state of the MERS 4 detected by a capacitor voltage detection section 6, a load current detection section 8, or a load voltage detection section 7. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an illuminating lamp control device that controls the dimming amount of an illuminating lamp using, for example, a fluorescent lamp, a mercury lamp, a sodium lamp, and the like, and in particular, is connected between an AC power source and the illuminating lamp and output from the AC power source. The present invention relates to an illuminating lamp control apparatus including a magnetic energy regeneration switch (hereinafter simply referred to as MERS) that adjusts a power supply voltage to be output to an illuminating lamp and a control apparatus that controls the MERS.

  Conventionally, as an apparatus provided with such MERS, for example, an AC power supply apparatus connected between an inductive load such as a motor and an AC power supply and controlling load power supplied to the inductive load is known ( For example, see Patent Document 1).

MERS is a bridge circuit configured by connecting two reverse-conducting semiconductor switches connected in series and two reverse-conducting semiconductor switches connected in series in parallel, and two midpoints of the bridge circuit. And supplying an AC power source to an inductive load (for example, induction motor in Patent Document 1), and at the time of interrupting the current at each zero cross point of the voltage of the half cycle timing of the AC power source, The magnetic energy generated in the inductive load is charged (absorbed) in the capacitor, and the next time the voltage is supplied to the inductive load, the magnetic energy stored as a charge in the capacitor is discharged (regenerated) to the inductive load. Each reverse conducting semiconductor switch is composed of a MOSFET and a diode, and controls the phase of the drive signal supplied to the gates of the four MOSFETs with respect to the phase of the AC power supply voltage input to the MERS, so that it is inductive. The load power supplied to the load can be adjusted. A control device that controls the MERS by supplying a drive signal to the MERS has four reverse conduction types that constitute a bridge circuit based on a zero cross point of a power supply voltage and a gate phase angle corresponding to a time difference between the zero cross points. A load supplied from MERS to an inductive load by controlling the phase of a drive signal for simultaneously turning on or off a pair of reverse conducting semiconductor switches located diagonally among semiconductor switches, that is, switch switching timing. Since the electric power is adjusted, the power factor in the load can be improved. Moreover, when using it as a power supply of an induction motor, a starting torque can be increased.
Japanese Patent No. 3735673 (see “Claims”, “Effects of the Invention”, and “Best Mode for Carrying Out the Invention”)

  The use of the AC power supply apparatus using MERS, which can save power by improving the power factor of such a load, is expected. On the other hand, in the AC power supply apparatus using MERS, the life of electronic components to be used becomes a problem by switching a large current at high speed. The MOSFET and diode of the bridge circuit that constitutes the MERS have a semi-permanent lifetime because they are semiconductor components. However, a capacitor that repeatedly charges and discharges a large current every half cycle of an AC power supply is compared with a MOSFET or a diode. It is easy to deteriorate. For example, since the cycle of the 50 Hz AC power supply is 20 ms, the capacitor repeatedly charges and discharges a large current when the current stops every 10 ms. Since the deterioration of the capacitor causes a decrease in capacitance, the peak voltage at the time of charging of the capacitor that absorbs magnetic energy as an electric charge increases. Since this peak voltage is superimposed on the power supply voltage, there is a high possibility that the load voltage will exceed the rated voltage of the load as the capacitor progresses, and as a result, the load on the load may increase. For this reason, it is necessary to determine appropriately the deterioration of the capacitor used for MERS. However, in the said patent document 1, there is neither description nor suggestion regarding determining appropriately the deterioration of the capacitor | condenser used for MERS.

  The present invention has been made in view of the above points, and an object of the present invention is to appropriately determine deterioration of a capacitor used for MERS and to prevent a burden on an illumination lamp from increasing. The object is to provide an AC power supply device that can perform the above-mentioned.

  In order to achieve the above object, an illumination lamp control device according to claim 1 of the present application is connected between an illumination lamp as an inductive load and an AC power source, and performs a switching operation in accordance with a drive signal. 4 having a semiconductor switching element 4 and a capacitor that absorbs and regenerates magnetic energy generated by the illuminating lamp, and outputs load power for lighting the illuminating lamp by adjusting a power supply voltage of the AC power supply. An energy regenerative switch; a control device that inputs a drive signal to the magnetic energy regenerative switch; and a dimming amount setting unit that sets a dimming amount of the illumination lamp, wherein the control device includes the dimming amount setting unit. An illuminating lamp control device for controlling the phase of a drive signal for the AC power supply so as to output load power corresponding to the light control amount set by Device includes a state detecting means for detecting a particular state of the magnetic energy recovery switch, and to determine the presence or absence of deterioration of the capacitor depending on the particular state detected by the state detecting means.

  Therefore, according to the illuminating lamp control device according to claim 1 of the present application, the control device determines whether or not the capacitor has deteriorated according to the specific state detected by the state detection means. It is possible to appropriately determine the deterioration of the capacitor used for the energy regenerative switch and prevent the burden on the illumination lamp from increasing.

  Further, in the illumination lamp control device according to claim 2 of the present application, in the configuration according to claim 1 of the present application, the state detection unit detects a state of a charge / discharge voltage of the capacitor of the magnetic energy regeneration switch, and the control device When the charging / discharging state exceeds a preset standard, it is determined that the capacitor is deteriorated.

  Therefore, according to the illuminating lamp control device according to claim 2 of the present application, the state detection means detects a state of a charge / discharge voltage of the capacitor of the magnetic energy regenerative switch, and the control device detects the state of the charge / discharge. When the value exceeds a preset standard, the capacitor is determined to be deteriorated. Therefore, the deterioration of the capacitor used for the magnetic energy regenerative switch is properly determined and the burden on the lamp is large. This can be prevented beforehand.

  Further, in the illumination lamp control device according to claim 3 of the present application, in the configuration according to claim 1 of the present application, the state detection unit detects a state of a load current flowing from the magnetic energy regeneration switch to the illumination lamp, and performs the control. The apparatus determines that the capacitor is deteriorated when the state of the load current exceeds a preset reference.

  Therefore, according to the illuminating lamp control apparatus according to claim 3 of the present application, the state detecting means detects a state of a load current flowing from the magnetic energy regeneration switch to the illuminating lamp, and the control apparatus detects the load current. Since the capacitor is judged to have deteriorated when the state exceeds a preset standard, it is determined that the capacitor used for the magnetic energy regenerative switch is properly deteriorated, and the burden on the lighting lamp is reduced. An increase in size can be prevented in advance.

  Further, in the illumination lamp control device according to claim 4 of the present application, in the configuration according to claim 1 of the present application, the state detection unit detects a state of a load voltage output from the magnetic energy regeneration switch to the illumination lamp, The controller determines that the capacitor is deteriorated when the state of the load voltage exceeds a preset reference.

  Therefore, according to the illuminating lamp control apparatus according to claim 4 of the present application, the state detecting means detects a state of a load voltage output from the magnetic energy regeneration switch to the illuminating lamp, and the control apparatus Since the capacitor is judged to have deteriorated when the voltage condition exceeds a preset standard, the deterioration of the capacitor used for the magnetic energy regenerative switch is properly judged and applied to the lamp. It is possible to prevent the burden from increasing.

  Further, in the configuration of claim 1, 2, 3, or 4 of the present invention, when the control device determines that the capacitor has deteriorated, the dimming control device is provided. Regardless of the dimming amount set by the amount setting means, the phase of the drive signal for the AC power supply is changed.

  Therefore, according to the illuminating lamp control device according to claim 5 of the present application, when the control device determines that the capacitor is deteriorated, regardless of the light control amount set by the light control amount setting means, Since the phase of the drive signal with respect to the AC power supply is changed, in addition to the effect of claim 1, 2, 3, or 4, in addition to the effect of immediately replacing a deteriorated capacitor, or immediately In the situation where the illumination lamp cannot be turned off, it is possible to temporarily maintain the lighting while preventing the burden on the illumination lamp from increasing.

  According to a sixth aspect of the present invention, in the configuration of the first, second, third, or fourth aspect of the present invention, the AC power supply is input to the magnetic energy regeneration switch in accordance with the control of the control device. Switching means for switching between input and direct input to the illuminating lamp, and when the controller determines that the capacitor is not deteriorated, the control unit is configured to input the AC power source to the magnetic energy regeneration switch. When the switching means is controlled and it is determined that the capacitor is deteriorated, the switching means is controlled so as to directly input the AC power source to the illumination lamp.

  Therefore, according to the illuminating lamp control apparatus according to claim 6 of the present application, the switching for switching whether the AC power supply is input to the magnetic energy regeneration switch or directly to the illuminating lamp according to the control of the control apparatus. And when the controller determines that the capacitor is not deteriorated, the controller controls the switching means to input the AC power supply to the magnetic energy regeneration switch, and determines that the capacitor is deteriorated. In this case, since the switching means is controlled to directly input the AC power source to the illuminating lamp, in addition to the effect of claim 1, 2, 3, or 4, a deteriorated capacitor is If the environment is not ready for immediate replacement, or if the lighting cannot be turned off immediately, prevent the burden on the lighting from increasing. It is possible to maintain the lighting temporarily.

  In addition, in the configuration of the illumination lamp control device according to claim 7 of the present application, in the configuration according to claim 1, 2, 3, or 4, when the control device determines that the capacitor is deteriorated, An information display means for displaying information is provided.

  Therefore, according to the illuminating lamp control device according to claim 7 of the present application, when the control device determines that the capacitor is deteriorated, it has information display means for displaying information of the determination result. In addition to the effects of the first, second, third, or fourth aspect of the present invention, it is possible to quickly and easily determine the deterioration of the capacitor used in the magnetic energy regenerative switch.

  According to the illuminating lamp control device of the present invention configured as described above, the control device determines the presence or absence of deterioration of the capacitor according to the specific state detected by the state detection means. Therefore, it is possible to appropriately determine the deterioration of the capacitor used in the magnetic energy regenerative switch and prevent the burden on the illumination lamp from increasing.

  Hereinafter, first to fourth embodiments related to the illumination lamp control device of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a schematic configuration inside an illuminating lamp system common to the embodiments.

  The illuminating lamp system 1 shown in FIG. 1 is connected between an illuminating lamp 2 corresponding to an inductive load such as a fluorescent lamp, an AC power supply 3 that supplies a power supply voltage V, and the illuminating lamp 2 and the AC power supply 3. The MERS 4 that adjusts and outputs the load voltage Vload input from the power source voltage V of the AC power source 3 to the illumination lamp 2 and the dimming that sets the dimming amount of the illumination lamp 2 as well as the ON / OFF of the illumination lamp 2 An amount setting unit 5, a power supply voltage detection unit 6 that detects the power supply voltage V of the AC power supply 3, a load voltage detection unit 7 that detects a load voltage Vload to the illumination lamp 2, and a load current that flows through the illumination lamp 2 A load current detection unit 8 that is detected by a sensor 8A such as a coil, a capacitor voltage detection unit 9 that detects a capacitor voltage inside the MERS 4, and a time difference based on the zero cross point by detecting a zero cross point of the power supply voltage V Equivalent A power supply phase detection unit 10 that detects the phase of the power supply 3, a setting command from the light adjustment amount setting unit 5, a power supply voltage detection unit 6, a load voltage detection unit 7, a load current detection unit 8, and a capacitor voltage detection unit 9. In addition, according to the detection signal output from each of the power supply phase detection units 10, the gate drive signals G1 to G4 are output to the MERS 4 and the changeover switch for switching the AC power supply 3 (this will be described later). The control unit 11 outputs switching signals S1, S2, and S3 to 31, 32, and 33. Furthermore, it has the information display part 12 which displays the various information output from the control part 11. FIG. That is, the power supply voltage detection unit 6, the load voltage detection unit 7, the load current detection unit 8, the capacitor voltage detection unit 9, the power supply phase detection unit 10, and the control unit 11 control the MERS 4 and the entire illumination lamp system 1. The control apparatus 13 to control is comprised.

  In order to drive the light control amount setting unit 5, the control device 13, and the information display unit 12 with a low voltage (for example, 5v) DC power supply, the power supply voltage supplied from the AC power supply 3 is set to a low DC voltage. Although a voltage conversion circuit, a rectification circuit, a stabilization circuit, and the like for conversion are provided, since this is a well-known prior art, the drawings and detailed description are omitted. The control unit 11 includes analog detection signals input from the power supply voltage detection unit 6, the load voltage detection unit 7, the load current detection unit 8, the capacitor voltage detection unit 9, and the power supply phase detection unit 10, respectively. A / D converter circuit that converts to digital, central processing circuit such as CPU, non-volatile storage circuit such as ROM that stores control programs and initial data, RAM that temporarily stores data processed by the central processing circuit Storage circuit such as MERS4, information display unit 12, and an output circuit for outputting a drive signal for driving a changeover switch described later, these circuits are also well-known conventional techniques. Detailed description is omitted.

  As shown in FIG. 1, the MERS 4 includes a first MOSFET (hereinafter simply referred to as a first MOS) 21A, a second MOSFET (hereinafter simply referred to as a second MOS) 22A, a third MOSFET (hereinafter simply referred to as a third MOS) 23A, 4A (hereinafter simply referred to as a fourth MOS) 24A, and a first diode 21B, a second diode 22B, a third diode 23B, and a fourth diode 24B are connected in parallel to the MOSs 22A, 22A, 23A, and 24A, respectively. The anode is connected to the source of each MOS, and the cathode is connected to the drain. The source of the first MOS 21A and the drain of the second MOS 22A are connected, and the source of the fourth MOS 24A and the drain of the third MOS 23A are connected. Further, the drains of the first MOS 21A and the fourth MOS 24A are connected to each other, and the sources of the second MOS 22A and the third MOS 23A are connected to each other. That is, the first MOS 21A and the second MOS 22A connected in series and the fourth MOS 24A and the third MOS 23A connected in series are further connected in parallel to form the bridge circuit 20.

  The source of the fourth MOS 24 </ b> A and the drain of the third MOS 23 </ b> A on the input side of the bridge circuit 20 are connected to the input terminal 26 and connected to one terminal 3 </ b> A of the AC power supply 3 via the changeover switch 31. The source of the first MOS 21A and the drain of the second MOS 22A on the output side of the bridge circuit 20 are connected to the output terminal 27, and the output terminal 27 is connected to one terminal 2A of the illuminating lamp 2. The other terminal 2 </ b> B of the illuminating lamp 2 is connected to the other terminal 3 </ b> B of the AC power source 3 via the changeover switch 32. Therefore, when the bridge circuit 20 is in an active state and the changeover switch 31 and the changeover switch 32 are ON by the control of the MERS4 in FIGS. 2 to 10 to be described later, the AC power supply 3, the changeover switch 31, the MERS4, the illumination lamp 2 and the changeover switch 32 are connected in series to form a closed loop, and the illuminating lamp 2 is supplied from the AC power source 3 according to the dimming amount set by the dimming amount setting unit 5 and the control of the control device 13. Is supplied with a load current.

  Further, a capacitor 25 is connected between the drains of the first MOS 21A and the fourth MOS 24A, which are the two middle points of the bridge circuit 20, and the sources of the second MOS 22A and the third MOS 23A. When the load current supplied to the illuminating lamp 2 that is an inductive load is cut off, the capacitor 25 charges (absorbs) and accumulates the magnetic energy accumulated in the illuminating lamp 2 as a charge, and then accumulates the illuminating lamp 2. When the load current is supplied to the lamp 2, the accumulated charge is discharged (regenerated) to the illumination lamp 2. The control device 13 supplies the gate driving signals G1 to G4, which are pulse signals, to the gates G1 to G4 of the first MOS 21A to the fourth MOS 24A so that the capacitor 25 is charged and discharged at every half of the cycle of the AC power supply 3. G4 is applied to control ON / OFF of the first MOS 21A to the fourth MOS 24A.

  Hereinafter, ON / OFF control of the control device 13 will be described. The control device 13 configures the bridge circuit 20 according to the switch switching timing based on the zero cross point of the power source voltage V of the AC power source 3 and the gate phase angle α corresponding to the time difference with reference to the zero cross point. Among the MOSs 21A, 22A, 23A and 24A, the MERS 4 is controlled so that the first MOS 21A and the fourth MOS 24A located on the diagonal line are simultaneously turned on (or turned off), and the second MOS 22A and the third MOS 23A are turned off (or turned on) simultaneously.

  As a result, when the first MOS 21A and the third MOS 23A are simultaneously turned on, the second MOS 22A and the fourth MOS 24A are simultaneously turned off. When the first MOS 21A and the third MOS 23A are simultaneously turned off, the second MOS 22A and the fourth MOS 24A are simultaneously turned on. The paired MOSs are alternately turned ON / OFF. The first MOS 21A, the second MOS 22A, the third MOS 23A, and the fourth MOS 24A may be provided with a period (dead time) in which they are simultaneously turned off according to the setting.

  In accordance with the gate drive signal, the MERS 4 turns on / off the first MOS 21A, the second MOS 22A, the third MOS 23A, and the fourth MOS 24A based on the gate phase angle α included in the gate drive signal, and the MOSs 21A, 22A, 23A, and 24A. The load voltage Vload input to the illuminating lamp 2 is adjusted according to ON / OFF of the illuminating lamp 2, and the illuminating lamp 2 is lit with a dimming amount corresponding to the load voltage Vload.

  The dimming amount setting unit 5 not only turns off the illuminating lamp 2 but also turns on the illuminating lamp 2 (ON), for example, the dimming amount is 100%, that is, the load power factor (the load voltage and the load current). The power factor corresponding to the predetermined dimming amount is set within a range corresponding to about 70% of the dimming amount from the normal lighting equivalent to 1.0 (cosφ when the phase difference is φ) 1.0, that is, the load power factor of 0.7. , Can save energy.

  When the MOS 21A, 22A, 23A and 24A switch on between the source and drain in response to the gate drive signal ON, the bridge circuit 20 allows the current I to be conducted in both directions, while the gate drive signal OFF Accordingly, when the source and drain are switched off, the bridge circuit 20 allows the current I to be conducted only in the forward direction of the diode through the diodes 21B, 22B, 23B, and 24B.

  The MERS 4 switches on between the source and drain on the first MOS 21A and the third MOS 23A side according to the gate drive signal ON to the first MOS 21A and the third MOS 23A, and at the same time according to the gate drive signal OFF to the second MOS 22A and the fourth MOS 24A. The switch between the source and drain on the side of the second MOS 22A and the fourth MOS 24A is turned off.

  Similarly, the MERS 4 switches on between the source and drain on the second MOS 22A and the fourth MOS 24A side in response to the gate drive signal ON to the second MOS 22A and the fourth MOS 24A, and at the same time turns off the gate drive signal to the first MOS 21A and the third MOS 23A. Accordingly, the source and drain on the first MOS 21A and third MOS 23A sides are switched off.

  That is, the first MOS 21A and the third MOS 23A have the same direction switch polarity, the second MOS 22A and the fourth MOS 24A have the same direction switch polarity, and the switch polarity of the first MOS 21A and the third MOS 23A is opposite to the switch polarity of the second MOS 22A and the fourth MOS 24A. Become.

  The illuminating lamp control device according to the present invention is the illuminating lamp system 1, the magnetic energy regenerative switch is MERS4, the first to fourth semiconductor switching elements are connected in parallel, the first MOSFET 21A and the first diode 21B are connected in parallel. 4MOSFET 24A and fourth diode 21B, dimming amount setting means is dimming amount setting section 5, state detecting means is load voltage detecting section 7, load current detecting section 8, or capacitor voltage detecting section 9, and load voltage detecting means is load. The voltage detection unit 7, the load current detection unit corresponds to the load current detection unit 8, the capacitor voltage detection unit corresponds to the capacitor voltage detection unit 9, the information display unit corresponds to the information display unit 12, and the switching unit corresponds to the changeover switches 31, 32, 33. It is.

  Prior to describing the operation of the illuminating lamp system 1 which is an embodiment of the illuminating lamp control apparatus according to the present invention, first, the basic principle of the MERS 4 will be described with reference to FIGS.

  FIG. 2 is an explanatory timing diagram briefly showing the relationship between the power supply voltage V of the AC power supply 3 and the gate drive signal for driving and controlling the MERS 4. FIG. 2A shows a temporal change in the power supply voltage V supplied by the AC power supply 3, and the power supply voltage V is changed from the zero cross point timing “t2” (phase = 0 °) to the next zero cross point. This is a sine wave with one cycle T until timing “t2” (phase = 0 °). For convenience of explanation, the timing of the zero cross point serving as a reference for shifting from the negative voltage to the positive voltage is “t2”, the timing of the zero cross point for shifting from the next positive voltage to the negative voltage is “t4”, and the next The timing of the zero cross point at which the transition from the negative voltage to the positive voltage occurs again is “t7”. The phase difference between the phase of the power supply voltage V and the phase of the gate drive signal. In this case, the rise of the gate drive signal precedes the timing “t2” (phase = 0 °) of the zero cross point of the power supply voltage V. The phase lead gate phase angle α is as follows.

  FIGS. 2B and 2C are timing explanatory diagrams simply showing gate drive signals to the first MOS 21A, the second MOS 22A, the third MOS 23A, and the fourth MOS 24A according to the gate phase angle α. 2A to 2C are represented by the same time axis.

  FIG. 2B briefly shows the gate drive signal when the gate phase angle α is set to 0 ° <α ≦ 90 °, and the timing of the gate drive signal for turning the first MOS 21A and the third MOS 23A from OFF to ON is shown in FIG. Based on the timing “t2” of the zero cross point (phase = 0 °) of the power supply voltage V, the timing “t1” obtained by advancing the phase by α from the timing “t2” is changed from OFF to ON. The timing “t3” after the half cycle T / 2 of the power supply voltage V from the same timing “t1”, the timing of the gate driving signal for turning the first MOS 21A and the third MOS 23A from ON to OFF, To do. Since the switching phases of the second MOS 22A and the fourth MOS 24A are opposite to those of the first MOS 21A and the third MOS 23A, the second MOS 22A and the fourth MOS 24A are turned off from ON at the timing “t1”, and the second MOS 22A and the fourth MOS 24A are turned off at the timing “t3”. It is time to turn on the 2MOS 22A and the fourth MOS 24A from OFF.

  FIG. 2C simply shows the gate drive signal when the gate phase angle α is set to 90 ° <α <180 °, and the timing of the gate drive signal for turning the first MOS 21A and the third MOS 23A from ON to OFF. With reference to the timing “t2” of the zero crossing point (phase = 0 °) of the power supply voltage V, the timing “t0” obtained by advancing the phase by α from the timing “t2”, and the first MOS 21A and the third MOS 23A from OFF In the case of the timing of the gate drive signal to be turned ON, the timing “t2y” after the half cycle T / 2 of the power supply voltage V from the same timing “t0”, and the gate drive signal to turn OFF the first MOS 21A and the third MOS 23A Timing. Note that the timing “t0” is the timing for turning the second MOS 22A and the fourth MOS 24A from ON to OFF, and the timing “t2y” is the timing for turning the second MOS 22A and the fourth MOS 24A from OFF to ON.

  Although not shown, when the gate phase angle α is set to α = 180 °, when the power supply voltage V is positive, the first MOS 21A and the third MOS 23A are OFF, that is, the second MOS 22A and the fourth MOS 24A are ON, and the power supply voltage V Is a negative voltage, the first MOS 21A and the third MOS 23A are ON, that is, the second MOS 22A and the fourth MOS 24A are OFF.

  Similarly, although not shown, when the gate phase angle α is set to α = 0 °, the power supply voltage V and the gate drive signal have the same phase, and when the power supply voltage V is a positive voltage, the first MOS 21A and the third MOS 23A. Is ON, that is, the second MOS 22A and the fourth MOS 24A are OFF, and when the power supply voltage V is a negative voltage, the first MOS 21A and the third MOS 23A are OFF, that is, the second MOS 22A and the fourth MOS 24A are ON.

  FIG. 3 is an explanatory diagram briefly showing the internal operation of the MERS 4 when the gate phase angle α is set to (α = 0 °). For simplicity of explanation, in FIG. 3 (FIGS. 5, 6, and 8 to 10 are also the same), the MOS of the switch ON is represented by a short-circuit line, and the display of the MOS of the switch OFF is omitted. .

  When the power supply voltage V of the AC power supply 3 is a positive voltage, the MERS 4 is in a conductive state when the first MOS 21A and the third MOS 23A are ON, as shown in FIG. 3A, and the second MOS 22A and the fourth MOS 24A are OFF, that is, the second diode 22B. Since the fourth diode 24B becomes conductive in the forward direction, both ends of the capacitor 25 are short-circuited. As a result, the power supply voltage V becomes the load voltage Vload as it is.

  In addition, when the power supply voltage V of the AC power supply 3 is a negative voltage, the MERS 4 is in a conductive state when the second MOS 22A and the fourth MOS 24A are ON, as shown in FIG. 3B, that is, the first MOS 21A and the third MOS 23A are OFF. Since the diode 21B and the third diode 23B are conductive in the forward direction, both ends of the capacitor 25 are short-circuited. As a result, the power supply voltage V becomes the load voltage Vload as it is.

  That is, when the gate phase angle is set to α = 0 °, the power voltage V becomes the load voltage Vload for the illumination lamp 2 as it is, so that the MERS 4 is not disposed between the AC power supply 3 and the illumination lamp 2. Is equivalent to

  Next, the internal operation of the MERS 4 when the gate phase angle α is set to 0 ° <α ≦ 90 ° will be described. FIG. 4 is an explanatory diagram simply showing the relationship among the power supply voltage V, the gate drive signal, the capacitor voltage Vc, and the load voltage Vload (dotted line) when the gate phase angle is set to 0 ° <α ≦ 90 °. FIG. 6 to FIG. 6 are explanatory diagrams simply showing the internal operation of the MERS 4 when the gate phase angle (0 ° <α ≦ 90 °) is set. Note that the positive / negative of the capacitor voltage Vc is inverted every 1 / 2T in FIG. 4, but for the sake of convenience of explanation (in the same manner in FIG. 7), it is represented by an absolute value.

  As shown in FIG. 4, in the MERS 4, the first MOS 21A and the third MOS 23A, and the second MOS 22A and the fourth MOS 24A are alternately turned ON / OFF according to the gate drive signal set to the gate phase angle α.

  Immediately before the timing “t1”, since the power supply voltage V is a negative voltage, the MERS 4 is in a conductive state when the second MOS 22A and the fourth MOS 24A are ON, as shown in FIG. 5A, that is, the first MOS 21A and the third MOS 23A are OFF, Since the first diode 21B and the third diode 23B are conductive in the forward direction, both ends of the capacitor 25 are short-circuited. As a result, the capacitor voltage Vc of the capacitor 25 is kept at 0V in the current path of the first diode 21B → the fourth MOS 24A and the second MOS 22A → the third diode 23B, and the power supply voltage V becomes the load voltage Vload as it is.

  Next, when MERS4 reaches timing “t1” while the power supply voltage V remains negative, as shown in FIG. 5B, the first MOS 21A and the third MOS 23A are turned on and the second MOS 22A and the fourth MOS 24A are turned off. That is, the current paths of the second MOS 22A, the second diode 22B, the fourth MOS 24A, and the fourth diode 24B are cut off. Note that, when the first MOS 21A and the third MOS 23A are driven from OFF to ON, the first diode 21B and the third diode 23B are in a conductive state, so that zero voltage switching is realized without causing a switching loss.

  As a result, during the period from the timing “t1” to “t2”, the MERS 4 starts a charging operation of the capacitor 25 by the current flowing through the path of the first MOS 21A → the capacitor 25 → the third MOS 23A, and the capacitor voltage Vc increases. become.

  Further, as shown in FIG. 4, since the capacitor voltage Vc is superimposed on the power supply voltage V in the lead phase up to 90 ° as shown in FIG. 4, the decrease of the negative voltage of the load voltage Vload is further accelerated and the timing of the load voltage Vload is increased. After elapse of “t1”, before reaching the timing “t2” of the reference point (phase = 0 °) of the power supply voltage V, the load voltage Vload is a positive voltage even though the power supply voltage V is a negative voltage. Will be reversed.

  Thereafter, when the charging current of the capacitor 25 gradually decreases and the voltage Vc of the capacitor 25 reaches a peak voltage, the direction of the current is reversed (refer to the dotted line current direction in FIG. 5B), and the capacitor 25 is discharged. It starts and discharges via the current of the third MOS 23A → the capacitor 25 → the first MOS 21A. Further, the capacitor voltage Vc drops with the start of discharge.

  Next, when the timing “t2” is reached and the power supply voltage V is inverted to a positive voltage, the MERS 4 discharges the capacitor 25 through the path of the third MOS 23A → the capacitor 25 → the first MOS 21A as shown in FIG. 5C. Will continue.

  Further, when the MERS 4 reaches the timing “t2x”, the capacitor voltage Vc of the capacitor 25 being discharged becomes 0 V, and therefore, as shown in FIG. 6A, the second diodes on the second MOS 22A and the fourth MOS 24A side in the OFF state are provided. 22B and the fourth diode 24B are conductive in the forward direction, and both ends of the capacitor 25 are short-circuited. Therefore, during the period from the timing “t2x” to “t3”, the fourth diode 24B → the first MOS 21A, the third MOS 23A → the second In the current path of the diode 22B, the power supply voltage V becomes the load voltage Vload as it is.

  Next, when the MERS 4 reaches the timing “t3” while the power supply voltage V remains positive, as shown in FIG. 6B, the second MOS 22A and the fourth MOS 24A are turned on and the first MOS 21A and the third MOS 23A are turned on. OFF, that is, the current paths of the first MOS 21A, the first diode 21B, the third MOS 23A, and the third diode 23B are cut off. Note that, when the second MOS 22A and the fourth MOS 24A are driven from OFF to ON, since the second diode 22B and the fourth diode 24B are in a conductive state, zero voltage switching is realized without causing a switching loss.

  As a result, in the first period from the timing “t3” to “t4”, the MERS 4 starts a charging operation of the capacitor 25 by the current flowing through the path of the fourth MOS 24A → the capacitor 25 → the second MOS 22A, and the negative capacitor voltage Vc. The absolute value of increases.

  Further, since the load voltage Vload is superimposed with the negative capacitor voltage Vc on the power supply voltage V, the decrease in the positive voltage of the load voltage Vload is further accelerated, and after the timing “t3” has elapsed, the timing “t4” Before “,” the load voltage Vload is inverted to a negative voltage even though the power supply voltage V is a positive voltage.

  Thereafter, when the charging current of the capacitor 25 gradually decreases and the voltage Vc of the negative voltage capacitor 25 reaches the peak voltage, the direction of the current is reversed (see the dotted arrow in FIG. 6B), and the capacitor 25 Discharging is started and discharged via the second MOS 22A → the capacitor 25 → the fourth MOS 24A. Further, the absolute value of the capacitor voltage Vc decreases with the start of discharge.

  Next, when the timing “t4” is reached and the power supply voltage V is inverted to a negative voltage, the MERS 4 discharges the capacitor 25 through the path of the second MOS 22A → the capacitor 25 → the fourth MOS 24A as shown in FIG. 6C. Continue.

  Further, when MERS4 reaches the timing “t4x”, the capacitor voltage Vc of the discharging capacitor 25 becomes 0 V. Therefore, as shown in FIG. 5A, the first diodes on the first MOS 21A and the third MOS 23A side in the OFF state are used. 21B and the third diode 23B are conductive in the forward direction, and both ends of the capacitor 25 are short-circuited. Therefore, during the period from timing “t4x” to “t6”, the first diode 21B → the fourth MOS 24A, the second MOS 22A → the third In the current path of the diode 23B, the power supply voltage V becomes the load voltage Vload as it is.

  Then, after the timing “t6”, the MERS 4 repeats the processing operations at the timings “t1” to “t6” described above.

  Accordingly, when the gate phase angle is set to 0 ° <α ≦ 90 °, the MERS 4 advances the capacitor voltage Vc with respect to the delayed phase caused by the illuminating lamp 2 of the inductive load and superimposes it on the power supply voltage V in the phase. Therefore, as the gate phase angle α is advanced, the power factor is improved, the load voltage Vload (Vload = V + Vc) is increased, and as a result, the load power is also increased.

  Needless to say, the timing at which the capacitor 25 reverses from charging to discharging may differ depending on the capacitance of the capacitor 25 in the MERS 4 and the timing of the gate phase angle α. Further, when the capacitance of the capacitor 25 is increased, It goes without saying that there may be an operation in which the capacitor voltage Vc of the capacitor 25 does not become 0V.

  Next, the internal operation of the MERS 4 when the gate phase angle α is set to 90 ° <α <180 ° will be described. FIG. 7 is an explanatory diagram simply showing the relationship among the power supply voltage V, the gate drive signal, the capacitor voltage Vc, and the load voltage Vload (dotted line) when the gate phase angle (90 ° <α <180 °) is set. FIG. 10 is an explanatory diagram briefly showing the internal operation of the MERS 4 when the gate phase angle (90 ° <α <180 °) is set.

  As shown in FIG. 7, the MERS 4 alternately turns on / off the first MOS 21A and the third MOS 23A, and the second MOS 22A and the fourth MOS 24A according to the gate drive signal set to the gate phase angle α.

  Immediately before the timing “t0”, since the power supply voltage V is a negative voltage, the MERS 4 is in a conductive state when the second MOS 22A and the fourth MOS 24A are ON, as shown in FIG. 8A, that is, the first MOS 21A and the third MOS 23A are OFF. Since the first diode 21B and the third diode 23B are conductive in the forward direction, both ends of the capacitor 25 are short-circuited. As a result, the capacitor voltage Vc of the capacitor 25 is kept at 0V in the current path of the first diode 21B → the fourth MOS 24A and the second MOS 22A → the third diode 23B, and the power supply voltage V becomes the load voltage Vload as it is.

  Next, when MERS4 reaches timing “t0” while the power supply voltage V remains negative, as shown in FIG. 8 (b), the first MOS 21A and the third MOS 23A are ON, and the second MOS 22A and the fourth MOS 24A are OFF. That is, the current paths of the second MOS 22A, the second diode 22B, the fourth MOS 24A, and the fourth diode 24B are cut off. Note that, when the first MOS 21A and the third MOS 23A are driven from OFF to ON, the first diode 21B and the third diode 23B are in a conductive state, so that zero voltage switching is realized without causing a switching loss.

  As a result, in the first period from timing “t0” to “t1x”, in MERS4, current flows through the path of the first MOS 21A → the capacitor 25 → the third MOS 23A, the capacitor 25 starts a charging operation, and the capacitor voltage Vc increases. It will be.

  Furthermore, since the load voltage Vload is superimposed on the capacitor voltage Vc on the power supply voltage V, as shown in FIG. 7, after the timing “t0” has elapsed, before the power supply voltage V becomes a peak negative voltage. Even though the power supply voltage V is a negative voltage, the load voltage Vload is inverted from a negative voltage to a positive voltage.

  Thereafter, when the charging current of the capacitor 25 gradually decreases and the voltage Vc of the capacitor 25 reaches the peak voltage, the direction of the current is reversed (see the dotted current direction in FIG. 8B), and the capacitor 25 is discharged. It starts and discharges in the current path of the third MOS 23A → the capacitor 25 → the first MOS 21A. Further, the capacitor voltage Vc drops with the start of discharge.

  Next, when the timing “t1x” is reached, the capacitor voltage Vc of the capacitor 25 becomes 0 V. Further, when the timing “t2” is reached, the power supply voltage V is inverted to a positive voltage. Note that during the period from the timing “t1x” to the timing “t2”, the phase of the power supply voltage V is close to 0 V and the capacitor voltage Vc is 0 V, so the load voltage Vload is compared with the peak value of the power supply voltage V. Thus, the voltage is close to 0V. In the waveform example shown in FIG. 7, the capacitor voltage Vc becomes 0 V before the timing “t2” when the power supply voltage V is inverted to a positive voltage.

  When the MERS 4 reaches the timing “t1x”, the capacitor voltage Vc becomes 0 V as the capacitor 25 continues to be discharged. Therefore, as shown in FIG. 8C, the MERS 4 is turned off on the second MOS 24A and fourth MOS 24A sides. Since the second diode 22B and the fourth diode 24B are conductive in the forward direction and both ends of the capacitor 25 are short-circuited, the fourth diode 21B → the first MOS 21A, the third MOS 23A during the period from the timing “t1x” to “t2”. → In the current path of the second diode 22B, the power supply voltage V becomes the load voltage Vload as it is.

  Next, when the timing “t2” is reached and the power supply voltage V is inverted to a positive voltage, the MERS4 becomes conductive in the forward direction as shown in FIG. 9A. Since both ends of the capacitor 25 are short-circuited, the power supply voltage V remains unchanged in the current path of the fourth diode 24B → the first MOS 21A and the third MOS 23A → the second diode 22B during the period from the timing “t2” to “t2y”. The load voltage Vload.

  Next, when the power supply voltage V remains positive and the timing “t2y” is reached, the MERS 4 turns on the second MOS 22A and the fourth MOS 24A and turns off the first MOS 21A and the third MOS 23A, as shown in FIG. 9B. That is, the current paths of the first MOS 21A, the first diode 21B, the third MOS 23A, and the third diode 23B are cut off. Note that, when the second MOS 22A and the fourth MOS 24A are driven from OFF to ON, since the second diode 22B and the fourth diode 24B are in a conductive state, zero voltage switching is realized without causing a switching loss.

  As a result, in the first period from the timing “t2y” to “t3x”, the MERS 4 starts a charging operation of the capacitor 25 by the current flowing through the path of the fourth MOS 24A → the capacitor 25 → the second MOS 22A, and the capacitor voltage Vc increases. It will be.

  Further, since the load voltage Vload exceeds 90 ° to the power supply voltage V and the capacitor voltage Vc is superimposed in the phase, as shown in FIG. 7, before the power supply voltage V becomes the peak positive voltage, Since the capacitor voltage Vc is superimposed in the reverse voltage direction, the load voltage Vload decreases compared to the power supply voltage V. As a result, between the timings “t2y” to “t3x”, the load voltage Vload is inverted from the positive voltage to the negative voltage even though the power supply voltage V is a positive voltage.

  As a result, the direction of the load current flowing in the capacitor 25 in the MERS 4 is reversed (refer to the dotted line current direction in FIG. 9B), the capacitor 25 starts discharging, and the current of the second MOS 22A → the capacitor 25 → the fourth MOS 24A. It will discharge in the path.

  Next, when MERS4 reaches the timing “t3x”, the capacitor voltage Vc of the capacitor 25 is 0 V, and when the timing “t4” is reached, the power supply voltage V is inverted to a negative voltage. During the period from timing “t3x” to timing “t4”, the phase of the power supply voltage V is close to 0 V and the capacitor voltage Vc is 0 V, so the load voltage Vload is compared with the peak value of the power supply voltage V. Thus, the voltage is close to 0V. In the waveform example shown in FIG. 7, the capacitor voltage Vc becomes 0 V before the timing “t4” when the power supply voltage V is inverted to a negative voltage.

  When the MERS 4 reaches the timing “t3x”, the capacitor voltage Vc becomes 0 V as the capacitor 25 continues to be discharged. Therefore, as shown in FIG. 9C, the first MOS 21A and the first MOS 23A on the side of the third MOS 23A are turned off. Since the diode 21B and the third diode 23B are conductive in the forward direction and both ends of the capacitor 25 are short-circuited, the first diode 21B → the fourth MOS 24A and the second MOS 22A → the second MOS 22A during the period from the timing “t3x” to “t4”. In the current path of the three diodes 23B, the power supply voltage V becomes the load voltage Vload as it is.

  Furthermore, when the MERS 24 reaches the timing “t4”, the power supply voltage V is inverted to a negative voltage, and as shown in FIG. 10, the second MOS 22A and the fourth MOS 24A are ON, and the first MOS 21A and the third MOS 23A are OFF. Since the first diode 21B and the third diode 23B are conductive in the forward direction, both ends of the capacitor 25 are short-circuited. As a result, in the current path of the first diode 21B → the fourth MOS 24A and the second MOS 22A → the third diode 23B, the capacitor voltage Vc of the capacitor 25 is maintained at 0V, and the power supply voltage V remains as it is as the load voltage Vload.

  That is, MERS4 repeats the processing operation from timing “t0” to “t4” described above after timing “t4”.

  Therefore, when the gate phase angle is set to 90 ° <α <180 °, the MERS 4 sets the capacitor voltage Vc to the power supply voltage V at an advanced phase exceeding 90 ° with respect to the inductive load illumination lamp 2. Since the voltage Vc is superimposed in the reverse voltage direction, the power factor decreases as the gate phase angle α is advanced, the load voltage Vload (Vload = V−Vc) decreases, and as a result, the load power also decreases. Will do.

  Next, the operation of the illuminating lamp system 1 that determines whether or not the capacitor 25 is deteriorated, which is the main object of the present invention, will be described. FIG. 11 is a diagram simply showing the relationship between the drive signal input to the MERS 4 and the capacitor voltage Vc when the capacitor is normal. Although the polarity of the capacitor voltage Vc is inverted every half cycle, in FIG. 11 and FIGS. 12 to 15 described later, the capacitor voltage Vc is expressed as an absolute value for convenience of description.

  As described with reference to FIGS. 2 to 10, the control device 13 gives a period (10 ms) of ½ of the period of the AC power supply 3 (for example, 20 ms at a frequency of 50 Hz) with respect to the gates of the first MOS 21A to the fourth MOS 24A. The pulse signals G1 to G4 are input at the timing. In a state where a load current flows through the illuminating lamp 2 via the MERS 4, magnetic energy is accumulated in the inductive illuminating lamp 2. When the load current is cut off at the timing of a half cycle (1 / 2T = 10 ms), the magnetic energy accumulated in the illuminating lamp 2 is charged (absorbed) in the capacitor 25 as a charge. Therefore, as shown in FIG. 11, the capacitor voltage Vc increases rapidly from 0v to the peak voltage VP1. Since the accumulated electric charge is discharged (regenerated) to the illumination lamp 2 again, the capacitor voltage Vc drops rapidly from the peak voltage VP1 to 0 v as shown in FIG. When the capacitor 25 is not deteriorated and is normal, the peak voltage VP1 is equal to or lower than a preset reference voltage (for example, threshold value TH).

  However, when the capacitor 25 is deteriorated due to aging or other factors and the capacity is reduced, the peak voltage exceeds the reference voltage. As a result, the load voltage supplied to the illuminating lamp 2 may be higher than the rated voltage and the burden on the illuminating lamp 2 may be increased. Since the deterioration of the capacitor 25 cannot be determined visually and qualitatively like the deterioration of the fluorescent tube, it is necessary to determine the deterioration of the capacitor 25 quantitatively. Hereinafter, a method for determining deterioration of the capacitor 25 according to the first to third embodiments of the present invention will be described.

  FIG. 12 is a waveform diagram briefly showing a specific state of MERS 4 for explaining a method of determining deterioration of capacitor 25 in the first embodiment. In FIG. 12, a sine wave signal waveform a indicated by a solid line is a power supply voltage of the AC power supply 3 detected by the power supply voltage detection unit 6 of FIG. The power supply phase detector 10 detects the timing of the zero cross point of the power supply voltage as a phase reference point. A signal waveform b indicated by a solid line is a load current I detected by the load current detector 8. A signal waveform c indicated by a two-dot chain line is a voltage Vc of the capacitor 25 detected by the capacitor voltage detection unit 9. A signal waveform e indicated by a two-dot chain line is a load voltage Vload detected by the load voltage detector 7. The pulse signal waveform f is a gate drive signal input from the control unit 11 to the first MOS 21A and the third MOS 23A, and the pulse signal waveform g is a gate drive signal input from the control unit 11 to the second MOS 22A and the fourth MOS 24A. Yes, and ON / OFF is inverted at a period of 1/2 of the AC power supply 3 respectively.

  When the capacitor 25 is further deteriorated, the peak voltage VP when charging the magnetic energy as an electric charge exceeds the reference voltage. In the example of FIG. 12, the signal waveform f which is the gate drive signal input to the first MOS 21A and the third MOS 23A is inverted from ON to OFF, and the signal waveform g which is the gate drive signal input to the second MOS 22A and the fourth MOS 24A is OFF. At the timing of reversing from ON to ON, the peak voltage VP1 of the capacitor 25 is equal to or lower than the reference voltage TH. However, the signal waveform f that is the gate drive signal input to the first MOS 21A and the third MOS 23A is inverted from OFF to ON, and the signal waveform g that is the gate drive signal input to the second MOS 22A and the fourth MOS 24A is inverted from ON to OFF. At this timing, the peak voltage VP2 of the capacitor 25 exceeds the reference voltage TH.

  The capacitor voltage detector 9 detects the state of the charge / discharge voltage of the capacitor 25 of the MERS 4 as the peak voltage VP and inputs it to the controller 11. When the peak voltage VP of the charge / discharge voltage of the capacitor 25 exceeds the preset reference voltage TH, the control unit 11 determines that the capacitor 25 is deteriorated and notifies the controller 25 of the deterioration. Therefore, the user can prevent deterioration of the capacitor 25 used for the MERS 4 properly and replace it with a new capacitor to prevent the burden on the illumination lamp 2 from increasing.

  In this case, when the control unit 11 determines that the capacitor 25 is deteriorated, the control unit 11 displays the determination result (alarm) on the information display device 12 to notify the user of that fact. The information display device 12 is constituted by a light emitting element such as an LED (light emitting diode) provided in the vicinity of the illuminating lamp 2, for example. When the control device 13 determines that the capacitor 25 is deteriorated, the LED is displayed. Light up. Therefore, the user can easily determine the deterioration of the capacitor 25 used for the MERS 4.

  Even when the control device 13 notifies the information display device 12 that the capacitor 25 is deteriorated, there are cases where the environment for parts and personnel that can be immediately replaced by the user is not always prepared. Alternatively, there may be a situation where the illumination lamp 2 cannot be turned off immediately even if a replaceable environment is prepared. In such a case, the lighting is tentatively maintained while preventing the burden on the lighting lamp 2 from becoming large due to the peak voltage VP of the charge / discharge voltage of the capacitor 25 exceeding the reference voltage TH. There is a need.

  Therefore, in the present embodiment, conventionally, the lighting lamp 2 is applied using the MERS 4 that has been developed for the purpose of improving the power factor in the load or increasing the starting torque when used as a power source for the induction motor. Prevent the burden from increasing. That is, the control device 13 controls the gate phase angle α of the MERS 4 by the gate drive signals G1 to G4, and lowers the peak voltage VP of the charge / discharge voltage of the capacitor 25 that exceeds the reference voltage TH. FIG. 13 is an explanatory diagram for maintaining the lighting while preventing the burden on the illumination lamp 2 from increasing due to the charge / discharge voltage of the capacitor 25 exceeding the reference voltage TH.

  FIG. 13A shows the signal waveform a of the power supply voltage of the AC power supply 3 when the capacitor 25 is not deteriorated, the signal waveform c of the charge / discharge voltage of the capacitor 25, the signal waveforms f of the gate drive signals G1 and G3, and the gate drive. The signal waveform g of the signals G2 and G4 is shown. In this case, the gate phase angle α is α1. The peak voltage VP1 of the charge / discharge voltage of the capacitor 25 is equal to or lower than the reference voltage TH. The gate phase angle α is set according to the light control amount set by the light control amount setting unit 5.

  FIG. 13B shows the signal waveform a of the power supply voltage of the AC power supply 3 when the capacitor 25 is deteriorated, the signal waveform c of the charge / discharge voltage of the capacitor 25, the signal waveforms f of the gate drive signals G1 and G3, and the gate drive signal. The signal waveforms g of G2 and G4 are shown. In this case, the gate phase angle α remains α1. In this case, the peak voltage VP2 of the charge / discharge voltage of the capacitor 25 exceeds the reference voltage TH. Therefore, the control device 13 advances the gate phase angle α of the gate drive signals G1, G2, G3, and G4 by Δα and sets it to α2 regardless of the dimming amount set by the dimming amount setting unit 5 ( α2 = α1 + Δα).

  FIG. 13C shows the signal waveform a of the power supply voltage of the AC power supply 3, the signal waveform c of the charge / discharge voltage of the capacitor 25, the signal waveforms f of the gate drive signals G1 and G3, and the gate when the gate phase angle α is α2. The signal waveforms g of the drive signals G2 and G4 are shown. As a result of advancing the gate phase angle α, the peak voltage VP1 of the charge / discharge voltage of the capacitor 25 falls below the reference voltage TH. Therefore, if the user does not have an environment in which the deteriorated capacitor can be immediately replaced, or if the lighting lamp 2 cannot be immediately turned off, the peak voltage VP of the charge / discharge voltage of the capacitor 25 exceeding the reference voltage TH. Thus, it is possible to temporarily maintain the lighting while preventing the burden on the illumination lamp 2 from increasing. Then, after the environment in which the capacitor can be replaced is prepared, or after the lighting lamp 2 can be turned off, it is possible to prevent the burden on the lighting lamp 2 from increasing by replacing the capacitor with a new one. it can.

  FIG. 14 is a waveform diagram briefly showing a specific state of MERS 4 for explaining a method of determining deterioration of capacitor 25 in the second embodiment. In FIG. 14, similarly to the case of FIG. 12, a sine wave signal waveform a indicated by a solid line is the power supply voltage of the AC power supply 3 detected by the power supply voltage detection unit 6 of FIG. The power supply phase detector 10 detects the timing of the zero cross point of the power supply voltage as a phase reference point. A signal waveform b indicated by a solid line is a load current I detected by the load current detector 8. A signal waveform c indicated by a two-dot chain line is a voltage Vc of the capacitor 25 detected by the capacitor voltage detection unit 9. A signal waveform e indicated by a two-dot chain line is a load voltage Vload detected by the load voltage detector 7. The pulse signal waveform f is a gate drive signal input from the control unit 11 to the first MOS 21A and the third MOS 23A, and the pulse signal waveform g is a gate drive signal input from the control unit 11 to the second MOS 22A and the fourth MOS 24A. Yes, and ON / OFF is inverted at a period of 1/2 of the AC power supply 3 respectively.

  When the deterioration of the capacitor 25 progresses, as shown in FIG. 14, the absolute values of the positive load current peak Im (+) and the negative load current peak Im (−) become non-uniform. That is, the balance between the positive load current and the negative load current is deteriorated. The load current detector 8 detects a positive load current peak Im (+) and a negative load current peak Im (−) and inputs the detected load current to the controller 11. The control unit 11 determines that the capacitor 25 is deteriorated when the balance between the positive load current and the negative load current exceeds a preset reference. As a reference set in advance, the absolute value ratio r (I) of Im (+) and Im (−) is, for example, in a range of 0.9 ≦ r (I) ≦ 1.1. In this case, when the control device 13 determines that the capacitor 25 is deteriorated, the control device 13 displays the determination result (alarm) on the information display device 12 such as an LED provided in the vicinity of the illuminating lamp 2, and prompts the user. Notify that. Therefore, the user can prevent deterioration of the capacitor 25 used for the MERS 4 properly and replace it with a new capacitor to prevent the burden on the illumination lamp 2 from increasing.

  The reason why the balance between the positive load current and the negative load current is deteriorated is that the peak voltage VP of the charge / discharge voltage of the capacitor 25 has exceeded the reference voltage TH. Therefore, as in the first embodiment, The control device 13 controls the gate phase angle α of the MERS 4 by using the gate drive signals G1 to G4 to lower the peak voltage VP of the charge / discharge voltage of the capacitor 25 that exceeds the reference voltage TH, so that the user has deteriorated. When the environment in which the capacitor can be immediately replaced is not prepared, or when the lamp 2 cannot be immediately turned off, the burden on the lamp 2 due to the peak voltage VP of the charge / discharge voltage of the capacitor 25 exceeding the reference voltage TH. Can be tentatively maintained while preventing an increase in the size. Then, after the environment in which the capacitor can be replaced is prepared, or after the lighting lamp 2 can be turned off, it is possible to prevent the burden on the lighting lamp 2 from increasing by replacing the capacitor with a new one. it can.

  FIG. 15 is a waveform diagram briefly showing a specific state of MERS 4 for explaining a method for determining the deterioration of capacitor 25 in the third embodiment. 15, as in the case of FIG. 12, a sine wave signal waveform “a” indicated by a solid line is the power supply voltage of the AC power supply 3 detected by the power supply voltage detection unit 6 of FIG. 1. The power supply phase detector 10 detects the timing of the zero cross point of the power supply voltage as a phase reference point. A signal waveform b indicated by a solid line is a load current I detected by the load current detector 8. A signal waveform c indicated by a two-dot chain line is a voltage Vc of the capacitor 25 detected by the capacitor voltage detection unit 9. A signal waveform e indicated by a two-dot chain line is a load voltage Vload detected by the load voltage detector 7. The pulse signal waveform f is a gate drive signal input from the control unit 11 to the first MOS 21A and the third MOS 23A, and the pulse signal waveform g is a gate drive signal input from the control unit 11 to the second MOS 22A and the fourth MOS 24A. Yes, and ON / OFF is inverted at a period of 1/2 of the AC power supply 3 respectively.

  As the deterioration of the capacitor 25 progresses, as shown in FIG. 15, the absolute values of the positive load voltage peak voltage Vld (+) and the negative load voltage peak Vld (−) become non-uniform. That is, the balance between the positive load voltage and the negative load voltage is deteriorated. The load voltage detector 7 detects the peak voltage Vld (+) of the positive load voltage and the peak Vld (−) of the negative load voltage and inputs them to the controller 11. The control unit 11 determines that the capacitor 25 is deteriorated when the balance between the positive load current and the negative load current exceeds a preset reference. As a reference set in advance, a ratio r (Vld) of absolute values of Vld (+) and Vld (−) is, for example, in a range of 0.9 ≦ r (Vld) ≦ 1.1. In this case, when the control device 13 determines that the capacitor 25 is deteriorated, the control device 13 displays the determination result (alarm) on the information display device 12 such as an LED provided in the vicinity of the illuminating lamp 2, and prompts the user. Notify that. Therefore, the user can prevent deterioration of the capacitor 25 used for the MERS 4 properly and replace it with a new capacitor to prevent the burden on the illumination lamp 2 from increasing.

  The reason why the balance between the positive load voltage and the negative load voltage is deteriorated is that the peak voltage VP of the charging / discharging voltage of the capacitor 25 exceeds the reference voltage TH. Therefore, as in the first embodiment, The control device 13 controls the gate phase angle α of the MERS 4 by using the gate drive signals G1 to G4 to lower the peak voltage VP of the charge / discharge voltage of the capacitor 25 that exceeds the reference voltage TH, so that the user has deteriorated. When the environment in which the capacitor can be immediately replaced is not prepared, or when the lamp 2 cannot be immediately turned off, the burden on the lamp 2 due to the peak voltage VP of the charge / discharge voltage of the capacitor 25 exceeding the reference voltage TH. Can be tentatively maintained while preventing an increase in the size. Then, after the environment in which the capacitor can be replaced is prepared, or after the lighting lamp 2 can be turned off, it is possible to prevent the burden on the lighting lamp 2 from increasing by replacing the capacitor with a new one. it can.

  Next, a fourth embodiment of the present invention will be described. In the first embodiment, the second embodiment, and the third embodiment, when the deterioration of the capacitor 25 is determined by detecting the capacitor voltage, the load current, and the load voltage, respectively, the dimming setting is performed. Regardless of the light control amount set by the unit 5, the gate phase angle α of the gate drive signals G1, G2, G3, G4 input to the MERS 4 is advanced, and the charge / discharge voltage of the capacitor 25 exceeding the reference voltage TH When the environment in which the deteriorated capacitor can be immediately replaced is not prepared by lowering the peak voltage VP, or when the lighting lamp 2 cannot be immediately turned off, the charge / discharge voltage of the capacitor 25 exceeding the reference voltage TH The provisional control for maintaining the lighting is performed while preventing the burden on the illuminating lamp 2 from increasing due to the peak voltage VP. In the form of facilities, by controlling the changeover switch 31, 32, 33, even when the capacitor 25 is deteriorated, and performs control so as to temporarily maintain the lighting.

  In a normal operation in which the capacitor 25 is not deteriorated, the control unit 11 maintains the changeover switches 31 and 32 and turns the changeover switch 33 OFF in order to improve the power factor in the load using the MERS 4. In addition to performing control to maintain, the capacitor voltage detection unit 9, the load current detection unit 8, or the load voltage detection unit 7 determines whether the capacitor 25 has deteriorated by detecting the capacitor voltage, load current, or load voltage. ing.

  When the controller 11 determines the deterioration of the capacitor 25 by detecting the capacitor voltage, the load current, or the load voltage of the capacitor voltage detector 9, the load current detector 8, or the load voltage detector 7, the controller 11 switches Control is performed so that the switch 32 remains ON, the changeover switch 31 is changed from ON to OFF, and the changeover switch 33 is changed from OFF to ON.

  As a result, the MERS 4 and the AC power source 3 are disconnected, a closed loop is formed by the AC power source 3, the changeover switch 33, the illumination lamp 2, and the changeover switch 32, and the power supply voltage V of the AC power supply 3 is directly supplied to the illumination lamp 2. . Therefore, if the user does not have an environment in which the deteriorated capacitor can be immediately replaced, or if the lighting lamp 2 cannot be immediately turned off, the peak voltage VP of the charge / discharge voltage of the capacitor 25 exceeding the reference voltage TH. Thus, it is possible to temporarily maintain the lighting while preventing the burden on the illumination lamp 2 from increasing. Then, after the environment in which the capacitor can be replaced is prepared, or after the lighting lamp 2 can be turned off, it is possible to prevent the burden on the lighting lamp 2 from increasing by replacing the capacitor with a new one. it can.

  According to the present embodiment, MERS 4 that is connected between illuminating lamp 2 and AC power supply 3 as an inductive load and performs a switching operation in accordance with the control signal, and a control device that inputs a drive signal to MERS 4 13 and a dimming amount setting unit 5 for setting the dimming amount of the illuminating lamp 2, and the control device 13 is detected by the capacitor voltage detection unit 6, the load current detection unit 8, or the load voltage detection unit 7. Since the presence or absence of deterioration of the capacitor 25 is determined according to the specific state of the MERS 4, the deterioration of the capacitor 25 used for the MERS 4 is properly determined and the burden on the illumination lamp 2 is increased. It can be prevented in advance.

  Moreover, according to this Embodiment, the capacitor voltage detection part 6 detects the peak voltage VP of the charging / discharging voltage Vc of the capacitor | condenser 25 of MERS4, and the control apparatus 13 presets the peak voltage VP of the charging / discharging voltage Vc. Since the capacitor 25 is determined to be deteriorated when the reference voltage TH exceeded, the deterioration of the capacitor 25 used for the MERS 4 is properly determined, and the burden on the illumination lamp 2 increases. Can be prevented beforehand.

  Further, according to the present embodiment, the load current detection unit 8 detects and controls the positive load current peak Im (+) and the negative load current peak Im (−) flowing from the MERS 4 to the illumination lamp 2. Since the device 13 determines that the capacitor 25 has deteriorated when the balance between the positive load current and the negative load current exceeds a preset reference, the capacitor 25 used for the MERS 4 is deteriorated. It is possible to prevent the burden on the illuminating lamp 2 from increasing as a result of proper determination.

  Further, according to the present embodiment, the load voltage detector 7 detects the peak voltage Vld (+) of the positive load voltage and the peak Vld (−) of the negative load voltage output from the MERS 4 to the illumination lamp 2. Then, the control device 13 determines that the capacitor 25 has deteriorated when the balance between the positive load voltage and the negative load voltage exceeds a preset reference, and thus the capacitor 25 used for the MERS 4 is determined. Therefore, it is possible to prevent the burden on the illumination lamp 2 from increasing.

  In addition, according to the present embodiment, when the control device 13 determines that the capacitor 25 is deteriorated, the power supply voltage of the AC power supply 3 regardless of the dimming amount set by the dimming amount setting unit 5. Since the phase of the gate drive signal with respect to V, that is, the gate phase α is changed, when there is no environment in which the deteriorated capacitor can be immediately replaced, or when the illumination lamp 2 cannot be turned off immediately, the illumination lamp is used. It is possible to temporarily maintain the lighting while preventing the burden from increasing.

  Further, according to the present embodiment, when it is determined that the capacitor 25 is not deteriorated, the control device 13 controls the changeover switches 31 and 32 to be ON so that the AC power supply 3 is input to the MERS 4, and the capacitor 25 When it is determined that there is deterioration, the selector switch 31 is switched from ON to OFF and the selector switch 33 is switched from OFF to ON so that the AC power supply 13 is directly input to the illumination lamp 2 without being input to the MERS 4. Therefore, when the environment in which the deteriorated capacitor 25 can be immediately replaced is not prepared, or when the illumination lamp 2 cannot be immediately turned off, the burden on the illumination lamp 2 is prevented from increasing. The lighting can be temporarily maintained.

  In addition, according to the present embodiment, when the control device 13 determines that the capacitor 25 is deteriorated, the information display unit 12 that displays information on the determination result is provided, so the capacitor used for the MERS 4 The degradation of 25 can be determined quickly and easily.

  In each of the above embodiments, the dimming amount setting unit 5 and the information display unit 12 have been described as separate configurations, but the dimming amount setting unit 5 and the information display unit 12 are provided on a wall or the like. You may make it the structure integrated in a panel integrally. In this case, the information display unit 12 can be configured not only by the LED but also by an LCD (liquid crystal display panel) or other image display device that can display the degree of deterioration of the capacitor 25 by numerical values or images.

  Further, when the information display unit 12 is provided with an LED in the vicinity of the illumination lamp 2 or on the operation panel, the deterioration of the capacitor 25 may be notified by blinking. Further, the degree of deterioration of the capacitor 25 may be expressed by the blinking speed of the LED. In this case, since the blinking speed increases as the deterioration of the capacitor 25 progresses, the urgency of parts replacement can be appropriately notified to the user.

  Further, in each of the above-described embodiments, the deterioration of the capacitor 25 is determined by any one of the detection signals of the load voltage detection unit 8, the load voltage detection unit 7, and the capacitor voltage detection unit 9, but the capacitor voltage detection The deterioration of the capacitor 25 may be determined based on three detection signals from the unit 6, the load current detection unit 8, and the load voltage detection unit 7. In this case, the presence or absence of deterioration of the capacitor 25 can be determined very accurately according to the specific overall state of the MERS 4.

  In each of the above embodiments, the balance of the load current and the load voltage is compared by the peak value, but the balance may be compared by an effective value.

  According to the illuminating lamp control device of the present invention, the control device is capable of degrading the capacitor according to the specific state of the magnetic energy regeneration switch detected by the capacitor voltage detection unit, the load current detection unit, or the load voltage detection unit. Since the presence / absence is determined, it is useful for any system that appropriately determines the deterioration of the capacitor used in the magnetic energy regenerative switch and prevents the burden on the illumination lamp from increasing.

It is a block diagram which shows schematic structure inside the illumination light system which shows embodiment in connection with the illumination light control apparatus of this invention. It is timing explanatory drawing which shows simply the relationship between the power supply voltage of the alternating current power supply in connection with this Embodiment, and the gate drive signal which controls MERS. (A) Timing diagram of power supply voltage (b) Gate drive signal timing diagram when gate phase angle (0 ° <α ≦ 90 °) is set (c) Gate phase angle (90 ° <α <180 °) setting Timing diagram of the gate drive signal at the time It is explanatory drawing which shows the operation | movement inside MERS in connection at the time of a gate phase angle ((alpha) = 0 degree) setting. It is explanatory drawing which shows the relationship with the power supply voltage, gate drive signal, capacitor voltage, and load voltage in connection with the gate phase angle (0 ° <α ≦ 90 °) setting. It is explanatory drawing which shows the operation | movement inside MERS in connection at the time of a gate phase angle (0 degree <(alpha) <= 90 degree) setting. It is explanatory drawing which shows the operation | movement inside MERS in connection at the time of a gate phase angle (0 degree <(alpha) <= 90 degree) setting. It is explanatory drawing which shows simply the relationship between the power supply voltage, gate drive signal, capacitor voltage, and load voltage in connection with the setting of the gate phase angle (90 ° <α <180 °). It is explanatory drawing which shows the operation | movement inside MERS in connection at the time of a gate phase angle (90 degrees <(alpha) <180 degrees) setting. It is explanatory drawing which shows the operation | movement inside MERS in connection at the time of a gate phase angle (90 degrees <(alpha) <180 degrees) setting. It is explanatory drawing which shows the operation | movement inside MERS in connection at the time of a gate phase angle (90 degrees <(alpha) <180 degrees) setting. It is a figure which shows simply the relationship between the drive signal input into MERS when a capacitor | condenser is normal, and a capacitor | condenser voltage. It is a wave form diagram which shows briefly the specific state of MERS for demonstrating the determination method of deterioration of a capacitor in a 1st embodiment. It is explanatory drawing for maintaining the lighting, preventing beforehand that the burden concerning an illumination lamp becomes large by the charging / discharging voltage of the capacitor | condenser exceeding the reference voltage TH. It is a wave form diagram which shows briefly the specific state of MERS for demonstrating the determination method of deterioration of a capacitor in a 2nd embodiment. It is a wave form diagram which shows briefly the specific state of MERS for demonstrating the determination method of deterioration of a capacitor in a 3rd embodiment.

Explanation of symbols

1 Illumination lamp system (illumination lamp control device)
2 Lighting 3 AC power 4 MERS (Magnetic energy regeneration switch)
5 Light control amount setting section (light control light setting means)
6 Power supply voltage detector 7 Load voltage detector (load voltage detector)
8 Load current detector (load current detection means)
9 Capacitor voltage detector (capacitor voltage detector)
DESCRIPTION OF SYMBOLS 10 Power supply phase detection part 11 Control part 12 Information display part (information display means)
13 Controller 31 Changeover switch (switching means)
32 changeover switch (switching means)
33 changeover switch (switching means)

Claims (7)

Absorbing the magnetic energy generated by the first to fourth semiconductor switching elements connected between the illuminating lamp as an inductive load and the AC power source and performing the switching operation according to the driving signal and the illuminating lamp, respectively. A magnetic energy regenerative switch that has a capacitor to regenerate, outputs a load power for adjusting the power supply voltage of the AC power supply to light the illumination lamp, and a control device that inputs a drive signal to the magnetic energy regenerative switch; , A dimming amount setting means for setting the dimming amount of the illumination light, and the control device outputs the load power according to the dimming amount set by the dimming amount setting means. An illumination lamp control device that controls the phase of a drive signal with respect to a power supply,
The controller is
An illuminating lamp control device comprising: a state detecting unit that detects a specific state of the magnetic energy regenerative switch; and determining whether or not the capacitor has deteriorated according to the specific state detected by the state detecting unit. .   The state detection means detects a state of charge / discharge voltage of the capacitor of the magnetic energy regenerative switch, and the control device deteriorates to the capacitor when the state of charge / discharge exceeds a preset reference. The illumination lamp control device according to claim 1, wherein the illumination lamp control device determines that there is a lamp.   The state detection means detects a state of a load current flowing from the magnetic energy regeneration switch to the illuminating lamp, and the control device applies a current to the capacitor when the state of the load current exceeds a preset reference. The illumination light control device according to claim 1, wherein it is determined that there is deterioration.   The state detection means detects a state of a load voltage output from the magnetic energy regeneration switch to the illuminating lamp, and the control device detects the load voltage when the load voltage state exceeds a preset reference. 2. The illuminating lamp control device according to claim 1, wherein it is determined that the capacitor is deteriorated.   When determining that the capacitor is deteriorated, the control device changes the phase of the drive signal to the AC power supply regardless of the dimming amount set by the dimming amount setting means. The illumination light control device according to claim 1, 2, 3, or 4.   In accordance with the control of the control device, it comprises switching means for switching whether to input the AC power source to the magnetic energy regeneration switch or directly to the illuminating lamp, and the control device has no deterioration in the capacitor When it is determined, the switching means is controlled to input the AC power source to the magnetic energy regenerative switch, and when it is determined that the capacitor is deteriorated, the AC power source is directly input to the illumination lamp. The illuminating lamp control device according to claim 1, wherein the switching means is controlled. 5. The illuminating lamp control device according to claim 1, further comprising information display means for displaying information of a determination result when the control device determines that the capacitor is deteriorated. .