JP2009187297A - Built-in apparatus and its high-speed activation method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform high-speed activation from an energy saving state including power OFF even in a state where the register of another controller cannot be directly accessed from one controller, in a built-in apparatus having the plurality of controllers. <P>SOLUTION: In the built-in apparatus which includes the plurality of controllers and requires initialization of a bus connecting at least a pair of controllers when power is supplied, each controller has a high-speed activation means for the high-speed restoration of each controller from a power OFF state to a power ON state, and the built-in apparatus includes a communication start judging means for detecting bus initialization information and a communicable state in each controller, determining the start-up time of the built-in apparatus from the obtained information, and starting communication. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an embedded device having a plurality of control devices and capable of high-speed start-up from an energy saving state including power-off even in a state where one control device cannot directly access the register of the other control device, and It relates to the fast startup method.

  In recent years, from the viewpoint of energy saving, there is an increasing demand for devices that can be started at high speed while minimizing power consumption. Since the ultimate energy-saving state is zero power, high-speed start-up from power-off (some devices with internal batteries such as watches do not correspond to this but are weak power and are essentially zero) The technology that can be used has been in the limelight, and the hibernation technology can be cited as a known technology. Hibernation is the storage of the various hardware initialization information and register information in the volatile memory (RAM) at power-on in a ROM that is a non-volatile memory immediately before power-off. The stored information can be immediately written back, and time-consuming initial settings and various communication settings can be omitted to achieve high-speed startup.

For example, Patent Document 1 introduces an invention for further high-speed startup based on hibernation, but the conventional technology using hibernation has basically one control device (CPU). This is made on the assumption that the control device can directly set the registers of the devices connected to it. For example, a general PC is composed of a control device 110 and subordinate devices 120 and 130 as shown in the schematic diagram of FIG. The control device 110 includes a CPU 111 for performing calculations and processing, a ROM 114 as a nonvolatile memory for storing programs 115, data 116, 117, and the like, and a RAM 113 as a volatile memory. Access to the registers 122 and 132 deployed in the ASICs 121 and 131 is performed by the control device 110. Therefore, when returning from the energy-saving state, the controller can immediately write back all registers to the same state (initial setting) as before the energy-saving transition, compared to normal startup without hibernation. Thus, the time required for initial setting of the device can be greatly reduced, and high speed startup can be realized.
JP 2005-316855 A

  However, particularly in an embedded device such as an image processing device, there are a plurality of control devices, and each register is managed by each control device. Therefore, one control device directly accesses the register of the other control device. Is difficult. FIG. 8 shows a schematic diagram of a general image processing apparatus. The control device 2100 is an engine device, for example, and performs communication with the scanner 2400, the plotter 2500, and the control device 2200, and mainly performs image processing and engine control. The control device 2100 is a control device, for example, and is responsible for communication with the control devices 2200 and 2300, the external network, printer language processing, partial image processing, and the like. The control device 2300 is, for example, an operation / display device, and receives an operation from a user, displays necessary information, and communicates with the control device 2200. Each control device is mainly composed of a central processing unit (CPU) that performs calculation and processing of programs and data, a ROM of nonvolatile memory storing programs and data, and a RAM of volatile memory. The control device 2300 further includes a liquid crystal display (LCD) 2311 for presenting information to the user. As described above, each control device manages each register. For example, the CPU 2101 cannot directly access the registers 2202 and 2302.

  That is, when the conventional technique is applied to the image processing apparatus as described above, hibernation is implemented only in the main control apparatus (for example, the control apparatus 2100), but the registers 2202 and 2302 in other control apparatuses are mounted. Since direct access is not possible, hibernation can be applied only to the control device 2100. Even if the control device 2100 starts up immediately, the control devices 2200 and 2300 are initialized by each control device as in normal startup. After the initialization based on the above, the bus is initialized to communicate with the other control device, and the register is finally accessed, so the overall startup time cannot be shortened.

  The present invention has been made in view of the above problems, and an object of the present invention is to enable high-speed activation by applying a hibernation technique to each control device in an embedded device having a plurality of control devices.

  In order to solve the above-described problems, an embedded device according to the present invention includes a plurality of control devices, and each of the controls is included in an embedded device that requires initialization of a bus connecting at least one pair of control devices when the power is turned on. Each control device has high-speed start-up means for returning the device from the power-off state to the power-on state at high speed, and detects that the bus initialization information and the communicable state in each control device are detected. And a communication start determining means for determining a rise time of the embedded device from the obtained information and starting communication.

  The communication start determining means obtains a communicable time from information stored in advance in a nonvolatile memory.

  The communication start determining means detects a communicable time by monitoring each other's power.

  The communication start determining means receives a communication enable signal from another control device by polling.

  The communication start determination means receives a communication enable signal from another control device by an interrupt signal.

  Furthermore, it has an instruction holding means for holding a user's instruction, and transfers the instruction held by the instruction holding means after activation of the other control device.

  Further, the fast startup method of the embedded device according to the present invention has a plurality of control devices, and the fast startup method of the embedded device requires initialization setting of a bus connecting at least one pair of control devices when the power is turned on. Each control device has a high-speed start-up step for allowing each control device to quickly return from the power-off state to the power-on state, and that the bus initialization information and the communication-enabled state in each control device have been established. A communication start determination step of detecting and determining a rise time of the embedded device from the obtained information and starting communication.

  The communication start determination step is characterized in that a communicable time is obtained from information stored in advance in a nonvolatile memory.

  The communication start determining step is characterized by detecting a communicable time by monitoring each other's power.

  In the communication start determination step, a communicable signal from another control device is received by polling.

  In the communication start determination step, a communication enable signal from another control device is received by an interrupt signal.

  Furthermore, it has a command holding step for holding a user command, and transfers the command held in the command holding step after the other control device is activated.

  According to the present invention, even in a state where an embedded device having a plurality of control devices cannot directly access a register of the other control device from one control device, high-speed startup from an energy saving state including power-off is possible.

  Hereinafter, preferred embodiments of the present invention will be described in detail.

(Embodiment 1)
FIG. 1 is a diagram showing a flow when normal startup and hibernation are used. In the figure, A, B, and C are flows in an arbitrary control device in the image processing apparatus. A shows a flow at the time of normal startup. After the power is turned on (step S11), the CPU refers to the address of the reset release word in the nonvolatile memory or executes the first instruction based on the instruction. (Boot) (step S12). Subsequently, the program (OS), data loading, and initialization of each peripheral hardware device are performed (step S13), the bus between the control devices is initialized (step S14), and communication is enabled (step S15). As soon as the preparation is completed, the display unit displays a start-up completion message (step S16). B and C represent the flow when starting up with hibernation, and the operation performed in steps A13 and S14 in A is immediately expanded from the ROM in step S23, and the time is greatly increased. Shortened. In addition, the flow other than steps S13 and S14 is the same, and the time required for this is the same or slightly different, so the overall startup time is greatly shortened.

  By the way, in the image processing apparatus, even if hibernation can be used for only one control apparatus using the conventional technology, the completion of the start-up is displayed on the display unit upon completion of all the control apparatuses. It will wait for the completion of the performed control device. Therefore, by applying hibernation technology to all the control devices in the image processing device, there is a difference in the start time for each CPU of each control device, but the display unit indicates that it is completed much earlier than during normal start-up. It is possible to display. In displaying the completion at that time, it is necessary to match the latest rising edge.

  In the embodiment of the present invention, as shown in FIG. 2, the conventional image processing apparatus includes hibernation data 2107, 2207, and 2307 in the non-volatile memories (ROM) 2104, 2204, and 2304, respectively. High-speed startup is realized by providing communication start determination units 2108, 2208, and 2308 in 2201 and 2201, respectively.

  In the present embodiment, means for detecting power-on from the power monitoring device in the CPU of each control device is used as means for detecting the mutual communicable time. That is, when the power of each CPU is turned on, a power-on signal is output from each power monitoring device that monitors the power of each CPU and is detected by the communication start determination unit of each control device. The signal is output in consideration of a delay from the power-on to the startup of the control device, and it is determined that all the control devices have been started up by detecting the number of signals of the control devices other than itself.

(Embodiment 2)
FIG. 3 is a configuration diagram of an image processing apparatus according to another embodiment of the present invention. As a means for detecting the communication possible time, the longest activation of each control apparatus in the nonvolatile memories 2104, 2204, and 2304, respectively. Time data 2109, 2209, and 2309 are stored. The longest startup time data 2109, 2209, and 2309 are determined in advance by performing experiments and estimations during development, and the startup time of the slowest startup device is used as a setting value for startup completion display. In addition, the time set at that time needs to be set with a margin, and the setting must be changed each time the control device with the longest startup time is replaced. In this embodiment, when the hibernation data is developed in each control device, the communication start determination units 2108, 2208, and 2308 are activated, and after waiting for a set time in each ROM 2104, 2204, and 2304, the other Communication with the control device is started, and a start-up completion message is displayed on the display unit.

(Embodiment 3)
FIG. 4 is a diagram showing an embodiment when the CPUs are connected by general purpose I / O ports (GPIO) 2601 and 2602 in order to detect the respective rising times without setting them in advance. When the hibernation is completed in each control device, it is possible to start up at a higher speed by transmitting a startup completion signal for informing the completion of startup through a dedicated GPIO. Here, as an example, each communication start determination unit receives a standby signal by polling.

(Embodiment 4)
In the third embodiment, since the standby signal is inquired and received at a certain period, the activation completion signal of each control device cannot be grasped simultaneously with the rise. Therefore, in the present embodiment, an activation completion signal is received as an interrupt signal instead of the polling means. As a result, the activation time can be further reduced as compared with the case where the polling means is used. The interrupt signal at this time continues to be transmitted periodically at an interval of at least 1 second until the confirmation response signal is returned from the target device, and when the communication start determination unit determines that all the control devices have started up This is canceled by a bus command.

(Embodiment 5)
In the above embodiment, after waiting for all the units to return due to hibernation, the operation / display device displays completion of activation and accepts the user's operation. However, since the operation from the user is received in advance and the command is executed at the same time as the start is completed, in this embodiment, the operation from the user is accepted during the standby time when the operation / display device starts up earlier than other control devices. It is possible to be done. Thereby, although it is a slight difference in time, the activation time can be further shortened. FIG. 5 shows an embodiment of the present invention having an instruction holding unit 2310 for holding an instruction from a user in order to realize the above, and FIG. 6 shows an operation flow at that time. After returning from the hibernation (step S61), the control device 2300 confirms whether the other control device has returned from the hibernation by the communication start determination unit 2308 (step S62). If it is restored, it is not necessary to display the fact that the preparation is complete on the display unit 2311, accept the operation from the user, and operate the instruction holding means (step S63). On the other hand, when it is determined that any one of the other control devices has not started, the control device 2300 displays, for example, OK on the display unit 2311, accepts an operation by the user, and holds the command. This is held in the unit 2310 (step S64). Next, the communication start determination unit 2308 checks whether all the control devices have started up (step S65). If the start of all the devices is not confirmed, the process returns to step S64, and if the start of all the devices is confirmed, the control starts. The command held in the command holding unit 2310 is transmitted from the device 2300 to the other control device and executed (step S66).

  The present invention has been described above by the preferred embodiments of the present invention. While the invention has been described with reference to specific embodiments, various modifications and changes may be made to the embodiments without departing from the broad spirit and scope of the invention as defined in the claims. Obviously you can. In other words, the present invention should not be construed as being limited by the details of the specific examples and the accompanying drawings.

It is a figure which shows the flow by normal starting and hibernation starting in a control apparatus. 1 is a diagram illustrating a system configuration of an image processing apparatus according to an embodiment of the present invention. 1 is a diagram illustrating a system configuration of an image processing apparatus according to an embodiment of the present invention. 1 is a diagram illustrating a system configuration of an image processing apparatus according to an embodiment of the present invention. 1 is a diagram illustrating a system configuration of an image processing apparatus according to an embodiment of the present invention. 3 is a flowchart according to an embodiment of the present invention. It is a figure which shows the system configuration | structure in the conventional PC. It is a figure which shows the system configuration | structure in the conventional image processing apparatus.

Explanation of symbols

110 Controller 111 CPU
112 Register 113 RAM
114 ROM
115 program 116 data 117 hibernation data 134 LCD
2100 Controller 2101 CPU
2102 Register 2103 RAM
2104 ROM
2105 Program 2106 Data 2107 Hibernation data 2108 Communication start determination unit 2109 Longest activation time data 2310 Instruction holding unit 2311 LCD

Claims (12)

In an embedded device that has multiple control devices and requires initialization of a bus connecting at least one pair of control devices when the power is turned on,
Each of the control devices has high-speed start-up means for quickly returning from the power-off state to the power-on state.
Communication start determination means for detecting the bus initialization information in each control device and the communication enabled state, determining the rise time of the embedded device from the obtained information, and starting communication. Embedded equipment characterized by   The embedded device according to claim 1, wherein the communication start determination unit obtains a communicable time from information stored in advance in a nonvolatile memory.   The embedded device according to claim 1, wherein the communication start determination unit detects a communicable time by monitoring each other's power supply.   The embedded device according to any one of claims 1 to 3, wherein the communication start determination unit receives a communication enable signal from another control device by polling.   5. The embedded device according to claim 1, wherein the communication start determination unit receives a communication enable signal from another control device by an interrupt signal. 6. Furthermore, it has an instruction holding means for holding the user's instruction,
The embedded device according to claim 1, wherein the command held by the command holding unit is transferred after the other control device is activated. In a high-speed startup method of an embedded device that has a plurality of control devices and requires initialization setting of a bus connecting at least one pair of control devices when the power is turned on,
Each control device has a high-speed start-up step for the control devices to quickly return from the power-off state to the power-on state,
A communication start determination step of detecting the bus initialization information in each control device and the communication enabled state, determining the rise time of the embedded device from the obtained information, and starting communication. Fast start-up method for embedded devices.   8. The embedded device high-speed activation method according to claim 7, wherein the communication start determination step obtains a communicable time from information stored in advance in a nonvolatile memory.   9. The embedded device high-speed activation method according to claim 7, wherein the communication start determination step detects a communicable time by monitoring each other's power supply.   10. The embedded device high-speed activation method according to claim 7, wherein the communication start determination step receives a communication enable signal from another control device by polling. 11.   11. The embedded device high-speed activation method according to claim 7, wherein in the communication start determination step, a communication enable signal from another control device is received by an interrupt signal. Furthermore, it has an instruction holding step for holding a user instruction,
12. The embedded device high-speed startup method according to claim 7, wherein the command held in the command holding step is transferred after the other control device is started.

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