JP2009164911A - Buffering device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the frequency of the occurrence for request for retransmission in a router, or the like. <P>SOLUTION: In a buffer device equipped with a FIFO memory, which writes in normal data, in the order of the receipt of input and reads out the data, in the order of writing in, RED data is written into a free space of the memory for defining the data intended for the FIFO processing; and when the normal data need to be written in into the space wherein the RED data is written in, the normal data are overwritten on the RED data. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a buffer device that temporarily stores data communicated over a network by a router or the like, and more particularly to a buffer device that has been improved in processing for receiving data marked to be discarded by RED.

  The normal operation of queues at routers in the network is a method called tail drop, which means that all overflow traffic is discarded. However, with this method, fairness may not be maintained for certain traffic, which causes a retransmission collision. Therefore, a method called RED (Random Early Detection) is provided by the Linux kernel or the like (see Non-Patent Document 1).

RED is a scheme that limits traffic randomly selected from a flow before the queue reaches a hard limit. With this method, a congested connection can be decelerated more gently, and retransmission collisions can be prevented.
S. Floyd and V. Jacobson, "Random Early Detection Gataways for Congestion Avoidance", IEEE / ACM Transaction on Networking, Vol. 1, pp. 397-413, 1993

  However, in the RED, since data is discarded before the queue reaches the limit, there is a possibility that even data that should not have been originally discarded can be discarded. In this case, there is a possibility that a retransmission request that should not have occurred originally occurs and extra traffic is generated.

  The object of the present invention is to store the data that is marked to be discarded by RED once in the memory so that if the memory does not reach the limit, the data is transferred and the frequency of retransmission requests is generated. To provide a buffer device which can be reduced.

To achieve the above object, according to the first aspect of the present invention, in a buffer device having a first-in first-out memory in which normal data is written in the order of input and read in the order of writing, the data marked to be discarded by RED is free in the memory. When it is necessary to write the normal data to the area where the data marked to be discarded by the RED is written, the normal data is marked to be discarded by the RED. It is characterized by overwriting data.
According to a second aspect of the present invention, in the buffer device according to the first aspect, writing of data marked to be discarded by the RED is performed according to the size of the free area of the memory.
According to a third aspect of the present invention, in the buffer device according to the first aspect, when the filling rate of the memory constantly exceeds a predetermined value, data marked as discarded by the RED is not written. It is characterized by that.
According to a fourth aspect of the present invention, in the buffer device according to the third aspect, the filling rate of the memory is calculated only by the normal data written in the memory.

  According to the present invention, even data marked to be discarded by RED is temporarily stored in the memory. Then, after the data marked to be discarded by RED is stored in the memory, the free space of the memory is reduced, and when normal data is sent there, the data marked to be discarded by RED is the normal data. Overwritten. For this reason, even data that is marked to be discarded by RED can be transmitted / received without disturbing the function of RED, and the number of retransmission requests that occur on the network can be reduced by discarding. In addition, when the filling rate of the memory constantly exceeds a predetermined value, writing of data marked when discarded by RED is not performed, and therefore, useless writing of data marked when discarded by RED is prevented. An increase in power consumption can be suppressed, and the present invention can be implemented with power consumption that is not so different from that of a normal FIFO.

  In the present invention, data marked to be discarded by RED (hereinafter referred to as “RED data”) is stored at a certain address on the memory. However, if the address storing the RED data is not marked by discarding by RED. When data (hereinafter referred to as “normal data”) must be stored, the normal data was overwritten on the RED data to give priority to the normal data, and the normal data and the overwritten data were not overwritten without upsetting the order of writing to the memory. Addresses are managed so that RED data can be read.

  In the present invention, the RED data is temporarily stored. However, in a situation where the filling rate of the memory is constantly maintained at a certain ratio, even if the RED data is stored, it is eventually discarded. Under the circumstances, the circuit consumes power wastefully, and the RED data is stored only when it is meaningful to store the RED data while dynamically monitoring the filling rate of the memory.

  In the present invention, the filling rate of the memory is calculated only by the area used by the normal data, and the area used by the RED data is regarded as not used.

  The present invention is based on the FIFO, and normal data is written in order from the beginning of the address, and is read in the order of writing. The RED data is written in an empty area of the memory. The memory map is shown in FIG.

  FIG. 2 shows the configuration of the buffer device according to the embodiment of the present invention. The buffer device according to the present embodiment includes a reception controller 10, a transmission controller 20, an address management unit 30, a memory 40 including a FIFO, and a monitor unit 50 that monitors a filling rate of the memory 40.

  The reception controller 10 checks whether the input data is RED data or normal data. Further, the packet size is specified from the header of the data packet, the burst length (data size) is calculated, and the result is transmitted to the address management unit 30. Further, when the remaining empty size of the memory 40 is received from the monitor unit 50 and the size of the input data exceeds the empty size, reception of the data is rejected regardless of normal data or RED data. If the monitor unit 50 determines that the filling rate of the memory 40 is constantly high (for example, over 50%) (for example, exceeding 50%), the RED data is discarded.

  The transmission controller 20 receives the data of the address of the memory 40 designated by the address management unit 30, specifies the size of the data to be read from this data, calculates the burst length, returns the value to the address management unit 30, Generate an address to read.

  The address management unit 30 manages reception addresses and transmission addresses. This address management is the main point of this embodiment. That is, information indicating whether RED is valid is received from the reception controller 10 and the transmission controller 20, and an address to be passed to the memory 40 is generated based on the information. A detailed method of address management will be described later.

  As the memory 40, a memory in which a writing side port and a reading side port are separately prepared is used. That is, it is a memory (FIFO) that can be accessed simultaneously for writing and reading.

  The monitor unit 50 receives the current write address and read address from the address management unit 30, calculates the remaining capacity of the memory 40 based on the information, and passes the information to the reception controller 10. Further, the change in the filling rate of the memory 40 is monitored, and when the filling rate is constantly high, the information is passed to the reception controller 10 to help determine whether to store the RED data.

  The buffer device of the present embodiment can be realized by mounting the above components. Next, the address management method will be described. FIG. 3 shows the configuration of the address management unit 30. Reference numeral 31 denotes a reception address management unit that manages reception addresses, and reference numeral 32 denotes a transmission address management unit that manages transmission addresses. Reference numeral 33 denotes an address memory composed of FIFO, which stores an address storing RED data and an address storing normal data in the memory 40. For example, in FIG. 1, when the RED data D6 is written when the normal data write address (write_ptr) in the memory 40 is at the position shown in FIG. 1, the value of the write address (write_ptr) and the RED data are written in the address memory 33. The address (red_write_ptr) of the memory area in which D6 is written is stored.

  In FIG. 3, (rx_en) is a reception enable signal asserted when data reception is possible, (red_en) is a RED enable signal asserted when reception data is RED data, and (rx_burst_cnt) is a burst length of reception data. Further, (tx_en) is a transmission enable signal asserted when data transmission is possible, and (tx_burst_cnt) is a burst length of transmission data. Further, (rx_address) is a reception address (equivalent to (write_ptr) and (red_write_ptr) described later), and (tx_address) is a transmission address (equivalent to (read_ptr) described later).

  The operation of the reception address management unit 31 at the time of reception will be described with reference to the explanatory diagram of the memory 40 in FIG. 4 and the flowchart in FIG. If the RED enable signal (red_en) is not asserted in the reception address management unit 31 (S1-NO), the reception data is normal data, and an address (write_ptr) for writing this is generated. This address is realized by incrementing from the initial value (0x0).

  When the size of the received normal data is smaller than the free capacity of the memory 40 (S2) and the address memory 33 is not empty (S3-NO), that is, when RED data is written, it is stored in the address memory 33. The value of the existing RED write address (red_write_ptr) is checked (S4). If the value of the RED write address (red_write_ptr) matches the value of the generated write address (write_ptr) (S5-YES), the address memory After updating the read address (read_ptr) 33, normal data is written to the write address (write_ptr) of the memory 40 (S6). At this time, the RED data of the matched RED write address (red_write_ptr) is overwritten and discarded. If they do not match (S5-NO), normal data is written in the normal area of the memory 40 (S7). If the size of the received normal data is larger than the free capacity of the memory 40 (S2-NO), the normal data is discarded (S8). When the address memory 33 is empty (S3-YES), normal data is written to the write address (write_ptr) as it is (S7).

  On the other hand, when the RED enable signal (red_en) is asserted (S1-YES), the received data is RED data. First, the read address (read_ptr) at that time is referred to from the transmission address management unit 32, and based on this value, the current RED head in which RED data is stored is stored in order to secure a memory area for storing RED data. An address (red_top_adr) is calculated (S9). Next, the value of the calculated RED head address (red_top_adr) is compared with the value of the RED write address (red_write_ptr) for storing the received RED data. If it is larger (S10-YES), this value is adopted as the RED write address (red_write_ptr) (S11), and if it is smaller, the RED write address (red_write_ptr) is adopted as it is (S12).

  Next, a free area of the memory 40 for storing RED data is calculated from the value of the RED write address (red_write_ptr) and the value of the read address (read_ptr) (S13), and the free capacity of the memory 40 is calculated from the size of the RED data. When it is larger (S14-NO), the RED data is written to the RED write address (red_write_ptr) (S15). At this time, the RED write address actually adopted (red_write_ptr) and the normal data write address (write_ptr) at that time are stored in the address memory 33. When the free capacity of the memory 40 is smaller than the size of the RED data (S14-YES), the RED data is discarded (S16).

  The operation during transmission will be described with reference to the flowchart of FIG. If the address memory 33 is empty (S21-YES), that is, if RED data is not stored, data is read and transmitted sequentially from the read address (read_ptr) of the memory 40 (S22).

  On the other hand, when the address memory 33 is not empty (S21-NO), that is, when the RED data is stored, the normal data when the RED data is written among the data stored in the address memory 33 is stored. The value of (write_tpr) indicating the address to be read is checked (S23), and the value of the address (rwite_ptr) is compared with the value of the current read address (read_ptr) (S24-NO). Normal data is read and transmitted from the address indicated by the read address (read_ptr) (S25). If they match (S24-YES), the RED data is read from the address indicated by the RED write address (red_write_ptr) stored in the address memory 33 and transmitted (S26). At this time, the read address (read_ptr) of the address memory 33 is updated.

  By performing such address management, data can be read out in the order in which they are written while holding RED data. By the way, when the filling rate of the memory 40 constantly exceeds 50%, even if the RED data is temporarily stored, the RED data is overwritten by the received normal data without being read out. Therefore, enabling the function for storing the RED data in such a situation causes a waste of power, and thus a function for stopping this function is provided. This is realized by the block of the monitor unit 50.

  The monitor unit 50 receives values of the normal data write address (write_ptr) and read address (read_ptr) from the address memory 33, and calculates the filling rate of the memory 40 based on these values. Further, when the RED head address (red_top_adr) in FIG. 4 is updated, the capacity of the memory area where the RED data can be used is set to full, and the filling rate is monitored each time it is written. If the remaining capacity of this area is smaller than the size of the RED data to be written, it is not written. The filling rate of the memory 40 is monitored, and when the filling rate is always a high value (for example, exceeding 50%), the state is notified to the reception controller 10 so that RED data is not accepted. .

  However, when a huge amount of data is received in a burst, it is considered that the filling rate of the memory 40 temporarily increases. In this case, since the filling rate temporarily increases, the RED system marks the data to be discarded. However, if the burst does not become full even if it includes RED data, it is effective to operate the above function. Therefore, when the filling rate of the memory 40 increases transiently while monitoring, the above function is operated. Thereafter, if the filling rate of the memory 40 does not decrease after a while, the above function is stopped.

It is explanatory drawing of the memory of a present Example. It is a block diagram which shows the structure of the buffer apparatus of a present Example. It is a block diagram which shows the structure of an address management part. It is explanatory drawing at the time of writing received data in memory. It is a flowchart of the operation | movement which writes reception data in memory. It is a flowchart of the operation | movement which reads transmission data from memory.

Explanation of symbols

10: Reception controller 20: Transmission controller 30: Address management unit 31: Reception address management unit 32: Transmission address management unit 33: Address memory 40: Memory 50: Monitor unit

Claims (4)

In a buffer device equipped with a first-in first-out memory for writing normal data in the order of input and reading in the order of writing,
It becomes necessary to write the data marked to be discarded by RED into an empty area of the memory for the first-in first-out processing, and to write the normal data to the area where the data marked to be discarded by RED is written. When the normal data is discarded by the RED, the marked data is overwritten and written. The buffer device according to claim 1,
A buffer device, wherein writing of data marked to be discarded by the RED is performed according to a size of an empty area of the memory. The buffer device according to claim 1,
When the filling rate of the memory constantly exceeds a predetermined value, data marked as discarded by the RED is not written. The buffer device according to claim 3, wherein
The buffer device characterized in that the filling rate of the memory is calculated only by the normal data written in the memory.

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