JP2009147526A - Filter apparatus and receiving apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce a circuit area and a circuit current by reducing the number of circuit elements. <P>SOLUTION: A switch SW10 is inserted into a route from an inverted output terminal of an amplifier 51 up to an inverted input terminal of an amplifier 50, a switch SW11 is inserted into a route from a non-inverted output terminal of the amplifier 51 up to a non-inverted input terminal of the amplifier 50, a switch SW12 is inserted into a route from a non-inverted output terminal of the amplifier 50 up to a non-inverted input terminal of the amplifier 51, and a switch SW13 is inserted into a route from an inverted output terminal of the amplifier 50 up to a non-inverted input terminal of the amplifier 51. In response to a control signal S14, ON/OFF of the switches (SW10, SW11, SW12, SW13) is controlled and the connection/disconnection of the routes is controlled to switch a band to be band-limited to a low-IF type band or a zero-IF type band. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a filter device capable of supporting a plurality of decoding methods (Low-IF method and Zero-IF method) and a receiving device using the filter device. In particular, the present invention relates to the field of television receivers and communication terminals including a low-IF or zero-IF receiver circuit.

  In recent years, Japanese television receivers are shifting to digital broadcasting represented by 1 seg and 12 seg instead of conventional analog broadcasting. The Japanese system is called ISDB-T (Integrated Services Digital Broadcasting-Terrestrial), which uses the Low-IF method. On the other hand, the European system is called DVB-T (Digital Video Broadcasting-Terrestrial), and adopts the Low-IF method or the Zero-IF method. Furthermore, the DV-H (Digital Video Broadcasting-Handheld) for European mobile phones uses the Zero-IF method.

  In such Low-IF and Zero-IF receivers, the characteristics of the channel selection filter previously realized by SAW filters (surface acoustic wave filters) are realized by active filters consisting of RC elements inside the semiconductor. is doing. This is to reduce cost and size.

  Currently, digital broadcast receivers around the world are divided into Low-IF and Zero-IF systems. In a Low-IF receiver, the receiving circuit and the decoding circuit are compatible only with the Low-IF method. In a Zero-IF receiver, the receiving circuit and decoding circuit are compatible only with the Zero-IF method. If both systems can be supported by the same receiving circuit, it is possible to cope with digital broadcasting in the world, which is a great merit. Therefore, such a system is required.

  Japanese Patent No. 3700933 (Patent Document 1), which is a conventional example of a receiving apparatus that can support both the Low-IF method and the Zero-IF method, will be described with reference to FIG. However, this conventional example relates to a communication terminal, not a television receiver. The receiving device is roughly divided into a tuner circuit 13a that selects a desired channel frequency from the high-frequency signal received by the antenna 10 and converts it to a baseband signal, and a received signal from the baseband signal output from the tuner circuit 13a. And a decoding circuit 15 for decoding.

  First, the high-frequency signal received by the antenna 10 is input to the tuner circuit 13 a via the RF filter circuit 11 and the low noise amplifier 12.

  The tuner circuit 13a includes an I signal mixer circuit 20, a Q signal mixer circuit 21, a filter circuit 22, GCA circuits 23 and 24, a phase shifter 30, a local oscillator 31, a mixer circuit 25, a local oscillator 32, a filter circuit 26, It consists of

  Reference numeral S <b> 20 indicates an output signal of the I signal mixer circuit 20. Reference numeral S21 indicates an output signal of the Q signal mixer circuit 21. Reference numerals S22I and S22Q indicate an I output signal and a Q output signal of the filter circuit 22, respectively. Reference numerals S23 and S24 indicate output signals of the GCA circuits 23 and 24, respectively. Reference numerals S25I and S25Q indicate an I output signal and a Q output signal of the mixer circuit 25, respectively. Reference numerals S26I and S26Q indicate an I output signal and a Q output signal of the filter circuit 26, respectively. Reference numeral S <b> 14 indicates an output signal of the receiver mode setting unit 14. Reference numeral S15 indicates an output signal of the decoding circuit 15.

  In the Zero-IF method, in the I signal mixer circuit 20 and the Q signal mixer circuit 21 which are orthogonal mixer circuits, a pair of orthogonal local oscillation signals having substantially the same frequency as the reception signal and the reception amplified by the low noise amplifier 12 are received. By mixing the signals, baseband I signals S20 and Q signals S21 having an orthogonal relationship are generated. Next, after the unnecessary wave is removed by limiting the band of the I signal S20 and the Q signal S21 by the channel selection filter circuit 22, the GCA circuits 23 and 24 amplify it to a predetermined level. In the Zero-IF method, the selector switches SW3 and SW4 select the output signals S23 and S24 of the GCA circuits 23 and 24 based on the output signal S14 from the receiver mode setting unit 14, and therefore the GCA circuits 23 and 24 The output signals S23 and S24 are decoded by the decoding circuit 15.

  On the other hand, the Low-IF method will be described with reference to FIG. In the Low-IF method, the I signal mixer circuit 20 and the Q signal mixer circuit 21 are composed of a pair of orthogonal local oscillation signals offset from the received signal by a frequency corresponding to 1/2 of the channel interval and the low noise amplifier 12. By mixing the amplified signals, baseband I signals and Q signals IF (intermediate frequency) signals S20 and S21 that are orthogonal to each other are generated. Next, unnecessary waves are removed by limiting the band of the I signal S20 and the Q signal S21 by the channel selection filter 22, and then the GCA circuits 23 and 24 amplify the signal to a predetermined level.

  Thereafter, the mixer circuit 25 mixes a pair of orthogonal local oscillation signals having substantially the same frequency as the IF frequency and the IF signals S23 and S24 of the I signal and the Q signal, thereby generating an orthogonal baseband I signal S25I. , Q signal S25Q is generated. Next, an unnecessary wave is removed by the channel selection filter circuit 26. In the Low-IF method, the selector switches SW3 and SW4 select the output signals S25I and S25Q of the mixer circuit 25 based on the output signal S14 from the receiver mode setting unit 14, and therefore the output signals S25I and S25I of the mixer circuit 25 are selected. S25Q is decoded by the decoding circuit 15. The channel selection filter circuit 26 compensates for the amount of attenuation that is insufficient in the channel selection filter circuit 22.

  Further, the characteristic switching in each block for achieving both the Low-IF method and the Zero-IF method will be described. The channel selection filter circuits 22 and 26 are composed of Gm-C filters that combine LPF and HPF. By controlling the operating current of each Gm amplifier, the cutoff frequency and Q value of the filter are changed.

Further, in the conventional example (Patent Document 1), when the communication method is the TDMA method in which the intermittent reception operation is performed, since the startup time of the HPF provided between the circuit blocks is long, the Zero-IF method is not suitable. , Low-IF method is adopted. On the other hand, in the CDMA system, since the intermittent reception operation is not performed and the signal band is wide, the cutoff frequency of the HPF provided between the circuit blocks can be set relatively high, and the startup time can be shortened. . Therefore, the Zero-IF method is adopted.
Japanese Patent No. 3700933 JP 2006-157866 JP

  As described above, in the tuner circuit 13a of the conventional example (Patent Document 1) shown in FIG. 6, the mixer circuits 20 and 25, the local part are used to support both the Low-IF method and the Zero-IF method. A plurality of oscillators 31, 32 and filter circuits 22, 26 are provided.

  An object of the present invention is to provide a filter device and a receiving device that can reduce the number of circuit elements, thereby reducing the circuit area and the circuit current.

The filter device according to the present invention comprises:
A filter device that band-limits a first differential signal and a second differential signal that are orthogonal to each other,
A first inverting input terminal, a first non-inverting input terminal, a first inverting output terminal, a first non-inverting output terminal corresponding to the first differential signal, and a second differential signal A complex active filter circuit having a second inverting input terminal, a second non-inverting input terminal, a second inverting output terminal, and a second non-inverting output terminal;
A first changeover switch that is inserted in a path from the second inverting output terminal to the first inverting input terminal and that conducts / cuts off the path in response to an external control signal;
A second changeover switch that is inserted in a path from the second non-inverting output terminal to the first non-inverting input terminal and that conducts / cuts off the path in response to the control signal;
A third changeover switch inserted in a path from the first non-inverting output terminal to the second inverting input terminal and conducting / cutting off the path in response to the control signal;
A fourth changeover switch inserted in a path from the first inverting output terminal to the second non-inverting input terminal, and conducting / blocking the path in response to the control signal;
With
By controlling ON / OFF of the first to fourth changeover switches according to the control signal, the band to be band-limited can be switched to the band of the Low-IF system or the band of the Zero-IF system. ,
It is characterized by that.

In the filter device,
The complex active filter circuit includes:
A first balanced amplifier having the first inverting input terminal and the first non-inverting input terminal as inputs, and the first inverting output terminal and the first non-inverting output terminal as outputs;
A first CR circuit provided between the first non-inverting input terminal and the first inverting output terminal to form a first feedback path;
A second CR circuit provided between the first inverting input terminal and the first non-inverting output terminal to form a second feedback path;
A second balanced amplifier having the second inverting input terminal and the second non-inverting input terminal as inputs, and the second inverting output terminal and the second non-inverting output terminal as outputs;
A third CR circuit provided between the second non-inverting input terminal and the second inverting output terminal to form a third feedback path;
A fourth CR circuit provided between the second inverting input terminal and the second non-inverting output terminal to form a fourth feedback path;
A first resistor connected in series with the first changeover switch between the first inverting input terminal and the second inverting output terminal;
A second resistor connected in series with the second changeover switch between the first non-inverting input terminal and the second non-inverting output terminal;
A third resistor connected in series with the third changeover switch between the second inverting input terminal and the first non-inverting output terminal;
A fourth resistor connected in series with the fourth changeover switch between the second non-inverting input terminal and the first inverting output terminal;
Comprising
It is characterized by that.

The receiving device according to the present invention is:
A mixer circuit that orthogonally transforms a received signal into a first differential signal and a second differential signal that are orthogonal to each other;
A filter circuit for band-limiting the first differential signal and the second differential signal from the mixer circuit;
A receiving device comprising: a switch circuit that outputs one or both of the first differential signal and the second differential signal band-limited by the filter circuit to the outside;
The mixer circuit is
When the control signal from the outside indicates the Low-IF method, the received signal is orthogonally transformed with a signal having a frequency offset with respect to the received signal,
When the control signal indicates the Zero-IF method, the received signal is orthogonally transformed with a signal having the same frequency as the received signal,
The filter circuit is
A first inverting input terminal, a first non-inverting input terminal, a first inverting output terminal, a first non-inverting output terminal corresponding to the first differential signal, and a second differential signal A complex active filter circuit having a second inverting input terminal, a second non-inverting input terminal, a second inverting output terminal, and a second non-inverting output terminal;
A first changeover switch that is inserted in a path from the second inverting output terminal to the first inverting input terminal and that conducts / cuts off the path in response to an external control signal;
A second changeover switch that is inserted in a path from the second non-inverting output terminal to the first non-inverting input terminal and that conducts / cuts off the path in response to the control signal;
A third changeover switch inserted in a path from the first non-inverting output terminal to the second inverting input terminal and conducting / cutting off the path in response to the control signal;
A fourth changeover switch inserted in a path from the first inverting output terminal to the second non-inverting input terminal, and conducting / blocking the path in response to the control signal;
With
When the control signal indicates the Low-IF method, the first and second differential signals from the mixer circuit are controlled by controlling ON / OFF of the first to fourth changeover switches. A complex filter circuit having a Low-IF band that removes the image signal and adjacent channel signal included in
When the control signal indicates a Zero-IF system, the first differential signal and the second differential signal from the mixer circuit are controlled by controlling ON / OFF of the first to fourth changeover switches. An LPF circuit having a Zero-IF band that removes adjacent channel signals included in the
The switch circuit is
When the control signal indicates a low-IF scheme, one of the first differential signal and the second differential signal band-limited by the filter circuit is output to the outside,
When the control signal indicates a Zero-IF system, both the first differential signal and the second differential signal band-limited by the filter circuit are output to the outside.
It is characterized by that.

In the receiving device,
A mode setting unit for supplying the control signal indicating the Low-IF method or the control signal indicating the Zero-IF method to the mixer circuit, the filter circuit, and the switch circuit;
A decoding circuit for decoding a signal output from the switch circuit;
Is further provided.

In the receiving device,
A mode setting unit for supplying the control signal indicating the Low-IF method to the mixer circuit, the filter circuit, and the switch circuit;
A low-IF decoding circuit for decoding a signal output from the switch circuit;
Is further provided.

In the receiving device,
A mode setting unit for supplying the control signal indicating the Zero-IF method to the mixer circuit, the filter circuit, and the switch circuit;
A Zero-IF decoding circuit for decoding a signal output from the switch circuit;
Is further provided.

  In the filter device according to the present invention, the first to fourth changeover switches are arranged between the input end and the output end of the complex active filter circuit, and their ON / OFF control is performed, so that the band characteristics of the Low-IF system are obtained. And the band characteristics of the Zero-IF method can be switched. The number of elements required for realizing the switching of the band characteristics is only four elements (first to fourth changeover switches) in the case of the primary filter, and the switching can be realized very easily.

  In addition, according to the receiving device equipped with this filter device, the switching function between the Low-IF method and the Zero-IF method can be realized with a smaller number of elements, thereby reducing the circuit area, improving the noise, and reducing the circuit current. be able to. Furthermore, improvement in characteristics such as spurious and IQ mismatch can be realized.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, substantially the same components are denoted by the same reference numerals.

  First, the complex filter circuit will be described.

  When the Low-IF method used in ISDB-T in Japan and DVB-T in Europe is adopted, the adjacent channel signal is suppressed and the image signal is removed as shown in Fig. 5 (a). A complex filter circuit that can be used is effective. On the other hand, in the Zero-IF method, a filter circuit having an LPF band as shown in FIG.

  As described above, such a filter device realizes the characteristics realized by the conventional SAW filter by an active filter composed of an RC element inside the semiconductor, and the steepness of the cutoff characteristic from the passband to the stopband, Furthermore, the group delay characteristic and the ripple characteristic are required to be good. As a filter for realizing these characteristics, an inverse Chebyshev filter, an elliptic filter, and the like can be considered, but any of these filters requires a higher-order filter of the 8th order or higher. come. This high-order filter is realized by a block cascading configuration (biquad polynomial) of a primary filter or a secondary filter, or a leapfrog filter to reduce element sensitivity, and is low so that it can be easily designed. It is divided into the following filters.

  Further, as an active filter configuration when creating this complex filter device by an active filter using an RC element inside a semiconductor, generally, a filter network including an operational amplifier and a CR, and a Gm including a transconductance and a capacitance are used. A -C filter network is considered. When the complex filter device is composed of a filter network composed of an operational amplifier and CR, the circuit area tends to be relatively large, but the distortion characteristics tend to be good. On the other hand, when the Gm-C filter network is used, the circuit area is relatively small, but the distortion characteristics tend to deteriorate.

  Further, as described in Japanese Patent Application Laid-Open No. 2006-157866 (Patent Document 2), there is a mismatch between elements facing each other between the in-phase (I) signal processing system and the quadrature (Q) signal processing system in the complex filter device. If there is, the IQ mismatch of the phase and gain increases, and the image rejection ratio of the complex filter device deteriorates. For this reason, it is important to reduce IQ mismatch. For example, in order to satisfy the 12seg filter characteristics of ISDB-T, an image rejection ratio of approximately 50 dB is required, and depending on the filter circuit design method, the allowable IQ mismatch is about 0 for the gain difference. 0.5% or less and a phase difference of about 0.5 ° or less are required. This IQ mismatch is equally important not only in the Low-IF method but also in the Zero-IF method.

  Further, when these high-order filters are configured, the number of devices is large and the circuit current needs to be reduced, so that noise characteristics are also an issue. For this reason, generally a GCA (Gain Control Amp) circuit is provided as a gain control circuit before, between, and after the filter, and the S / N and distortion are best maintained during demodulation by the demodulation circuit. The points at which the gain distribution of each gain control circuit and automatic gain control start to function are set in advance. For example, when the signal level is small, there is no problem with distortion, so the gain should be increased to improve the S / N. On the other hand, when the signal level is high, there is no problem with S / N, so it is only necessary to reduce the gain to improve the distortion. In addition, regarding the gain distribution of each gain control circuit, the S / N ratio is improved by setting the gain at the previous stage to be high and the gain at the subsequent stage to be low.

  Next, a filter circuit according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration of a filter circuit according to an embodiment of the present invention. This filter circuit 27 is a filter circuit that can switch the band to be band-limited to a Low-IF band or a Zero-IF band, and is used as the IF filter circuit 27 in the receiving apparatus shown in FIG. 2, for example. Is.

  The filter circuit 27 shown in FIG. 1 includes operational amplifiers 50 and 51, resistors R20 to R23, R30 to R33, R40 to R43, capacitors C20 to C22, and changeover switches SW10 to SW13.

  The operational amplifier 50 is a balanced amplifier that receives the differential signal S20 at the inverting input terminal and the non-inverting input terminal and outputs the differential signal S27I from the inverting output terminal and the non-inverting output terminal. Resistors R20 and R21 are inserted in the input path of the operational amplifier 50. In a feedback path between the non-inverting input terminal and the inverting output terminal of the operational amplifier 50, a parallel circuit of a resistor R30 and a capacitor C20 is inserted and connected. In a feedback path between the inverting input terminal and the non-inverting output terminal of the operational amplifier 50, a parallel circuit of a resistor R31 and a capacitor C21 is inserted and connected.

  The operational amplifier 51 is a balanced amplifier that receives the differential signal S21 at the inverting input terminal and the non-inverting input terminal and outputs the differential signal S27Q from the inverting output terminal and the non-inverting output terminal. Resistors R22 and R23 are inserted in the input path of the operational amplifier 51. In the feedback path between the non-inverting input terminal and the inverting output terminal of the operational amplifier 51, a parallel circuit of a resistor R32 and a capacitor C22 is inserted and connected. In the feedback path between the inverting input terminal and the non-inverting output terminal of the operational amplifier 51, a parallel circuit of a resistor R33 and a capacitor C23 is inserted and connected.

  A resistor R40 and a changeover switch SW10 are connected in series between the inverting input terminal of the operational amplifier 50 and the inverting output terminal of the operational amplifier 51. A resistor R41 and a changeover switch SW11 are connected in series between the non-inverting input terminal of the operational amplifier 50 and the non-inverting output terminal of the operational amplifier 51. A resistor R42 and a changeover switch SW12 are connected in series between the inverting input terminal of the operational amplifier 51 and the non-inverting output terminal of the operational amplifier 50. A resistor R43 and a changeover switch SW13 are connected in series between the non-inverting input terminal of the operational amplifier 51 and the inverting output terminal of the operational amplifier 50.

  The changeover switches SW10 to SW13 are ON / OFF controlled by an external control signal S14. The change-over switches SW10 to SW13 are preferably realized by NMOS transistors or PMOS transistors having a low ON resistance.

  In this configuration, an active filter network including an operational amplifier and an RC is used. However, a Gm-C filter network including a transconductance and a capacitor may be used.

  Here, the resistance values of the resistors R20 to R23 inserted in the input paths of the operational amplifiers 50 and 51 are Ri. The resistance values of the resistors R30 to R33 provided in the feedback paths of the operational amplifiers 50 and 51 are Rf, and the capacitance values of the capacitors C20 to C23 are Cf. Also, let Rc be the resistance value of the resistors R40 to R43 arranged between the input and output ends of the operational amplifiers 50 and 51.

When the change-over switches SW10 to SW13 are ON, the filter circuit 27 functions as a complex filter having a low-IF band characteristic. The transfer function H ₁ (s) at this time is as shown in [Formula 1]. Here, the ON resistance values of the changeover switches SW10 to SW13 are set to zero. ωo is a normalized frequency, and ωc is the center frequency of the bandpass shown in FIG. s is a Laplace operator.

[Equation 1]
H ₁ (s) = − (Rf / Ri) · {ωo / (j (ω−ωc) + ωo)}

[Equation 2]
ωo = 1 / (Rf · Cf)

[Equation 3]
ωc = 1 / (Rc · Cf)

On the other hand, in the Zero-IF method adopted in DVB-T, it is necessary to suppress the signal of the adjacent channel, but there is no need to remove the image signal because there is no image signal. In the filter circuit 27, a filter having LPF band characteristics may be disposed in each of the I signal processing system and the Q signal processing system having a quadrature phase relationship. When the change-over switches SW10 to SW13 are OFF, the filter circuit 27 functions as a filter having Zero-IF band characteristics. When the transfer function H ₂ (s) at this time is obtained in the same manner as [Expression 1] to [Expression 3], [Expression 4] to [Expression 6] are obtained. Here, the resistance values of the changeover switches SW10 to SW13 are set to infinity. For this reason, the resistance value Rc of the resistors R40 to R43 may be obtained equivalently as infinity.

[Equation 4]
H ₂ (s) = − (Rf / Ri) · (ωo / (s + ωo))

[Equation 5]
ωo = 1 / (Rf · Cf)

[Equation 6]
ωc = 0

  As described above, in the filter circuit 27 of the present embodiment, the changeover switches SW10 to SW13 are arranged between the input terminals and the output terminals of the operational amplifiers 50 and 51, and their ON / OFF is controlled, whereby the Low-IF The band characteristics of the system and the band characteristics of the Zero-IF system can be switched. In addition, the number of elements necessary for realizing the switching of the band characteristics is only four elements in the case of the primary filter, and the switching can be realized very easily.

  Any type of transfer function can be realized with a circuit including an integrator and an adder. Although the first-order LPF has been described as an example in this embodiment, the present invention can be applied to a filter circuit using only a differential input integrator such as a higher-order leapfrog circuit or biquad circuit.

  In the present embodiment, a filter circuit that handles differential signals is shown, but the filter device of the present invention can also be applied to circuits that handle single-type signals.

  The low-IF method and the zero-IF method in the DVB-T in Europe have the same signal band and the cut-off characteristics from the passband to the stopband, so the low-IF method and the zero-IF in the DVB-T in Europe Switching to the method can be realized by simply switching ON / OFF of the selector switches SW10 to SW13. Therefore, unlike the conventional example (Patent Document 1) configured with a Gm-C filter, it is not necessary to change the cutoff frequency and the Q value of the filter by controlling the operating current of each Gm amplifier, which is easily realized. Is possible.

  On the other hand, since normalization frequency ωo and center frequency ωc differ by several MHz between DVB-T and ISDB-T, when switching between DVB-T and ISDB-T, the above [Equation 1] to [Equation 6] The normalization frequency ωo and the center frequency ωc shown in FIG. 5 can be changed by switching the resistance value and the capacitance value according to the above.

  Next, a receiving apparatus equipped with the filter circuit 27 of FIG. 1 will be described. This receiving apparatus is built in, for example, a television receiver. A schematic configuration of the receiving apparatus is shown in FIG. In FIG. 2, parts that are substantially the same as those of the conventional example (FIG. 6) are denoted by the same reference numerals.

  As shown in FIG. 2, a receiver built in a television receiver is roughly divided into a desired channel frequency selected from a television high frequency signal received by an antenna 10 and converted into a Low-IF signal or a baseband signal. A tuner circuit 13b for conversion and a decoding circuit 16 for decoding a video signal and an audio signal from a Low-IF signal or a baseband signal output from the tuner circuit 13b. As the decoding circuit 16, a decoding circuit for Low-IF is used when the television receiver is the Low-IF system, and a decoding circuit for Zero-IF is used when the television receiver is the Zero-IF system.

The television high-frequency signal received by the antenna 10 is input to the tuner circuit 13 b via the RF filter circuit 11 and the low noise amplifier 12. The tuner circuit 13 b includes an I signal mixer circuit 20, a Q signal mixer circuit 21, an IF filter circuit 27, GCA circuits 23 and 24, a phase shifter 30, and a local oscillator 31. The internal configuration of the IF filter circuit 27 is the same as that shown in FIG. The local oscillator 31 outputs a local oscillation signal having a frequency f _LOCAL corresponding to the control signal S14 from the receiver mode setting unit 14.

  In FIG. 2, reference numeral S <b> 20 indicates an output signal of the I signal mixer circuit 20. Reference numeral S21 indicates an output signal of the Q signal mixer circuit 21. Reference numerals S27I and S27Q indicate an I output signal and a Q output signal of the filter circuit 27, respectively. Reference numerals S23 and S24 indicate output signals of the GCA circuits 23 and 24, respectively. Reference numeral S <b> 14 indicates an output signal of the receiver mode setting unit 14. Reference numeral S <b> 16 indicates an output signal of the decoding circuit 16.

  Next, an example will be described in which a receiving device equipped with the filter circuit 27 of FIG. 1 is built in a low-IF television receiver. A schematic configuration of the receiving apparatus in this case is shown in FIG. In this receiving apparatus, a decoding circuit 16a for Low-IF is used, and the receiver mode setting unit 14 outputs a control signal S14 indicating the Low-IF system.

  The television high frequency signal received by the antenna 10 is filtered by an RF filter circuit 11 having a bandpass characteristic, and then amplified by a low noise amplifier (LNA) 12. The reception signal amplified by the low noise amplifier 12 is input to the I signal mixer circuit 20 and the Q signal mixer circuit 21.

  In response to the control signal S14 from the receiver mode setting unit 14, the local oscillator 31 and the phase shifter 30 have a pair of frequencies that are offset from the frequency of the received signal by a frequency corresponding to 1/2 of the channel interval. An orthogonal local oscillation signal is output. The pair of local oscillation signals are supplied to the I signal mixer circuit 20 and the Q signal mixer circuit 21 as a zero phase shift signal and a 90 ° phase shift signal, respectively. Then, in the I signal mixer circuit 20 and the Q signal mixer circuit 21, the local oscillation signal and the signal from the low noise amplifier 12 are mixed to generate an I signal S20 and a Q signal S21 which are orthogonal baseband signals. Is done.

  As a result, as shown in FIG. 5A, the received signal received by the antenna 10 is, for example, ISDB-T, is orthogonally demodulated while being down-converted to a Low-IF signal having a center frequency of 4 MHz. As a result, an in-phase signal (I signal) S20 and a quadrature phase signal (Q signal) S21 that are 90 degrees out of phase with each other are generated.

  In the IF filter circuit 27, the changeover switches SW10 to SW13 (see FIG. 1) are turned ON in response to the control signal S14 from the receiver mode setting unit 14. As a result, the IF filter circuit 27 operates as a filter having the characteristics shown in FIG. In other words, it has the characteristics of a channel selection filter and operates as an image removal filter (IR filter) that removes interference existing in the image band (that is, 0 Hz or less) of the desired signal.

  As a result, the I signal S20 and Q signal S21 (Low-IF signal) output from the mixer circuits 20 and 21 are input to the IF filter circuit 27, and the IF filter circuit 27 attenuates the image signal and the adjacent interference signal. Thus, only a desired signal can pass through a frequency of 4 MHz ± 3 MHz (1 MHz to 7 MHz) in the case of ISDB-T, for example.

  As described above, the signals S27I and S27Q from which the image interference is removed and the signals of the adjacent channels are suppressed can be handled as real signals in the subsequent signal processing. That is, only one of the I signal S27I and the Q signal S27Q needs to be processed.

  In response to the control signal S14 from the receiver mode setting unit 14, the changeover switch SW1 is OFF and the changeover switch SW2 is ON. Therefore, the output signal S23 of the GCA circuit 23 is output from the tuner circuit 13b and provided to the Low-IF decoding circuit 16a that processes the Low-IF signal. In the low-IF decoding circuit 16a, AD conversion is performed, and various processes based on the data after digital conversion are subsequently performed.

  The Low-IF decoding circuit 16a outputs a signal S16a corresponding to the intensity of the output signal S23 of the GCA circuit 23, which is an input signal, and this signal S16a is fed back to the GCA circuit 23 and supplied. The GCA circuit 23 performs gain control according to the signal S16a, and operates to make the level of the output signal S23 of the GCA circuit 23, which is the output signal of the tuner circuit 13b, constant.

  Next, an example will be described in which a receiving device equipped with the filter circuit 27 in FIG. 1 is built in a Zero-IF television receiver. FIG. 4 shows a schematic configuration of the receiving device in this case. In this receiving apparatus, the decoding circuit 16b for Zero-IF is used, and the control signal S14 indicating the Zero-IF system is output from the receiver mode setting unit 14.

  The television high frequency signal received by the antenna 10 is filtered by an RF filter circuit 11 having a bandpass characteristic, and then amplified by a low noise amplifier (LNA) 12. The reception signal amplified by the low noise amplifier 12 is input to the I signal mixer circuit 20 and the Q signal mixer circuit 21.

  In response to the control signal S14 from the receiver mode setting unit 14, the local oscillator 31 and the phase shifter 30 output a pair of orthogonal local oscillation signals having substantially the same frequency as the received signal. The pair of local oscillation signals are supplied to the I signal mixer circuit 20 and the Q signal mixer circuit 21, respectively. Then, in the I signal mixer circuit 20 and the Q signal mixer circuit 21, the local oscillation signal and the signal from the low noise amplifier 12 are mixed to generate an I signal S20 and a Q signal S21 which are orthogonal baseband signals. Is done.

  In the IF filter circuit 27, the changeover switches SW10 to SW13 (see FIG. 1) are turned OFF in response to the control signal S14 from the receiver mode setting unit 14. Thereby, the IF filter circuit 27 operates as a complex filter having the characteristics shown in FIG. Since there is no image signal in the Zero-IF method, the IF filter circuit 27 does not need to remove the image signal, and operates as a channel selection filter having LPF characteristics.

  As a result, the output signals S20 and S21 of the I signal mixer circuit 20 and the Q signal mixer circuit 21 are amplified by the GCA circuits 23 and 24 to a predetermined level after unnecessary waves are removed by the IF filter circuit 27. .

  In response to the control signal S14 from the receiver mode setting unit 14, both the changeover switches SW1 and SW2 are turned on. Therefore, the output signal S23 of the GCA circuit 23 and the output signal S24 of the GCA circuit 24 are output from the tuner circuit 13b and provided to the Zero-IF decoding circuit 16b that processes the Zero-IF signal. In the Zero-IF decoding circuit 16b, AD conversion is performed, and various processes based on the data after digital conversion are subsequently performed.

  The Zero-IF decoding circuit 16b outputs a signal S16b corresponding to the intensity of the output signals S23 and S24 of the GCA circuits 23 and 24, which are input signals, and the signal S16b is fed back to the GCA circuits 23 and 24. Supplied. The GCA circuits 23 and 24 perform gain control according to the signal S16b, and operate to make the levels of the output signals S23 and S24 of the GCA circuits 23 and 24, which are output signals of the tuner circuit 13b, constant. .

  The ISDB-T in Japan, the DVB-T in Europe, and the ATSC television receiver in the United States do not perform the intermittent reception operation as in the communication system shown in the conventional example (Patent Document 1). It is. For this reason, in the Zero-IF system in a television receiver, even if each block is coupled by HPF as in the communication system Zero-IF system, the problem is that the start-up time is long and becomes a problem. Absent. In addition, a configuration using an offset voltage removal circuit for removing DC offset is also effective instead of HPF.

  As described above, in the receiver equipped with the filter circuit 27 of FIG. 1, the case of being incorporated in the Low-IF television receiver (FIG. 3) is also incorporated in the Zero-IF television receiver. In this case (FIG. 4), the configuration itself of the tuner circuit 13b is the same. In response to a control signal S14 from the receiver mode setting unit 14, a predetermined part in the tuner circuit 13b (frequency of the output signal of the local oscillator 31, ON / OFF of the changeover switches SW1 and SW2, switch SW10 in the filter circuit 27) By switching the SW13 ON / OFF), both the Low-IF method and the Zero-IF method can be supported.

  Further, in the tuner circuit 13a of the conventional example (Patent Document 1) shown in FIG. 6, a plurality of mixer circuits (20, 21), 25, local oscillators 31, 32, and filter circuits 22, 26 are provided. On the other hand, according to the tuner circuit 13b of this embodiment, one each is sufficient. Therefore, a reduction in circuit area, improvement in noise, and reduction in circuit current can be realized. Furthermore, improvement in characteristics such as spurious and IQ mismatch can be realized.

  In the above embodiment, as an application example of the filter circuit 27 in FIG. 1, a digital TV receiving apparatus that demodulates a received signal into a video signal and an audio signal has been described as an example, but the Low-IF method and Zero- Needless to say, the present invention can be applied to any receiving apparatus (communication field, etc.) having an IF switching function.

  Moreover, in the receiving apparatus of the said embodiment, although the example in which a received signal was input from the antenna 10 was shown, it cannot be overemphasized that it is applicable also with respect to the case where a received signal is input via a cable.

  As described above, the present invention can realize switching between the Low-IF method and the Zero-IF method with a configuration having a very small number of elements, and is applied to, for example, the field of television receivers and communication terminals. it can.

It is a circuit diagram which shows the internal structure of the filter circuit by embodiment of this invention. It is a figure which shows schematic structure of the receiver which mounts the filter circuit of FIG. 1 is a diagram illustrating a configuration of a Low-IF receiver. 1 is a diagram illustrating a configuration of a Zero-IF receiver. FIG. (a) It is a figure which shows an example of the filter band characteristic of a Low-IF system. (b) It is a figure which shows an example of the filter band characteristic of Zero-IF system. It is a figure which shows schematic structure of the conventional receiver.

Explanation of symbols

10 Antenna 11 RF filter 12 LNA
13a, 13b Tuner circuit 14 Receiver mode setting unit 15 Decoding circuit 16 Low-IF or Zero-IF decoding circuit 16a Low-IF decoding circuit 16b Zero-IF decoding circuit 20 I signal mixer circuit 21 Q signal Mixer circuit 22 filter circuit 23, 24 GCA circuit 25 mixer circuit 26 filter circuit 27 IF filter circuit 30 phase shifter 31, 32 local oscillator 50, 51 operational amplifiers SW1 to SW4, SW10 to SW13 with common mode feedback selector switch R20 to R23 Input resistance C20 to C23 Feedback capacitance R30 to R33 Feedback resistance R40 to R43 Resistance

Claims (6)

A filter device that band-limits a first differential signal and a second differential signal that are orthogonal to each other,
A first inverting input terminal, a first non-inverting input terminal, a first inverting output terminal, a first non-inverting output terminal corresponding to the first differential signal, and a second differential signal A complex active filter circuit having a second inverting input terminal, a second non-inverting input terminal, a second inverting output terminal, and a second non-inverting output terminal;
A first changeover switch that is inserted in a path from the second inverting output terminal to the first inverting input terminal and that conducts / cuts off the path in response to an external control signal;
A second changeover switch that is inserted in a path from the second non-inverting output terminal to the first non-inverting input terminal and that conducts / cuts off the path in response to the control signal;
A third changeover switch inserted in a path from the first non-inverting output terminal to the second inverting input terminal and conducting / cutting off the path in response to the control signal;
A fourth changeover switch inserted in a path from the first inverting output terminal to the second non-inverting input terminal, and conducting / blocking the path in response to the control signal;
With
By controlling ON / OFF of the first to fourth changeover switches according to the control signal, the band to be band-limited can be switched to the band of the Low-IF system or the band of the Zero-IF system. ,
And a filter device. In claim 1,
The complex active filter circuit includes:
A first balanced amplifier having the first inverting input terminal and the first non-inverting input terminal as inputs, and the first inverting output terminal and the first non-inverting output terminal as outputs;
A first CR circuit provided between the first non-inverting input terminal and the first inverting output terminal to form a first feedback path;
A second CR circuit provided between the first inverting input terminal and the first non-inverting output terminal to form a second feedback path;
A second balanced amplifier having the second inverting input terminal and the second non-inverting input terminal as inputs, and the second inverting output terminal and the second non-inverting output terminal as outputs;
A third CR circuit provided between the second non-inverting input terminal and the second inverting output terminal to form a third feedback path;
A fourth CR circuit provided between the second inverting input terminal and the second non-inverting output terminal to form a fourth feedback path;
A first resistor connected in series with the first changeover switch between the first inverting input terminal and the second inverting output terminal;
A second resistor connected in series with the second changeover switch between the first non-inverting input terminal and the second non-inverting output terminal;
A third resistor connected in series with the third changeover switch between the second inverting input terminal and the first non-inverting output terminal;
A fourth resistor connected in series with the fourth changeover switch between the second non-inverting input terminal and the first inverting output terminal;
Comprising
And a filter device. A mixer circuit that orthogonally transforms a received signal into a first differential signal and a second differential signal that are orthogonal to each other;
A filter circuit for band-limiting the first differential signal and the second differential signal from the mixer circuit;
A receiving device comprising: a switch circuit that outputs one or both of the first differential signal and the second differential signal band-limited by the filter circuit to the outside;
The mixer circuit is
When the control signal from the outside indicates the Low-IF method, the received signal is orthogonally transformed with a signal having a frequency offset with respect to the received signal,
When the control signal indicates the Zero-IF method, the received signal is orthogonally transformed with a signal having the same frequency as the received signal,
The filter circuit is
A first inverting input terminal, a first non-inverting input terminal, a first inverting output terminal, a first non-inverting output terminal corresponding to the first differential signal, and a second differential signal A complex active filter circuit having a second inverting input terminal, a second non-inverting input terminal, a second inverting output terminal, and a second non-inverting output terminal;
A first changeover switch that is inserted in a path from the second inverting output terminal to the first inverting input terminal and that conducts / cuts off the path in response to an external control signal;
A second changeover switch that is inserted in a path from the second non-inverting output terminal to the first non-inverting input terminal and that conducts / cuts off the path in response to the control signal;
A third changeover switch inserted in a path from the first non-inverting output terminal to the second inverting input terminal and conducting / cutting off the path in response to the control signal;
A fourth changeover switch inserted in a path from the first inverting output terminal to the second non-inverting input terminal, and conducting / blocking the path in response to the control signal;
With
When the control signal indicates the Low-IF method, the first and second differential signals from the mixer circuit are controlled by controlling ON / OFF of the first to fourth changeover switches. A complex filter circuit having a Low-IF band that removes the image signal and adjacent channel signal included in
When the control signal indicates a Zero-IF system, the first differential signal and the second differential signal from the mixer circuit are controlled by controlling ON / OFF of the first to fourth changeover switches. An LPF circuit having a Zero-IF band that removes adjacent channel signals included in the
The switch circuit is
When the control signal indicates a low-IF scheme, one of the first differential signal and the second differential signal band-limited by the filter circuit is output to the outside,
When the control signal indicates a Zero-IF system, both the first differential signal and the second differential signal band-limited by the filter circuit are output to the outside.
A receiving apparatus. In claim 3,
A mode setting unit for supplying the control signal indicating the Low-IF method or the control signal indicating the Zero-IF method to the mixer circuit, the filter circuit, and the switch circuit;
A decoding circuit for decoding a signal output from the switch circuit;
The receiving apparatus further comprising: In claim 3,
A mode setting unit for supplying the control signal indicating the Low-IF method to the mixer circuit, the filter circuit, and the switch circuit;
A low-IF decoding circuit for decoding a signal output from the switch circuit;
The receiving apparatus further comprising: In claim 3,
A mode setting unit for supplying the control signal indicating the Zero-IF method to the mixer circuit, the filter circuit, and the switch circuit;
A Zero-IF decoding circuit for decoding a signal output from the switch circuit;
The receiving apparatus further comprising:

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