JP2009145543A - Plasm display apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve both a stable operation and a power consumption decrease by improving accuracy in the detection of presence or absence of a video signal. <P>SOLUTION: The plasma display apparatus includes: a movement detecting circuit 71 that compares an input video signal before one frame and a current input video signal, and determines whether a display image is a moving picture or a still picture; a signal level detecting circuit 72 that compares the signal level of the input video signal and a predetermined threshold value and determines whether the display picture is black over the entire surface; a lighting ratio detecting circuit 73 that detects the ratio of discharge cells to be lighted on, to all discharge cells; and external input detecting circuit 74 that determines whether the input video signal has been externally input or not; and a video signal detecting circuit 51 having a determination circuit 76 that determines the presence or absence of a video signal based on the result of the determinations by the movement detecting circuit, signal level detecting circuit, lighting ratio detecting circuit, and external input detecting circuit. If the video signal detecting circuit determines that a video signal is absent, the maximum voltage of an inclination waveform voltage generated during an initializing period is decreased. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a plasma display device used for a wall-mounted television or a large monitor, and relates to a technique for reducing power consumption when there is no signal in video input.

  A plasma display device using a typical AC surface discharge type panel as a plasma display panel (hereinafter abbreviated as “panel”) has a wide viewing angle and a large screen, and is self-luminous and image display. Due to its high quality, it is becoming the mainstream of large screen image display devices.

  In the panel, a large number of discharge cells are formed between a front plate and a back plate arranged to face each other. In the front plate, a plurality of display electrode pairs each consisting of a pair of scan electrodes and sustain electrodes are formed in parallel with each other on the front glass substrate, and a dielectric layer and a protective layer are formed so as to cover the display electrode pairs. Yes. The back plate has a plurality of parallel data electrodes on the back glass substrate, a dielectric layer so as to cover them, and a plurality of barrier ribs in parallel with the data electrodes formed on the back glass substrate. A phosphor layer is formed on the side walls of the barrier ribs. Then, the front plate and the back plate are arranged opposite to each other so that the display electrode pair and the data electrode are three-dimensionally crossed and sealed, and a discharge gas containing, for example, 5% xenon is enclosed in the internal discharge space. Has been. Here, a discharge cell is formed at a portion where the display electrode pair and the data electrode face each other. The panel is divided into an image display area for displaying an image and other non-display areas, and each electrode is formed by pulling out each electrode to the outside of the image display area on the front plate or the back plate, that is, to the non-display region. Each electrode is driven by applying a drive voltage to the lead portion.

  In the plasma display device using the panel having such a configuration, a sustain pulse is alternately applied to the display electrode pair to generate a gas discharge in each discharge cell, and red, green and blue are generated by ultraviolet rays generated by the gas discharge. A color image is displayed by exciting and emitting phosphors of the respective colors.

  As a method of driving the panel, a subfield method, that is, a method of performing gradation display by combining subfields to emit light after dividing one field period into a plurality of subfields is generally used.

  Each subfield has an initialization period, an address period, and a sustain period. In the initialization period, an initialization discharge is generated, and wall charges necessary for the subsequent address operation are formed on each electrode. In the address period, an address pulse voltage is selectively applied to the discharge cells to be displayed to generate an address discharge to form wall charges. In the sustain period, a sustain pulse is alternately applied to the display electrode pair composed of the scan electrode and the sustain electrode, and a sustain discharge is generated in the discharge cell in which the address discharge is generated, and the phosphor layer of the corresponding discharge cell is caused to emit light. The image is displayed.

  In recent years, power consumption at the time of panel driving has been increasing with the increase in the screen size and brightness of the panel. Therefore, the importance of reducing power consumption is increasing.

As one technique for reducing power consumption, a technique for detecting a no-signal state of a video signal and stopping driving of the panel has been proposed (see, for example, Patent Document 1). In this technology, the presence or absence of a video signal is determined by detecting the presence or absence of a video synchronization signal such as a horizontal synchronization signal or a vertical synchronization signal. When it is determined that there is no video signal, driving of the panel is stopped to reduce power consumption. Reduce.
JP 2002-31889 A

  In recent years, video signal playback devices (hereinafter simply referred to as “playback devices”) such as optical discs and magnetic tapes have become widespread, and these playback devices are connected to a plasma display device to display the playback video on a panel for viewing. It is common to use it.

  However, some playback devices output a synchronization signal even when there is no playback video signal. In the technique described in Patent Document 1, since the presence / absence of a synchronization signal is detected to determine the presence / absence of a video signal, when such a playback device is connected and used, there is actually no video signal. Nevertheless, it may be determined that there is a video signal and perform a normal operation.

  In addition, if the drive is completely stopped, it takes a certain amount of time for the operation to stabilize after the drive is restarted, so when the video signal is changed from the absence to the stable state immediately It is difficult to display images.

  The present invention has been made in view of these problems, and it is an object of the present invention to provide a plasma display device capable of improving the detection accuracy of the presence / absence of a video signal and achieving both stable operation and reduction of power consumption. To do.

  In order to solve this problem, a plasma display device according to the present invention includes a scan electrode driving circuit that applies a ramp waveform voltage that gradually increases during an initialization period to a scan electrode of a panel, an input video signal one frame before, Compares the input video signal with the motion detection circuit that determines whether the display image is a moving image or a still image, and compares the signal level of the input video signal with a predetermined threshold value to determine whether the display image is entirely black A signal level detection circuit that detects the ratio of discharge cells to be lit with respect to all discharge cells, an external input detection circuit that determines whether an input video signal is input from the outside, and motion detection Circuit, signal level detection circuit, lighting rate detection circuit, and external input detection circuit, and a determination circuit that determines the presence or absence of a video signal based on the determination results And a scanning electrode drive circuit that generates a reduced ramp waveform voltage when compared with other cases when it is determined that there is no video signal in the video signal detection circuit. It is characterized by being constructed.

  With this configuration, it is possible to realize a plasma display device capable of improving the detection accuracy of the presence / absence of a video signal and achieving both stable operation and reduction in power consumption.

  In the plasma display device of the present invention, the video signal detection circuit has an audio level detection circuit that compares the signal level of the input audio signal with a predetermined threshold value to determine whether there is no audio, and The determination circuit is configured to determine the presence / absence of a video signal by adding the determination result in the audio level detection circuit. Thus, for example, even when a very dark video that is erroneously determined to have no video signal is continuously displayed, it is determined that there is a video signal when audio is detected. Therefore, the detection accuracy of the presence / absence of a video signal can be further increased.

  According to the present invention, in the plasma display device, it is possible to improve the detection accuracy of the presence / absence of a video signal and achieve both stable operation and reduction of power consumption.

  Hereinafter, a plasma display device according to an embodiment of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is an exploded perspective view showing the structure of panel 10 according to Embodiment 1 of the present invention. A plurality of display electrode pairs 24 each including a scanning electrode 22 and a sustain electrode 23 are formed on a glass front plate 21. A dielectric layer 25 is formed so as to cover the scan electrode 22 and the sustain electrode 23, and a protective layer 26 is formed on the dielectric layer 25.

  The protective layer 26 has been used as a panel material in order to lower the discharge start voltage in the discharge cell, and has a large secondary electron emission coefficient and durability when neon (Ne) and xenon (Xe) gas is sealed. It is formed from a material mainly composed of MgO having excellent properties.

  A plurality of data electrodes 32 are formed on the back plate 31, a dielectric layer 33 is formed so as to cover the data electrodes 32, and a grid-like partition wall 34 is formed thereon. A phosphor layer 35 that emits light of each color of red (R), green (G), and blue (B) is provided on the side surface of the partition wall 34 and on the dielectric layer 33.

  The front plate 21 and the back plate 31 are arranged to face each other so that the display electrode pair 24 and the data electrode 32 intersect with each other with a minute discharge space interposed therebetween, and the outer periphery thereof is sealed with a sealing material such as glass frit. Has been. A mixed gas of neon and xenon is sealed as a discharge gas in the internal discharge space. In the present embodiment, a discharge gas having a xenon partial pressure of about 10% is used in order to improve luminous efficiency. The discharge space is partitioned into a plurality of sections by partition walls 34, and discharge cells are formed at the intersections between the display electrode pairs 24 and the data electrodes 32. These discharge cells discharge and emit light to display an image.

  Note that the structure of the panel 10 is not limited to the above-described structure, and for example, the panel 10 may include a stripe-shaped partition wall. Further, the mixing ratio of the discharge gas is not limited to the above-described numerical values, and may be other mixing ratios.

  FIG. 2 is an electrode array diagram of panel 10 in accordance with the first exemplary embodiment of the present invention. The panel 10 includes n scan electrodes SC1 to SCn (scan electrodes 22 in FIG. 1) and n sustain electrodes SU1 to SUn (sustain electrodes 23) extended in the row direction, and is extended in the column direction. In addition, m data electrodes D1 to Dm (data electrode 32 in FIG. 1) are arranged. A discharge cell is formed at a portion where a pair of scan electrode SCi (i = 1 to n) and sustain electrode SUi intersects with one data electrode Dj (j = 1 to m), and is formed in the discharge space. The number of discharge cells is m × n.

  Next, a driving voltage waveform for driving the panel 10 and an outline of the operation will be described. The plasma display device according to the present embodiment performs gradation display by subfield method, that is, by dividing one field period into a plurality of subfields and controlling light emission / non-light emission of each discharge cell for each subfield. Each subfield has an initialization period, an address period, and a sustain period.

  FIG. 3 is a drive voltage waveform diagram applied to each electrode of panel 10 in accordance with the first exemplary embodiment of the present invention. FIG. 3 shows drive voltage waveforms of two subfields, that is, a subfield that performs an initialization operation on all discharge cells (hereinafter referred to as “all-cell initialization subfield”), and selective initialization. A subfield for performing an operation (hereinafter referred to as a “selective initialization subfield”) is shown. Here, the all-cell initialization subfield will be described. The drive voltage waveforms in the other subfields are almost the same. Further, scan electrode SCi, sustain electrode SUi, and data electrode Dk in the following represent electrodes selected from the respective electrodes based on image data.

  In the first half of the initializing period of the first SF, which is the all-cell initializing subfield, 0 (V) is applied to the data electrodes D1 to Dm and the sustain electrodes SU1 to SUn, respectively, and the sustain electrodes SU1 are applied to the scan electrodes SC1 to SCn. A ramp waveform voltage (hereinafter referred to as an “up-ramp waveform voltage”) that gently rises from a voltage Vi1 that is equal to or lower than the discharge start voltage to a voltage Vi2 that exceeds the discharge start voltage is applied to SUn (hereinafter referred to as “up-ramp waveform voltage”). (The maximum value of the up-ramp waveform voltage applied to scan electrodes SC1 to SCn is referred to as “initialization voltage Vi2”).

  While the rising ramp waveform voltage rises, weak initializing discharges are continuously generated between scan electrodes SC1 to SCn, sustain electrodes SU1 to SUn, and data electrodes D1 to Dm. Negative wall voltage is accumulated on scan electrodes SC1 to SCn, and positive wall voltage is accumulated on data electrodes D1 to Dm and sustain electrodes SU1 to SUn. The wall voltage above the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.

  In the latter half of the initialization period, positive voltage Ve1 is applied to sustain electrodes SU1 to SUn, 0 (V) is applied to data electrodes D1 to Dm, and sustain electrodes SU1 to SUn are applied to scan electrodes SC1 to SCn. In contrast, a ramp waveform voltage (hereinafter referred to as a “down-ramp waveform voltage”) that gently falls from a voltage Vi3 that is equal to or lower than the discharge start voltage to a voltage Vi4 that exceeds the discharge start voltage is applied. During this time, weak initializing discharges are continuously generated between scan electrodes SC1 to SCn, sustain electrodes SU1 to SUn, and data electrodes D1 to Dm. Then, the negative wall voltage above scan electrodes SC1 to SCn and the positive wall voltage above sustain electrodes SU1 to SUn are weakened, and the positive wall voltage above data electrodes D1 to Dm is adjusted to a value suitable for the write operation. The Thus, the all-cell initializing operation for performing the initializing discharge on all the discharge cells is completed.

  Here, in the present embodiment, the voltage value of the initialization voltage Vi2 is switched between two different voltage values based on the presence / absence of a video signal. Although details will be described later, the higher voltage value will be referred to as Vi2H, and the lower voltage value will be referred to as Vi2L.

  In the subsequent address period, voltage Ve2 is first applied to sustain electrodes SU1 to SUn, and voltage Vc is applied to scan electrodes SC1 to SCn.

  Then, a negative scan pulse voltage Va is applied to the scan electrode SC1 in the first row, and the data electrode Dk (k = 1 to m) of the discharge cell to be emitted in the first row among the data electrodes D1 to Dm is positive. The write pulse voltage Vd is applied. As a result, a discharge is generated between data electrode Dk and scan electrode SC1. In addition, using this discharge as a trigger, a discharge can be generated between sustain electrode SU1 and scan electrode SC1 in a region intersecting with data electrode Dk. Thus, an address discharge occurs in the discharge cell to emit light, a positive wall voltage is accumulated on scan electrode SC1, a negative wall voltage is accumulated on sustain electrode SU1, and a negative wall voltage is also accumulated on data electrode Dk. Accumulated.

  The above address operation is performed until the discharge cell in the nth row, and the address period ends.

  In the subsequent sustain period, first, positive sustain pulse voltage Vs is applied to scan electrodes SC1 to SCn, and a ground potential that is a base potential, that is, 0 (V) is applied to sustain electrodes SU1 to SUn. Then, in the discharge cell in which the address discharge has occurred, a sustain discharge occurs between scan electrode SCi and sustain electrode SUi, and phosphor layer 35 emits light due to the ultraviolet rays generated at this time. In the discharge cells in which no address discharge has occurred during the address period, no sustain discharge occurs, and the wall voltage at the end of the initialization period is maintained.

  Thereafter, similarly, the sustain electrodes of the number obtained by multiplying the luminance weight by the luminance magnification are alternately applied to the scan electrodes SC1 to SCn and the sustain electrodes SU1 to SUn, and a potential difference is given between the electrodes of the display electrode pair 24, thereby writing. The sustain discharge is continuously performed in the discharge cell that has caused the address discharge in the period.

  Subsequent subfield operations are substantially the same as those described above except for the number of sustain pulses in the sustain period, and thus description thereof is omitted. The above is the outline of the drive voltage waveform applied to each electrode of panel 10 in the present embodiment.

  Next, the configuration of the plasma display device in the present embodiment will be described. FIG. 4 is a circuit block diagram of plasma display device 1 according to the first exemplary embodiment of the present invention. The plasma display device 1 includes a panel 10, a tuner 41, a video signal input circuit 42, a video signal switching circuit 44, a microcomputer 45, a synchronization separation circuit 46, a video signal detection circuit 51, and a drive circuit that drives the panel 10. As a drive circuit, an image data processing circuit 50, a data electrode drive circuit 52, a scan electrode drive circuit 53, a sustain electrode drive circuit 54, a timing generation circuit 55, and a power supply circuit (not shown) for supplying necessary power to each circuit block It has.

  The tuner 41 is connected to an antenna 40 installed outside, extracts a video signal from a reception signal received by the antenna 40, and outputs it to a subsequent stage.

  The video signal input circuit 42 is connected to an external playback device 43, receives the video signal output from the playback device 43, and outputs it to the subsequent stage.

  The video signal switching circuit 44 selects either a video signal output from the tuner 41 or a video signal output from the video signal input circuit 42 in accordance with an instruction from the microcomputer 45, and is used as a display video signal sig. Output to. Note that the microcomputer 45 performs overall control of the plasma display device 1 and receives instructions given to the plasma display device 1 by a user operating a remote controller (not shown) or the like. The apparatus 1 is turned on / off, the channel is changed, and the like. When an input signal switching instruction is received from the user, the video signal switching circuit 44 is switched based on the instruction.

  The synchronization separation circuit 46 separates and extracts the horizontal synchronization signal H and the vertical synchronization signal V from the video signal output from the video signal switching circuit 44, and outputs them to the subsequent stage.

  The image data processing circuit 50 converts the video signal sig output from the video signal switching circuit 44 into image data indicating light emission / non-light emission for each subfield.

  The video signal detection circuit 51 determines the presence or absence of a video signal and outputs the result. Details of this operation will be described later.

  The timing generation circuit 55 generates various timing signals for controlling the operation of each circuit block based on the horizontal synchronization signal H, the vertical synchronization signal V, and the output from the video signal detection circuit 51, and supplies them to the respective circuit blocks.

  Scan electrode driving circuit 53 includes an initialization waveform generating circuit 63 for generating an initialization waveform voltage applied to scan electrodes SC1 to SCn in the initialization period, and a sustain pulse generating circuit for generating a sustain pulse voltage in the sustain period. (Not shown) has a scan pulse generation circuit (not shown) for generating a scan pulse voltage in the address period, and drives each of the scan electrodes SC1 to SCn based on the timing signal.

  The data electrode drive circuit 52 converts the image data for each subfield into a signal corresponding to each data electrode D1 to Dm, and drives each data electrode D1 to Dm based on the timing signal.

  Sustain electrode drive circuit 54 includes sustain pulse generation circuit 60 and a circuit for generating voltages Ve1 and Ve2, and drives sustain electrodes SU1 to SUn based on a timing signal.

  Here, in this embodiment, when the video signal detection circuit 51 determines that there is no video signal, the timing generation circuit 55 receives the determination result and sets the initialization voltage Vi2 to Vi2L having the lower voltage value. Thus, a timing signal is generated so that an up-ramp waveform voltage is generated, thereby reducing power consumption. Next, the details will be described. First, the operation of the video signal detection circuit 51 will be described, and then the reason for changing the initialization voltage Vi2 will be described.

  FIG. 5 is a circuit block diagram of the video signal detection circuit 51 according to Embodiment 1 of the present invention. The video signal detection circuit 51 includes a motion detection circuit 71, a signal level detection circuit 72, a lighting rate detection circuit 73, an external input detection circuit 74, a determination circuit 76, and a memory 77.

  The motion detection circuit 71 calculates, for each pixel, a difference between the video signal sig delayed by one frame period by a frame memory (not shown) and the current video signal sig, and the calculated difference is used for a predetermined motion detection. Generally used motion detection, such as comparison with a threshold value, is performed. Note that the difference detection may be performed using RGB signals, or may be performed using a luminance signal and a color difference signal. Then, the number of pixels determined to have motion is accumulated for one frame period, and the accumulated value is compared with a predetermined still image determination threshold value to determine whether the current display image is a moving image or a still image. Make a decision.

  The signal level detection circuit 72 compares the signal level of the video signal sig with a predetermined threshold for signal level comparison for each pixel. The signal level comparison may be performed using RGB signals, or may be performed using each of a luminance signal and a color difference signal. Then, the number of pixels determined to be less than the threshold value is accumulated for one frame period, and the accumulated value is compared with a predetermined threshold value for black image determination to determine whether the current display image is entirely black. Make a decision.

  The lighting rate detection circuit 73 detects a lighting rate that is a ratio of discharge cells to be lit to all discharge cells. Then, the detected lighting rate is compared with a predetermined lighting rate threshold value for each subfield. Then, it is determined whether or not the lighting rate is less than the lighting rate threshold value in all subfields in one field period.

  The external input detection circuit 74 detects which one of the video signal output from the tuner 41 and the video signal output from the video signal input circuit 42 is selected in the video signal switching circuit 44.

  When the determination circuit 76 determines that the output from the video signal input circuit 42 is selected in the external input detection circuit 74, the determination result of the motion detection circuit 71 is a still image, and the signal level detection circuit 72 If the determination result is all black and the determination result of the lighting rate detection circuit 73 is all subfields and the lighting rate is less than the lighting rate threshold, it is determined that there is no video signal, otherwise. It is determined that there is a video signal, and a signal representing the determination result is output to the timing generation circuit 55.

  Each threshold value described above is stored in advance in the memory 77 and is read out at a predetermined timing by each detection circuit. The memory 77 may be used alone as shown in FIG. 5, or may be shared with a memory used by the microcomputer. The above is the configuration of the video signal detection circuit 51.

  As described above, some playback devices output a synchronization signal even when there is no playback video signal. In a configuration that detects the presence or absence of a video signal by detecting the presence or absence of a synchronization signal, when such a playback device is connected and used, it is determined that the video signal is actually present even though there is no video signal. Normal operation will be performed.

  However, in this embodiment, with the above-described configuration, even when a playback device that outputs only a synchronization signal when there is no playback video signal is connected and used, the video signal Presence / absence can be accurately determined.

  In this embodiment, the initialization voltage Vi2 is set to Vi2H having a higher voltage value during normal operation, and when the determination circuit 76 determines that there is no video signal, the initialization voltage Vi2 is set to the lower voltage value. As a result, an up-ramp waveform voltage is generated, thereby reducing power consumption.

  When there is no reproduced video signal and there is only a sync signal, the display image is entirely black. If the entire surface is black, there are no discharge cells to be lit, so no address discharge occurs and no sustain discharge occurs. Therefore, even if the voltage value of the address pulse voltage or the sustain pulse voltage is changed, the power consumption reduction effect is low. However, regardless of the presence or absence of discharge cells to be lit, an initializing discharge occurs in the all-cell initializing subfield. For this reason, it is possible to obtain an effect of reducing power consumption by lowering the initialization voltage Vi2 of the up-ramp waveform voltage for generating the initialization discharge.

  Note that if the initialization voltage Vi2 is set to Vi2L, the discharge may become unstable as compared with the case where the initialization voltage Vi2 is set to Vi2H. However, since there are no discharge cells to be lit, there is no problem even if the discharge is somewhat unstable.

  In addition, as a conventional technique, a configuration in which driving is completely stopped when there is no video signal has been described. However, if driving is completely stopped, it takes a certain amount of time to resume driving and stabilize the operation. . In the playback device, when playback of the optical disk or magnetic tape is started and a playback video signal is generated, the output from the playback device instantaneously changes from a state where there is no video signal to a state where there is a video signal. For this reason, it is difficult for the conventional technique to immediately and stably display an image in such a case.

  However, since this embodiment does not stop driving, it is possible to immediately cope with such a change and perform stable image display.

  As described above, according to the present embodiment, the above-described configuration increases the detection accuracy of the presence / absence of the video signal in the video signal detection circuit 51, and the up-ramp waveform voltage when it is determined that there is no video signal. By changing the initialization voltage Vi2 from Vi2H having a higher voltage value to Vi2L having a lower voltage value, both stable operation and reduction of power consumption can be achieved.

  In this embodiment, the voltage Vi2H and the voltage Vi2L are set so that the potential difference between the initialization voltage Vi2 and the voltage Vi1 is 240 (V) when the voltage is Vi2H and 200 (V) when the voltage is Vi2L. However, this numerical value is merely an example, and may be set optimally according to the characteristics of the panel and the specifications of the plasma display device.

(Embodiment 2)
FIG. 6 is a circuit block diagram of the video signal detection circuit 56 according to the second embodiment of the present invention. The video signal detection circuit 56 includes a motion detection circuit 71, a signal level detection circuit 72, a lighting rate detection circuit 73, an external input detection circuit 74, a determination circuit 76, a memory 77, and the video signal detection circuit 51 described with reference to FIG. In addition, an audio level detection circuit 75 is provided.

  The sound level detection circuit 75 compares the input sound level with a predetermined sound level detection threshold value at a predetermined time interval (for example, 1 msec). Then, the result determined to be less than the threshold value is accumulated for a predetermined time (for example, 1 sec), and the accumulated value is compared with a predetermined threshold value for silence determination to determine whether there is sound. I do.

  When the determination circuit 76 determines that the output from the video signal input circuit 42 is selected in the external input detection circuit 74, the determination result of the motion detection circuit 71 is a still image, and the signal level detection circuit If the determination result of 72 is black, the determination result of the lighting rate detection circuit 73 is all subfields, the lighting rate is less than the lighting rate threshold value, and the determination result of the sound level detection circuit 75 is no sound. For example, it is determined that there is no video signal. In other cases, it is determined that there is a video signal, and a signal representing the determination result is output to the timing generation circuit 55.

  In this configuration, for example, even when a very dark video that is erroneously determined to have no video signal is continuously displayed, it is determined that there is a video signal when audio is detected. Therefore, it is possible to prevent misjudgment, and it is possible to further improve the accuracy of detecting the presence / absence of a video signal.

  In the embodiment of the present invention, the operation in the video signal detection circuits 51 and 56 has been described as being realized by a circuit. However, software that performs the same operation is operated on a microcomputer without using a circuit. You may comprise as follows.

  As described above, according to the present invention, it is possible to improve the detection accuracy of the presence / absence of a video signal and achieve both stable operation and power consumption reduction, thereby reducing the power consumption of the plasma display device. This is a useful invention.

The disassembled perspective view which shows the structure of the panel in one embodiment of this invention. Electrode arrangement of the panel Drive voltage waveform diagram applied to each electrode of the panel Circuit block diagram of plasma display device according to Embodiment 1 of the present invention 1 is a circuit block diagram of a video signal detection circuit according to Embodiment 1 of the present invention. Circuit block diagram of a video signal detection circuit in Embodiment 2 of the present invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Panel 21 Front plate 22 Scan electrode 23 Sustain electrode 24 Display electrode pair 25,33 Dielectric layer 26 Protective layer 31 Back plate 32 Data electrode 34 Partition 35 Phosphor layer 40 Antenna 41 Tuner 42 Video signal input circuit 43 Playback device 44 Video Signal switching circuit 45 Microcomputer 46 Sync separation circuit 50 Image data processing circuit 51, 56 Video signal detection circuit 52 Data electrode drive circuit 53 Scan electrode drive circuit 54 Sustain electrode drive circuit 55 Timing generation circuit 71 Motion detection circuit 72 Signal level detection circuit 73 lighting rate detection circuit 74 external input detection circuit 75 audio level detection circuit 76 determination circuit 77 memory

Claims (2)

A scan electrode driving circuit that applies a ramp waveform voltage that gradually rises during the initialization period to the scan electrodes of the plasma display panel;
Compares the input video signal of the previous frame with the current input video signal to determine whether the displayed image is a moving image or a still image, and compares the signal level of the input video signal with a predetermined threshold value. A signal level detection circuit that determines whether the display image is entirely black, a lighting rate detection circuit that detects the ratio of discharge cells to be lit to all discharge cells, and a determination as to whether the input video signal is input from the outside Video signal detection circuit comprising: an external input detection circuit configured to detect a video signal based on determination results in the motion detection circuit, the signal level detection circuit, the lighting rate detection circuit, and the external input detection circuit And
The scan electrode driving circuit is configured to generate the ramp waveform voltage by lowering the maximum voltage of the ramp waveform voltage compared to other cases when it is determined that there is no video signal in the video signal detection circuit. A plasma display device. The video signal detection circuit includes an audio level detection circuit that compares the signal level of the input audio signal with a predetermined threshold value to determine whether there is no audio, and the determination circuit includes the audio level detection circuit 2. The plasma display device according to claim 1, wherein the determination result is added to determine the presence or absence of a video signal.

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