JP2009131107A - Ac-dc converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an AC-DC converter which reduces higher harmonic waves without increasing the number of multiconnection inverters and allows less power loss. <P>SOLUTION: AC voltage midpoints of two half-bridge inverters 11 having different AC voltages are connected to each other through a connecting line 16. A pair of output terminals U1 and U1' (U2 and U2') are extended from connection points of switching elements of the two half-bridge inverters 11, respectively, to form a multilevel inverter 15. The pair of output terminals U1 and U1' (U2 and U2') of the multilevel inverter 15 are electrically connected in series with a transformer 13 to achieve multiconnection of the multilevel inverter 15. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an AC / DC converter in which multilevel inverters that convert direct current to alternating current are connected in multiple.

  In order to freely change the frequency, magnitude, phase, etc. of power, it is necessary to use power electronics technology. Power electronics technology is a general term for technologies that combine semiconductor technology, power technology, and control technology.

  An AC / DC converter that converts direct current to alternating current using this power electronics technology generates a direct current pulse train by turning on and off a switching element, which is a power semiconductor device, and generates an alternating voltage when the pulse train is modulated in a sine wave. . This AC voltage contains many distorted wave components in principle, and various methods have been proposed to reduce this distorted wave.

  For example, a PWM control method, a multiplexing method, a multilevel method, and the like can be given. The PWM control method chops an input DC voltage to make an output voltage into a pulse shape, and controls the number, interval, width, etc. of the pulse to obtain an AC output with reduced distortion wave voltage (for example, Patent Documents) 1). The multiplexing method is a method of combining the outputs of a plurality of inverters to make it closer to a sine wave, and is used for reducing harmonics of a large capacity inverter (see, for example, Patent Document 2). On the other hand, the multi-level method is a method in which a voltage dividing circuit is provided inside the AC / DC converter without using a transformer or a reactor, and the output waveform is multiplexed to increase the capacity of the inverter and reduce harmonics (for example, And Patent Document 3).

  In particular, as an effective means for suppressing the harmonic distortion voltage of the AC / DC converter, a technology for multiplexing the inverter is applied. By multiplexing the inverter, the system capacity can be expanded in addition to the merit of reducing the harmonics. It is also possible.

  FIG. 8 is a circuit configuration diagram showing an example of a conventional AC / DC converter. FIG. 8 shows an AC / DC converter in which two half-bridge inverters 11 are combined to form a three-level inverter 12, and two three-level inverters 12a and 12b are connected in series by coupling transformers 13a and 13b. Note that the DC voltages of the two three-level inverters 12a and 12b have different voltages E1 and E2, respectively.

  The three-level inverter 12a connects two half-bridge inverters 11a1 and 11a2 in parallel to the DC voltage E1 (E1 / 2 + E1 / 2), and outputs from the connection point between the switching elements S1 and S2 of the half-bridge inverter 11a1. The terminal U1 is drawn out, and similarly, the output terminal U1 ′ is drawn out from the connection point between the switching element S3 and the switching element S4 of the half-bridge inverter 11a2. Freewheeling diodes D1 to D4 are connected in parallel to the switching elements S1 to S4. The three-level inverter 12a outputs three-level output voltages E1, 0, and -E1 between the output terminals U1 and U1 '.

  On the other hand, the three-level inverter 12b similarly connects two half-bridge inverters 11b1 and 11b2 in parallel to the DC voltage E2 (E2 / 2 + E2 / 2), and connects the switching elements S5 and S6 of the half-bridge inverter 11b1. The output terminal U2 is drawn from the connection point, and similarly, the output terminal U2 ′ is drawn from the connection point between the switching element S7 and the switching element S8 of the half-bridge inverter 11b2. Freewheeling diodes D5 to D8 are connected in parallel to the switching elements S5 to S8. The three-level inverter 12b outputs three-level output voltages E2, 0, and -E2 between the output terminals U2 and U2 '.

  FIG. 9 is a waveform diagram of output voltages at the output terminals U and U 'of the AC / DC converter in which two three-level inverters 12a and 12b are combined. Since the output voltage of the 3-level inverter 12a is 3 levels of E1, 0, -E1, and the output voltage of the 3-level inverter 12a is 3 levels of E2, 0, -E2, the output terminal of the AC / DC converter The output voltages of U and U ′ are five levels of output voltages E2, E1 + E2, 0, −E2, and − (E1 + E2). A voltage waveform approximating a sine wave is obtained by combining these five levels of output voltages.

FIG. 10 is a circuit configuration diagram showing another example of a conventional AC / DC converter. FIG. 10 shows an example shown in FIG. 9 in which the output terminal U1 ′ of the three-level inverter 12a and the output terminal U2 of the three-level inverter 12b are connected by a connection line 14 instead of the coupling transformers 13a and 13b. Inverters 12a and 12b are connected in series and multiplexed. In this case as well, a 5-level output voltage is obtained as in FIG.
Japanese Patent Laid-Open No. 2-42815 JP-A-6-276747 JP-A-6-261551

  However, even if the multiplexing method is used, the effect of increasing the number of levels is low. For example, in FIG. 8 and FIG. 10, even if the three-level inverters 12a and 12b are duplicated, only five levels are obtained. Therefore, since it is difficult to obtain a waveform that approximates a sine wave when the number of levels is small, it is necessary to use the PWM control method together even when the multiplexing method is used, resulting in a problem that the loss increases extremely. Further, if the number of inverters to be multiplexed is increased, the number of levels increases, but if the number of inverters is increased, the failure rate increases and the reliability decreases.

  Moreover, since the transformer wave for a converter is directly applied with the distorted wave voltage from the AC / DC converter, it is necessary to use a special transformer with a low magnetic flux density or a transformer with a large rated capacity as a countermeasure against the magnetism of the transformer. For this reason, when the installation space of the transformer becomes large or a large-capacity transformer is manufactured, the weight increases, and a great deal of labor is required for transportation to the site.

  On the other hand, when an AC / DC converter having a large harmonic voltage distortion is connected to an electric power system, problems such as the reactor attached to the power factor correction capacitor being burned out due to the influence of the harmonic current generated therefrom have become apparent. There may also be problems such as malfunction of electrical equipment. Therefore, development of an AC / DC converter with less harmonic voltage distortion is required.

  An object of the present invention is to provide an AC / DC converter that can reduce harmonics without increasing the number of multiplexing inverters and that has low power loss.

  The AC / DC converter according to the invention of claim 1 includes two half-bridge inverters having different DC voltages, a connection line connecting the midpoints of the DC voltages of the two half-bridge inverters, and two half-bridge inverters. Forming a multi-level inverter having a pair of output terminals drawn from the connection points of the respective switching elements of the bridge inverter, and connecting the pair of output terminals of the multi-level inverter by transformer coupling or series connection; It is characterized in that multiple inverters are connected.

  The AC / DC converter according to the invention of claim 2 is characterized in that, in the invention of claim 1, the output voltage is adjusted using all the levels that can be outputted by the multilevel inverter.

  According to a third aspect of the present invention, there is provided an AC / DC converter according to the first aspect of the present invention, wherein the range of the output voltage is widened by selecting the number of levels to be used from all the levels that can be output in the multilevel inverter. Features.

  According to the present invention, the midpoints of DC voltages of two half-bridge inverters having different DC voltages are connected to each other by a connection line, and a pair of points is connected from the connection points of the switching elements of the two half-bridge inverters. The output terminal is pulled out to form a multi-level inverter, and a pair of output terminals of the multi-level inverter is connected to a transformer or connected in series to form an AC / DC converter in which a plurality of multi-level inverters are connected in multiple. Compared with a conventional AC / DC converter in which inverters are multiplexed, the number of components is almost the same and the number of output levels can be increased. Therefore, since an output voltage waveform close to a sine wave can be obtained, harmonics can be significantly reduced. In addition, since the demagnetization phenomenon of the transformer for the converter can be suppressed as much as possible, the transformer can be reduced in size and weight. In addition, since the output level width and the number of output levels of the multilevel inverter can be adjusted, the output voltage can be easily adjusted.

  FIG. 1 is a circuit configuration diagram showing an example of an AC / DC converter according to an embodiment of the present invention. The AC / DC converter circuit is configured by connecting multiple multi-level inverters 15 combining two half-bridge inverters 11 by transformer coupling. FIG. 1 shows a case where two multi-level inverters 15a and 15b are double-multiplexed by transformer coupling.

  The multilevel inverter 15a includes two half-bridge inverters 11a1 and 11a2 having different DC voltages. That is, the half-bridge inverter 11a1 of the multi-level inverter 15a has two DC voltages of the DC voltage E1, and the half-bridge inverter 11a2 has two DC voltages of the DC voltage E2. They are connected by a connection line 16a. In the multilevel inverter 15a, the output terminal U1 is drawn from the connection point between the switching element S1 and the switching element S2 of the half-bridge inverter 11a1, and similarly, the connection between the switching element S3 and the switching element S4 of the half-bridge inverter 11a2 is connected. The output terminal U1 ′ is drawn from the point, and the freewheeling diodes D1 to D4 are connected in parallel to the switching elements S1 to S4.

  On the other hand, the multi-level inverter 15b is similarly composed of two half-bridge inverters 11b1 and 11b2 having different direct-current voltages. The half-bridge inverter 11b1 has two direct-current voltages E3 and the half-bridge inverter 11b2 The DC voltage E4 has two DC voltages, and the midpoints of the DC voltages are connected by a connection line 16b. In the multilevel inverter 15b, the output terminal U2 is drawn from the connection point between the switching element S5 and the switching element S6 of the half-bridge inverter 11b1, and similarly, the connection between the switching element S7 and the switching element S8 of the half-bridge inverter 11b2 is connected. The output terminal U2 ′ is drawn from the point, and the freewheeling diodes D5 to D8 are connected in parallel to the switching elements S5 to S8.

  The two multilevel inverters 15a and 15b are connected in series by coupling transformers 13a and 13b, and output terminals U and U 'of the AC / DC converter are drawn out. The switching elements S1 to S8 of the two multilevel inverters 15a and 15b are individually controlled by the gate control circuit 17. That is, when the output voltage command to the AC / DC converter is input to the pulse train determining means 18, the pulse train determining means 18 outputs the pulse train to the gate control circuit 17 so that the output voltage of the AC / DC converter matches the output voltage command. To do. The gate control circuit 17 performs on / off control of the switching elements S1 to S8 by the gate drive circuit 19 based on the pulse train from the pulse train determination means 18.

  Here, the half-bridge inverter 11a1 of the multi-level inverter 15a is a two-level half-bridge inverter that outputs E1 and -E1 to the output terminal U1, and the half-bridge inverter 11a2 outputs E2 and -E2 to the output terminal U1 '. This is a two-level half-bridge inverter. Accordingly, the output voltage between the output terminals U1 and U1 'of the multi-level inverter 15a becomes four levels of E1 + E2, E1-E2, -E1 + E2, and-(E1 + E2).

  The half-bridge inverter 11b1 of the multilevel inverter 15b is a two-level half-bridge inverter that outputs E3 and -E3 to the output terminal U2, and the half-bridge inverter 11b2 outputs E4 and -E4 to the output terminal U2 '. It is a two-level half-bridge inverter. Therefore, the output voltage between the output terminals U2 and U2 'of the multi-level inverter 15b becomes four levels of E3 + E4, E3-E4, -E3 + E4, and-(E3 + E4).

Therefore, as shown in Table 1, the output voltage output from between the output terminals U and U ′ of the AC / DC converter is an output voltage of 16 levels.

  Assuming that the ratio of the absolute values | E1 |, | E2 |, | E3 |, | E4 | of the voltages E1, E2, E3, E4 is 8: 7: 4: 2, the modes M1 to M1 shown in Table 1 The 16 level voltages of M16 all take different values.

  FIG. 2 is a waveform diagram of output voltages at the output terminals U and U 'of an example of the AC / DC converter according to the embodiment of the present invention. In FIG. 2, the ratio of the absolute values | E1 |, | E2 |, | E3 |, and | E4 | of the voltages E1, E2, E3, and E4 is 8: 7: 4: 2, and the 16-level output shown in Table 1 is used. This shows a case where the voltage waveform is approximated to a sine wave by combining the voltages. In mode M1, the half-bridge inverter 11a1 of the multilevel inverter 15a outputs -E1 to the output terminal U1, the half-bridge inverter 11a2 outputs E2 to the output terminal U1 ', and the half-bridge inverter 11b1 of the multilevel inverter 15b is E3. Is output to the output terminal U2, and the half-bridge inverter 11b2 outputs -E4 to the output terminal U2 '. In this case, the output voltage output from between the output terminals U and U ′ of the AC / DC converter is −E1 + E2 + E3−E4, and the ratio of | E1 |, | E2 |, | E3 |, and | E4 | : 4: 2. Here, when the output voltage of mode M1 is 1, the output voltage output from between the output terminals U and U ′ of the AC / DC converter in mode M2 is E1−E2 + E3−E4, and the output voltage of mode M1 is Doubled.

  Similarly, the output voltage output between the output terminals U and U ′ of the AC / DC converter in the mode M3 is five times and output between the output terminals U and U ′ of the AC / DC converter in the mode M4. The output voltage is 7 times, the output voltage output from the output terminals U and U ′ of the AC / DC converter in the mode M5 is 9 times, and the output voltage is output from between the output terminals U and U ′ of the AC / DC converter in the mode M6. The output voltage is 13 times, and the output voltage output between the output terminals U and U ′ of the AC / DC converter in the mode M7 is 17 times, between the output terminals U and U ′ of the AC / DC converter in the mode M8. The output voltage output from is 21 times.

  In FIG. 2, the modes M1 to M5 and M8 have the same output level width, the modes M6 and M7 have twice the level width, and the modes M1 to M8 form a quarter cycle of 0 ° to 90 ° of the sine wave. Then, a quarter period of 90 ° to 180 ° of the sine wave is formed in the modes M8 to M1.

  In the modes M9 to M16, the polarities of the output voltages of the modes M1 to M8 are reversed. The modes M9 to M16 form a quarter cycle of 180 ° to 270 ° of the sine wave, and the modes M16 to M9 are sine. Form a quarter period of 270 ° to 360 ° of the wave. In this way, the output voltage output from between the output terminals U and U 'of the AC / DC converter is brought close to a sine wave.

  The combination of the output voltage waveforms of the AC / DC converter is performed in the gate control circuit 17 by the pulse train from the pulse train determining means 18 based on the output voltage command. The output voltage is adjusted by changing the pulse width or the number of output levels of the multilevel inverters 15a and 15b.

  FIG. 3 is a waveform diagram of the output voltage when the output voltage of the AC / DC converter is adjusted by changing the output level width of the multilevel inverters 15a and 15b (when the voltage is increased). As shown in FIG. 3, compared with the case of FIG. 2, the output level width of modes M1 to M4 is reduced and the output level width of mode M8 is increased, and the output level width of modes M9 to M12 is reduced and mode M16 is reduced. The output voltage is adjusted by increasing the output level width.

  FIG. 4 is a waveform diagram of the output voltage when the number of output levels of the multilevel inverters 15a and 15b is varied to adjust the output voltage of the AC / DC converter (when the voltage is lowered). As shown in FIG. 4, compared to the case of FIG. 2, the voltage waveform approximated to a sine wave is obtained by combining the 12 modes M1 to M6 and M9 to M14 without using the modes M7, M8, M15, and M16. It is obtained. In this case, the output level widths of the modes M5 and M13 are increased, and the output level widths of the modes M6 and M14 are also increased to obtain a voltage waveform that approximates a sine wave.

  In the above description, the case where the multilevel inverters 15a and 15b are multiplex-connected by the coupling transformers 13a and 13b has been shown. However, as shown in FIG. The output terminal U1 ′ of 15a and the output terminal U2 of the multilevel inverter 15b may be connected to multiplex the multilevel inverters 15a and 15b in series. In this case as well, a 16-level output voltage is obtained as in FIG. In FIG. 5, the gate control circuit 17, the pulse train determining means 18, and the gate drive circuit 19 are not shown.

  In the above description, the half-bridge inverters 11a1, 11a2, 11b1, and 11b2 are two-level half-bridge inverters. However, NPC half-bridge inverters are used as the half-bridge inverters 11a1, 11a2, 11b1, and 11b2. Is also possible.

  FIG. 6 is a circuit configuration diagram of an AC / DC converter when an NPC half-bridge inverter is used as the half-bridge inverters 11a1, 11a2, 11b1, and 11b2.

  The multi-level inverter 15a is composed of two half-bridge inverters 11a1 and 11a2 that are NPC half-bridge inverters, and the two half-bridge inverters 11a1 and 11a2 have different DC voltages. That is, the half-bridge inverter 11a1 of the multi-level inverter 15a has two DC voltages of the DC voltage E1, and the half-bridge inverter 11a2 has two DC voltages of the DC voltage E2. They are connected by a connection line 16a.

  The half-bridge inverter 11a1 includes four switching elements S1 to S4, freewheeling diodes D1 to D4 connected in parallel to the switching elements S1 to S4, connection points of the switching elements S1 and S2, and connection points of the switching elements S3 and S4. The clamp diodes D17 and D18 are connected between the points, and the connection point of the clamp diodes D17 and D18 is connected to the midpoint of the two DC voltages E1. Similarly, the half-bridge inverter 11a2 includes four switching elements S5 to S8, freewheeling diodes D5 to D8 connected in parallel to the switching elements S5 to S8, connection points of the switching elements S5 and S6, and switching elements S7 and S8. The clamp diodes D19 and D20 are connected between the connection points, and the connection points of the clamp diodes D19 and D20 are connected to the midpoint of the two DC voltages E2.

  Further, the output terminal U1 is drawn from the connection point between the switching elements S2 and S3 of the half-bridge inverter 11a1, and similarly, the output terminal U1 ′ is connected from the connection point between the switching elements S6 and S7 of the half-bridge inverter 11a2. Has been pulled out.

  On the other hand, the multi-level inverter 15b is similarly composed of two half-bridge inverters 11b1 and 11b2 which are NPC half-bridge inverters, and the two half-bridge inverters 11b1 and 11b2 have different DC voltages. That is, the half-bridge inverter 11b1 of the multi-level inverter 15b has two DC voltages of the DC voltage E3, and the half-bridge inverter 11b2 has two DC voltages of the DC voltage E4. They are connected by a connection line 16b.

  The half-bridge inverter 11b1 includes four switching elements S9 to S12, freewheeling diodes D9 to D12 connected in parallel to the switching elements S9 to S12, connection points of the switching elements S9 and S10, and connection points of the switching elements S11 and S12. The clamp diodes D21 and D22 are connected between the points, and the connection point of the clamp diodes D21 and D22 is connected to the midpoint of the two DC voltages E3. Similarly, the half-bridge inverter 11b2 includes four switching elements S13 to S16, freewheeling diodes D13 to D16 connected in parallel to the switching elements S13 to S16, connection points of the switching elements S13 and S14, and switching elements S15 and S16. The clamp diodes D23 and D24 are connected between the connection points, and the connection point of the clamp diodes D23 and D24 is connected to the midpoint of the two DC voltages E4.

  The output terminal U2 is drawn from the connection point between the switching elements S10 and S11 of the half-bridge inverter 11b1, and similarly, the output terminal U1 ′ is connected from the connection point between the switching elements S14 and S15 of the half-bridge inverter 11b2. Has been pulled out.

  The two multilevel inverters 15a and 15b are connected in series by coupling transformers 13a and 13b, and output terminals U and U 'of the AC / DC converter are drawn out. The switching elements S1 to S16 of the two multilevel inverters 15a and 15b are individually controlled by a gate control circuit (not shown).

Here, since the half-bridge inverters 11a1 and 11a2 of the multilevel inverter 15a are NPC half-bridge inverters, the half-bridge inverter 11a1 outputs E1, 0, and −E1 to the output terminal U1, and the half-bridge inverter 11a2 E2, 0, -E2 are output to the output terminal U1 '. Therefore, the output voltage between the output terminals U1 and U1 ′ of the multilevel inverter 15a becomes 9 levels as shown in Table 2. That is, there are nine levels of 0, E1, -E1, E2, -E2, E1 + E2, E1-E2, -E1 + E2, and-(E1 + E2).

Similarly, since the half-bridge inverters 11b1 and 11b2 of the multi-level inverter 15b are NPC half-bridge inverters, the half-bridge inverter 11b1 outputs E3, 0, and −E3 to the output terminal U2, and the half-bridge inverter 11b2 E4, 0, and -E4 are output to the output terminal U2 '. Therefore, the output voltage between the output terminals U2 and U2 ′ of the multilevel inverter 15b is 9 levels as shown in Table 3. That is, there are nine levels of 0, E3, -E3, E4, -E4, E3 + E4, E3-E4, -E3 + E4,-(E3 + E4).

  Therefore, the output voltage output from between the output terminals U and U ′ of the AC / DC converter is 81 (a combination of the 9-level output voltage of the multilevel inverter 15a and the 9-level output voltage of the multilevel inverter 15b). 9 × 9) level output voltage. The ratios of the absolute values | E1 |, | E2 |, | E3 |, | E4 | of the voltages E1, E2, E3, E4 are set so that the 81 (9 × 9) level output voltages all have different values. To do. Thereby, since 81 levels of output voltages having different output voltage values can be output, a voltage waveform more closely approximated by a sine wave can be obtained.

  In addition, when the DC voltage value can only be selected to be an integral multiple of the reference battery, the output level of the voltage value overlaps, even if the output level of the same voltage value is nearly half, it is quite approximate to a sine wave A voltage waveform can be obtained.

  In the above description, the multilevel inverters 15a and 15b are multiplex connected by the coupling transformers 13a and 13b. However, as shown in FIG. The output terminal U1 ′ of 15a and the output terminal U2 of the multilevel inverter 15b may be connected to multiplex the multilevel inverters 15a and 15b in series. Also in this case, an 81-level output voltage can be obtained as in the AC / DC converter shown in FIG. In FIG. 7, as in the case of FIG. 6, the gate control circuit 17, the pulse train determining means 18, and the gate drive circuit 19 are not shown.

  In the above description, the case where two multilevel inverters 15a and 15b are connected in series and multiple is described, but three or more multilevel inverters 15 may be connected in series and connected. In this case, since the number of output levels further increases, the sine wave can be approximated more finely.

  According to the embodiment of the present invention, the midpoints of the DC voltages of two half-bridge inverters 11 having different DC voltages are connected to form a multilevel inverter, and the multilevel system is connected to the coupling transformer 13 or Since multiplexing is performed by the connection line 14, the number of levels can be greatly increased. Thereby, the output voltage waveform can be approximated to a sine wave, and harmonics can be reduced.

  For example, compared with a conventional system in which a full bridge inverter is multiplexed, the number of components is almost the same, and the number of levels can be increased from 5 levels to 16 levels. For this reason, harmonics can be significantly reduced, and the reliability of the system can be secured. In addition, since the demagnetization phenomenon of the transformer for the converter can be suppressed as much as possible, the transformer can be reduced in size and weight. Furthermore, the number of output levels can be increased, and the filter capacity can be greatly reduced because it can be approximated by a sine wave.

The circuit block diagram which shows an example of the AC / DC converter concerning embodiment of this invention. The wave form diagram of the output voltage of the output terminals U and U 'of an example of the AC / DC converter according to the embodiment of the present invention. The wave form diagram of the output voltage at the time of varying the output level width of the multilevel inverter in the embodiment of the present invention and adjusting the output voltage of the AC / DC converter (when the voltage is increased). The wave form diagram of the output voltage at the time of adjusting the output voltage of an AC / DC converter by varying the number of output levels of the multilevel inverter in the embodiment of the present invention (when the voltage is lowered). The circuit block diagram which shows another example of the AC / DC converter concerning embodiment of this invention. The circuit block diagram which shows another example of the AC / DC converter concerning embodiment of this invention. The circuit block diagram which shows another example of the AC / DC converter concerning embodiment of this invention. The circuit block diagram which shows an example of the conventional AC / DC converter. The wave form diagram of the output voltage of an example of the conventional AC / DC converter. The circuit block diagram which shows another example of the conventional AC / DC converter.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... Half bridge inverter, 12 ... Three level inverter, 13 ... Coupling transformer, 14 ... Connection line, 15 ... Multi-level inverter, 16 ... Connection line, 17 ... Gate control circuit, 18 ... Pulse train determination means, 19 ... Gate drive circuit

Claims (3)

  Two half-bridge inverters with different DC voltages, connection lines connecting the midpoints of the DC voltages of the two half-bridge inverters, and connection points of the switching elements of the two half-bridge inverters A multi-level inverter having a pair of output terminals is formed, and the pair of output terminals of the multi-level inverter is coupled by a transformer or connected in series to multiplex-connect a plurality of multi-level inverters. AC / DC converter.   2. The AC / DC converter according to claim 1, wherein the output voltage is adjusted using all the levels that can be output in the multi-level inverter.   2. The AC / DC converter according to claim 1, wherein the range of the output voltage is expanded by selecting the number of levels to be used from all the levels that can be output in the multi-level inverter.

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