JP2009129887A - Organic el display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high-reliability organic EL display device preventing a deterioration phenomenon occurring from the vicinity of an end of a luminescent region. <P>SOLUTION: In the organic EL display device, a first electrode layer 308 is formed on a substrate 301, a bank 309 that covers the circumference of the first electrode layer and that patterns openings for specifying luminescent regions is formed, and a plurality of organic compound layers 311 and a second electrode layer 312 are formed thereon. The bank has a charge-injecting lower layer 309a contacting the first electrode layer and the organic compound layers, and an insulating upper layer 309b preventing conduction between the lower layer and the second electrode layer. The opening of the upper layer of the bank is wider than that of the lower layer thereof. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  In the present invention, a first electrode layer is provided on a substrate, a bank is formed by patterning an opening that covers the periphery of the first electrode layer and defines a light emitting region, and a plurality of organic compound layers and a second layer are provided thereon. The present invention relates to an organic EL display device provided with the electrode layer.

  Currently, the structure of an organic EL display device that is being developed in general includes a plurality of organic compound layers in which a first electrode layer is provided on a substrate and functions are separated with respect to charge transport and recombination. Further, the second electrode layer is basically laminated.

  These organic compound layers and electrode layers are often altered by moisture or oxygen. Therefore, it is difficult to use a general photolithography technique for patterning the organic compound layer and the electrode layer, and the patterning is often performed using a vapor deposition method using a metal mask.

  These patterning methods may have insufficient pattern accuracy. As an improvement method, an insulating layer is formed on the first electrode layer, and this insulating layer is finely patterned by photolithography to emit light. There is a method for accurately defining an area. In this method, a part of the first electrode layer is exposed in a predetermined pattern from the insulating layer to define a light emitting region, and an organic compound layer and a second electrode layer are provided thereon.

  Further, in the configuration using this insulating layer, a phenomenon is known in which a non-light emitting region is generated in the light emitting region from near the boundary between the first electrode layer and the insulating layer, and the area of the non-light emitting region is enlarged (see Patent Document 1). ). It is also shown that this is a deterioration phenomenon due to moisture.

JP 2001-196188 A

  The problem to be solved by the present invention is that the non-light-emitting region is generated from the vicinity of the boundary between the first electrode layer and the insulating layer in the configuration in which the light-emitting region is defined by patterning the insulating layer on the first electrode layer. It is to reduce the deterioration phenomenon. The present inventors have found that this deterioration phenomenon is caused mainly by moisture, but there are other factors, and a means for reducing this is found.

  That is, in a configuration in which the light emitting region is defined by blocking the electrode layer and the organic compound layer with the insulating layer, the electrode layer and the organic compound layer may be wider than the light emitting region. Therefore, at the boundary between the light emitting region and the non-light emitting region, a place where current flows and a place where current does not flow are adjacent to each other, and a concentration of current density due to current wrapping around and a difference in thermal stress due to different heat generation amount occur.

  The present inventors have found that the concentration of current density and the difference in thermal stress further promote the deterioration phenomenon due to moisture. The present invention provides means for solving this problem.

As means for solving the above problems, the present invention provides:
A first electrode layer is provided on a substrate, a bank is formed by patterning an opening that covers the periphery of the first electrode layer and defines a light emitting region, and a plurality of organic compound layers and a second electrode layer are provided thereon. In the provided organic EL display device,
The bank includes a charge injecting lower layer in contact with the first electrode layer and the organic compound layer, and an insulating upper layer for preventing conduction between the lower layer and the second electrode layer. ,
The opening of the upper layer of the bank is wider than the opening of the lower layer.

  According to the present invention, it is possible to prevent a deterioration phenomenon that occurs near the end of the light emitting region, and to achieve a highly reliable organic EL display device. In addition, a highly reliable organic EL display device can be obtained even for long-term use at high temperatures.

  First, a bank that is a feature of the present invention will be described.

  On the substrate, a first electrode layer is provided, and a bank is formed by patterning an opening that covers the periphery of the first electrode layer and defines a light emitting region. This bank has a charge injecting lower layer in contact with the first electrode layer and the organic compound layer, and an insulating upper layer for preventing conduction between the lower layer and the second electrode layer. The opening in the upper layer of the bank is made wider than the opening in the lower layer. The charge injection property of the present invention means that the resistivity is lower than that of the upper layer of the bank, and it has a resistance to reduce the current during driving in a stacked structure with an organic compound.

  Assume that the light emitting region in FIG. 5A has a uniform laminated structure of the first electrode layer 502 / the organic compound layer 505 / the second electrode layer 506 as a configuration 1. In addition, the light emitting region of FIG. 5B has a uniform laminated structure of the first electrode layer 502 / the layer 504 having a thickness of 200 nm for charge injection, the organic compound layer 505, and the second electrode layer 506. And The electrical conduction of these configurations is semiconducting and is generally not represented by resistivity. However, it can be expressed in terms of resistivity from the relationship between voltage and current during actual driving. The charge injecting layer suitable for the present invention preferably has a characteristic that the resistivity of the configuration 2 with respect to the configuration 1 is about 10 to 2 times. It is desirable to experimentally determine the conditions in advance so that the resistivity of the configuration 2 is 2 to 10 times that of the configuration 1. That is, since a suitable material composition differs depending on the organic compound, it is preferable to experimentally determine the composition in advance by experimentally producing the above-described configuration.

Examples of the charge injection material include metal oxides such as tin oxide, zinc oxide, titanium oxide, and vanadium oxide;
A semiconductor material such as doped amorphous silicon or silicon carbide, a hole transport organic material typified by triphenylamines, or an electron transport organic material typified by an oxadiazole derivative is desirable.

  Insulating materials include general insulating materials such as silicon oxide and silicon nitride, semiconductor materials such as amorphous silicon and silicon carbide that are not doped or slightly doped, and insulating materials such as acrylic and polyimide. Organic materials may be used.

  When the lower layer and the upper layer are the same or have similar properties, it is more preferable because the subsequent patterning can be performed simultaneously. The side wall of the bank can be easily formed into a forward tapered shape by using isotropic etching. The taper angle is preferably 45 ° or less. When the lower layer and the upper layer are different, it is necessary to pattern each of them. At this time, the opening of the upper layer is formed in a pattern wider than the opening of the lower layer. For patterning, a wet etching method or a dry etching method is suitable. In the case where etching selectivity with a base layer to be stacked is poor, a lift-off method or the like that can be removed after patterning a material that can be removed later to form a film can be used.

  Next, the organic EL display device obtained by the present invention will be described by taking an example where amorphous silicon is used for the bank.

  The present invention can be applied regardless of display methods such as a single pixel method, a passive matrix method, and an active matrix method, but is particularly effective for a high-definition display having a small pixel area. For example, in a display device having a diagonal size of 2.5 inches and 320 pixels × 240 pixels, the pitch of each pixel is about 159 μm × 53 μm for three subpixels per pixel. Further, the present invention can be applied to a bottom emission method in which the display direction is displayed on the substrate side or a top emission method in the reverse direction.

  Here, a full-color active matrix system that is most expected as a product will be described. In the active matrix system, a driving thin film transistor circuit (hereinafter abbreviated as TFT) is formed at each pixel or subpixel position on the substrate. Thereafter, a resin layer for flattening the unevenness of the TFT is applied, and a through hole for connecting the TFT and the first electrode layer is formed using a photolithography technique, a dry etching technique, or the like. Thereafter, the first electrode layer is provided on one surface, and a pattern corresponding to each pixel is also provided using photolithography technology or etching technology.

  Next, a low resistivity layer is provided by sputtering or plasma CVD on the substrate provided with the first electrode layer. Specifically, the case of amorphous silicon is illustrated. An amorphous silicon film is provided over the entire surface of the substrate provided with the first electrode layer. The lower layer of the amorphous silicon is doped to reduce the resistivity, and the upper layer is formed of a high resistivity film with a small amount of doping or no doping. An RF plasma CVD method or the like can be used for the production. Hydrogen gas or silane gas is used as a source gas, and phosphine or diborane is added for doping.

When the first electrode layer is a cathode layer, it is preferable to add about 0.001% to 1% of phosphine as a doping gas with respect to the silane gas. Expressed in terms of the doping amount of the deposited film, the amount of phosphorus atoms (donor elements) corresponds to 10 ⁻⁵ atomic% to 1 atomic%. However, the donor element may be added at 10 ⁻⁵ atomic% or more.

When the first electrode layer is an anode layer, it is preferable to add diborane as a doping gas in an amount of about 0.01% to 1% with respect to the silane gas. Expressed in terms of the doping amount of the deposited film, the amount of boron atoms (acceptor elements) corresponds to 10 ⁻⁴ atomic% to 1 atomic%. However, the acceptor element may be added at 10 ⁻⁴ atomic% or more.

  The thickness of the lower layer with low resistivity is preferably 10 nm to 300 nm. Thereafter, only the doping gas may be stopped in the middle, or may be continuously formed, or may be continuously formed in different film formation chambers that supply only hydrogen gas and silane gas.

Amorphous silicon having a high resistivity without adding a doping gas is provided with a thickness of 100 nm to 1000 nm. When the first electrode layer is a cathode layer, amorphous silicon having a high resistivity is sufficient if the donor element is less than 10 ⁻⁵ atomic%, and when the first electrode layer is an anode layer, the acceptor element is 10 It may be less than ^-4 atomic%.

  The lower layer with low resistivity and the upper layer with high resistivity may be stepped in composition or continuously changed.

  In the sense of defining the light emitting region, it is better not to emit light in the portion adjacent to the light emitting region. Therefore, it is desirable that the current flowing in the portion adjacent to the light emitting region is smaller than the current density of the light emitting region, but there is no particular problem even if light is emitted as long as it is a minute region only adjacent to the light emitting region. In the present invention, since the bank side wall portion is provided in a forward tapered shape, a current flows only in a portion adjacent to the light emitting region.

In the present invention, it is important that current flows in a portion adjacent to the light emitting region of the bank at a current density lower than that of the light emitting region during driving. The organic compound layer is semiconducting and does not have a certain resistivity. However, the resistivity that can be calculated from actual driving conditions is about 10 ⁷ Ωcm because the film thickness of the organic compound layer is several hundred nm, the driving voltage is several V, and the current is 10 mA / cm ² . When amorphous silicon is not doped, it is about 10 ⁷ Ωcm, and it can be controlled from 10 ² to 10 ⁶ Ωcm by doping.

In addition, an energy barrier may occur at the interface between the amorphous silicon and the organic compound layer. Although the detailed principle and mechanism for generating the energy barrier are unknown, as a method for reducing the energy barrier, the oxide conductive layer can be thinly provided so that electrical conduction between the sub-pixels can be ignored. For example, when ITO is used as the oxide conductive layer, the resistivity of ITO is 10 ⁻⁴ Ωcm, and it is necessary to provide a thin thickness of 10 nm or less in order to neglect conduction in the lateral direction.

Even though doped amorphous silicon has a low resistivity, it has a resistance of 10 ² Ωcm, and the lateral conduction can be easily ignored. However, since the resistance is so low that it cannot be ignored in the thickness direction, a high resistance layer in which doping is not performed or only a small amount of doping is required is required.

  Thereafter, a photoresist is applied, exposed, and developed to form a photoresist in a desired pattern that covers the periphery of the first electrode layer of each pixel and that has an opening in the center.

Furthermore, by etching isotropically using CF ₄ and O ₂ gas with a dry etching apparatus, amorphous silicon can be formed in the same pattern as the photoresist, and the side wall portion can be formed in a forward tapered shape. Thereafter, the photoresist is preferably peeled off and washed.

  After these, a plurality of organic compound layers are provided, a second electrode layer is provided, and a sealing member is further provided to complete an organic EL display device.

  Hereinafter, the configuration of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a schematic plan view of a general organic EL display device. A first electrode layer 101 is formed for each pixel at horizontal and vertical pitches Px and Py. In the case of a full-color display device, one pixel is formed of three colors or four colors, and each display pixel is called a sub-pixel. However, in the present invention, it does not affect the essence of the invention. It expresses. A bank 102 is patterned so as to cover the periphery of the first electrode layer 101 for each pixel to form a light emitting region 104. Reference numeral 103 denotes a bank side.

  FIG. 2A is a schematic cross-sectional view of the organic EL display device of the present invention corresponding to FIG. A TFT is composed of a channel layer 302 serving as a source, a channel, and a drain, and a gate electrode 304 via a gate oxide film 303 on a substrate 301. A protective film 305 and a planarizing film 306 are provided on the TFT. By providing the first electrode layer 308 over the contact hole 307 provided in the protective film 305 and the planarization film 306, the TFT and the first electrode layer 308 are electrically connected.

  A bank 309 is provided so as to cover the periphery of the first electrode layer 308, and a light emitting region (opening) 310 is formed. A multilayer organic compound layer 311 and a second electrode layer 312 are formed thereon.

  FIG. 2B is a cross-sectional view of the present invention in which a part of FIG. FIG. 2C is a sectional view further enlarging a part of FIG.

  FIG. 3A is a schematic cross-sectional view of a conventional organic EL display device corresponding to FIG. FIG. 3B is a cross-sectional view of a conventional example in which a part of FIG. FIG. 3C is a sectional view further enlarging a part of FIG.

  In the conventional example, the bank 209 is formed of an insulating film. In this case, as shown in FIG. 3C, a current that bypasses the side of the bank 209 flows, so that current concentration occurs at a position indicated by ♦ in FIG. 3B. Along with this current concentration, stress different from the flat portion is also generated due to the temperature difference between the light emitting region and the non-light emitting region.

  This current concentration and stress can be significantly reduced by passing a current through the end 314 of the bank with the first electrode layer. Although details of how the current concentration and stress affect the expansion of the non-light-emitting region are unclear, as a phenomenon, deterioration was suppressed by the measures of the present invention, and a highly reliable organic EL display device was obtained. In addition, a highly reliable organic EL display device can be obtained even for long-term use at high temperatures.

  As a means for this, the lower layer 309a of the bank is made of amorphous silicon having a low resistivity, and the side wall portion 313 of the bank is formed in a forward tapered shape. This is because the resistivity of amorphous silicon is comparable to that of the organic compound layer, and the resistivity can be controlled by doping. A material having a low resistivity such as an oxide conductive layer has no effect as the light emitting region. Furthermore, it can be considered that by forming a forward tapered shape, the current decreases as the distance from the light emitting region increases, and that the change in current density becomes less steep. In addition, since the bank side wall portion 313 has a forward tapered shape, even if the resistivity varies to some extent, the current density is always reduced, and a stable effect can be obtained.

  In addition, since the lower layer 309a having a low resistivity and the upper layer 309b having a high resistivity can be formed using the same material, a forward tapered shape can be easily obtained by isotropic etching utilizing a radical reaction. .

  Note that amorphous silicon suitable for the present invention is so-called hydrogenated amorphous silicon containing hydrogen, but it is not always necessary to have a purity sufficient for use in TFTs. If the resistivity can be controlled, the function can be achieved, and halogen elements and other group 4 elements may be included.

  Hereinafter, description will be given along the manufacturing procedure.

  A TFT is formed on a substrate 301 such as glass, quartz, or silicon by a conventionally known method. Specifically, an underlayer is first formed on the substrate surface. Amorphous silicon is deposited, polycrystallized, doped and patterned. After forming the gate insulating film 303, a gate electrode 304 is deposited and patterned. After the high concentration doping, an insulating film (not shown) is deposited and patterned together with the gate insulating film. An electrode layer (not shown) is deposited and patterned. A protective film 305 is deposited and patterned to complete the TFT. The base layer and the insulating film can be formed using silicon oxide, silicon nitride, silicon oxynitride, or the like. Amorphous silicon, silicon oxide, silicon nitride, silicon oxynitride, or the like can be manufactured by plasma CVD or the like. For the gate electrode and the electrode layer, a simple metal such as tantalum, chromium, tungsten, molybdenum, aluminum, an alloy, silicide, or the like can be used. A sputter link method or a vacuum deposition method can be used for manufacturing.

  Subsequently, a planarization film 306 is applied, and a contact hole 307 for electrode connection is provided and patterned in a shape corresponding to the TFT. The first electrode layer 308 is deposited by a sputtering method or the like, and is patterned into a shape for each display pixel.

  Next, an amorphous silicon film is provided over the entire surface of the substrate over which the first electrode layer 308 is provided. The lower layer of the amorphous silicon is doped to reduce the resistivity, and the upper layer is formed of a high resistivity film with a small amount of doping or no doping. An RF plasma CVD method or the like can be used for the production. Hydrogen gas or silane gas is used as a source gas, and phosphine or diborane is added for doping. In the case where the first electrode layer 308 is a cathode layer, phosphine is preferably added as a doping gas in an amount of about 0.001% to 1% with respect to the silane gas. In the case where the first electrode layer 308 is an anode layer, it is preferable to add diborane as a doping gas in an amount of about 0.01% to 1% with respect to the silane gas. The thickness of the lower layer 309a having a low resistivity is preferably 10 nm to 300 nm. Thereafter, only the doping gas may be stopped in the middle, or may be continuously formed, or may be continuously formed in different film formation chambers that supply only hydrogen gas and silane gas. Amorphous silicon having a high resistivity without adding a doping gas is provided with a thickness of 100 nm to 1000 nm. The lower layer 309a with low resistivity and the upper layer 309b with high resistivity may be step-changed or continuously changed.

  Thereafter, a photoresist is applied, exposed and developed to cover the periphery of the first electrode layer 308 of each pixel and form a photoresist in a desired pattern having an opening in the center.

By performing isotropic etching using CF ₄ and O ₂ gas in a dry etching apparatus, amorphous silicon can be formed in the same pattern as the photoresist, and thereby the bank side wall portion 313 can be formed in a forward tapered shape. Thereafter, the photoresist is peeled off and washed.

  An energy barrier may occur at the interface between the amorphous silicon and the organic compound layer. In order to reduce the energy barrier, an oxide conductive layer such as tin oxide, indium tin oxide, zinc oxide, indium zinc oxide, or vanadium oxide is formed on the bank 309 following sufficient dehydration treatment such as heating in a vacuum. It may be provided with a thickness of 5 nm to 10 nm.

  Thereafter, following a sufficient dehydration process such as heating in vacuum, a plurality of organic compound layers 311 are deposited corresponding to each display pixel by a vacuum evaporation method or the like using a metal mask. If the emission color differs depending on the display pixel, different materials may be deposited in multiple steps. In the case of a single color, the charge transport layer, the charge injection layer, and the like may be provided uniformly across each pixel. Subsequently, the second electrode layer 312 is uniformly deposited.

  The first and second electrode layers can be made of aluminum, chromium, silver, magnesium, tin oxide, zinc oxide, indium oxide, ITO, or the like. Mixtures and laminated structures are also possible.

  The organic compound layer 311 includes an electron transport layer, a light emitting layer, and a hole (hole) transport layer (not shown). The structure of the organic compound layer 311 is not limited to this, and the organic compound layer is formed into a two-layer structure by using a transport layer that also serves as a light emitting layer, or by providing a hole injection layer or an electron injection layer. The layer configuration can be a four-layer or five-layer configuration.

For example, as a hole transporting substance, N, N′-diphenyl-N, N′-di (3-methylphenyl) -1,1′-diphenyl-4,4′-diamine (TPD);
Triphenylamines represented by N, N′-diphenyl-N, N′-dinaphthyl-1,1′-diphenyl-4,4′-diamine (NPD), N-isopropylcarbazole, biscarbazole derivatives, pyrazoline Derivatives;
Heterocyclic compounds represented by stilbene compounds, hydrazone compounds, oxadiazole derivatives and phthalocyanine derivatives;
In the polymer system, polycarbonate, polystyrene derivatives, polyvinyl carbazole, polysilane, polyphenylene vinylene and the like having the above monomer in the side chain are preferable.

As a material for the light emitting layer, in addition to anthracene, pyrene, and 8-hydroxyquinoline aluminum, for example, bisstyryl anthracene derivative, tetraphenylbutadiene derivative, coumarin derivative, oxadiazole derivative;
Distyrylbenzene derivatives, pyrrolopyridine derivatives, perinone derivatives, cyclopentadiene derivatives, thiadiazolopyridine derivatives, in polymer systems, polyphenylene vinylene derivatives, polyparaphenylene derivatives;
Polythiophene derivatives and the like can be used. Further, as the dopant added to the light emitting layer, rubrene, quinacridone derivatives, phenoxazone 660, DCM1, perinone, perylene, coumarin 540, diazaindacene derivatives and the like can be used as they are.

Examples of the electron transporting substance include 8-hydroxyquinoline aluminum, hydroxybenzoquinoline beryllium, 2- (4-biphenyl) -5- (4-t-butylphenyl) -1,3,4-oxadiazole (t-BuPBD). Oxadiazole derivatives such as
1,3-bis (4-t-butylphenyl-1,3,4-oxadizolyl) biphenylene (OXD-1), 1,3-bis (4-t-butylphenyl-1) of oxadiazole dimer system derivatives , 3,4-oxadizolyl) phenylene (OXD-7);
Examples include triazole derivatives and phenanthroline derivatives.

The materials used for the hole transport layer, the light emitting layer, and the electron transport layer can form each layer alone. Polyvinyl chloride, polycarbonate, polystyrene, poly (N-vinylcarbazole) are used as the polymer binder. Polymethyl methacrylate;
Solvent-soluble resins such as polybutyl methacrylate, polyester, polysulfone, polyphenylene ether, polybutadiene, hydrocarbon resin, ketone resin, phenoxy resin, polyurethane resin, phenol resin, xylene resin, petroleum resin;
It can also be used by being dispersed in a curable resin such as a urea resin, a melamine resin, an unsaturated polyester resin, an alkyd resin, an epoxy resin, or a silicone resin.

  After these organic light emitting regions are formed, glass or the like provided with a digging is further sealed with an adhesive layer in order to block oxygen, water, and the like from the outside. It is preferable to provide a hygroscopic material in the internal space. Further, a protective film such as silicon nitride or silicon nitride oxide may be deposited on the member manufactured up to the second electrode layer by a plasma CVD method or the like.

  Examples of the organic EL display device of the present invention will be described.

<Example 1>
A TFT is manufactured on a glass substrate 301, a planarization film 306 is formed, and patterning is omitted because it is manufactured by a conventionally known method.

  On top of this, IZO was deposited as a cathode layer with a thickness of 80 nm by a sputtering method, followed by etching using a photoresist and patterning, whereby a first electrode layer 308 was produced.

This substrate was fixed to a substrate holder of a capacitively coupled plasma CVD apparatus, and was sufficiently degassed by heating at 200 ° C. for 30 minutes in a vacuum. Thereafter, SiH ₄ diluted to 10% with hydrogen gas was supplied to the chamber at a flow rate of 300 sccm and PH ₃ diluted to 100 ppm with hydrogen gas at a flow rate of 3 sccm, and the pressure was maintained at 133 Pa. The element ratio (P / Si) of phosphorus to silicon of the supply gas is 0.001%, 50 W, a high frequency of 13.56 MHz is applied, and n-type a-Si is 200 nm on the substrate at a substrate temperature of 200 ° C. A film was formed with a thickness. Once the discharge is stopped and the gas supply is stopped, SiH ₄ diluted to 10% is supplied again at a flow rate of 300 sccm, and the others are the same under the same conditions. That's it.

The pattern of the bank 102 in FIG. 1 was formed of a photoresist by taking out from the plasma CVD apparatus and applying, exposing, and developing a photoresist. After the post cure of the photoresist, the substrate was isotropically etched using a plasma separation type reactive dry etching apparatus. That is, plasma generated by microwave excitation of substrate temperature: 50 ° C., pressure: 30 Pa, carbon fluoride (CF ₄ ) flow rate: 300 sccm, oxygen (O ₂ ) flow rate: 80 sccm moves through the transport tube. Then, the amorphous silicon film was isotropically etched by radicals that reached the chamber.

  Thereafter, the photoresist was peeled off, and the bank side wall portion 313 was formed in a forward tapered shape.

After heating at 150 ° C. for 30 minutes at a pressure of 10 ⁻² Pa in a vacuum apparatus with a mask alignment mechanism, the organic compound layer 311 was vapor-deposited at a pressure of 10 ⁻⁴ Pa. First, as an electron injection layer, cesium carbonate was formed to a thickness of 40 nm as a dopant of a phenanthroline compound and an alkali metal compound. Next, a phenanthroline compound having a thickness of 10 nm was formed as an electron transporting layer. Next, a co-evaporated film of coumarin 6 (1.0 wt%) and tris [8-hydroxyquinolinate] aluminum (Alq3) was formed to a thickness of 30 nm to form a light emitting layer. A N′-α-dinaphthylbenzidine (α-NPD) film was formed thereon to a thickness of 60 nm to form a hole transport layer.

  Subsequently, a second electrode 312 was formed as an anode layer by sputtering with ITO to a thickness of 60 nm.

  It moved continuously in the glove box managed by the dew point of -70 degrees C or less, the commercially available moisture absorption material was installed inside the glass member which provided the digging, and it adhere | attached with the ultraviolet curable resin.

  Even when a high-temperature driving test at 60 ° C. for 500 hours was performed, a decrease in overall luminance was observed, but there was no deterioration around the light emitting region.

Prior to Example 1, a plurality of samples in which the light emitting region defining layer was made of the SiN insulating film of Example 3 was prepared as a test. In a part of this, the configuration of the light emitting region is manufactured under the same conditions as the material of Example 1, and the sample 11 in which the light emitting region of FIG. 5A is configured of cathode layer / organic compound layer / anode layer is manufactured. did. In addition, the sample 12 in which the light emitting region of FIG. 5B has a structure of cathode layer / amorphous silicon (thickness 200 nm) / organic compound layer / anode layer and the doping amount of amorphous silicon is ₃ sccm in PH ₃ flow rate is also partly. Also made. Further, a sample 13 having a doping amount of PH ₃ flow rate of 1 sccm was prepared in another part, and a sample 14 using amorphous silicon not doped in another part was prepared.

  The current value when 5 V was applied as the driving voltage was as follows. The value obtained by estimating the resistance during driving from the applied voltage and driving current is also entered.

  From this result, the doping amount of Example 1 was determined.

  As a result of elemental analysis of the produced film by secondary ion mass spectrometry, the concentration of phosphorus element with respect to silicon element contained in the film is also shown.

<Comparative Example 1>
In Example 1, amorphous silicon having a low resistivity was produced in the same manner as in Example 1 except that it was produced under the conditions of Sample 14 without adding a doping gas. When a high-temperature driving test at 60 ° C. was performed, a non-light emitting region was generated around the light emitting region after about 200 hours.

<Comparative example 2>
In Example 1, amorphous silicon having a low resistivity was produced in the same manner as in Example 1 except that it was produced under the conditions of Sample 13 with the doping gas reduced to a flow rate of 1 sccm. When a high-temperature driving test at 60 ° C. was performed, a non-light-emitting region was generated around the light-emitting region after about 300 hours.

<Example 2>
TFTs are fabricated on a glass substrate, a planarization film is formed, and patterning is omitted because it is fabricated by a conventionally known method.

  On top of this, ITO was deposited as an anode layer with a thickness of 70 nm by a sputtering method, followed by patterning by etching using a photoresist to produce a first electrode layer.

This substrate was fixed to a substrate holder of a capacitively coupled plasma CVD apparatus, and was sufficiently degassed by heating at 200 ° C. for 30 minutes in a vacuum. Thereafter, SiH ₄ diluted to 10% with hydrogen gas was supplied to the chamber at a flow rate of 300 sccm and B ₂ H ₆ diluted to 100 ppm with hydrogen gas at a flow rate of 20 sccm, and the pressure was maintained at 133 Pa. The element ratio (P / Si) of boron to silicon of the supply gas is 0.013%, 50 W, 13.56 MHz high frequency is applied, and p-type a-Si is 200 nm on the substrate at a substrate temperature of 200 ° C. A film was formed with a thickness. Once the discharge is stopped and the gas supply is stopped, SiH ₄ diluted to 10% is supplied again at a flow rate of 300 sccm, and the others are the same under the same conditions. That's it.

The pattern of the bank 102 in FIG. 1 was formed of a photoresist by taking out from the plasma CVD apparatus and applying, exposing, and developing a photoresist. After the post cure of the photoresist, the substrate was isotropically etched using a plasma separation type reactive dry etching apparatus. That is, plasma generated by microwave excitation of substrate temperature: 50 ° C., pressure: 30 Pa, carbon fluoride (CF ₄ ) flow rate: 300 sccm, oxygen (O ₂ ) flow rate: 80 sccm moves through the transport tube. Then, the amorphous silicon film was isotropically etched by radicals that reached the chamber.

  Thereafter, the photoresist was peeled off, and the bank side wall portion 313 was formed in a forward tapered shape.

This substrate is put into a sputtering apparatus for producing a cathode connected to a mask vapor deposition apparatus, heated at 150 ° C. for 30 minutes at a pressure of 10 ⁻² Pa, and then 5 nm of ITO is deposited on both the light emitting region and the bank. The entire surface was made to the thickness.

Subsequently, the organic compound layer was mask-deposited at a pressure of 10 ⁻⁴ Pa in a vacuum apparatus with a mask alignment mechanism. First, N′-α-dinaphthylbenzidine (α-NPD) was formed to a thickness of 60 nm as a hole transport layer. Next, a co-evaporated film of coumarin 6 (1.0 wt%) and tris [8-hydroxyquinolinate] aluminum (Alq3) was formed to a thickness of 30 nm to form a light emitting layer. Next, a phenanthroline compound having a thickness of 10 nm was formed as an electron transporting layer. A cesium carbonate film having a thickness of 40 nm was formed thereon as an electron injection layer as a dopant for the phenanthroline compound and the alkali metal compound.

  Subsequently, a second electrode layer as a cathode layer was made of ITO with a thickness of 60 nm by sputtering.

  It moved continuously in the glove box managed by the dew point of -70 degrees C or less, the commercially available moisture absorption material was installed inside the glass member which provided the digging, and it adhere | attached with the ultraviolet curable resin.

  Even when a high-temperature driving test at 60 ° C. for 500 hours was performed, a decrease in overall luminance was observed, but there was no deterioration around the light emitting region.

Prior to Example 2, a plurality of samples were prepared in which the light emitting region defining layer was made of the SiN insulating film of Example 3 as a test. In a part of this, the configuration of the light emitting region of FIG. 5A was manufactured under the same conditions as the materials in Example 2, and a sample 21 having a configuration of anode layer / organic compound layer / cathode layer was manufactured. In addition, a sample 22 in which the light emitting region of FIG. 5B is configured as anode layer / ITO (thickness 5 nm) / organic compound layer / cathode layer was also prepared. Furthermore, in another part, a sample 23 in which the light emitting region is composed of an anode layer / amorphous silicon (thickness 200 nm) / organic compound layer / cathode layer and a doping amount of B ₂ H ₆ flow rate 20 sccm was prepared. Further, a sample 24 using amorphous silicon with a doping amount of B ₂ H ₆ flow rate of 5 sccm as another part, and a sample 25 using non-doped amorphous silicon as another part were prepared. Furthermore, in another part, a sample 26 in which the light emitting region is composed of an anode layer / amorphous silicon (thickness 200 nm) / ITO (thickness 5 nm) / organic compound layer / cathode layer and the doping amount is B ₂ H ₆ flow rate 20 sccm. Produced.

  The current value when 5 V was applied as the driving voltage was as follows. The value obtained by estimating the resistance during driving from the applied voltage and driving current is also entered.

  From this result, the doping amount of Example 2 was determined.

  As a result of elemental analysis of the produced film by secondary ion mass spectrometry, the concentration of boron element with respect to silicon element contained in the film is also shown.

<Comparative Example 3>
In Example 2, amorphous silicon having a low resistivity was produced in the same manner as in Example 2 except that it was produced under the conditions of Sample 25 without adding a doping gas. When a high-temperature driving test at 60 ° C. was performed, a non-light emitting region was generated around the light emitting region after about 200 hours.

<Comparative example 4>
In Example 2, amorphous silicon having a low resistivity was produced in the same manner as in Example 2 except that it was produced under the conditions of Sample 24 with the doping gas reduced to a flow rate of 5 sccm. When a high-temperature driving test at 60 ° C. was performed, a non-light emitting region was generated around the light emitting region after about 200 hours.

<Example 3>
Example 3 will be described with reference to FIG.

  Since the TFT is manufactured on the glass substrate 401, the flattening film 406 is formed, and the patterning is performed by the method conventionally known as in the second embodiment, the description is omitted.

  On top of this, ITO was laminated as an anode layer with a thickness of 70 nm by a sputtering method, followed by etching using a photoresist and patterning, whereby a first electrode layer 408 was produced.

  On this substrate, a photoresist was applied, and exposure and development were performed so as to leave a pattern of the opening 410, thereby forming a resist pattern for lift-off. More preferably, the end of the resist is formed in a reverse taper by intentionally shifting the focus during exposure.

This substrate was placed in a vacuum deposition apparatus, and after evacuating the pressure to 10 ⁻⁵ Pa once, oxygen was supplied at a flow rate of 30 sccm, and the pressure of the exhaust valve was adjusted to keep the pressure at 1 Pa. Films were deposited at a deposition rate of 0.1 nm per second by resistance heating using a ceramic-coated tungsten boat with tin installed. The film thickness was measured with a crystal vibration type film thickness meter, and the thickness was set to 70 nm. The resistivity of the film that can be formed by changing the pressure was adjustable from about 0.1 Ωcm to about 100 Ωcm.

  This substrate was immersed in a resist stripping solution to remove the lift-off resist pattern, and tin oxide was formed in a pattern having an opening in the light emitting region. When the end portion of the resist is formed in a reverse taper shape, the end portion of tin oxide can be formed in a forward taper shape.

This substrate was fixed to a substrate holder of a capacitively coupled plasma CVD apparatus. While maintaining the room temperature in vacuum, SiH ₄ diluted to 10% with hydrogen gas was supplied to the chamber at a flow rate of 300 sccm, NH ₃ at a flow rate of 100 sccm, and hydrogen gas at a flow rate of 1000 sccm, and the pressure was maintained at 133 Pa. A high frequency of 50 W and 60 MHz was applied, and a-SiN was formed to a thickness of 300 nm on the substrate.

It was taken out from the plasma CVD apparatus, and a photoresist was applied, exposed and developed. After the post cure of the photoresist, the substrate was isotropically etched using a plasma separation type reactive dry etching apparatus. That is, plasma generated by microwave excitation of substrate temperature: 50 ° C., pressure: 30 Pa, carbon fluoride (CF ₄ ) flow rate: 300 sccm, oxygen (O ₂ ) flow rate: 80 sccm moves through the transport tube. Then, the SiN film was isotropically etched by radicals that reached the chamber.

  Thereafter, the photoresist was peeled off, and the side wall portion 413 of the upper layer 409b of the bank was formed in a forward tapered shape. The upper layer 409b of the bank was formed wider than the opening of the lower layer 409a. The distance is preferably 2 μm or less, more preferably 1 μm.

Subsequently, the organic compound layer 411 was subjected to mask vapor deposition at a pressure of 10 ⁻⁴ Pa in a vacuum apparatus with a mask alignment mechanism. First, N′-α-dinaphthylbenzidine (α-NPD) was formed to a thickness of 60 nm as a hole transport layer. Next, a co-evaporated film of coumarin 6 (1.0 wt%) and tris [8-hydroxyquinolinate] aluminum (Alq3) was formed to a thickness of 30 nm to form a light emitting layer. Next, a phenanthroline compound having a thickness of 10 nm was formed as an electron transporting layer. Furthermore, as an electron injection layer, a cesium carbonate film having a thickness of 40 nm was formed as a dopant of a phenanthroline compound and an alkali metal compound.

  Subsequently, a second electrode 412 as a cathode layer was made of ITO with a thickness of 60 nm by sputtering.

  It moved continuously in the glove box managed by the dew point of -70 degrees C or less, the commercially available moisture absorption material was installed inside the glass member which provided the digging, and it adhere | attached with the ultraviolet curable resin.

  Even when a high-temperature driving test at 60 ° C. for 500 hours was performed, a decrease in overall luminance was observed, but there was no deterioration around the light emitting region.

  Prior to Example 3, a plurality of samples were prepared in which the light emitting region defining layer was experimentally made of an SiN insulating film having the same conditions as described above. In part of this, the configuration of the light emitting region of FIG. 5A was manufactured under the same conditions as the materials in Example 3, and a sample 31 having a configuration of anode layer / organic compound layer / cathode layer was prepared. In addition, a sample 32 having a structure of tin oxide (thickness: 100 nm) / organic compound layer / cathode layer, in which the light emitting region of FIG. In addition, a sample 33 having a structure of tin oxide (thickness: 100 nm) / organic compound layer / cathode layer having a light emitting region of anode layer / 1 Pa was also prepared. In addition, a sample 34 having a structure in which the light emitting region is anode layer / ITO (thickness: 100 nm) of Example 2 / organic compound layer / cathode layer was also prepared. The current value when 5 V was applied as the driving voltage was as follows. The value obtained by estimating the resistance during driving from the applied voltage and driving current is also entered.

  From this result, the pressure at the time of forming the tin oxide of Example 3 was determined.

<Comparative Example 5>
In Example 3, a charge injection bank was prepared in the same manner as in Example 3 except that ITO was provided to a thickness of 100 nm under the conditions of Sample 35. When a high-temperature driving test at 60 ° C. was performed, a non-light emitting region was generated around the light emitting region after about 200 hours. In ITO, the resistivity is too low, and almost the same current flows as in the light emitting region, and it is considered that current concentration occurs at the end of the insulating bank.

It is an example of a schematic plan view of a general organic EL display device. (A) is a cross-sectional schematic diagram which shows an example of the organic electroluminescent light-emitting device of this invention. (B) is an enlarged schematic diagram of (a). (C) is an enlarged schematic diagram of (b). (A) is a cross-sectional schematic diagram showing an example of a general active matrix organic EL light emitting device. (B) is an enlarged schematic diagram of (a). (C) is an enlarged schematic diagram of (b). (A) is a cross-sectional schematic diagram which shows another example of the organic electroluminescent light-emitting device of this invention. (B) is an enlarged schematic diagram of (a). (C) is an enlarged schematic diagram of (b). (A) is a cross-sectional schematic diagram which shows an example of the structure 1 for the verification of resistivity. (B) is a cross-sectional schematic diagram which shows an example of the structure 2 for resistivity verification.

Explanation of symbols

101 First electrode layer 102 Bank 103 Bank edge 104 Light emitting region 201 Substrate 202 Channel layer 203 Gate insulating film 204 Gate 205 Protective film 206 Planarizing film 207 Contact hole 208 First electrode layer 209 Bank 210 Light emitting region 211 Multiple Organic compound layer 212 Second electrode layer 301 Substrate 302 Channel layer 303 Gate insulating film 304 Gate 305 Protective film 306 Flattening film 307 Contact hole 308 First electrode layer 309 Bank 309a Low resistivity bank 309b High resistivity bank 310 Light emitting region 311 Multiple organic compound layers 312 Second electrode layer 313 Bank side wall portion 314 Portion adjacent to light emitting region of bank 401 Substrate 402 Channel layer 403 Gate insulating film 404 Gate 405 Protective film 406 Planarizing film 407 1st electrode layer 409a Charge injection bank 409b Insulating bank 410 Light emitting region 411 Multiple organic compound layers 412 Second electrode layer 413 Bank side wall portion 414 Bank adjacent light emitting region 501 Substrate 502 First electrode layer 503 Insulating bank 504 Charge injection layer 505 Multiple organic compound layers 506 Second electrode layer

Claims (8)

A first electrode layer is provided on a substrate, a bank is formed by patterning an opening that covers the periphery of the first electrode layer and defines a light emitting region, and a plurality of organic compound layers and a second electrode layer are provided thereon. In the provided organic EL display device,
The bank includes a charge injecting lower layer in contact with the first electrode layer and the organic compound layer, and an insulating upper layer for preventing conduction between the lower layer and the second electrode layer. ,
An organic EL display device, wherein an opening of an upper layer of the bank is wider than an opening of a lower layer.   2. The organic EL display device according to claim 1, wherein a current flows in a portion adjacent to the light emitting region of the bank at a current density lower than that of the light emitting region during driving.   3. The organic EL display device according to claim 1, wherein the lower layer of the bank is doped amorphous silicon having a low resistivity.   4. The organic EL display device according to claim 1, wherein the upper layer of the bank is made of amorphous silicon having a high resistivity. In an organic EL display device in which a cathode layer is provided on a substrate, a bank is formed by patterning an opening that covers the periphery of the cathode layer and defines a light emitting region, and a plurality of organic compound layers and an anode layer are provided thereon.
The bank includes a lower layer made of amorphous silicon having a low resistivity to which a donor element in contact with the cathode layer and the organic compound layer is added in an amount of 10 ⁻⁵ atomic% or more, and a donor that prevents conduction between the lower layer and the anode layer. And an upper layer made of amorphous silicon having a high resistivity of less than 10 ⁻⁵ atomic%,
An organic EL display device, wherein the bank has a sidewall formed in a forward tapered shape. Provided on the substrate is a cathode layer corresponding to a plurality of sub-pixels, a bank is formed by patterning openings that cover the periphery of the cathode layer and define a light-emitting area of each sub-pixel, and a plurality of organic compound layers and In an organic EL display device provided with an anode layer,
The bank includes a lower layer made of amorphous silicon having a low resistivity to which a donor element in contact with the cathode layer and the organic compound layer is added in an amount of 10 ⁻⁵ atomic% or more, and a donor that prevents conduction between the lower layer and the anode layer. And an upper layer made of amorphous silicon having a high resistivity of less than 10 ⁻⁵ atomic%,
An organic EL display device comprising: a side wall portion of the bank provided in a forward taper shape; and an oxide conductive layer provided thereon so as to be thin so that electrical conduction between sub-pixels can be ignored. In an organic EL display device in which an anode layer is provided on a substrate, a bank is formed by patterning an opening that covers the periphery of the anode layer and defines a light emitting region, and a plurality of organic compound layers and a cathode layer are provided thereon.
The bank includes a lower layer made of amorphous silicon having a low resistivity to which ^10-4 atomic% or more of an acceptor element in contact with the anode layer and the organic compound layer is added, and an acceptor for preventing conduction between the lower layer and the cathode layer. And an upper layer made of amorphous silicon with a high resistivity of less than 10 ⁻⁴ atomic%,
An organic EL display device, wherein the bank has a sidewall formed in a forward tapered shape. Provided on the substrate is an anode layer corresponding to a plurality of subpixels, a bank is formed by patterning an opening that covers the periphery of the anode layer and defines a light emitting region of each subpixel, and a plurality of organic compound layers and In an organic EL display device provided with a cathode layer,
The bank includes a lower layer made of amorphous silicon having a low resistivity to which ^10-4 atomic% or more of an acceptor element in contact with the anode layer and the organic compound layer is added, and an acceptor for preventing conduction between the lower layer and the cathode layer. And an upper layer made of amorphous silicon with a high resistivity of less than 10 ⁻⁴ atomic%,
An organic EL display device comprising: a side wall portion of the bank provided in a forward taper shape; and an oxide conductive layer provided thereon so as to be thin so that electrical conduction between sub-pixels can be ignored.

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