JP2009094948A - Channel search circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To efficiently perform channel search by notifying the existence of a broadcast signal, by generating an interrupt signal. <P>SOLUTION: A circuit 80 for channel search detects the existence of a broadcast signal from a received signal. Then, the circuit 80 generates an interrupt signal when it detects the broadcast signal, and does not generate the interrupt signal, when it can not detect the broadcast signal. Thus, an external processor 50 for control can detect the existence of the broadcast signal, on the basis of whether the interrupt signal is transmitted. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a channel search circuit that searches for a broadcast signal on a channel.

  In television broadcasting, digital terrestrial broadcasting has begun. In this terrestrial digital broadcasting, there is a one-segment broadcasting, which is suitable for reception and reproduction in a portable device (mobile body). Therefore, 1-segment receivers are widely used for mobile phones and vehicle navigation screens.

  FIG. 1 shows an image of a vehicle navigation (car navigation) screen. The 1-segment received video is displayed on the screen 10 of the navigation system with the 1-segment reception function. In such a system, the 1-segment receiver can be operated by the remote controller 12 or the touch panel.

  Here, the channel on which the broadcast is performed varies depending on the region. Therefore, the receiver needs to perform a channel search for investigating the presence or absence of broadcast waves in all channels in order to know in which channel the broadcast signal exists. This channel search is also called channel scan. This channel search is started, for example, by a channel search execution instruction using a remote control or a touch panel by the user.

JP 2002-320152 A

  Here, in a fixed television, since the broadcast channel does not change once installed, the channel search need only be performed once in the initial stage of use. However, the car navigation system is a moving body, and the broadcast channel changes depending on the area where the car has moved. Thus, channel search can occur frequently. In addition, the reception status of radio waves constantly changes in a mobile object. In particular, there may be a case where the electric field strength fluctuates even in a short time interval such as multipath due to reflection of a building or the like, fading of mobile reception, and the reception situation is instantaneously deteriorated to hinder detection. For this reason, channel search may be performed many times, and it is desirable that the channel search be performed as quickly and accurately as possible.

  The present invention provides a broadcast detection means for detecting the presence of a broadcast signal from a received signal of a predetermined channel, an interrupt signal when the broadcast signal is detected by the broadcast detection means, and an interrupt signal when the broadcast signal cannot be detected. And an interrupt signal generation means that does not generate, and transmits an interrupt signal to an external processor, so that the external processor notifies the presence of broadcast on the channel.

  The broadcast detection means preferably has a synchronization detection circuit for detecting synchronization with the broadcast signal from the received signal, and it is preferable to detect the presence of the broadcast signal by this synchronization detection.

  Also, it has a reset register that can be accessed from an external processor, and a reset command is written to the reset register to reset the synchronization detection circuit and detect a broadcast signal in a new channel. Is preferred.

  There are at least two types of synchronization detection in the synchronization detection circuit, symbol synchronization and frame synchronization. Which synchronization detection is performed is determined by a command stored in a search register accessible from an external processor. It is preferred that

  The channel search circuit is preferably integrated into a one-chip semiconductor integrated circuit, and preferably includes a pin for outputting an interrupt signal to the outside.

  According to the present invention, since the presence of a broadcast signal can be notified by generating an interrupt signal, the external processor need only detect the presence or absence of the interrupt signal, the burden can be reduced, and the time required for channel search can be reduced. It can be shortened.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 2 is a diagram illustrating an overall configuration of the 1-segment receiver. A TV broadcast wave is received by the antenna 20 and supplied to the tuner 22. The tuner 22 performs reception processing on the received signal, extracts a predetermined channel (desired wave), and supplies it to the OFDM demodulator 24. Here, OFDM is an abbreviation for Orthogonal Frequency Division Multiplexing, and 1-segment broadcasting is broadcast with OFDM modulation, and a 1-segment receiver demodulates 1-segment TV signals. 1 has an OFDM demodulator 24.

  The OFDM demodulated signal in the OFDM demodulator 24 is processed in the back end unit 30, and sound is output from the speaker 32 and video is output from the display device 34. Note that an input device 36 formed by a touch panel, a remote control receiving unit, or the like is connected to the back end unit 30.

  The back-end unit 30 includes a TS decoder 40. The OFDM demodulator 24 outputs a compressed data stream of program information called a TS (Transport Stream) signal. The signal is supplied to the TS decoder 40. The TS decoder 40 decodes the TS signal and separates it into compressed individual audio data strings and video data strings called ES (Elementary Stream) signals such as audio and video. The obtained audio data string is supplied to the audio decoder 42, decoded into an audio signal, and supplied to the speaker 32. The video data string is supplied to the image decoder 44, decoded into a video signal, and supplied to the display device 34. Input from the input device 36 including a channel search instruction is taken into the back-end unit 30 via the interface 46 and supplied to the CPU 48. The CPU 48 generates various commands according to the input signal and controls various operations in the back end unit 30. The CPU 48 sends necessary signals to the outside.

  FIG. 3 shows the configuration of the OFDM demodulator 24. The OFDM demodulator 24 is formed as a single semiconductor integrated circuit, and is connected to an external control processor 50 via a communication line 52. The communication line 52 is a serial communication line such as I2C. The control processor 50 is also preferably used as the CPU 48 of the back end unit 30, and controls the channel search operation in the OFDM demodulator 24 according to a channel search request from the input device 36.

  The OFDM demodulator 24 supplies a received signal of a predetermined channel from the tuner 22 to an FFT (Fast Fourier Transform) unit 60. The FFT unit 60 performs fast Fourier transform on the received signal and supplies the Fourier-transformed signal to the demodulation processing unit 62. The demodulation processing unit 62 performs various processes on the Fourier-transformed signal to obtain a TS signal. Note that various processes of the demodulation processing unit 62 have been performed in the past, and a description thereof will be omitted.

  The received signal from the tuner 22 is supplied to the symbol synchronization circuit 64. The symbol synchronization circuit 64 detects symbol synchronization for the received signal from the tuner 22. The OFDM signal is configured in symbol units, and the guard interval between each symbol is a copy of the subsequent signal. Therefore, by generating a one-symbol delayed signal, obtaining a correlation signal between the current signal and the delayed signal, taking the moving average of the guard interval width for the obtained correlation signal, and detecting the peak position of the moving average Detect synchronization position and synchronize. When symbol synchronization is established in the symbol synchronization circuit 64, this symbol synchronization signal is supplied to the clock synchronization / generation unit 66, where the oscillation frequency is locked and the clock synchronized with the symbol synchronization signal based on the symbol synchronization. Is generated.

  Further, the output of the FFT unit 60 is supplied to a frame decoding unit 68 to detect data clumps in OFDM modulation / demodulation called OFDM segment frames. One frame is composed of 204 symbols, and each frame includes a 16-bit unique word. Therefore, the frame decoding unit 68 detects frame synchronization by detecting a unique word.

  When the frame decoding unit 68 detects frame synchronization, the TMCC (Transmission and Multiplexing Configuration Control) decoding unit 70 decodes the TMCC. The TMCC is a signal including a control signal important for performing demodulation such as information on whether or not it is a terrestrial digital broadcast and a modulation method, and is decoded by the TMCC decoding unit 70. Various operations of the demodulation processing unit 62 are controlled in accordance with the frame synchronization signal and TMCC thus obtained.

  In this embodiment, the OFDM demodulator 24 has a channel search circuit 80. The channel search circuit 80 indicates that the symbol synchronization of the symbol synchronization circuit 64 is detected, the frame synchronization of the frame decoding unit 68 is detected, or the TMCC decoding of the TMCC decoding unit 70 is performed. In response to either, it detects that a broadcast signal is present on the currently received channel.

  The channel search circuit 80 outputs an interrupt signal via a pin provided in a semiconductor integrated circuit (IC or LSI) that forms the OFDM demodulator 24. That is, the control processor 50 also has a pin for receiving an interrupt signal from the channel search circuit 80, and the CPU of the control processor 50 receives an interrupt signal from the channel search circuit 80.

  The OFDM demodulator 24 has a control register 82 therein, in which various commands supplied from the control processor 50 via the communication line 52 are stored. In particular, in the present embodiment, the control register 82 includes a reset register 82A. In the reset register 82A, a reset command or reset data is written by the control processor 50, so that in the OFDM demodulator 24, a symbol synchronization circuit 64, a clock synchronization / generation unit 66, a frame decoding unit 68, The synchronization related part of the TMCC decoding unit 70 is reset. The FFT unit 60 performs FFT of the input signal at any time and does not need to be reset, and the demodulation processing unit 62 often does not need to change various parameters and does not reset. That is, in the present embodiment, only the synchronization detection part can be reset.

  When reset data is written to the reset register 82A by the control processor 50, the synchronization detection portion is reset. As a result, synchronization can be detected in the synchronization detection portion, and the presence of a broadcast signal can be detected. That is, when the control processor 50 instructs to set the tuning channel of the tuner 22 to a predetermined channel, the control processor 50 writes reset data to the reset register 82A, thereby starting reset and synchronization detection of the synchronization detection portion. . The channel search circuit 80 sends an interrupt signal to the control processor 50 when the presence of a broadcast wave is detected according to the synchronization detection result. When detecting the interrupt signal, the CPU of the control processor 50 detects the presence of the broadcast signal in the channel, and writes the tuning channel command of the tuner 22 and the reset data to the reset register for the next channel. .

  In this way, when a channel search command is received, the channel is sequentially changed by the control processor 50, and the presence or absence of the broadcast signal of the channel is detected by the channel search circuit 80 of the OFDM demodulator 24. . The control processor 50 determines that there is no broadcast signal when no interrupt signal is received within a predetermined time. Therefore, the control processor 50 does not need to inquire whether there is a broadcast signal in one channel, and can determine whether there is an interrupt signal. Therefore, the control processor 50 does not need to look at the contents of the control register 82, and can reduce the processing procedure and shorten the time required for detection.

  In the present embodiment, as described above, the presence of a broadcast signal can be detected from any state of the symbol synchronization circuit 64, the frame decoding unit 68, and the TMCC decoding unit 70. Here, the comparison of these three detections is as follows.

(I) Symbol synchronization The fact that symbol synchronization can be detected means that an OFDM modulated wave has been received, and it can be considered that digital broadcasting is being performed on that channel. If it is short, about 30 symbols are received, so detection is very fast. However, false detection may occur due to analog broadcasting or noise.

(Ii) Frame synchronization Terrestrial digital broadcasting has a structure of 204 symbols per frame. Frame synchronization finds frame synchronization by detecting a 16-bit long unique word (one bit is included in one symbol). The fact that frame synchronization can be detected means that an OFDM modulated wave has been received, and it is possible to detect that digital broadcasting is being performed on that channel. Since the processing is finer than symbol synchronization, false detection is reduced.

(Iii) Utilizing TMCC Decoding Information Decoding information of a signal including a control signal for performing demodulation called TMCC is used. Since the result of extracting meaningful information from the OFDM signal is used, digital broadcasting is reliably performed. There is no false detection. However, it takes time.

  Thus, in the present embodiment, it is possible to detect whether a broadcast signal exists in each channel by the detection of the above three formats. Which type of detection is performed may be determined by the control processor 50 writing control data in the control register 82 and the channel search circuit 80 referring to the data.

  FIG. 4 shows the configuration of the channel search circuit 80. The symbol synchronization circuit 64 detects that synchronization has been achieved when the peak of the triangular wave obtained by the moving average is equal to or greater than the threshold value, that is, the presence of the broadcast signal, and outputs the comparison result. The frame decoding unit 68 detects the presence of a broadcast signal upon completion of decoding of frame synchronization and outputs the flag. When the TMCC decoding is completed, the TMCC decoding unit 70 detects the presence of the broadcast signal and outputs the flag.

  These signals are input to the OFDM demodulator 24. The channel search circuit 80 is supplied with a symbol synchronization detection result from the symbol synchronization circuit 64, a frame synchronization word detection flag from the frame decoding unit 68, and a TMCC decoding completion flag from the TMCC decoding unit 70. The In the channel search circuit 80, simple processing is performed for each flag. First, regarding the output of the symbol synchronization circuit 64, it is determined that the synchronization is achieved when the triangular wave by the moving average exceeds a user-specified threshold value. A case is considered. To reduce this, the counter 90 is used to determine that symbol synchronization has been achieved when the threshold value is exceeded for a certain period of time.

  Flag rising detection circuits 92 and 94 are added to the output of the frame decoding unit 68 and the output of the TMCC decoding unit 70. The outputs of the counter 90 and the rise detection circuits 92 and 94 are selected by a multiplexer (MUX) 96, and the selected output is stored in the register 98. Accordingly, whether or not a broadcast signal is detected in the channel is determined according to the stored contents of the register 98, and thereby whether or not an interrupt signal is transmitted is determined.

  In addition, which detection condition is used in the multiplexer 96 is determined by the interrupt condition data in the control register 82. That is, the detection condition is set when the control processor 50 writes desired data in the control register 82 in accordance with user settings or the like.

  As described above, when the set condition is detected, the result is supplied to the control processor 50 using the interrupt pin. Further, when reset data is written (cleared) to the reset register 82A, a channel search-dedicated reset (reset of only the synchronization portion) is applied, and the above-described processing from detection of symbol synchronization is started.

  FIG. 5 shows a flowchart of the entire channel search process. In the control processor 50, a wait time for the search result for one channel is set (S11). Also, a condition for accepting an interrupt signal, that is, an interrupt condition is set (S12). If there is a channel search request, the tuner 22 sets a channel (S13). Then, reset data is written into the reset register 82A, and broadcast signal detection is started (S14). If a broadcast signal is detected in S14, an interrupt signal should be supplied from the channel search circuit 80, and the control processor 50 detects the presence or absence of the interrupt signal (S15). In the case of timeout in the detection of S15 (S16), when the interrupt signal is detected and the broadcast signal is detected (S17), it is determined whether the channel is the last (S18).

  If the determination in S17 is Yes, the process ends. If No, the process returns to S13 and the same process is repeated for the next channel.

  In this way, it is detected whether there is a broadcast signal for all channels, and the result is stored. Therefore, it is possible to display the existing channel on the display device 34 or the like, and the user can select the channel by viewing the display.

  As in this embodiment, when the interrupt signal is not used, the OFDM demodulator circuit writes the channel search result to the control register 82, and the control processor 50 periodically updates the contents of the control register 82 through communication using I2C. It is conceivable to determine the presence or absence of a broadcast signal by confirming automatically or after a certain time. However, periodically reading the control register places a heavy load on the CPU of the control processor 50. Further, the method of confirming after a certain time results in a time loss when a channel is detected earlier than that.

  Further, in order to detect the presence of broadcast waves, symbol synchronization, frame synchronization, TMCC decoding, Viterbi decoding, TS reproduction, RS decoding, and the like can be considered. As the demodulation progresses further, the determination of the presence / absence of a broadcast signal becomes more reliable. However, since it is necessary to wait until the demodulation process proceeds to some extent, it takes time to detect one channel.

  In addition, since channel search needs to be performed for all channels (13ch to 62ch) in the UHF band, which is the broadcasting band of digital broadcasting, the detection time for one channel has a considerable impact on the total search time. If searching for one channel takes 1 second, it simply takes 50 seconds to complete the search.

  In the present embodiment, it is possible to select whether to detect the presence of a broadcast wave by any of the detection methods. As a result, the user can select a detection method according to the situation at that time, and it is possible to always select the optimum method.

  In addition, a method may be considered in which the first channel is searched for all channels under an early detection condition, and the search is performed only for the channel detected in the first time by changing to a more accurate condition than in the second time.

It is a figure which shows the installation condition of 1 segment receiver. It is a figure which shows the whole structure of 1 segment receiver. It is a figure which shows the structure of an OFDM demodulation circuit. It is a figure which shows the structure of the circuit for channel searches. It is a flowchart which shows the operation | movement of a channel search.

Explanation of symbols

  10 screens, 12 remote controllers, 20 antennas, 22 tuners, 24 OFDM demodulation units, 30 back-end units, 32 speakers, 34 display devices, 36 input devices, 40 TS decoders, 42 audio decoders, 44 image decoders, 46 interfaces, 48 CPUs , 50 control processor, 52 communication line, 60 FFT section, 62 demodulation processing section, 64 symbol synchronization circuit, 66 clock / synchronization generation section, 68 frame decoding section, 70 TMCC decoding section, 80 channel search circuit, 82 control register , 82A reset register, 90 counter, 92, 94 rise detection circuit, 96 multiplexer, 98 register.

Claims (5)

Broadcast detection means for detecting the presence of a broadcast signal from a received signal of a predetermined channel;
An interrupt signal is generated when a broadcast signal is detected by the broadcast detection means, and an interrupt signal is not generated when the broadcast signal cannot be detected;
Including
A channel search circuit characterized by transmitting an interrupt signal to an external processor to notify the presence of broadcast in the channel in the external processor. The channel search circuit according to claim 1, wherein
The broadcast detection means has a synchronization detection circuit for detecting synchronization with a broadcast signal from a received signal,
A channel search circuit for detecting the presence of a broadcast signal by detecting the synchronization. The channel search circuit according to claim 2, wherein
It has a reset register that can be accessed from an external processor,
A channel search circuit, wherein a reset command is written in the reset register to reset the synchronization detection circuit and detect a broadcast signal in a new channel. The channel search circuit according to claim 3, wherein
There are at least two types of synchronization detection in the synchronization detection circuit, symbol synchronization and frame synchronization, and which synchronization detection is performed is determined by a command stored in a search register accessible from an external processor. A channel search circuit characterized by the above. In the channel search circuit according to any one of claims 1 to 4,
The channel search circuit is a single-chip semiconductor integrated circuit and has a pin for outputting an interrupt signal to the outside.

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