JP2009076784A5 - - Google Patents

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JP2009076784A5
JP2009076784A5 JP2007246069A JP2007246069A JP2009076784A5 JP 2009076784 A5 JP2009076784 A5 JP 2009076784A5 JP 2007246069 A JP2007246069 A JP 2007246069A JP 2007246069 A JP2007246069 A JP 2007246069A JP 2009076784 A5 JP2009076784 A5 JP 2009076784A5
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Prior art keywords
semiconductor wafer
substrate
semiconductor
layer
insulating layer
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JP2007246069A
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JP2009076784A (en
JP5252867B2 (en
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Priority claimed from JP2007246069A external-priority patent/JP5252867B2/en
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Publication of JP2009076784A5 publication Critical patent/JP2009076784A5/ja
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Claims (7)

半導体ウエハに対して酸化雰囲気中にハロゲンを添加した熱酸化を行うことにより、前記半導体ウエハに前記ハロゲンが1×10 17 /cm 〜5×10 20 /cm の濃度で含まれる酸化膜を形成し、
イオン化した水素であって質量がプロトンよりも重い水素イオンを電界で加速して、前記酸化膜を介して前記半導体ウエハ注入し、該半導体ウエハの表面から所定の深さに分離層を形成し、
前記半導体ウエハの一の面側の前記酸化膜上に窒素を含有する第1の絶縁層を形成し、
前記半導体ウエハの一の面側の前記第1の絶縁層上に第2の絶縁層を形成し、
絶縁表面を有する基板の一の面側と、前記半導体ウエハの一の面側形成された前記第2の絶縁層とを貼り合わせて熱処理及び加圧処理を行い、前記絶縁表面を有する基板と前記半導体ウエハとの接合強度を向上させ、
前記分離層若しくはその近傍を劈開面として、前記絶縁表面を有する基板の一の面に厚さが200nm以下である半導体層を残存させた状態で、前記半導体ウエハを剥離することを特徴とする半導体基板の製造方法。
An oxide film in which the halogen is contained in the semiconductor wafer at a concentration of 1 × 10 17 / cm 3 to 5 × 10 20 / cm 3 by performing thermal oxidation with halogen added to the semiconductor wafer in an oxidizing atmosphere. Forming,
Ionized hydrogen, which is heavier than protons in mass, is accelerated by an electric field and injected into the semiconductor wafer through the oxide film to form a separation layer at a predetermined depth from the surface of the semiconductor wafer. ,
Forming a first insulating layer containing nitrogen on the oxide film on one surface side of the semiconductor wafer;
Forming a second insulating layer on the first insulating layer on one side of the semiconductor wafer;
And one surface side of the substrate having an insulating surface, said semiconductor wherein formed on one surface side of the wafer the second by bonding the insulating layer by heat treatment and pressure treatment, a substrate having the insulating surface Improving the bonding strength with the semiconductor wafer,
The semiconductor wafer is peeled off with the semiconductor layer having a thickness of 200 nm or less remaining on one surface of the substrate having the insulating surface with the separation layer or its vicinity as a cleavage plane. A method for manufacturing a substrate.
半導体ウエハの一の面に窒素を含有する第1の絶縁層を形成し、
イオン化した水素であって質量がプロトンよりも重い水素イオンを電界で加速して、前記第1の絶縁層を介して前記半導体ウエハに注入し、該半導体ウエハの表面から所定の深さに分離層を形成し、
前記半導体ウエハの一の面側の前記第1の絶縁層上に第2の絶縁層を形成し、
絶縁表面を有する基板の一の面側と、前記半導体ウエハの一の面側形成された前記第2の絶縁層とを貼り合わせて熱処理を行い、前記絶縁表面を有する基板と前記半導体ウエハとの接合強度を向上させ、
前記分離層若しくはその近傍を劈開面として、前記絶縁表面を有する基板の一の面に厚さが200nm以下である半導体層を残存させた状態で、前記半導体ウエハを剥離することを特徴とする半導体基板の製造方法。
Forming a first insulating layer containing nitrogen on one surface of the semiconductor wafer;
Ionized hydrogen ions whose mass is heavier than protons are accelerated by an electric field, injected into the semiconductor wafer through the first insulating layer, and separated into a predetermined depth from the surface of the semiconductor wafer. Form the
Forming a second insulating layer on the first insulating layer on one side of the semiconductor wafer;
One surface side of the substrate having an insulating surface and the second insulating layer formed on the one surface side of the semiconductor wafer are bonded together to perform heat treatment, and the substrate having the insulating surface and the semiconductor wafer Improve the bonding strength of
The semiconductor wafer is peeled off with the semiconductor layer having a thickness of 200 nm or less remaining on one surface of the substrate having the insulating surface with the separation layer or its vicinity as a cleavage plane. A method for manufacturing a substrate.
請求項1または2において、In claim 1 or 2,
前記半導体層に酸素濃度が10ppm以下の不活性気体中でのレーザアニールを行うことにより前記半導体層の表面の平滑化処理を行うことを特徴とする半導体基板の製造方法。A method for producing a semiconductor substrate, comprising subjecting the semiconductor layer to a surface smoothing treatment by laser annealing in an inert gas having an oxygen concentration of 10 ppm or less.
請求項1乃至3のいずれか一項において、In any one of Claims 1 thru | or 3,
前記第1の絶縁層は、窒素よりも酸素の含有量が多い酸化窒化シリコン層と、酸素よりも窒素の含有量が多い窒化酸化シリコン層との積層構造であることを特徴とする半導体基板の製造方法。The first insulating layer has a stacked structure of a silicon oxynitride layer having a higher oxygen content than nitrogen and a silicon nitride oxide layer having a higher nitrogen content than oxygen. Production method.
請求項1乃至4のいずれか一項において、
前記絶縁表面を有する基板としてガラス基板を用いることを特徴とする半導体基板の製造方法。
In any one of Claims 1 thru | or 4,
A method of manufacturing a semiconductor substrate, wherein a glass substrate is used as the substrate having an insulating surface.
請求項1乃至5のいずれか一項において、
水素プラズマを生成し、該プラズマ中に生成されるイオンを質量分離せず、電界で加速するこにより、前記イオン化した水素であって質量がプロトンよりも重い水素イオンである イオンの割合を80%以上含まれるようにして前記半導体ウエハに注入することを特徴とする半導体基板の製造方法。
In any one of Claims 1 thru | or 5,
To produce hydrogen plasma, without ion mass separation, which is generated in the plasma, by an acceleration child in the electric field, the mass comprising said ionized hydrogen is heavy hydrogen ions than protons H 3 + ions The semiconductor substrate manufacturing method is characterized in that the semiconductor substrate is implanted into the semiconductor wafer so that the ratio of 80% or more is included .
請求項1乃至5のいずれか一項において、
水素プラズマを生成し、該プラズマ中に生成されるイオンを質量分離して、前記イオン化した水素であって質量がプロトンよりも重い水素イオンを電界で加速するこにより、前記半導体ウエハに注入することを特徴とする半導体基板の製造方法。
In any one of Claims 1 thru | or 5,
To produce hydrogen plasma, by the ions produced in the plasma mass separation, the mass comprising said ionized hydrogen by a child accelerated by an electric field heavy hydrogen ions than protons are injected into the semiconductor wafer A method of manufacturing a semiconductor substrate.
JP2007246069A 2007-09-21 2007-09-21 Manufacturing method of semiconductor substrate Expired - Fee Related JP5252867B2 (en)

Priority Applications (1)

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JP2007246069A JP5252867B2 (en) 2007-09-21 2007-09-21 Manufacturing method of semiconductor substrate

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Application Number Priority Date Filing Date Title
JP2007246069A JP5252867B2 (en) 2007-09-21 2007-09-21 Manufacturing method of semiconductor substrate

Publications (3)

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JP2009076784A JP2009076784A (en) 2009-04-09
JP2009076784A5 true JP2009076784A5 (en) 2010-10-21
JP5252867B2 JP5252867B2 (en) 2013-07-31

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8318588B2 (en) * 2009-08-25 2012-11-27 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate
US8735263B2 (en) * 2011-01-21 2014-05-27 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP6579086B2 (en) * 2016-11-15 2019-09-25 信越半導体株式会社 Device forming method
JP6686962B2 (en) * 2017-04-25 2020-04-22 信越半導体株式会社 Method for manufacturing bonded wafer
CN109989111A (en) * 2019-03-13 2019-07-09 电子科技大学 Preparation method, monocrystal thin films and the resonator of spliced small size monocrystal thin films

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JP2000150835A (en) * 1998-11-05 2000-05-30 Fujitsu Ltd Manufacture of non-single crystal silicon thin-film
FR2877491B1 (en) * 2004-10-29 2007-01-19 Soitec Silicon On Insulator COMPOSITE STRUCTURE WITH HIGH THERMAL DISSIPATION
WO2007014320A2 (en) * 2005-07-27 2007-02-01 Silicon Genesis Corporation Method and structure for fabricating multiple tile regions onto a plate using a controlled cleaving process

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